THVD1406, THVD1426
SLLSF87A – MAY 2021 – REVISED NOVEMBER 2021
THVD1406, THVD1426 3.3-V to 5-V RS-485 Transceivers with Auto-direction Control
and ±12-kV IEC ESD Protection
1 Features
3 Description
•
The THVD14x6 (THVD1406 and THVD1426) devices
are robust half-duplex RS-485 transceivers for
industrial applications. These devices feature autodirection control using the data input pin that reduces
the reliance on separate pins for driver-enable and
the receiver-enable functionality. This reduces the
number of isolation channels needed or number of
the GPIO pins needed for logic control. The bus
pins are immune to high levels of IEC ESD events
eliminating need of additional system level protection
components.
•
•
•
•
•
•
•
•
•
•
•
•
•
Meets or exceeds the requirements of the TIA/
EIA-485A standard
3-V to 5.5-V Supply voltage
Auto-direction control using the data input pin
Half-duplex RS-422/RS-485
Data rates
– THVD1406: 500 kbps
– THVD1426: 12 Mbps
Bus I/O protection
– ±16-kV HBM ESD
– ±12-kV IEC 61000-4-2 Contact discharge
– ±15-kV IEC 61000-4-2 Air gap discharge
– ±4-kV IEC 61000-4-4 Fast transient burst
±16-V bus fault protection
Small, space-saving 8-Pin SOT package option
(2.1 mm x 1.2 mm)
– See the layout example for co-layout with
standard SOIC-8 package
Extended industrial temperature range: -40°C to
125°C
Large receiver hysteresis for noise rejection
Low power consumption
– Low standby supply current: 3µA (typ)
– Quiescent current during operation: 1.7 mA
(typ)
Glitch-free power-up, power-down for hot plug-in
capability
Open, short, and idle bus fail-safe
1/8 Unit load (Up to 256 bus nodes)
The devices operate from a single 3-V to 5.5-V
supply. The wide common-mode voltage range and
low input leakage on bus pins make devices suitable
for multi-point applications over long cable runs.
The devices are available in industry standard 8-pin
SOIC package for drop-in compatibility. The devices
are also available in a small, space-saving SOT
package. The devices are characterized for ambient
temperatures from –40°C to 125°C.
Device Information
PACKAGE(1)
PART NUMBER
THVD1406
THVD1426
(1)
BODY SIZE (NOM)
SOIC (8)
4.90 mm × 3.91 mm
SOT (8)
2.10 mm x 1.20 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
VCC
2 Applications
•
•
•
•
•
Factory automation and control
Building automation
HVAC systems
Video surveillance
Smart meters
R
RE
A
SHDN
B
D
GND
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
THVD1406, THVD1426
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SLLSF87A – MAY 2021 – REVISED NOVEMBER 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 ESD Ratings - IEC Specifications............................... 4
6.4 Recommended Operating Conditions.........................4
6.5 Thermal Information....................................................5
6.6 Power Dissipation Characteristics.............................. 5
6.7 Electrical Characteristics.............................................6
6.8 Switching Characteristics (THVD1406).......................7
6.9 Switching Characteristics (THVD1426).......................7
6.10 Typical Characteristics.............................................. 8
7 Parameter Measurement Information.......................... 10
8 Detailed Description......................................................12
8.1 Overview................................................................... 12
8.2 Functional Block Diagrams....................................... 12
8.3 Feature Description...................................................12
8.4 Device Functional Modes..........................................12
9 Application Information Disclaimer............................. 14
9.1 Application Information............................................. 14
9.2 Typical Application.................................................... 14
10 Power Supply Recommendations..............................18
11 Layout........................................................................... 19
11.1 Layout Guidelines................................................... 19
11.2 Layout Example...................................................... 19
12 Device and Documentation Support..........................21
12.1 Device Support....................................................... 21
12.2 Receiving Notification of Documentation Updates..21
12.3 Support Resources................................................. 21
12.4 Trademarks............................................................. 21
12.5 Electrostatic Discharge Caution..............................21
12.6 Glossary..................................................................21
13 Mechanical, Packaging, and Orderable
Information.................................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (May 2021) to Revision A (November 2021)
Page
• Changed document status from Advanced Information to Production data ...................................................... 1
2
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5 Pin Configuration and Functions
R
1
8
VCC
RE
2
7
B
SHDN
3
6
A
4
5
GND
D
Not to scale
Figure 5-1. D (8-Pin SOIC) , DRL (8-Pin SOT) Top View
Table 5-1. Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
R
1
O
Receiver data output
RE
2
I
Receiver enable, active low (internal 2-MΩ pull-up)
SHDN
3
I
Shutdown enable, active low (internal 2-MΩ pull-up)
D
4
I
Driver data input
GND
5
-
Device ground
A
6
I/O
Bus I/O port, A (complementary to B)
B
7
I/O
Bus I/O port, B (complementary to A)
VCC
8
P
3-V to 5.5-V supply
For the device.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
VCC
Supply voltage
–0.5
7
V
VL
Input voltage at any logic pin (D, SHDN or RE)
–0.3
5.7
V
VA, VB
Voltage at A or B inputs
–16
16
V
IO
Receiver output current
–24
24
mA
TJ
Junction temperature
170
°C
TSTG
Storage temperature
150
°C
(1)
–65
UNIT
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
VALUE
UNIT
Between bus terminals (A, B)
and GND
±16,000
V
All other pins
±4,000
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2)
(1)
(2)
V
±1,500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 ESD Ratings - IEC Specifications
VALUE
V(ESD)
Electrostatic discharge
IEC 61000-4-2 ESD (Contact Discharge), bus terminals and GND
±12,000
IEC 61000-4-2 ESD (Air-Gap Discharge), bus terminals and GND
±15,000
IEC 61000-4-4 EFT (Fast transient or burst), bus terminals and GND
±4,000
UNIT
V
6.4 Recommended Operating Conditions
VCC
Supply voltage
VID
Differential input voltage
VI
Input voltage at any bus terminal(1)
VIH
High-level input voltage (D, SHDN, and RE inputs)
VIL
Low-level input voltage (D, SHDN, and RE inputs)
NOM
MAX
3
5
5.5
V
–12
12
V
–7
12
V
2
5.5
V
V
0
0.8
–60
60
–8
8
UNIT
IO
Output current
RL
Differential load resistance
1/tUI
Signaling rate: THVD1406
1/tUI
Signaling rate: THVD1426
TJ
Junction temperature
–40
TA (2)
Operating ambient temperature
–40
125
°C
TSHDN
Thermal shutdown threshold
(temperature rising)
Thermal shutdown threshold (temperature rising)
THYS
Thermal shutdown hysteresis
Thermal shutdown hysteresis
(1)
4
Driver
MIN
Receiver
54
150
60
mA
Ω
500
kbps
12
Mbps
150
°C
170
°C
15
°C
The algebraic convention in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
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(2)
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Operation is specified for internal (junction) temperatures up to 150°C. Self-heating due to internal power dissipation should be
considered for each application. Maximum junction temperature is internally limited by the thermal shut-down (TSD) circuit which
disables the driver outputs when the junction temperature reaches 170°C.
6.5 Thermal Information
THVD1406, THVD1426
THERMAL METRIC(1)
DRL (SOT)
D (SOIC)
8 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
112.2
126.0
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
28.4
66.2
°C/W
RθJB
Junction-to-board thermal resistance
22.1
69.4
°C/W
ψJT
Junction-to-top characterization parameter
1.2
18.7
°C/W
ψJB
Junction-to-board characterization parameter
22.0
68.7
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.6 Power Dissipation Characteristics
PARAMETER
PD
TEST CONDITIONS
Power dissipation, driver and receiver enabled,
VCC = 5.5 V, TA = 125°C, 50% duty cycle
square-wave signal at maximum signaling rate
VALUE
Unterminated
RL = 300 Ω, CL = 50 pF
THVD1406
500 kbps
150
THVD1426
12 Mbps
155
RS-422 load
RL = 100 Ω, CL = 50 pF
THVD1406
500 kbps
175
THVD1426
12 Mbps
180
RS-485 load
RL = 54 Ω, CL = 50 pF
THVD1406
500 kbps
220
THVD1426
12 Mbps
225
UNIT
mW
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6.7 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
RL = 60 Ω, -7 V ≤ Vtest ≤ 12 V
1.5
2
RL = 60 Ω, -7 V ≤ Vtest ≤ 12 V, 4.5 V ≤ Vcc ≤ See Figure 7-1
5.5 V
2.1
3
2
2.5
1.5
2
2.1
3
MAX
UNIT
Driver
│VOD│
Driver differential-output
voltage magnitude
RL = 100 Ω, CL = 50 pF
RL = 54 Ω, CL = 50 pF
See Figure 7-2
RL = 54 Ω, 4.5 V ≤ Vcc ≤ 5.5 V
Δ│VOD│
Change in magnitude of driver
differential-output voltage
VOC(SS)
Steady-state common-mode
output voltage
ΔVOC
Change in differential driver
common-mode output voltage
VOC(PP)
Peak-to-peak driver commonmode output voltage
RL = 54 Ω or 100 Ω, CL = 50 pF, VCC = 3.3 V
│IOS│
Driver short-circuit output
current
-7 V ≤ [VA or VB] ≤ 12 V, or A pin shorted to B pin
II
Bus input current (driver
disabled)
VCC = 0 V or 5.5 V
VIT+
Positive-going receiver
differential-input voltage
threshold
VIT–
Negative-going receiver
differential-input voltage
threshold
VHYS (1)
Receiver differential-input
voltage threshold hysteresis
(VIT+ – VIT– )
VOH
Receiver high-level output
voltage
IOH = –4 mA
VOL
Receiver low-level output
voltage
IOL = 4 mA
IOZ
Receiver high-impedance
output current
VO = 0 V or VCC, RE = VCC
–50
RL = 54 Ω or 100 Ω, CL = 50 pF
See Figure 7-2
1
VCC / 2
–50
See Figure 7-2
V
50
mV
3
V
50
mV
200
-250
mV
250
mA
Receiver
VI = 12 V
VI = –7 V
75
–97
–70
-7 V ≤ VCM ≤ 12 V
100
–70
–45
µA
mV
–200
–150
mV
30
50
mV
VCC – 0.4
VCC – 0.2
0.2
V
0.4
V
–1
1
µA
–5
5
µA
1500
1800
µA
1000
1500
µA
2
4.1
µA
1700
3000
µA
1300
2500
µA
3
6.9
µA
Logic
IIN
Input current (D, SHDN, RE)
Supply
Driver and receiver enabled
ICC
ICC
Supply current (quiescent)
Supply current (quiescent)
VCC = 3.6
V
VCC = 5.5
V
SHDN = VCC, RE
Driver enabled, receiver disabled = VCC, D=0, no
load
Driver and receiver disabled
SHDN = 0, no
load
Driver and receiver enabled
SHDN = VCC,
RE = 0
D = 0, no load
SHDN = VCC, RE
Driver enabled, receiver disabled = VCC, D=0, no
load
Driver and receiver disabled
(1)
6
SHDN = VCC,
RE = 0
D = 0, no load
SHDN = 0, no
load
Under any specific conditions, VIT+ isspecified to be at least VHYS higher thanVIT–.
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6.8 Switching Characteristics (THVD1406)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
200
300
600
ns
275
500
ns
10
ns
ns
Driver
tr, tf
Driver differential output rise and fall times
tPHL, tPLH
Driver propagation delay
tSK(P)
Driver pulse skew, |tPHL – tPLH|
tPHZ, tPLZ
Driver disable time
tPZH, tPZL
tdevice_autodir
See Figure 7-3
Receiver enabled
Driver enable time
See Figure
7-4 and Figure 7-5
Receiver disabled
Driver active time in
the auto-direction mode
when SHDN is high and
D turns from low to high
Driver active time in the auto-direction
mode when SHDN is high and D switches
from low to high
Figure 7-8
4
80
200
200
650
ns
5
10
µs
8
14
µs
6
20
ns
40
110
ns
7
ns
15
60
ns
80
150
ns
TYP
MAX
UNIT
8
25
ns
17
35
ns
3.5
ns
15
38
ns
15
70
ns
5
10
µs
0.8
1.45
µs
4
16
ns
40
75
ns
5
ns
15
25
ns
80
170
ns
Receiver
tr, tf
Receiver output rise and fall times
tPHL, tPLH
Receiver propagation delay time
tSK(P)
Receiver pulse skew, |tPHL – tPLH|
tPHZ, tPLZ
Receiver disable time
See Figure 7-7
tPZL(1),
tPZH(1)
Receiver enable time
Driver enabled
See Figure 7-6
See Figure 7-7
6.9 Switching Characteristics (THVD1426)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
Driver
tr, tf
Driver differential output rise and fall times
tPHL, tPLH
Driver propagation delay
tSK(P)
Driver pulse skew, |tPHL – tPLH|
tPHZ, tPLZ
Driver disable time
tPZH, tPZL
tdevice_autodir
Driver enable time
See Figure 7-3
Receiver enabled
See Figure
7-4 and Figure 7-5
Receiver disabled
Driver active time in
Driver active time in the auto-direction
the auto-direction mode
mode when SHDN is high and D turns from when SHDN is high and
low to high
D switches from low to
high
Figure 7-8
0.4
Receiver
tr, tf
Receiver output rise and fall times
tPHL, tPLH
Receiver propagation delay time
tSK(P)
Receiver pulse skew, |tPHL – tPLH|
tPHZ, tPLZ
Receiver disable time
See Figure 7-7
Receiver enable time
Driver enabled
tPZL(1), tPZ
H(1)
See Figure 7-6
See Figure 7-7
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6.10 Typical Characteristics
6
Driver Output Voltage (V)
5
Driver Differential Output Voltage (V)
VOH (VCC=5V)
VOL (VCC=5V)
5.5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
10
20
30
40
50
60
Driver Output Current (mA)
70
5
4.8
4.6
4.4
4.2
4
3.8
3.6
3.4
3.2
3
2.8
2.6
2.4
80
VCC = 5 V
0
D001
5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80
Driver Output Current (mA)
D002
D001_driver_vout_iout.grf
DE = VCC
D002_driver_vdiff.grf
TA = 25°C
D=0V
Figure 6-1. Driver Output voltage vs Driver Output
Current
TA = 25°C
Figure 6-2. Driver Differential Output voltage vs
Driver Output Current
66
350
63
Fall time (VCC=5V)
Rise time (VCC=5V)
345
Driver Rise and Fall Time (ns)
Driver Output Current (mA)
DE = VCC
60
57
54
51
48
45
42
39
340
335
330
325
320
315
36
33
3
3.25
3.5
3.75
4
4.25 4.5
Vcc (V)
4.75
5
5.25
310
-40
5.5
-20
0
20
D003
40
60
80
Temperature (qC)
100
DE = VCC
D004_rise_fall.grf
D = VCC
Figure 6-3. Driver Output Current vs Supply
Voltage
140
D004
D003_Iout_vcc.grf
RL = 54 Ω
TA = 25°C
120
RL = 54 Ω
CL = 50 pF
Figure 6-4. Driver Rise or Fall Time vs Temperature
(THVD1406)
75
320
tPHL (ns) VCC=5V
tPLH (ns) VCC=5V
315
VCC=5V
Supply Current (mA)
Propgation Delay (ns)
70
310
305
300
295
290
65
60
55
285
280
-40
50
-20
0
20
40
60
80
Temperature (qC)
100
120
140
0
50
100
D005
150 200 250 300 350
Signaling Rate (kbps)
D005_prop_delay.grf
RL = 54 Ω
CL = 50 pF
8
450
500
D006
D006_Icc_datarate.grf
RL = 54 Ω
Figure 6-5. Driver Propagation Delay vs
Temperature (THVD1406)
400
TA = 25°C
Figure 6-6. Supply Current vs Signal Rate
(THVD1406)
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11
21
Rise Time (V CC = 5 V )
Fall Time (V CC = 5 V)
tPHL (VCC = 5 V)
tPLH (VCC = 5 V)
20
10
Propagation Delay (ns)
Driver Rise Fall Time (ns)
10.5
9.5
9
8.5
8
7.5
19
18
17
16
15
7
14
6.5
6
-40
-20
0
RL = 54 Ω
20
40
60
80
Temperature (C)
100
120
13
-40
140
CL = 50 pF
-20
0
20
40
60
80
Temperature (C)
RL = 54 Ω
Figure 6-7. Driver Rise or Fall Time vs Temperature
(THVD1426)
100
120
140
CL = 50 pF
Figure 6-8. Driver Propagation Delay vs
Temperature (THVD1426)
65
Supply Current (mA)
VCC = 5 V
60
55
50
0
RL = 54 Ω
2000
4000
6000
8000
Signaling Rate (kbps)
10000
12000
TA = 25°C
Figure 6-9. Supply Current vs Signal Rate (THVD1426)
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7 Parameter Measurement Information
375
Vcc
SHDN
A
D
Vtest
VOD
0V or Vcc
RL
+
B
375
Figure 7-1. Measurement of Driver Differential Output Voltage With Common-Mode Load
A
0V or Vcc
A
D
RL/2
VA
B
VB
VOD
RL/2
B
CL
VOC(PP)
VOC
ûVOC(SS)
VOC
Figure 7-2. Measurement of Driver Differential and Common-Mode Output With RS-485 Load
Vcc
Vcc
SHDN
A
D
Input
Generator
50
VI
50%
VI
VOD
RL= 54
0V
tPHL
tPLH
CL= 50 pF
90%
50%
10%
B
VOD
tr
~2 V
~ –
tf
V
Figure 7-3. Measurement of Driver Differential Output Rise and Fall Times and Propagation Delays
A
S1
D
SHDN
Input
Generator
50%
VI
RL = 110
B
CL =
50 pF
50
VI
Vcc
VO
0V
tPZH
90%
VOH
50%
VO
~
~ 0V
tPHZ
Figure 7-4. Measurement of Driver Enable and Disable Times With Active High Output and Pull-Down
Load
VCC
RL = 110
A
SHDN
Input
Generator
VI
50
S1
B
VO
Vcc
50%
VI
tPZL
CL =
50 pF
VO
0
V
tPLZ
≈
Vcc
50%
10%
VOL
Figure 7-5. Measurement of Driver Enable and Disable Times With Active Low Output and Pull-up Load
10
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3V
A
R VO
Input
Generator
50 Ÿ
VI
1.5V
B
0V
tPLH
tPHL
VOH
90%
CL=15 pF
50%
RE
0V
50 %
VI
VOD
10 %
tr
VOL
tf
Figure 7-6. Measurement of Receiver Output Rise and Fall Times and Propagation Delays
Vcc
VCC
Vcc
VI
50%
0V
SHDN
0V or Vcc
A
D
VO
R
B
tPZH(1)
1k
tPHZ
S1
VO
CL=15 pF
90%
50%
0V
RE
tPZL(1)
Input
Generator
50
VI
D at Vcc
S1 to GND
VOH
tPLZ
D at 0V
S1 to Vcc
VCC
VO
50%
10%
VOL
Figure 7-7. Measurement of Receiver Enable/Disable Times With Driver Enabled
0V
SHDN
A
D
Input
Generator
VI
50
Vcc
D
Vcc
VOD
B
RL=
54
~ 2V
CL= 50 pF
VOD
tdevice_auto-dir
~0 V
~–
V
Figure 7-8. Measurement of Auto-direction Control Timing Parameter (tdevice_auto-dir)
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8 Detailed Description
8.1 Overview
The THVD1406 is a low-power, half-duplex RS-485 transceiver suitable for data transmission up to 500 kbps.
The THVD1426 is a low-power, half-duplex RS-485 transceiver suitable for data transmission up to 12 Mbps.
8.2 Functional Block Diagrams
VCC
R
RE
A
SHDN
B
D
GND
8.3 Feature Description
Internal ESD protection circuits protect the transceiver against Electrostatic Discharges (ESD) according to IEC
61000-4-2 of up to ±12 kV (Contact Discharge), ±15 kV (Air Gap Discharge) and against electrical fast transients
(EFT) according to IEC 61000-4-4 of up to ±4 kV.
8.4 Device Functional Modes
When the shutdown pin, SHDN, is logic high, the differential outputs A and B follow the logic states at data input
D. When D is low, the output states reverse, B turns high, A becomes low, and VOD is negative. A logic high at
D causes A to turn high and B to turn low for a duration. In this case, the differential output voltage defined as
VOD = VA – VB is positive for tdevice-auto-dir. After this duration, the driver turns off and the receiver is enabled. The
device can be used in auto-direction mode by tying SHDN and RE pins together to logic high and controlling the
driver and receiver using the data input pin, D. This enables reducing the number of GPIO pins or the number
of isolation channels required to operate the device. Please refer to Driver Function Table and Receiver Function
Table for further details.
When SHDN is low, both the driver and the receiver are turned off and the device is in shutdown mode. In this
condition, the logic state at D is irrelevant. The SHDN pin has an internal pull-up resistor to VCC; thus, when left
open, the driver is status is dependent on the status of the D pin. The D pin has an internal pull-up resistor to
VCC, thus, when left open while the driver is enabled for tdevice-auto-dir, before bring disabled.
Table 8-1. Driver Function Table
INPUT
ENABLE
D
SHDN
A
OUTPUTS
B
H
H/OPEN
H
L
FUNCTION
Actively drive bus high for tdevice-auto-dir and
then bus is in high impedance
L
H/OPEN
L
H
Actively drive bus low
X
L
Z
Z
Driver disabled. Device in shutdown mode.
OPEN
H/OPEN
H
L
Actively drive bus high for tdevice-auto-dir and
then bus is in high impedance
When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage
defined as VID = VA – VB is positive and higher than the positive input threshold, VIT+, the receiver output, R,
turns high. When VID is negative and lower than the negative input threshold, VIT-, the receiver output, R, turns
low. If VID is between VIT+ and VIT- the output is indeterminate.
When RE is logic high or left open and D input is logic low, the receiver output is high-impedance and the
magnitude and polarity of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go
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failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (shortcircuit), or the bus is not actively driven (idle bus).
When RE is logic high or left open and D input switches from logic low to logic high, the receiver output is
high-impedance for the duration of tdevice-auto-dir. After the duration of tdevice-auto-dir, the receiver turns ON and
outputs a logic high or low depending upon the differntial bus input voltage.
Table 8-2. Receiver Function Table
DIFFERENTIAL INPUT
ENABLE
INPUT
OUTPUT
VID = VA – VB
RE
D
R
VIT+ < VID
L
X
H
Receive valid bus high
VIT- < VID < VIT+
L
X
?
Indeterminate bus state
VID < VIT-
L
X
L
Receive valid bus low
X
H/OPEN
L
Z
Receiver disabled
Receiver disabled by
for tdevice_autodir after D
switches from L to H.
Receiver output follows
bus input voltage after
tdevice_autodir
FUNCTION
X
H/OPEN
H
Z for
tdevice_autodir
followed by L
or H
depending
upon bus
input voltage
Open-circuit bus
L
X
H
Fail-safe high output
Short-circuit bus
L
X
H
Fail-safe high output
Idle (terminated) bus
L
X
H
Fail-safe high output
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9 Application Information Disclaimer
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The THVD14x6 devices are half-duplex RS-485 transceivers commonly used for asynchronous data
transmissions. The device can be used in auto-direction mode by tying SHDN and RE pins together to logic
high and controlling the driver and receiver using the data input pin, D. This enables reducing the number of
GPIO pins or the number of isolation channels required to operate the device. Please refer to Driver Function
Table and Receiver Function Table for further details.
9.2 Typical Application
An RS-485 bus consists of multiple transceivers connecting in parallel to a bus cable. To eliminate line
reflections, each cable end is terminated with a termination resistor, RT, whose value matches the characteristic
impedance, Z0, of the cable. This method, known as parallel termination, allows for higher data rates over longer
cable length.
R
R
RE
B
SHDN
D
R
A
R
A
RT
RT
D
A
B
SHDN
D
B
A
R
D
B
R
D
R
RE
RE SHDN D
D
R
RE SHDN D
Figure 9-1. Typical RS-485 Network With Half-Duplex Transceivers
9.2.1 Design Requirements
RS-485 is a robust electrical standard suitable for long-distance networking that may be used in a wide range of
applications with varying requirements, such as distance, data rate, and number of nodes.
9.2.1.1 Data Rate and Bus Length
There is an inverse relationship between data rate and cable length, which means the higher the data rate, the
shorter the cable length; and conversely, the lower the data rate, the longer the cable length. While most RS-485
systems use data rates between 10 kbps and 100 kbps, some applications require data rates up to 300 kbps at
distances of 4000 feet and longer. Longer distances are possible by allowing for small signal jitter of up to 5 or
10%.
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9.2.1.2 Stub Length
When connecting a node to the bus, the distance between the transceiver inputs and the cable trunk, known as
the stub, should be as short as possible. Stubs present a non-terminated piece of bus line which can introduce
reflections as the length of the stub increases. As a general guideline, the electrical length, or round-trip delay, of
a stub should be less than one-tenth of the rise time of the driver, thus giving a maximum physical stub length as
shown in Equation 1.
L(STUB) ≤ 0.1 × tr × v × c
(1)
where
•
•
•
tr is the 10/90 rise time of the driver
c is the speed of light (3 × 108 m/s)
v is the signal velocity of the cable or trace as a factor of c
9.2.1.3 Bus Loading
The RS-485 standard specifies that a compliant driver must be able to driver 32 unit loads (UL), where 1 unit
load represents a load impedance of approximately 12 kΩ. Because the THVD14x6 devices consist of 1/8 UL
transceivers, connecting up to 256 receivers to the bus is possible.
9.2.1.4 Receiver Failsafe
The differential receivers of the THVD14x6 are failsafe to invalid bus states caused by the following:
• Open bus conditions, such as a disconnected connector
• Shorted bus conditions, such as cable damage shorting the twisted-pair together
• Idle bus conditions that occur when no driver on the bus is actively driving
In any of these cases, the differential receiver outputs a failsafe logic high state so that the output of the receiver
is not indeterminate.
Receiver failsafe is accomplished by offsetting the receiver thresholds such that the input indeterminate range
does not include zero volts differential. To comply with the RS-422 and RS-485 standards, the receiver output
must output a high when the differential input VID is more positive than 200 mV, and must output a low when
VID is more negative than –200 mV. The receiver parameters which determine the failsafe performance are
VIT+, VIT–, and VHYS (the separation between VIT+ and VIT–). As shown in the Electrical Characteristics table,
differential signals more negative than –200 mV always causes a low receiver output, and differential signals
more positive than 200 mV always causes a high receiver output.
When the differential input signal is close to zero, it is still above the VIT+ threshold, and the receiver output is
high. Only when the differential input is more than VHYS below VIT+ does the receiver output transition to a low
state. Therefore, the noise immunity of the receiver inputs during a bus fault conditions includes the receiver
hysteresis value, VHYS, as well as the value of VIT+.
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9.2.1.5 Transient Protection
The bus pins of the THVD14x6 transceiver family include on-chip ESD protection against ±16-kV HBM and
±8-kV IEC 61000-4-2 contact discharge. The International Electrotechnical Commission (IEC) ESD test is far
more severe than the HBM ESD test. The 50% higher charge capacitance, C(S), and 78% lower discharge
resistance, R(D), of the IEC model produce significantly higher discharge currents than the HBM model.
R(C)
R(D)
High-Voltage
Pulse
Generator
330 Ω
(1.5 kΩ)
Device
Under
Test
150 pF
(100 pF)
C(S)
Current (A)
50 M
(1 M)
40
35
30 10-kV IEC
25
20
15
10
5
0
0
50
100
10-kV HBM
150
200
250
300
Time (ns)
Figure 9-2. HBM and IEC ESD Models and Currents in Comparison (HBM Values in Parenthesis)
The on-chip implementation of IEC ESD protection significantly increases the robustness of equipment.
Common discharge events occur because of human contact with connectors and cables. Designers may choose
to implement protection against longer duration transients, typically referred to as surge transients.
EFTs are generally caused by relay-contact bounce or the interruption of inductive loads. Surge transients
often result from lightning strikes (direct strike or an indirect strike which induce voltages and currents), or
the switching of power systems, including load changes and short circuit switching. These transients are often
encountered in industrial environments, such as factory automation and power-grid systems.
Figure 9-3 compares the pulse-power of the EFT and surge transients with the power caused by an IEC ESD
transient. The left hand diagram shows the relative pulse-power for a 0.5-kV surge transient and 4-kV EFT
transient, both of which dwarf the 10-kV ESD transient visible in the lower-left corner. 500-V surge transients are
representative of events that may occur in factory environments in industrial and process automation.
22
20
18
16
14
12
10
8
6
4
2
0
Pulse Power (MW)
Pulse Power (kW)
The right hand diagram shows the pulse-power of a 6-kV surge transient, relative to the same 0.5-kV surge
transient. 6-kV surge transients are most likely to occur in power generation and power-grid systems.
0.5-kV Surge
4-kV EFT
10-kV ESD
0
5
10
15
20
25
30
35
40
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
6-kV Surge
0.5-kV Surge
0
5
10
15
20
25
30
35
40
Time (µs)
Time (µs)
Figure 9-3. Power Comparison of ESD, EFT, and Surge Transients
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In the event of surge transients, high-energy content is characterized by long pulse duration and slow decaying
pulse power. The electrical energy of a transient that is dumped into the internal protection cells of a transceiver
is converted into thermal energy, which heats and destroys the protection cells, thus destroying the transceiver.
Figure 9-4 shows the large differences in transient energies for single ESD, EFT, surge transients, and an EFT
pulse train that is commonly applied during compliance testing.
1000
100
Surge
10
1
Pulse Energy (J)
EFT Pulse Train
0.1
0.01
EFT
10-3
10-4
ESD
10-5
10-6
0.5
1
2
4
6
8 10
15
Peak Pulse Voltage (kV)
Figure 9-4. Comparison of Transient Energies
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9.2.2 Detailed Design Procedure
In order to protect bus nodes against high-energy transients, the implementation of external transient protection
devices is necessary. Figure 9-5 suggests a protection circuit against 1 kV surge (IEC 61000-4-5) transients.
Table 9-1 shows the associated bill of materials.
5V
100nF
100nF
10k
VCC
R1
R
RxD
MCU/
UART
DIR
RE
A
SHDN
B
TVS
D
TxD
R2
10k
GND
Figure 9-5. Transient Protection Against Surge Transients for Half-Duplex Devices
Table 9-1. Bill of Materials
DEVICE
FUNCTION
ORDER NUMBER
MANUFACTURER(1)
XCVR
RS-485 transceiver
THVD1406
TI
10-Ω, pulse-proof thick-film resistor
CRCW0603010RJNEAHP
Vishay
Bidirectional 400-W transient suppressor
CDSOT23-SM712
Bourns
R1
R2
TVS
(1)
See the Third-Party Products Disclaimer
9.2.3 Application Curves
SHDN = REB = 5 V
VCC = 5 V
TA = 25 °C
Figure 9-6. THVD1426 Waveforms Showing Auto-Direction Control Using D Input
10 Power Supply Recommendations
To ensure reliable operation at all data rates and supply voltages, each supply should be decoupled with a 100
nF ceramic capacitor located as close to the supply pins as possible. This helps to reduce supply voltage ripple
present on the outputs of switched-mode power supplies and also helps to compensate for the resistance and
inductance of the PCB power planes.
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11 Layout
11.1 Layout Guidelines
Robust and reliable bus node design often requires the use of external transient protection devices in order
to protect against surge transients that may occur in industrial environments. Since these transients have a
wide frequency bandwidth (from approximately 3 MHz to 300 MHz), high-frequency layout techniques should be
applied during PCB design.
1. Place the protection circuitry close to the bus connector to prevent noise transients from propagating across
the board.
2. Use VCC and ground planes to provide low inductance. Note that high-frequency currents tend to follow the
path of least impedance and not the path of least resistance.
3. Design the protection components into the direction of the signal path. Do not force the transient currents to
divert from the signal path to reach the protection device.
4. Apply 100-nF to 220-nF decoupling capacitors as close as possible to the VCC pins of transceiver, UART
and/or controller ICs on the board.
5. Use at least two vias for VCC and ground connections of decoupling capacitors and protection devices to
minimize effective via inductance.
6. Use 1-kΩ to 10-kΩ pull-up resistors for RE and SHDN lines to connect them together to VCC to reduce the
number of GPIO lines to MCU or the number of isolation channels.
7. Insert pulse-proof resistors into the A and B bus lines if the TVS clamping voltage is higher than the specified
maximum voltage of the transceiver bus pins. These resistors limit the residual clamping current into the
transceiver and prevent it from latching up.
8. While pure TVS protection is sufficient for surge transients up to 1 kV, higher transients require metal-oxide
varistors (MOVs) which reduce the transients to a few hundred volts of clamping voltage, and transient
blocking units (TBUs) that limit transient current to less than 1 mA.
11.2 Layout Example
5
R
MCU
RE
VCC
B
1
R
R
7
SHDN
D
Via to VCC
4
A
5
R
GND
JMP
R
6 R
Via to ground
C
TVS
5
Figure 11-1. Layout Example
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Figure 11-2. Layout Example for Co-layout of SOIC (D) and SOT (DRL) Packages
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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5-Aug-2023
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
THVD1406DR
ACTIVE
SOIC
D
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1406
Samples
THVD1406DRLR
ACTIVE
SOT-5X3
DRL
8
4000
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
T406
Samples
THVD1426DR
ACTIVE
SOIC
D
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1426
Samples
THVD1426DRLR
ACTIVE
SOT-5X3
DRL
8
4000
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
T426
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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