THVD1449VDR

THVD1439, THVD1439V THVD1449, THVD1449V SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 THVD14x9x 3-V to 5.5-V RS-485 Transceivers With 4-kV Surge Protection and 1.8-V VIO Capability 1 Features 2 Applications • • • • • • • • • • • • • • • • • • • Meets or exceeds the requirements of the TIA/ EIA-485A standard 3-V to 5.5-V Supply Voltage VIO Support from 1.65-V to VCC supply level (THVD1439V, THVD1449V) Bus I/O protection – ± 4-kV IEC 61000-4-5 1.2/50-μs surge – ± 15-kV IEC 61000-4-2 Contact discharge – ± 15-kV IEC 61000-4-2 Air-gap discharge – ± 4-kV IEC 61000-4-4 Electrical fast transient – ± 15-kV HBM ESD – ± 15-V DC bus fault Available in two speed grades – THVD1439, THVD1439V: 250 kbps – THVD1449, THVD1449V: 12 Mbps Extended ambient temperature range: -40°C to 125°C Extended operational common-mode range: ± 12 V Large receiver hysteresis for noise rejection Low Power Consumption – Standby supply current: < 3 µA – Current during operation: < 5 mA Glitch-free power-up/down for hot plug-in capability Open, short, and idle bus failsafe 1/8 Unit load (up to 256 bus nodes) Industry standard 8-pin SOIC for drop-in compatibility Wireless infrastructure Factory automation Motor drives Building automation HVAC Grid infrastructure 3 Description THVD14x9(V) devices are half-duplex RS-485 transceivers with integrated surge protection. Surge protection is achieved by integrating transient voltage suppressor (TVS) diodes in the standard 8-pin SOIC (D) package. This feature increases the reliability by providing better immunity to noise transients coupled to the data cable which eliminates the need for external protection components. THVD1439 and THVD1449 operate from a single 3.3-V or 5-V supply. The THVD1439V and THVD1449V devices support an additional VIO supply to operate the IOs from as low as 1.65 V supply level. The devices in this family feature a wide commonmode voltage range making them suitable for multipoint applications over long cable runs. Device Information PACKAGE(1) PART NUMBER THVD1439 THVD1439V THVD1449 THVD1449V (1) SOIC (8) BODY SIZE (NOM) 4.90 mm × 3.91 mm For all available devices, see the orderable addendum at the end of the data sheet. VIO VCC R A R RE B DE / RE VCC A B DE D D GND THVD14x9 Block Diagram GND THVD14x9V Block Diagram An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................4 6 Specifications.................................................................. 5 6.1 Absolute Maximum Ratings ....................................... 5 6.2 ESD Ratings .............................................................. 5 6.3 ESD Ratings, IEC ...................................................... 5 6.4 Recommended Operating Conditions ........................6 6.5 Thermal Information ...................................................6 6.6 Power Dissipation ...................................................... 6 6.7 Electrical Characteristics ............................................7 6.8 Switching Characteristics (THVD1439, THVD1439V) ................................................................ 9 6.9 Switching Characteristics (THVD1449, THVD1449V) ................................................................ 9 6.10 Typical Characteristics............................................ 10 7 Parameter Measurement Information.......................... 12 8 Detailed Description......................................................14 8.1 Overview................................................................... 14 8.2 Functional Block Diagrams....................................... 14 8.3 Feature Description...................................................14 8.4 Device Functional Modes..........................................18 9 Application and Implementation.................................. 19 9.1 Application Information .........................................19 9.2 Typical Application.................................................... 19 10 Power Supply Recommendations..............................22 11 Layout........................................................................... 23 11.1 Layout Guidelines................................................... 23 11.2 Layout Example...................................................... 23 12 Device and Documentation Support..........................25 12.1 Device Support....................................................... 25 12.2 Receiving Notification of Documentation Updates..25 12.3 Support Resources................................................. 25 12.4 Trademarks............................................................. 25 12.5 Electrostatic Discharge Caution..............................25 12.6 Glossary..................................................................25 4 Revision History Changes from Revision A (June 2021) to Revision B (September 2021) Page • Changed document status from Advanced Information to Production data ...................................................... 1 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 Device Comparison Table PART NUMBER ENABLES VIO THVD1439 Separate DE and RE No THVD1439V Combined DE / RE Yes Separate DE and RE No Combined DE / RE Yes THVD1449 DUPLEX Half THVD1449V SIGNALING RATE NODES up to 250 kbps 256 up to 12 Mbps Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V Submit Document Feedback 3 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 5 Pin Configuration and Functions R 1 8 VCC VIO 1 8 VCC RE 2 7 B R 2 7 B DE 3 6 A DE/RE 3 6 A D 4 5 GND D 4 5 GND Not to scale Not to scale Figure 5-1. THVD1439, THVD1449, 8-Pin (SOIC), Top View Figure 5-2. THVD1439V, THVD1449V, 8-Pin (SOIC), Top View PIN NAME 4 THVD1439, THVD1449 THVD1439 V, THVD1449V I/O DESCRIPTION VIO - 1 P 1.8-V to 5-V supply for R, D, and RE/DE R 1 2 O Receiver data output RE 2 - I Receiver enable, active low (2 MΩ internal pull-up) DE 3 - I Driver enable, active high DE/ RE - 3 I Driver enable (Active high), Receiver enable (Active Low). (2 MΩ internal pull-down) D 4 4 I Driver data input GND 5 5 - Device ground A 6 6 I/O Bus I/O port, A (complementary to B) B 7 7 I/O Bus I/O port, B (complementary to A) VCC 8 8 P Submit Document Feedback 3.3-V to 5-V supply for the device Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX Supply voltage VCC –0.5 7 V Logic supply voltage VIO -0.5 VCC+0.2 V Bus voltage Range at any bus pin (A or B) –15 15 V Input voltage Range at any logic pin (R, D, DE, or RE) THVD1439, THVD1449 –0.3 5.7 V Input voltage Range at any logic pin (R, D, DE, or RE) THVD1439V, THVD1449V –0.3 VIO+0.2 V Receiver output current IO –24 24 mA Storage temperature Tstg –65 150 °C (1) UNIT Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 ESD Ratings VALUE V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/ JEDEC JS-001(1) Bus terminals and GND ±15,000 All pins except bus terminals and GND ±4,000 Charged-device model (CDM), per JEDEC specification JESD22-C102(2) (1) (2) UNIT V ±1,500 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 ESD Ratings, IEC VALUE Contact Discharge, per IEC 61000-4-2 UNIT V(ESD) Electrostatic discharge V(EFT) Electrical fast transient Per IEC 61000-4-4 Bus terminals ±4,000 V V(surge) Surge Per IEC 61000-4-5, 1.2/50 μs Bus terminals ±4,000 V Air-Gap Discharge, per IEC 61000-4-2 Bus terminals ±15,000 Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V ±15,000 V Submit Document Feedback 5 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 6.4 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN VCC Supply voltage VIO IO Supply Voltage (V Variant) VI Input voltage on logic pins (R, D, DE, or RE) VI Input voltage at bus pins (A or B) VIH High-level input voltage (R, D, DE, or RE) VIL Low-level input voltage (R, D, DE, or RE) VIH High-level input voltage (R, D, DE, or RE) MAX UNIT 5.5 V 1.65 VCC V THVD1439, THVD1449 0 5.5 V THVD1439V, THVD1449V 0 VIO V -12 12 V 0.67 * VIO VIO V 0 0.33 * VIO V 2 5.5 V 0 0.8 V (1) VI NOM 3 THVD1439V, THVD1449V THVD1439, THVD1449 VIL Low-level input voltage (R, D, DE, or RE) VID Differential input voltage -12 12 V IO Output current, driver -60 60 mA IOR Output current, receiver -8 8 mA RL Differential load resistance 54 1/tUI Signaling rate TA Operating ambient temperature (1) Ω THVD1439, THVD1439V 250 kbps THVD1449, THVD14149V 12 Mbps 125 °C -40 The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet. 6.5 Thermal Information THVD1439 THVD1439V THVD1449 THVD1449V THERMAL METRIC(1) UNIT D (SOIC) 8 PINS RθJA Junction-to-ambient thermal resistance 120.7 °C/W RθJC(top) Junction-to-case (top) thermal resistance 50.3 °C/W RθJB Junction-to-board thermal resistance 62.8 °C/W ψJT Junction-to-top characterization parameter 7.5 °C/W ψJB Junction-to-board characterization parameter 62.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.6 Power Dissipation over operating free-air temperature range (unless otherwise noted) PARAMETER PD 6 TEST CONDITIONS Driver and receiver enabled, VCC = 5.5 V, TA = 125 °C, 50% duty cycle square wave at signaling rate Submit Document Feedback VALUE Unterminated RL = 300 Ω, C L = 50 pF (driver) THVD1439 250 kbps 160 THVD1449 12 Mbps 290 RS-422 load RL = 100 Ω, CL = 50 pF (driver) THVD1439 250 kbps 190 THVD1449 12 Mbps 290 RS-485 load RL = 54 Ω, CL = 50 pF (driver) THVD1439 250 kbps 250 THVD1449 12 Mbps 320 UNIT mW mW mW Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 6.7 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP RL = 60 Ω, -12 V ≤ Vtest ≤ 12 V (See Figure 7-1 ) 1.5 2 RL = 60 Ω, -12 V ≤ Vtest ≤ 12 V, 4.5 V ≤ VCC ≤ 5.5 V (See Figure 7-1 ) 2.1 MAX UNIT Driver |VOD| Driver differential output voltage magnitude RL = 100 Ω (See Figure 7-2 ) V V 2 2.5 V 2 V RL = 54 Ω (See Figure 7-2 ) 1.5 Δ|VOD| Change in differential output voltage RL = 54 Ω (See Figure 7-2 ) –50 VOC Common-mode output voltage RL = 54 Ω (See Figure 7-2 ) 1 ΔVOC(SS) Change in steady-state common-mode output voltage RL = 54 Ω (See Figure 7-2 ) IOS Short-circuit output current DE = VCC, -12 V ≤ VO ≤ 12 V Bus input current DE = 0 V, VCC = 0 V or 5.5 V 50 mV 3 V –50 50 mV –250 250 mA VCC / 2 Receiver II VTH+ Positive-going input threshold voltage(1) VTH- Negative-going input threshold voltage(1) VHYS Input hysteresis VTH_FSH Input fail-safe threshold VOH VOL IOZ VI = 12 V 75 135 VI = -7 V –100 –40 VI = -12 V –135 –75 40 125 200 mV –200 –125 –40 mV Over common-mode range of ±12 V μA 250 –40 THVD1439V, THVD1449V Output high voltage THVD1439, THVD1449 THVD1439V, THVD1449V Output low voltage THVD1439, THVD1449 IOH = -4 mA; VIO= 1.65 V - 3 V IOH = -8 mA; VIO= 3 V - 5.5 V IOH = -8 mA VIO – 0.4 mV 40 mV VIO – 0.2 V VCC – 0.4 VCC – 0.2 IOL = 8 mA; VIO = 3 V - 5.5 V IOL = 4 mA; VIO = 1.65 V - 3 V 0.2 0.4 V –1 1 µA IOL = 8 mA Output high-impedance current VO = 0 V or VCC, RE = VCC Logic IIN Input current (D, DE, RE) THVD1439V, THVD1449V 3 V ≤ VCC ≤ 5.5 V, 1.65 ≤ VIO ≤ VCC V, 0 V ≤ VIN ≤ VIO –5 5 µA THVD1439, THVD1449 3 V ≤ VCC ≤ 5.5 V, 0 V ≤ VIN ≤ VCC –5 5 µA Thermal Protection TSHDN Thermal shutdown threshold THYS Thermal shutdown hysteresis Temperature rising Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V 150 170 ℃ 10 ℃ Submit Document Feedback 7 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 6.7 Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 3 4 mA 2 3 mA Driver disabled, receiver RE = 0 V, DE = 0 V, No enabled load 1.7 2.2 mA Driver and receiver disabled (THVD1439, THVD1449) RE = VCC, DE = 0 V, D = open, No load 0.1 1.5 µA Driver and receiver enabled (THVD1439, THVD1449) RE = 0 V, DE = VCC, No load 3.5 5 mA Driver enabled, receiver RE = VCC, DE = VCC, disabled No load 2.5 3.8 mA Driver disabled, receiver RE = 0 V, DE = 0 V, No enabled load 1.8 2.4 mA Driver and receiver disabled (THVD1439, THVD1449) RE = VCC, DE = 0 V, D = open, No load 0.2 3 µA Driver Enabled DE/RE=VIO, D=open, No load 5 µA Receiver enabled DE/RE= 0 V, D=open, No load 5 µA Supply Driver and receiver enabled (THVD1439, THVD1449) Supply current (quiescent) VCC=3.6 V ICC Supply current (quiescent) IIO (1) 8 VIO supply current (quiescent) VCC=5.5 V THVD1439V, THVD1449V RE = 0 V, DE = VCC, No load Driver enabled, receiver RE = VCC, DE = VCC, disabled No load Under any specific conditions, VTH+ is assured to be at least VHYS higher than VTH–. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 6.8 Switching Characteristics (THVD1439, THVD1439V) 250-kbps devices (THVD1439, 39V), over recommended operating conditions. All typical values are at 25 ℃. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 300 570 1200 ns 450 650 ns 50 ns ns Driver tr, tf Differential output rise/fall time tPHL, tPLH Propagation delay tSK(P) Pulse skew, |tPHL – tPLH| tPHZ, tPLZ Disable time RL = 54 Ω, CL = 50 pF 25 125 240 600 ns RE = VCC 2 4 µs RE = VCC 300 See Figure 7-4 and Figure 7-5 RE = 0 V tPZH, tPZL Enable time tSHDN Pulse width (logic low) on DE pin to initiate device shutdown See Figure 7-3 ns Receiver tr, tf Differential output rise/fall time tPHL, tPLH Propagation delay tSK(P) Pulse skew, |tPHL – tPLH| tPHZ, tPLZ Disable time CL = 15 pF tPZH(1), tPZL(1), tPZH(2), tPZL(2) Enable time tD(OFS) Delay to enter fail-safe operation tD(FSO) Delay to exit fail-safe operation tSHDN RE pulse width to initiate device shutdown See Figure 7-6 9 25 ns 70 110 ns 7 ns 22 60 ns DE = VCC See Figure 7-7 120 185 ns DE = 0 V See Figure 7-8 4 10 μs CL = 15 pF See Figure 7-9 14 20 36 μs 25 40 66 ns DE = 0 V 300 ns 6.9 Switching Characteristics (THVD1449, THVD1449V) 12-Mbps devices (THVD1449, 49V), over recommended operating conditions. All typical values are at 25 ℃. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 2 12 25 ns 7 10 25 ns 3.5 ns 25 75 ns 18 65 ns RE = VCC 2 4 μs RE = VCC 300 Driver tr, tf Differential output rise/fall time tPHL, tPLH Propagation delay tSK(P) Pulse skew, |tPHL – tPLH| tPHZ, tPLZ Disable time RL = 54 Ω, CL = 50 pF RE = 0 V tPZH, tPZL Enable time tSHDN Pulse width (logic low) on DE pin to initiate device shutdown See Figure 7-3 See Figure 7-4 and Figure 7-5 ns Receiver tr, tf Differential output rise/fall time tPHL, tPLH Propagation delay tSK(P) Pulse skew, |tPHL – tPLH| tPHZ, tPLZ Disable time CL = 15 pF tPZH(1), tPZL(1), tPZH(2), tPZL(2) Enable time tD(OFS) Delay to enter fail-safe operation tD(FSO) Delay to exit fail-safe operation tSHDN Pulse width (logic high) on RE pin DE = 0 V to initiate device shutdown See Figure 7-6 30 3 10 ns 60 110 ns 4 ns 10 30 ns DE = VCC See Figure 7-7 90 130 ns DE = 0 V See Figure 7-8 4 10 μs CL = 15 pF See Figure 7-9 14 20 36 μs 25 35 55 ns Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V 300 ns Submit Document Feedback 9 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 6.10 Typical Characteristics VOH (VCC = 3.3 V) VOL (VCC = 3.3 V) VOH (VCC = 5 V) VOL (VCC = 5 V) Driver Differential Output Voltage (V) Driver Output Voltage (V) 6.5 6 5.5 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 D=0V 3.6 3 2.4 1.8 1.2 0.6 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 Driver Output Current (mA) DE = VCC TA= 25 °C Figure 6-1. Driver Output Voltage vs Driver Output Current D=0V TA= 25 °C Figure 6-2. Driver Differential Output voltage vs Driver Output Current 650 65 Driver Output Rise/Fall Time (ns) 60 Driver Output Current (mA) 4.2 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 Driver Output Current (mA) DE = VCC 55 50 45 40 35 30 3 3.5 4 4.5 5 5.5 VCC (V) TA= 25 °C RL = 54 Ω 600 575 550 525 500 475 450 425 -40 -20 0 20 40 60 80 Temperature ( C) 100 120 140 spacer Figure 6-4. THVD1439, THVD1439V Driver Rise or Fall Time vs Temperature 500 80 480 470 460 450 VCC = 3.3 V VCC = 5 V 75 70 Supply Current (mA) tPHL (VCC = 3.3 V) tPLH (VCC = 3.3 V) tPHL (VCC = 5 V) tPLH (VCC = 5 V) 490 65 60 55 50 45 440 430 -40 Rise time (VCC = 3.3 V) Fall time (VCC = 3.3 V) Rise time (VCC = 5 V) Fall time (VCC = 5 V) 625 DE = D = VCC Figure 6-3. Driver Output Current vs Supply Voltage Driver Propagation Delay (ns) VCC = 3.3 V VCC = 5 V 0 0 40 35 -20 0 20 40 60 80 Temperature (C) 100 120 140 0 25 50 75 100 125 150 175 Signaling Rate (kbps) TA= 25 °C spacer Figure 6-5. THVD1439, THVD1439V Driver Propagation Delay vs Temperature 10 4.8 Submit Document Feedback 200 225 250 RL = 54 Ω Figure 6-6. THVD1439, THVD1439V Supply Current vs Signal Rate Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 22 Driver Propagation Delay (ns) 20 19 18 17 16 15 14 13 12 Driver Rise/Fall Times (ns) 18.5 tPHL (VCC = 3.3 V) tPLH (VCC = 3.3 V) tPHL (VCC = 5 V) tPLH (VCC = 5 V) 21 Rise time (VCC = 3.3 V) Fall time (VCC = 3.3 V) Rise time (VCC = 5 V) Fall time (VCC = 5 V) 17.5 16.5 15.5 14.5 13.5 11 10 -40 -20 0 20 40 60 80 Temperature (C) 100 120 140 Figure 6-7. THVD1449, THVD1449V Driver Propagation Delay vs Temperature 12.5 -40 -20 0 20 40 60 80 Temperature ( C) 100 120 140 Figure 6-8. THVD1449, THVD1449V Driver Rise or Fall Time vs Temperature 90 VCC = 3 V VCC = 5 V 85 Supply Current (mA) 80 75 70 65 60 55 50 45 40 35 0 TA= 25 °C 2000 4000 6000 8000 Signaling Rate (kbps) 10000 12000 RL = 54 Ω Figure 6-9. THVD1449, THVD1449V Supply Current vs Signal Rate Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V Submit Document Feedback 11 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 7 Parameter Measurement Information 375 Ÿ Vcc DE A D VOD 0V or Vcc Vtest RL B 375 Ÿ Figure 7-1. Measurement of Driver Differential Output Voltage With Common-Mode Load A 0V or Vcc A D RL/2 VA B VB VOD RL/2 B CL VOC(PP) VOC ûVOC(SS) VOC Figure 7-2. Measurement of Driver Differential and Common-Mode Output With RS-485 Load Vcc Vcc DE A D Input Generator VI 50% VI VOD 50 Ÿ 0V tPHL tPLH RL= 54 Ÿ CL= 50 pF 90% 50% 10% B VOD tr tf ~2 V ~ ±2V Figure 7-3. Measurement of Driver Differential Output Rise and Fall Times and Propagation Delays A D S1 Vcc VO 50% VI B DE Input Generator VI RL = 110 Ÿ CL = 50 pF 50 Ÿ 0V tPZH 90% VO VOH 50% ~ ~ 0V tPHZ Figure 7-4. Measurement of Driver Enable and Disable Times With Active High Output and Pull-Down Load Vcc Vcc A S1 B D DE Input Generator RL= 110 Ÿ CL= 50 pF VI VO 50% VI 0V tPZL tPLZ § Vcc VO 10% 50 % VOL 50 Ÿ Figure 7-5. Measurement of Driver Enable and Disable Times With Active Low Output and Pull-up Load 12 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 3V A Input Generator R VO VI 50 Ÿ 1.5V B 0V tPLH tPHL VOH 90% CL=15 pF 50% RE 0V 50 % VI VOD 10 % tr VOL tf Figure 7-6. Measurement of Receiver Output Rise and Fall Times and Propagation Delays Vcc Vcc Vcc VI 50 % DE 0V or Vcc 0V A D 1 kŸ VO R B tPZH(1) tPHZ S1 VO CL=15 pF 90 % 50 % tPZL(1) VI D at Vcc S1 to GND § 0V RE Input Generator VOH 50 Ÿ tPLZ VO 50 % VCC D at 0V S1 to Vcc 10 % VOL Figure 7-7. Measurement of Receiver Enable/Disable Times With Driver Enabled Vcc Vcc VI 50% 0V A V or 1.5V R 1.5 V or 0V B 1 NŸ VO tPZH(2) S1 VOH RE 50% VO CL=15 pF § 0V A at 1.5 V B at 0 V S1 to GND tPZL(2) Input Generator VI VCC 50 Ÿ VO 50% VOL A at 0V B at 1.5V S1 to VCC Figure 7-8. Measurement of Receiver Enable Times With Driver Disabled 0V VA - VB A VA = 0 V or -750 mV VB = 0 V or +750 mV R B RE 0V -1.5 V VO tD(OFS) CL= 15 pF tD(FSO) VCC VO VCC / 2 0V Copyright © 2017, Texas Instruments Incorporated Figure 7-9. Fail-Safe Delay Measurements Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V Submit Document Feedback 13 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 8 Detailed Description 8.1 Overview THVD14x9(V) devices are surge-protected, half duplex RS-485 transceivers available in two speed grades suitable for data transmission up to 250 kbps and 12 Mbps respectively. Surge protection is achieved by integrating transient voltage suppressor (TVS) diodes in the standard 8-pin SOIC (D) package. THVD1439 and THVD1449 devices have active-high driver enables and active-low receiver enables. A standby current of less than 1.5 µA (VCC = 3.6 V) can be achieved by disabling both driver and receiver. THVD1439V and THVD1449V have a single enable/disable pin that either enables the driver or the receiver at a time. 8.2 Functional Block Diagrams VCC R A RE B DE D GND Figure 8-1. THVD1439 and THVD1449 Block Diagram VIO VCC A R B DE / RE D GND Figure 8-2. THVD1439V and THVD1449V Block Diagram 8.3 Feature Description 8.3.1 Electrostatic Discharge (ESD) Protection The bus pins of the THVD14x9(V) transceiver family include on-chip ESD protection against ±15-kV HBM and ±15-kV IEC 61000-4-2 contact discharge. The International Electrotechnical Commission (IEC) ESD test is far more severe than the HBM ESD test. The 50% higher charge capacitance, C(S), and 78% lower discharge resistance, R(D), of the IEC model produce significantly higher discharge currents than the HBM model. As stated in the IEC 61000-4-2 standard, contact discharge is the preferred transient protection test method. 14 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 R(D) 50 M (1 M) High-Voltage Pulse Generator 330 Ω (1.5 kΩ) C(S) Device Under Test 150 pF (100 pF) Current (A) R(C) 40 35 30 10-kV IEC 25 20 15 10 5 0 0 50 100 10-kV HBM 150 200 250 300 Time (ns) Figure 8-3. HBM and IEC ESD Models and Currents in Comparison (HBM Values in Parenthesis) The on-chip implementation of IEC ESD protection significantly increases the robustness of equipment. Common discharge events occur because of human contact with connectors and cables. 8.3.2 Electrical Fast Transient (EFT) Protection Normalized Voltage Inductive loads such as relays, switch contactors, or heavy-duty motors can create high-frequency bursts during transition. The IEC 61000-4-4 test is intended to simulate the transients created by such switching of inductive loads on AC power lines. Figure 8-4 shows the voltage waveforms in to 50-Ω termination as defined by the IEC standard. 1 Time Normalized Voltage 300 ms 15 ms at 5 kHz 0.75 ms at 100 kHz 1 Time Normalized Voltage 200 µs at 5 kHz 10 µs at 100 kHz 1 0.5 Time 5 ns 50ns Figure 8-4. EFT Voltage Waveforms Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V Submit Document Feedback 15 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 Internal ESD protection circuits of the THVD14x9(V) protect the transceivers against ±4-kV EFT. With careful system design, one could achieve EFT Criterion A (no data loss when transient noise is present). 8.3.3 Surge Protection Surge transients often result from lightning strikes (direct strike or an indirect strike which induce voltages and currents), or the switching of power systems, including load changes and short circuit switching. These transients are often encountered in industrial environments, such as factory automation and power-grid systems. Figure 8-5 compares the pulse-power of the EFT and surge transients with the power caused by an IEC ESD transient. The diagram on the left shows the relative pulse-power for a 0.5-kV surge transient and 4-kV EFT transient, both of which dwarf the 10-kV ESD transient visible in the lower-left corner. 500-V surge transients are representative of events that may occur in factory environments in industrial and process automation. 22 20 18 16 14 12 10 8 6 4 2 0 Pulse Power (MW) Pulse Power (kW) The diagram on the right shows the pulse-power of a 6-kV surge transient, relative to the same 0.5-kV surge transient. 6-kV surge transients are most likely to occur in power generation and power-grid systems. 0.5-kV Surge 4-kV EFT 10-kV ESD 0 5 10 15 20 25 30 35 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 6-kV Surge 0.5-kV Surge 0 40 5 10 15 20 25 30 35 40 Time (µs) Time (µs) Figure 8-5. Power Comparison of ESD, EFT, and Surge Transients Figure 8-6 shows the test setup used to validate THVD14x9 surge performance according to the IEC 61000-4-5 1.2/50-μs surge pulse. 80 O A Surge Generator 2 O Source Impedance 80 O B THVD14x9 Coupling Network GND Figure 8-6. THVD14x9(V) Surge Test Setup 16 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 Total Surge Current (A), VCLAMP at Bus Pins (V) THVD14x9(V) product family is robust to ±4-kV surge transients without the need for any external components. The transient current and voltage waveforms resulting from a +4-kV surge test as described in Figure 8-6 are shown in Figure 8-7. The bus pin voltage is clamped by the integrated surge protection diodes such that the internal circuitry is not damaged during the surge event. The clamping voltage at the bus pins for versus the total current from the surge generator is shown in Figure 8-8. 120 110 100 90 80 70 60 50 40 30 20 10 0 -10 -20 Voltage (V) Current (A) 0 20 40 60 Time (ns) 80 100 120 Figure 8-7. Transient current and voltage waveforms from +4-kV Surge Test. The current waveform is the total current output from the generator and the voltage waveform is the voltage at A or B pin of the transceiver. Total Peak Surge Current (A) 100 90 80 70 60 50 40 30 20 10 0 15 20 25 30 35 40 45 50 55 60 65 VCLAMP at Bus Pins at Peak Current (V) 70 75 Figure 8-8. Clamping voltage at bus pins vs total surge current from the surge generator 8.3.4 Enhanced Receiver Noise Immunity The differential receivers of THVD14x9(V) family feature fully symmetric thresholds to maintain duty cycle of the signal even with small input amplitudes. In addition, 250 mV (typical) hysteresis guarantees excellent noise immunity. 8.3.5 Failsafe Receiver The differential receivers of the THVD14x9(V) family are failsafe to invalid bus states caused by the following: • Open bus conditions, such as a disconnected connector • Shorted bus conditions, such as cable damage shorting the twisted-pair together • Idle bus conditions that occur when no driver on the bus is actively driving In any of these cases, the receiver will output a fail-safe logic high state if the input amplitude stays for longer than tD(OFS) at less than |VTH_FSH|. Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V Submit Document Feedback 17 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 8.4 Device Functional Modes When the driver enable pin, DE, is logic high, the differential outputs A and B follow the logic states at data input D. A logic high at D causes A to turn high and B to turn low. In this case the differential output voltage defined as VOD = VA – VB is positive. When D is low, the output states reverse: B turns high, A becomes low, and VOD is negative. When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pull-down resistor to ground, thus when left open the driver is disabled (high-impedance) by default. The D pin has an internal pull-up resistor to VCC, thus, when left open while the driver is enabled, output A turns high and B turns low. Table 8-1. Driver Function Table INPUT ENABLE OUTPUTS D DE A B H H H L Actively drive bus high FUNCTION L H L H Actively drive bus low X L Z Z Driver disabled X OPEN Z Z Driver disabled by default OPEN H H L Actively drive bus high by default When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as VID = VA – VB is higher than the positive input threshold, VTH+, the receiver output, R, turns high. When VID is lower than the negative input threshold, VTH-, the receiver output, R, turns low. If VID is between VTH+ and VTH- the output is indeterminate. When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted to one another (short-circuit), or the bus is not actively driven (idle bus). Table 8-2. Receiver Function Table 18 DIFFERENTIAL INPUT ENABLE OUTPUT VID = VA – VB RE R FUNCTION VTH+ < VID L H Receive valid bus high VTH- < VID < VTH+ L Indeterminate Indeterminate bus state VID < VTH- L L Receive valid bus low X H Z Receiver disabled X OPEN Z Receiver disabled by default Open-circuit bus L H Fail-safe high output Short-circuit bus L H Fail-safe high output Idle (terminated) bus L H Fail-safe high output Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 9 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 9.1 Application Information THVD14x9(V) are half-duplex RS-485 transceivers with integrated system-level surge protection. Standard 8-pin SOIC (D) package allows drop-in replacement into existing systems and eliminate system-level protection components. 9.2 Typical Application An RS-485 bus consists of multiple transceivers connecting in parallel to a bus cable. To eliminate line reflections, each cable end is terminated with a termination resistor, RT, with a value that matches the characteristic impedance, Z0, of the cable. This method, known as parallel termination, allows for higher data rates over longer cable length. R R RE B DE D R A R A RT RT D A R B A D R RE DE D R RE B DE D B D D R RE DE D Figure 9-1. Typical RS-485 Network With Half-Duplex Transceivers 9.2.1 Design Requirements RS-485 is a robust electrical standard suitable for long-distance networking that may be used in a wide range of applications with varying requirements, such as distance, data rate, and number of nodes. 9.2.1.1 Data Rate and Bus Length There is an inverse relationship between data rate and cable length, which means the higher the data rate, the short the cable length; and conversely, the lower the data rate, the longer the cable length. While most RS-485 systems use data rates between 10 kbps and 100 kbps, some applications require data rates up to 250 kbps at distances of 4000 feet and longer. Longer distances are possible by allowing for small signal jitter of up to 5 or 10%. Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V Submit Document Feedback 19 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 10000 Cable Length (ft) 5%, 10%, and 20% Jitter 1000 Conservative Characteristics 100 10 100 1k 10 k 100 k 1M 10 M 100 M Data Rate (bps) Figure 9-2. Cable Length vs Data Rate Characteristic Even higher data rates are achievable (that is, 12 Mbps for the THVD1449(V)) in cases where the interconnect is short enough (or has suitably low attenuation at signal frequencies) to not degrade the data. 9.2.1.2 Stub Length When connecting a node to the bus, the distance between the transceiver inputs and the cable trunk, known as the stub, should be as short as possible. Stubs present a non-terminated piece of bus line which can introduce reflections as the length of the stub increases. As a general guideline, the electrical length, or round-trip delay, of a stub should be less than one-tenth of the rise time of the driver, thus giving a maximum physical stub length as shown in Equation 1. L(STUB) ≤ 0.1 × tr × v × c (1) where • • • tr is the 10/90 rise time of the driver c is the speed of light (3 × 108 m/s) v is the signal velocity of the cable or trace as a factor of c 9.2.1.3 Bus Loading The RS-485 standard specifies that a compliant driver must be able to driver 32 unit loads (UL), where 1 unit load represents a load impedance of approximately 12 kΩ. Because the THVD14x9(V) devices consist of 1/8 UL transceivers, connecting up to 256 receivers to the bus is possible. 20 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 9.2.2 Detailed Design Procedure RS-485 transceivers operate in noisy industrial environments typically require surge protection at the bus pins. Figure 9-3 compares 4-kV surge protection implementation with a regular RS-485 transceiver (such as THVD14x0) against with the THVD14x9(V). The internal TVS protection of the THVD14x9(V) achieves ±4-kV IEC 61000-4-5 surge protection without any additional external components, reducing system level bill of materials. System level surge protection implementation using a typical RS-485 transceiver 3.3V ± 5 V 100nF VCC 10k 10k MOV R RxD TBU /RE A DE B DIR MCU/ UART DIR TVS TBU D TxD RS-485 transceiver 10k MOV GND System level surge protection implementation using THVD14x9 transceiver 3.3V ± 5 V 100nF VCC 10k 10k R RxD /RE A DE B DIR MCU/ UART DIR D TxD 10k THVD24x9 GND Figure 9-3. Implementation of System-Level Surge Protection Using THVD14x9(V) Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V Submit Document Feedback 21 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 9.2.3 Application Curves Ch 2: D Input, Ch4: VOD VCC = 5 V Ch1: R Output Data rate: 12 Mbps Figure 9-4. THVD1449 Waveforms with 54-Ω Termination and VCC = 5 V Ch 2: D Input, Ch4: VAB Ch1: R Output VCC = 3.3 V Data rate: 12 Mbps Figure 9-5. THVD1449 Waveforms with 54-Ω Termination and VCC = 3.3 V 10 Power Supply Recommendations To ensure reliable operation at all data rates and supply voltages, each supply should be decoupled with a 100 nF ceramic capacitor located as close to the supply pins as possible. This helps to reduce supply voltage ripple present on the outputs of switched-mode power supplies and also helps to compensate for the resistance and inductance of the PCB power planes. 22 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 11 Layout 11.1 Layout Guidelines Additional external protection components generally are not needed when using THVD14x9(V) transceivers. 1. Use VCC and ground planes to provide low-inductance. Note that high-frequency currents tend to follow the path of least impedance and not the path of least resistance. Apply 100-nF to 220-nF decoupling capacitors as close as possible to the VCC pins of transceiver, UART and/or controller ICs on the board. 2. Use at least two vias for VCC and ground connections of decoupling capacitors to minimize effective via inductance. 3. Use 1-kΩ to 10-kΩ pull-up and pull-down resistors for enable lines to limit noise currents in these lines during transient events. 11.2 Layout Example 2 C R R VCC R RE B JMP 3 Via to GND Via to VCC 1 R MCU DE 3 A R D GND 2 Figure 11-1. THVD1439, THVD1449 Layout Example Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V Submit Document Feedback 23 THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 2 1 C VIO 1 VCC R R B R MCU DE / RE 3 Via to GND Via to VCC Via to VIO JMP 3 C 2 A R D GND 2 Figure 11-2. THVD1439V THVD1449V Layout Example 24 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V THVD1439, THVD1439V THVD1449, THVD1449V www.ti.com SLLSF79B – APRIL 2021 – REVISED SEPTEMBER 2021 12 Device and Documentation Support 12.1 Device Support 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 12.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2021 Texas Instruments Incorporated Product Folder Links: THVD1439 THVD1439V THVD1449 THVD1449V Submit Document Feedback 25 PACKAGE OPTION ADDENDUM www.ti.com 3-Apr-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) THVD1439DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAUAG Level-3-260C-168 HR -40 to 125 T1439 THVD1439VDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAUAG Level-3-260C-168 HR -40 to 125 1439V THVD1449DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAUAG Level-3-260C-168 HR -40 to 125 T1449 THVD1449VDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAUAG Level-3-260C-168 HR -40 to 125 T1449V (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of