THVD2410, THVD2450
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
THVD24x0 ±70-V Fault-Protected 3.3-V to 5-V RS-485 Transceivers With IEC ESD
1 Features
3 Description
•
THVD2410 and THVD2450 are ±70-V fault-protected,
half-duplex, RS-422/RS-485 transceivers operating on
a single 3-V to 5.5-V supply. Bus interface pins are
protected against overvoltage conditions during all
modes of operation ensuring robust communication in
rugged industrial environments.
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Meets or exceeds the requirements of
the TIA/EIA-485A and TIA/EIA-422B standards
Functional Safety-Capable
– Documentation available to aid functional safety
system design
3-V to 5.5-V supply voltage
Differential output exceeds 2.1 V for PROFIBUS
compatibility with 5-V supply
Bus I/O protection
– ±70-V DC bus fault
– ±16-kV HBM ESD
– ±12-kV IEC 61000-4-2 contact discharge
– ±12-kV IEC 61000-4-2 air-gap discharge
– ±4-kV IEC 61000-4-4 fast transient burst
Half-duplex devices
available in two speed grades
– THVD2410: 500 kbps
– THVD2450: 50 Mbps
Extended ambient
temperature range: -40°C to 125°C
Extended operational
common-mode range: ±25 V
Enhanced receiver hysteresis
for noise immunity
Low power consumption
– Low shutdown supply current: < 1 µA
– Current during operation: < 5.6 mA
Glitch-free power-up/down for hot plug-in capability
Open, short, and idle bus failsafe
Thermal shutdown
1/8 unit load (up to 256 bus nodes)
Small VSON and VSSOP packages to save board
space or SOIC for drop-in compatibility
2 Applications
•
•
•
•
•
•
•
•
Motor drives
Factory automation and control
HVAC systems
Building automation
Grid infrastructure
Electricity meters
Process analytics
Video surveillance
These devices feature integrated IEC ESD protection,
eliminating the need for external system-level
protection components. Extended ±25-V input
common-mode range guarantees reliable data
communication over longer cable run lengths and/or
in the presence of large ground loop voltages.
Enhanced 250-mV receiver hysteresis ensures high
noise rejection. In addition, the receiver fail-safe
feature guarantees a logic high when the inputs are
open or shorted together.
THVD24x0 devices are available in small VSSOP and
VSON packages for space-constrained applications.
These devices are characterized over ambient free-air
temperatures from –40°C to 125°C.
Device Information
PACKAGE(1)
PART NUMBER
THVD2410
THVD2450
(1)
BODY SIZE (NOM)
VSON (8)
3.00 mm × 3.00 mm
VSSOP (8)
3.00 mm × 3.00 mm
SOIC (8)
4.90 mm × 3.91 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
R
RE
DE
D
1
2
7
3
6
B
A
4
THVD2410 and THVD2450 Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 ESD Ratings [IEC]...................................................... 4
6.4 Recommended Operating Conditions.........................5
6.5 Thermal Information....................................................5
6.6 Power Dissipation....................................................... 5
6.7 Electrical Characteristics.............................................6
6.8 Switching Characteristics: THVD2410........................ 7
6.9 Switching Characteristics: THVD2450........................ 7
6.10 Typical Characteristics.............................................. 8
7 Parameter Measurement Information.......................... 10
8 Detailed Description......................................................12
8.1 Overview................................................................... 12
8.2 Functional Block Diagrams....................................... 12
8.3 Feature Description...................................................12
8.4 Device Functional Modes..........................................13
9 Application and Implementation.................................. 15
9.1 Application Information .........................................15
9.2 Typical Application.................................................... 15
10 Power Supply Recommendations..............................20
11 Layout........................................................................... 21
11.1 Layout Guidelines................................................... 21
11.2 Layout Example...................................................... 21
12 Device and Documentation Support..........................22
12.1 Device Support....................................................... 22
12.2 Receiving Notification of Documentation Updates..22
12.3 Support Resources................................................. 22
12.4 Trademarks............................................................. 22
12.5 Electrostatic Discharge Caution..............................22
12.6 Glossary..................................................................22
4 Revision History
Changes from Revision A (October 2019) to Revision B (October 2021)
Page
• Added Feature "Functional Safety-Capable"...................................................................................................... 1
Changes from Revision * (July 2019) to Revision A (October 2019)
Page
• Deleted Application: Seismic test equipment......................................................................................................1
• Deleted the product preview note from THVD2410 in the Device Information table.......................................... 1
2
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
5 Pin Configuration and Functions
R
1
8
VCC
RE
2
7
B
DE
3
6
A
D
4
5
GND
Not to scale
Figure 5-1. D (SOIC) and DGK (VSSOP), 8-Pin Packages, Top View
R
1
RE
2
DE
3
D
4
Th ermal
Pad
8
VCC
7
B
6
A
5
GND
No t to scale
Figure 5-2. DRB (VSON), 8-Pin Package, Top View
Table 5-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
D
DGK
DRB
A
6
6
6
Bus input/output
Bus I/O port, A (complementary to B)
B
7
7
7
Bus input/output
Bus I/O port, B (complementary to A)
D
4
4
4
Digital input
Driver data input
DE
3
3
3
Digital input
Driver enable, active high (2-MΩ internal pull-down)
GND
5
5
5
Ground
R
1
1
1
Digital output
Receive data output
VCC
8
8
8
Power
3.3-V to 5-V supply
RE
2
2
2
Digital input
Thermal
Pad
—
—
—
—
Device ground
Receiver enable, active low (2-MΩ internal pull-up)
No electrical connection. Should be connected to GND plane for
optimal thermal performance
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
3
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
Supply voltage
VCC
–0.5
7
V
Bus voltage
Range at any bus pin (A or B) as differential or
common-mode with respect to GND
–70
70
V
Input voltage
Range at any logic pin (D, DE, or RE)
–0.3
5.7
V
Receiver output current
IO
–24
24
mA
Storage temperature
Tstg
–65
170
°C
(1)
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute maximum ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If briefly operating outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not
sustain damage, but it may not be fully functional. Operating the device in this manner may affect device reliability, functionality,
performance, and shorten the device lifetime.
6.2 ESD Ratings
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/
JEDEC JS-001(1)
VALUE
UNIT
Bus terminals and GND
±16,000
V
All pins except bus terminals
and GND
±8,000
V
±1,500
V
Charged-device model (CDM), per ANSI/ESDA/JEDEC
(1)
(2)
JS-002(2)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 ESD Ratings [IEC]
VALUE
4
V(ESD)
Electrostatic discharge
V(EFT)
Electrical fast transient
Contact discharge, per IEC 61000-4-2
Bus terminals and GND
±12,000
Air-gap discharge, per IEC 61000-4-2
Bus terminals and GND
±12,000
Per IEC 61000-4-4
Bus terminals
±4,000
Submit Document Feedback
UNIT
V
V
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
6.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VCC
Supply voltage
VI
Input voltage at any bus terminal (separately or common mode)(1)
VIH
High-level input voltage (driver, driver enable, and receiver enable inputs)
VIL
Low-level input voltage (driver, driver enable, and receiver enable inputs)
VID
Differential input voltage
–25
25
V
IO
Output current, driver
–60
60
mA
IOR
Output current, receiver
–8
8
mA
RL
Differential load resistance
54
1/tUI
Signaling rate
TA
Operating ambient temperature
TJ
Junction temperature
(1)
3
5.5
V
–25
25
V
2
V
0.8
V
60
Ω
THVD2410
500
kbps
THVD2450
50
Mbps
-40
125
°C
-40
150
°C
The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
6.5 Thermal Information
THERMAL METRIC(1)
THVD2410
THVD2450
THVD2410
THVD2450
THVD2410
THVD2450
D
(SOIC)
DGK
(VSSOP)
DRB
(VSON)
UNIT
8 PINS
8 PINS
8 PINS
RθJA
Junction-to-ambient thermal resistance
115.9
164.0
47.6
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
53.1
49.5
49.4
°C/W
RθJB
Junction-to-board thermal resistance
60.1
85.5
20.3
°C/W
ψJT
Junction-to-top characterization parameter
10.1
5.1
0.9
°C/W
ψJB
Junction-to-board characterization parameter
59.2
83.7
20.2
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
5.6
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.6 Power Dissipation
PARAMETER
PD
Driver and receiver enabled,
VCC = 5.5 V, TA = 125 °C,
random data (PRBS7) at signaling rate
TEST CONDITIONS
VALUE
Unterminated
RL = 300 Ω, CL = 50 pF (driver)
THVD2410
500 kbps
130
THVD2450
50 Mbps
340
RS-422 load
RL = 100 Ω, CL = 50 pF (driver)
THVD2410
500 kbps
170
THVD2450
50 Mbps
340
RS-485 load
RL = 54 Ω, CL = 50 pF (driver)
THVD2410
500 kbps
240
THVD2450
50 Mbps
370
UNIT
mW
mW
mW
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
5
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
6.7 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted). All typical values are at 25°C and supply voltage of VCC
= 5 V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RL = 60 Ω, –25 V ≤ Vtest ≤ 25 V (See Figure 7-1)
1.5
3.3
V
RL = 60 Ω, –25 V ≤ Vtest ≤ 25 V, 4.5 V ≤ VCC ≤ 5.5 V (See Figure 7-1)
2.1
3.3
V
2
4
V
1.5
3.3
V
Driver
|VOD|
Driver differential output
voltage magnitude
Δ|VOD|
Change in differential output
RL = 54 Ω or 100 Ω (See Figure 7-2)
voltage
VOC
Common-mode output
voltage
RL = 54 Ω or 100 Ω (See Figure 7-2)
1
ΔVOC(SS)
Change in steady-state
common-mode output
voltage
RL = 54 Ω or 100 Ω (See Figure 7-2)
IOS
Short-circuit output current
DE = VCC, -70 V ≤ (VA or VB) ≤ 70 V
RL = 100 Ω (See Figure 7-2)
RL = 54 Ω (See Figure 7-2)
–50
50
mV
3
V
–50
50
mV
–250
250
mA
VCC/2
Receiver
DE = 0 V, VCC = 0 V or 5.5 V
DE = 0 V, VCC = 0 V
or 5.5 V
II
Bus input current
VTH+
Positive-going input
threshold voltage(1)
VTH-
Negative-going input
threshold voltage(1)
VHYS
Input hysteresis
VTH_FSH
Input fail-safe threshold
CA,B
Input differential
capacitance
Measured between A and B, f = 1 MHz
VOH
Output high voltage
IOH = –8 mA
VOL
Output low voltage
IOL = 8 mA
IOZ
Output high-impedance
current
VO = 0 V or VCC, RE = VCC
IIN
Input current (DE)
3 V ≤ VCC ≤ 5.5 V, 0 V ≤ VIN ≤ VCC
IIN
Input current (D, RE)
3 V ≤ VCC ≤ 5.5 V, 0 V ≤ VIN ≤ VCC
VI = 12 V
75
125
VI = 25 V
150
250
μA
VI = –7 V
–100
–40
VI = –25 V
–250
–150
40
125
200
mV
–200
–125
-40
mV
Over common-mode range of ± 25 V
250
–40
VCC –
0.4
mV
40
mV
50
pF
VCC –
0.2
V
0.2
–1
0.4
V
1
µA
5
µA
Logic
–5
µA
Thermal Protection
TSHDN
Thermal shutdown
threshold
THYS
Thermal shutdown
hysteresis
Temperature rising
150
170
°C
10
°C
Supply
ICC
(1)
6
Driver and receiver enabled
RE = 0 V, DE = VCC,
No load
3.5
5.6
mA
Driver enabled, receiver disabled
RE = VCC, DE = VCC,
No load
2.5
4.4
mA
Driver disabled, receiver enabled
RE = 0 V, DE = 0 V,
No load
1.8
2.4
mA
Driver and receiver disabled
RE = VCC, DE = 0 V,
D = open, No load
0.1
1
µA
Supply current (quiescent)
Under any specific conditions, VTH+ is assured to be at least VHYS higher than VTH–.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
6.8 Switching Characteristics: THVD2410
500-kbps device (THVD2410) over recommended operating conditions. All typical values are at 25°C and supply voltage of
VCC = 5 V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
240
280
600
ns
275
350
ns
10
ns
ns
Driver
tr, tf
Differential output rise/fall time
tPHL, tPLH
Propagation delay
tSK(P)
Pulse skew, |tPHL – tPLH|
tPHZ, tPLZ
Disable time
tPZH, tPZL
Enable time
tSHDN
Time to shutdown
RL = 54 Ω, CL = 50 pF
RE = 0 V
See Figure 7-3
See Figure 7-4 and
Figure 7-5
RE = VCC
RE = VCC
45
95
175
270
ns
1.5
4
µs
500
ns
13
20
ns
50
80
ns
7
ns
30
40
ns
50
Receiver
tr, tf
Output rise/fall time
tPHL, tPLH
Propagation delay
tSK(P)
Pulse skew, |tPHL – tPLH|
tPHZ, tPLZ
Disable time
tPZH(1),
tPZL(1),
tPZH(2),
tPZL(2)
Enable time
tD(OFS)
Delay to enter fail-safe operation
tD(FSO)
Delay to exit fail-safe operation
tSHDN
Time to shutdown
CL = 15 pF
See Figure 7-6
DE = VCC
See Figure 7-7
90
120
ns
DE = 0 V
See Figure 7-8
2
4
μs
CL = 15 pF
See Figure 7-9
7
10
18
μs
35
45
60
ns
DE = 0 V
See Figure 7-8
500
ns
50
6.9 Switching Characteristics: THVD2450
50-Mbps device (THVD2450) over recommended operating conditions. All typical values are at 25°C and supply voltage of
VCC = 5 V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
5
7
ns
5
10
16
ns
3.5
ns
11
30
ns
8
25
ns
1.5
4
μs
500
ns
2
6
ns
40
55
ns
4
ns
7
15
ns
Driver
tr, tf
Differential output rise/fall time
tPHL, tPLH
Propagation delay
tSK(P)
Pulse skew, |tPHL – tPLH|
tPHZ, tPLZ
Disable time
tPZH, tPZL
Enable time
tSHDN
Time to shutdown
RL = 54 Ω, CL = 50 pF
RE = 0 V
RE = VCC
See Figure 7-3
See Figure 7-4 and
Figure 7-5
RE = VCC
50
Receiver
tr, tf
Output rise/fall time
tPHL, tPLH
Propagation delay
tSK(P)
Pulse skew, |tPHL – tPLH|
tPHZ, tPLZ
Disable time
tPZH(1),
tPZL(1),
tPZH(2),
tPZL(2)
Enable time
tD(OFS)
Delay to enter fail-safe operation
tD(FSO)
Delay to exit fail-safe operation
tSHDN
Time to shutdown
CL = 15 pF
See Figure 7-6
DE = VCC
See Figure 7-7
50
70
ns
DE = 0 V
See Figure 7-8
2
4
μs
CL = 15 pF
See Figure 7-9
7
10
18
μs
25
35
50
ns
DE = 0 V
See Figure 7-8
500
ns
50
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
7
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
6.10 Typical Characteristics
5
5
Driver Output Voltage (V)
4
Driver Differential Output Voltage (V)
VOL (VCC = 5 V)
VOH (VCC = 5 V)
VOL (VCC = 3.3 V)
VOH (VCC = 3.3 V)
4.5
3.5
3
2.5
2
1.5
1
0.5
0
4
3.5
3
2.5
2
1.5
1
0.5
0
-0.5
0
10
20
30
40
50
60
70
Driver Output Current (mA)
DE = VCC
80
90
100
0
10
20
D001
D=0V
TA = 25 °C
Figure 6-1. Driver Output Voltage vs Driver Output Current
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-5
30
40
50
60
70
Driver Output Current (mA)
DE = VCC
80
90
100
D002
D=0V
TA = 25 °C
Figure 6-2. Driver Differential Output voltage vs Driver Output
Current
295
290
Driver Rise and Fall Time (ns)
Driver Output Current (mA)
VOD (VCC = 5 V)
VOD (VCC = 3.3 V)
4.5
285
280
275
270
265
260
255
250
Rise time (VCC = 5 V)
Fall time (VCC = 5 V)
Rise time (VCC = 3.3 V)
Fall time (VCC = 3.3 V)
245
240
0
0.5
1
1.5
2
2.5
3
3.5
Supply Voltage (V)
TA = 25 °C
4
4.5
5
235
-60
5.5
-40
-20
0
D003
DE = D = VCC
RL = 54 Ω
20
40
60
Temperature (0C)
80
100
120
140
D007
Figure 6-4. THVD2410 Driver Rise or Fall Time vs Temperature
Figure 6-3. Driver Output Current vs Supply Voltage
286
Driver Propagation Delay (ns)
284
282
Supply Current (mA)
tPLH (VCC = 5 V)
tPHL (VCC = 5 V)
tPLH (VCC = 3.3 V)
tPHL (VCC = 3.3 V)
280
278
276
274
272
270
268
-60
-40
-20
0
20
40
60
Temperature (0C)
80
100
120
140
120
115
110
105
100
95
90
85
80
75
70
65
60
55
50
45
40
VCC = 5 V
VCC = 3.3 V
0
50
100
D008
Figure 6-5. THVD2410 Driver Propagation Delay vs Temperature
150 200 250 300 350
Signaling Rate (kbps)
TA = 25 °C
400
450
500
D009
RL = 54 Ω
Figure 6-6. THVD2410 Supply Current vs Signal Rate
8
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
5.6
5.55
5.5
5.45
5.4
5.35
5.3
5.25
5.2
5.15
5.1
5.05
5
4.95
4.9
-40
Driver Propagation Delay (ns)
Driver Rise and Fall Time (ns)
6.10 Typical Characteristics (continued)
Rise time (VCC = 5 V)
Fall time (VCC = 5 V)
Rise time (VCC = 3.3 V)
Fall time (VCC = 3.3 V)
-20
0
20
40
60
80
Temperature (0C)
100
120
140
tPLH (VCC = 5 V)
tPHL (VCC = 5 V)
tPLH (VCC = 3.3 V)
tPHL (VCC = 3.3 V)
-20
0
20
D004
Figure 6-7. THVD2450 Driver Rise or Fall Time vs Temperature
Supply Current (mA)
14
13.5
13
12.5
12
11.5
11
10.5
10
9.5
9
8.5
8
7.5
-40
40
60
80
Temperature (0C)
100
120
140
D005
Figure 6-8. THVD2450 Driver Propagation Delay vs Temperature
120
115
110
105
100
95
90
85
80
75
70
65
60
55
50
45
40
VCC = 5 V
VCC = 3.3 V
0
5
TA = 25 °C
10
15
20
25
30
35
Signaling Rate (Mbps)
40
45
50
D006
RL = 54 Ω
Figure 6-9. THVD2450 Supply Current vs Signal Rate
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
9
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
7 Parameter Measurement Information
375 Ÿ
Vcc
DE
A
D
VOD
0V or Vcc
Vtest
RL
B
375 Ÿ
Figure 7-1. Measurement of Driver Differential Output Voltage With Common-Mode Load
A
A
D
0V or Vcc
RL/2
VA
B
VB
VOD
RL/2
B
CL
VOC(PP)
VOC
ûVOC(SS)
VOC
Figure 7-2. Measurement of Driver Differential and Common-Mode Output With RS-485 Load
Vcc
Vcc
DE
A
D
Input
Generator
RL=
54 Ÿ
VOD
50 Ÿ
VI
50%
VI
0V
tPHL
tPLH
CL= 50 pF
90%
50%
10%
B
VOD
tr
~2 V
~ ±2V
tf
Figure 7-3. Measurement of Driver Differential Output Rise and Fall Times and Propagation Delays
A
D
VI
50%
VI
B
DE
Input
Generator
Vcc
VO
S1
RL=
110 Ÿ
CL=
50 pF
50Ÿ
0V
tPZH
90%
VO
VOH
50%
§ 0V
tPHZ
Copyright © 2017, Texas Instruments Incorporated
Figure 7-4. Measurement of Driver Enable and Disable Times With Active High Output and Pull-Down
Load
Vcc
Vcc
A
D
DE
Input
Generator
VI
RL= 110 Ÿ
S1
B
50Ÿ
CL=
50 pF
VO
50%
VI
0V
tPZL
VO
tPLZ
§ Vcc
50%
10%
VOL
Copyright © 2017, Texas Instruments Incorporated
Figure 7-5. Measurement of Driver Enable and Disable Times With Active Low Output and Pull-up Load
10
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
3V
A
R VO
Input
Generator
50 Ÿ
VI
1.5V
B
0V
tPLH
tPHL
VOH
90%
CL=15 pF
50%
RE
0V
50 %
VI
VOD
10 %
tr
VOL
tf
Figure 7-6. Measurement of Receiver Output Rise and Fall Times and Propagation Delays
Vcc
Vcc
Vcc
VI
50 %
DE
0V or Vcc
0V
A
D
1 kŸ
VO
R
B
tPZH(1)
tPHZ
S1
VO
CL=15 pF
VOH
90 %
50 %
§ 0V
RE
tPZL(1)
Input
Generator
50 Ÿ
VI
D at Vcc
S1 to GND
tPLZ
VO
VCC D at 0V
S1 to Vcc
50 %
10 %
VOL
Figure 7-7. Measurement of Receiver Enable/Disable Times With Driver Enabled
Vcc
Vcc
VI
50%
50%
0V
A
0V or 1.5 V
R
1.5 V or 0 V
Input
Generator
B
VO
tPZH(2)
1 kŸ
S1
VO
CL= 15 pF
RE
tPHZ
§ 0V
tPZL(2)
VI
VOH
90%
50%
tPLZ
VCC
50Ÿ
VO
A at 1.5V
B at 0V
S1 to GND
50%
10%
VOL
A at 0V
B at 1.5V
S1 to VCC
Copyright © 2017, Texas Instruments Incorporated
Figure 7-8. Measurement of Receiver Enable Times With Driver Disabled
0V
VA - VB
A
VA = 0 V or -750 mV
VB = 0 V or +750 mV
R
B
RE
0V
-1.5 V
VO
tD(OFS)
CL= 15 pF
tD(FSO)
VCC
VO
VCC / 2
0V
Copyright © 2017, Texas Instruments Incorporated
Figure 7-9. Measurement of Fail-Safe Delay
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
11
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
8 Detailed Description
8.1 Overview
THVD2410 and THVD2450 are fault-protected, half duplex RS-485 transceivers available in two speed grades
suitable for data transmission up to 500 kbps and 50 Mbps respectively. The devices have active-high driver
enables and active-low receiver enables. A shutdown current of less than 1 µA can be achieved by disabling
both driver and receiver.
8.2 Functional Block Diagrams
VCC
R
RE
A
DE
B
D
GND
Figure 8-1. THVD2410 and THVD2450 Block Diagram
8.3 Feature Description
8.3.1 ±70-V Fault Protection
THVD24x0 transceivers have extended bus fault protection compared to standard RS-485 devices. Transceivers
that operate in rugged industrial environments are often exposed to voltage transients greater than the -7 V to
+12 V defined by the TIA/EIA-485A standard. To protect against such conditions, the generic RS-485 devices
with lower absolute maximum ratings requires expensive external protection components. To simplify system
design and reduce overall system cost, THVD24x0 devices are protected up to ±70 V without the need for any
external components.
8.3.2 Integrated IEC ESD and EFT Protection
Internal ESD protection circuits protect the transceivers against electrostatic discharges (ESD) according to IEC
61000-4-2 of up to ±12 kV and against electrical fast transients (EFT) according to IEC 61000-4-4 of up to ±4 kV.
THVD24x0 ESD structures help to limit voltage excursions and recover from them quickly that they allow EFT
Criterion A at the system level (no data loss when transient noise is present).
8.3.3 Driver Overvoltage and Overcurrent Protection
The THVD24x0 drivers are protected against any DC supply shorts in the range of -70 V to +70 V. The devices
internally limit the short circuit current to ±250 mA in order to comply with the TIA/EIA-485A standard. In addition,
a fold-back current limiting circuit further reduces the driver short circuit current to less than ±5 mA if the output
fault voltage exceeds |±25 V|.
All devices feature thermal shutdown protection that disables the driver and the receiver if the junction
temperature exceeds the TSHDN threshold due to excessive power dissipation.
8.3.4 Enhanced Receiver Noise Immunity
The differential receivers of THVD24x0 feature fully symmetric thresholds to maintain duty cycle of the signal
even with small input amplitudes. In addition, 250 mV (typical) hysteresis ensures excellent noise immunity.
12
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
8.3.5 Receiver Fail-Safe Operation
The receivers are fail-safe to invalid bus states caused by the following:
• Open bus conditions, such as a disconnected connector
• Shorted bus conditions, such as cable damage shorting the twisted-pair together
• Idle bus conditions that occur when no driver on the bus is actively driving
In any of these cases, the receiver outputs a fail-safe logic high state if the input amplitude stays for longer than
tD(OFS) at less than |VTH_FSH|.
8.3.6 Low-Power Shutdown Mode
Driving DE low and RE high for longer than 500 ns puts the devices into the shutdown mode. If either DE goes
high or RE goes low, the counters reset. The devices does not enter the shutdown mode if the enable pins are in
disable state for less than 50 ns. This feature prevents the devices from accidentally going into shutdown mode
due to skew between DE and RE.
8.4 Device Functional Modes
When the driver enable pin, DE, is logic high, the differential outputs A and B follow the logic states at data input
D. A logic high at D causes A to turn high and B to turn low. In this case, the differential output voltage defined
as VOD = VA – VB is positive. When D is low, the output states reverse: B turns high, A becomes low, and VOD is
negative.
When DE is low, both outputs turn high-impedance. In this condition, the logic state at D is irrelevant. The DE
pin has an internal pull-down resistor to ground, thus when left open the driver is disabled (high-impedance) by
default. The D pin has an internal pull-up resistor to VCC, thus, when left open while the driver is enabled, output
A turns high and B turns low.
Table 8-1. Driver Function Table
INPUT
ENABLE
OUTPUTS
D
DE
A
B
H
H
H
L
Actively drive bus high
FUNCTION
L
H
L
H
Actively drive bus low
X
L
Z
Z
Driver disabled
X
OPEN
Z
Z
Driver disabled by default
OPEN
H
H
L
Actively drive bus high by default
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
13
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage
defined as VID = VA – VB is higher than the positive input threshold, VTH+, the receiver output, R, turns high.
When VID is lower than the negative input threshold, VTH-, the receiver output, R, turns low. If VID is between
VTH+ and VTH-, the output is indeterminate.
When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of VID
are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is
disconnected from the bus (open-circuit), or he bus lines are shorted to one another (short-circuit), or the bus is
not actively driven (idle bus).
Table 8-2. Receiver Function Table
14
DIFFERENTIAL INPUT
ENABLE
OUTPUT
VID = VA – VB
RE
R
VTH+ < VID
L
H
Receive valid bus high
VTH- < VID < VTH+
L
?
Indeterminate bus state
FUNCTION
VID < VTH-
L
L
Receive valid bus low
X
H
Z
Receiver disabled
X
OPEN
Z
Receiver disabled by default
Open-circuit bus
L
H
Fail-safe high output
Short-circuit bus
L
H
Fail-safe high output
Idle (terminated) bus
L
H
Fail-safe high output
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and
TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
THVD2410 and THVD2450 are fault-protected, half-duplex RS-485 transceivers commonly used for
asynchronous data transmissions. For these devices, the driver and receiver enable pins allow for the
configuration of different operating modes.
9.2 Typical Application
An RS-485 bus consists of multiple transceivers connecting in parallel to a bus cable. To eliminate line
reflections, each cable end is terminated with a termination resistor, RT, whose value matches the characteristic
impedance, Z0, of the cable. This method, known as parallel termination, generally allows for higher data rates
over longer cable length.
R
R
RE
B
DE
D
R
A
R
A
RT
RT
D
A
R
B
A
D
R RE DE D
B
DE
D
B
R
RE
D
D
R RE DE D
Figure 9-1. Typical RS-485 Network With Half-Duplex Transceivers
9.2.1 Design Requirements
RS-485 is a robust electrical standard suitable for long-distance networking that may be used in a wide range of
applications with varying requirements, such as distance, data rate, and number of nodes.
9.2.1.1 Data Rate and Bus Length
There is an inverse relationship between data rate and cable length, which means the higher the data rate, the
short the cable length; and conversely, the lower the data rate, the longer the cable length. While most RS-485
systems use data rates between 10 kbps and 100 kbps, some applications require data rates up to 250 kbps at
distances of 4000 feet and longer. Longer distances are possible by allowing for small signal jitter of up to 5 or
10%.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
15
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
10000
Cable Length (ft)
5%, 10%, and 20% Jitter
1000
Conservative
Characteristics
100
10
100
1k
10 k
100 k
1M
10 M
100 M
Data Rate (bps)
Figure 9-2. Cable Length vs Data Rate Characteristic
Even higher data rates are achievable (that is, 50 Mbps for the THVD2450) in cases where the interconnect is
short enough (or has suitably low attenuation at signal frequencies) to not degrade the data.
9.2.1.2 Stub Length
When connecting a node to the bus, the distance between the transceiver inputs and the cable trunk, known as
the stub, should be as short as possible. Stubs present a non-terminated piece of bus line which can introduce
reflections of varying phase as the length of the stub increases. As a general guideline, the electrical length, or
round-trip delay, of a stub should be less than one-tenth of the rise time of the driver, thus giving a maximum
physical stub length as shown in Equation 1.
L(STUB) ≤ 0.1 × tr × v × c
(1)
where
•
•
•
tr is the 10/90 rise time of the driver
c is the speed of light (3 × 108 m/s)
v is the signal velocity of the cable or trace as a factor of c
9.2.1.3 Bus Loading
The RS-485 standard specifies that a compliant driver must be able to drive 32 unit loads (UL), where 1 unit
load represents a load impedance of approximately 12 kΩ. Because the THVD24x0 devices consist of 1/8 UL
transceivers, connecting up to 256 receivers to the bus is possible.
16
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
9.2.1.4 Transient Protection
The bus pins of the THVD24x0 transceivers include on-chip ESD protection against ±30-kV HBM and ±12-kV
IEC 61000-4-2 contact discharge. The International Electrotechnical Commission (IEC) ESD test is far more
severe than the HBM ESD test. The 50% higher charge capacitance, C(S), and 78% lower discharge resistance,
R(D), of the IEC model produce significantly higher discharge currents than the HBM model. As stated in the IEC
61000-4-2 standard, contact discharge is the preferred transient protection test method.
R(C)
R(D)
High-Voltage
Pulse
Generator
330 Ω
(1.5 kΩ)
Device
Under
Test
150 pF
(100 pF)
C(S)
Current (A)
50 M
(1 M)
40
35
30 10-kV IEC
25
20
15
10
5
0
0
50
100
10-kV HBM
150
200
250
300
Time (ns)
Figure 9-3. HBM and IEC ESD Models and Currents in Comparison (HBM Values in Parenthesis)
The on-chip implementation of IEC ESD protection significantly increases the robustness of equipment.
Common discharge events occur because of human contact with connectors and cables. Designers may choose
to implement protection against longer duration transients, typically referred to as surge transients.
EFTs are generally caused by relay-contact bounce or the interruption of inductive loads. Surge transients
often result from lightning strikes (direct strike or an indirect strike which induce voltages and currents), or
the switching of power systems, including load changes and short circuit switching. These transients are often
encountered in industrial environments, such as factory automation and power-grid systems.
Figure 9-4 compares the pulse-power of the EFT and surge transients with the power caused by an IEC ESD
transient. The left hand diagram shows the relative pulse-power for a 0.5-kV surge transient and 4-kV EFT
transient, both of which dwarf the 10-kV ESD transient visible in the lower-left corner. 500-V surge transients are
representative of events that may occur in factory environments in industrial and process automation.
22
20
18
16
14
12
10
8
6
4
2
0
Pulse Power (MW)
Pulse Power (kW)
The right hand diagram shows the pulse power of a 6-kV surge transient, relative to the same 0.5-kV surge
transient. 6-kV surge transients are most likely to occur in power generation and power-grid systems.
0.5-kV Surge
4-kV EFT
10-kV ESD
0
5
10
15
20
25
30
35
40
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
6-kV Surge
0.5-kV Surge
0
5
10
15
20
25
30
35
40
Time (µs)
Time (µs)
Figure 9-4. Power Comparison of ESD, EFT, and Surge Transients
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
17
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
In the case of surge transients, high-energy content is characterized by long pulse duration and slow decaying
pulse power. The electrical energy of a transient that is dumped into the internal protection cells of a transceiver
is converted into thermal energy, which heats and destroys the protection cells, thus destroying the transceiver.
Figure 9-5 shows the large differences in transient energies for single ESD, EFT, surge transients, and an EFT
pulse train that is commonly applied during compliance testing.
1000
100
Surge
10
1
Pulse Energy (J)
EFT Pulse Train
0.1
0.01
EFT
10-3
10-4
ESD
10-5
10-6
0.5
1
2
4
6
8 10
15
Peak Pulse Voltage (kV)
Figure 9-5. Comparison of Transient Energies
18
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
9.2.2 Detailed Design Procedure
Figure 9-6 suggests a protection circuit against 1 kV surge (IEC 61000-4-5) transients. Table 9-1 shows the
associated bill of materials. SMAJ30CA TVS diodes are rated to operate up to 30 V. This ensures the protection
diodes do not conduct if a direct RS-485 bus shorts to 24-V DC industrial power rail.
3.3V ± 5 V
100nF
VCC
10k
10k
R
RxD
/RE
A
DE
B
DIR
MCU/
UART DIR
D
TxD
TVS
THVD24x0
10k
TVS
GND
Figure 9-6. Transient Protection Against Surge Transients for Half-Duplex Devices
Table 9-1. Components List(1)
DEVICE
FUNCTION
ORDER NUMBER
MANUFACTURER
XCVR
RS-485 transceiver
THVD24x0
TI
TVS
Bidirectional 400-W transient suppressor
SMAJ30CA
Littelfuse
(1)
See Device Support
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
19
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
9.2.3 Application Curves
THVD2410
VCC = 5 V
Random (PRBS7) data at 500 kbps
RL = 50 Ω
Figure 9-7. THVD2410 Waveforms at VCC = 5 V
THVD2450
VCC = 5 V
Random (PRBS7) data at 50 Mbps
RL = 50 Ω
Figure 9-9. THVD2450 Waveforms at VCC = 5 V
THVD2410
VCC = 3.3 V
Random (PRBS7) data at 500 kbps
RL = 50 Ω
Figure 9-8. THVD2410 Waveforms at VCC = 3.3 V
THVD2450
VCC = 3.3 V
Random (PRBS7) data at 50 Mbps
RL = 50 Ω
Figure 9-10. THVD2450 Waveforms at VCC = 3.3 V
10 Power Supply Recommendations
To ensure reliable operation at all data rates and supply voltages, each supply should be decoupled with a 100
nF ceramic capacitor located as close to the supply pins as possible. This helps to reduce supply voltage ripple
present on the outputs of switched-mode power supplies and also helps to compensate for the resistance and
inductance of the PCB power planes.
20
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
11 Layout
11.1 Layout Guidelines
Robust and reliable bus node design often requires the use of external transient protection devices in order
to protect against surge transients that may occur in industrial environments. Since these transients have a
wide frequency bandwidth (from approximately 3 MHz to 300 MHz), high-frequency layout techniques should be
applied during PCB design.
1. Place the protection circuitry close to the bus connector to prevent noise transients from propagating across
the board.
2. Use VCC and ground planes to provide low inductance. Note that high-frequency currents tend to follow the
path of least impedance and not the path of least resistance.
3. Design the protection components into the direction of the signal path. Do not force the transient currents to
divert from the signal path to reach the protection device.
4. Apply 100-nF to 220-nF decoupling capacitors as close as possible to the VCC pins of transceiver, UART
and/or controller ICs on the board.
5. Use at least two vias for VCC and ground connections of decoupling capacitors and protection devices to
minimize effective via inductance.
6. Use 1-kΩ to 10-kΩ pull-up and pull-down resistors for enable lines to limit noise currents in these lines during
transient events.
7. Insert pulse-proof resistors into the A and B bus lines if the TVS clamping voltage is higher than the specified
maximum voltage of the transceiver bus pins. These resistors limit the residual clamping current into the
transceiver and prevent it from latching up.
11.2 Layout Example
Via to ground
Via to VCC
5
C
R
5
TVS
R
1
JMP
6
4
R
MCU
6
R
THVD24x0
TVS 1
5
5
Figure 11-1. Half-Duplex Layout Example
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
21
THVD2410, THVD2450
www.ti.com
SLLSF20B – JULY 2019 – REVISED OCTOBER 2021
12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
22
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: THVD2410 THVD2450
PACKAGE OPTION ADDENDUM
www.ti.com
20-Oct-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
THVD2410DGKR
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
2410
THVD2410DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
2410
THVD2410DRBR
ACTIVE
SON
DRB
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
2410
THVD2450DGKR
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
2450
THVD2450DR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
2450
THVD2450DRBR
ACTIVE
SON
DRB
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
2450
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
