TL064ACDRE4

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 TL06xx Low-Power JFET-Input Operational Amplifiers 1 Features 2 Applications • • • • • • • 1 • • • • • • • • Very Low Power Consumption Typical Supply Current: 200 μA (Per Amplifier) Wide Common-Mode and Differential Voltage Ranges Low Input Bias and Offset Currents Common-Mode Input Voltage Range Includes VCC+ Output Short-Circuit Protection High Input Impedance: JFET-Input Stage Internal Frequency Compensation Latch-Up-Free Operation High Slew Rate: 3.5 V/μs Typical On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters. Tablets White goods Personal electronics Computers 3 Description The JFET-input operational amplifiers of the TL06x series are designed as low-power versions of the TL08x series amplifiers. They feature high input impedance, wide bandwidth, high slew rate, and low input offset and input bias currents. The TL06x series features the same terminal assignments as the TL07x and TL08x series. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TL06xxD SOIC (14) 8.65 mm × 3.91 mm TL06xxJ CDIP (14) 19.56 mm × 6.92 mm TL06xxN PDIP (14) 19.30 mm × 6.35 mm TL06xxNS SO (14) 10.30 mm × 5.30 mm TL06xxPW TSSOP (14) 5.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Schematic Symbol IN+ + IN− − OFFSET N1 OUT OFFSET N2 Offset Null/Compensation TL061 Only 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 7 8 1 1 1 2 3 4 Absolute Maximum Ratings ...................................... 4 ESD Ratings.............................................................. 5 Recommended Operating Conditions....................... 5 Thermal Information - 8 Pins..................................... 5 Thermal Information - 14 Pins................................... 5 Thermal Information - 20 Pins................................... 6 Electrical Characteristics for TL06xC and TL06xxC . 6 Electrical Characteristics for TL06xxC and TL06xI ... 7 Electrical Characteristics for TL06xM and TL064M .. 7 Operating Characteristics........................................ 8 Typical Characteristics ............................................ 9 Parameter Measurement Information ................ 13 Detailed Description ............................................ 14 8.1 Overview ................................................................. 14 8.2 Functional Block Diagram ....................................... 14 8.3 Feature Description................................................. 14 8.4 Device Functional Modes........................................ 15 9 Applications and Implementation ...................... 16 9.1 Application Information............................................ 16 9.2 Typical Applications ................................................ 16 9.3 System Examples ................................................... 17 10 Power Supply Recommendations ..................... 19 11 Layout................................................................... 20 11.1 Layout Guidelines ................................................. 20 11.2 Layout Examples................................................... 20 12 Device and Documentation Support ................. 21 12.1 12.2 12.3 12.4 12.5 12.6 Documentation Support ........................................ Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 21 21 21 21 21 21 13 Mechanical, Packaging, and Orderable Information ........................................................... 21 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision K (January 2014) to Revision L Page • Added Applications ................................................................................................................................................................. 1 • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 Changes from Revision J (September 2004) to Revision K Page • Updated document to new TI data sheet format - no specification changes. ........................................................................ 1 • Deleted Ordering Information table. ....................................................................................................................................... 1 • Updated Features with Military Disclaimer. ............................................................................................................................ 1 2 Submit Documentation Feedback Copyright © 1978–2015, Texas Instruments Incorporated Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B www.ti.com SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 5 Pin Configuration and Functions TL061x D, P, and PS Package 8-Pin SOIC, PDIP, and SO Top View 1 8 2 7 3 6 4 5 NC 1OUT NC VCC+ NC OFFSET N1 IN− IN+ VCC− TL062 FK Package 20-Pin LCCC Top View NC VCC+ OUT OFFSET N2 NC 1IN− NC 1IN+ NC TL062x D, JG, P, PS, and PW Package 8-Pin SOIC, CDIP, PDIP, SO, and TSSOP Top View 1 8 2 7 3 6 4 5 VCC+ 2OUT 2IN− 2IN+ 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC 2OUT NC 2IN− NC NC VCC− NC 2IN+ NC 1OUT 1IN− 1IN+ VCC− 4 TL064 FK Package 20-Pin LCCC Top View 1 14 2 13 3 12 4 11 5 10 6 9 7 8 4OUT 4IN− 4IN+ VCC− 3IN+ 3IN− 3OUT 1IN+ NC VCC+ NC 2IN+ 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4IN+ NC VCC− NC 3IN+ 2IN− 2OUT NC 3OUT 3IN− 1OUT 1IN− 1IN+ VCC+ 2IN+ 2IN− 2OUT 1IN− 1OUT NC 4OUT 4IN− TL064x D, J, N, NS, PW, and W Package 14-Pin SOIC, CDIP, PDIP, SO, TSSOP and CFP Top View Pin Functions PIN TL061 NAME TL062 D, P, PS D, JG, P, PS, PW 1IN– — 1IN+ — 1OUT — 2IN– — 2IN+ — 2OUT 3IN– TL064 TYPE DESCRIPTION FK D, J, N, NS, PW, W FK 2 5 2 3 I Negative input 3 7 3 4 I Positive input 1 2 1 2 O Output 6 15 6 9 I Negative input 5 12 5 8 I Positive input — 7 17 7 10 O Output — — — 9 13 I Negative input 3IN+ — — — 10 14 I Positive input 3OUT — — — 8 12 O Output 4IN– — — — 13 19 I Negative input 4IN+ — — — 12 18 I Positive input 4OUT — — — 14 20 O Output IN– 2 — — — — I Negative input Copyright © 1978–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B 3 TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 www.ti.com Pin Functions (continued) PIN TL061 NAME IN+ TL062 TL064 D, JG, P, PS, PW FK D, J, N, NS, PW, W FK 3 — — — — 1 4 8 — Positive input 5 6 8 I DESCRIPTION 1 3 NC TYPE D, P, PS 7 9 — 11 — Do not connect 11 13 14 15 16 18 17 19 OFFSET N1 1 — — — — — Input offset adjustment OFFSET N2 5 — — — — — Input offset adjustment OUT 6 — — — — O Output VCC– 4 4 10 11 16 — Power supply VCC+ 7 8 20 4 6 — Power supply 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN VCC+ VCC– MAX 18 Supply voltage (2) –18 UNIT V VID Differential input voltage (3) ±30 V VI Input voltage (2) (4) ±15 V Duration of output short circuit (5) TJ Tstg (1) (2) (3) (4) (5) 4 Unlimited Operating virtual junction temperature 150 °C Case temperature for 60 seconds FK package 260 °C Lead temperature 1.6 mm (1/16 inch) from case for 60 seconds J, JG, U, or W package 300 °C Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds D, N, NS, P, PS, or PW package 260 °C 150 °C Storage temperature –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC−. Differential voltages are at IN+, with respect to IN−. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. Submit Documentation Feedback Copyright © 1978–2015, Texas Instruments Incorporated Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B www.ti.com SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) 2000 Charged-device model (CDM), per JEDEC specification JESD22C101 (2) 2000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC+ Supply voltage 5 15 V VCC– Supply voltage –5 –15 V VCM Common-mode voltage VCC– + 4 VCC+ – 4 V TL06xM –55 125 TL06xQ –40 125 TL06xI –40 85 0 70 TA Ambient temperature TL06xC °C 6.4 Thermal Information - 8 Pins TL06xx THERMAL METRIC (1) RθJ A RθJ C(to p) (1) (2) (3) (4) (5) D (SOIC) P (PDIP) PS (SO) PW (TSSOP) JG (CDIP) 8 PINS 8 PINS 8 PINS 8 PINS 8 PINS UNIT Junction-to-ambient thermal resistance (2) (3) 97 85 95 149 — °C/W Junction-to-case (top) thermal resistance (4) (5) — — — — 14.5 °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/RθJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Maximum power dissipation is a function of TJ(max), RθJC, and TC. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TC) / RθJC. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with MIL-STD-883. 6.5 Thermal Information - 14 Pins TL06xx THERMAL METRIC (1) RθJ Junction-to-ambient thermal resistance (2) (3) A RθJ C(to p) (1) (2) (3) Junction-to-case (top) thermal resistance (2) (3) D (SOIC) N (PDIP) NS (SO) PS (SO) PW (TSSOP) J (CDIP) W (CFP) 14 PINS 14 PINS 14 PINS 8 PINS 14 PINS 14 PINS 14 PINS 86 80 76 95 — — °C/W — — — — 15.05 14.65 °C/W 113 — UNIT For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Maximum power dissipation is a function of TJ(max), RθJC, and TC. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TC) / RθJC. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with MIL-STD-883. Copyright © 1978–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B 5 TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 www.ti.com 6.6 Thermal Information - 20 Pins TL06xx THERMAL METRIC (1) FK (LCCC) UNIT 20 PINS Junction-to-ambient thermal resistance (2) (3) RθJA RθJC(top) (1) (2) (3) (4) (5) Junction-to-case (top) thermal resistance (4) (5) — °C/W 5.61 °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/RθJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Maximum power dissipation is a function of TJ(max), RθJC, and TC. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TC) / RθJC. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with MIL-STD-883. 6.7 Electrical Characteristics for TL06xC and TL06xxC VCC± = ±15 V (unless otherwise noted) TEST CONDITIONS (1) PARAMETER MIN TA = 25°C VIO Input offset voltage VO = 0, RS = 50 Ω αVIO Temperature coefficient of input offset voltage VO = 0, RS = 50 Ω, TA = Full range IIO Input offset current VO = 0 TL061AC, TL062AC, TL064AC TL061C, TL062C, TL064C TYP MAX 3 15 TA = Full range MIN TYP 3 20 5 TA = Full range 200 5 30 400 30 mV μV/°C 10 5 TA = 25°C 6 7.5 10 TA = 25°C UNIT MAX 100 pA 3 nA 200 pA 7 nA IIB Input bias current (2) VO = 0 VICR Common-mode input voltage range TA = 25°C ±11 –12 to 15 ±11 –12 to 15 VOM Maximum peak output voltage swing RL = 10 kΩ, TA = 25°C ±10 ±13.5 ±10 ±13.5 RL ≥ 10 kΩ, TA = Full range ±10 AVD Large-signal differential voltage amplification VO = ±10 V, RL ≥ 2 kΩ B1 Unity-gain bandwidth RL = 10 kΩ, TA = 25°C ri Input resistance TA = 25°C CMRR Common-mode rejection ratio VIC = VICRmin, VO = 0, RS = 50 Ω, TA = 25°C 70 86 kSVR Supply-voltage rejection ratio (ΔVCC±/ΔVIO) VCC = ±9 V to ±15 V, VO = 0, RS = 50 Ω, TA = 25°C 70 95 PD Total power dissipation (each amplifier) VO = 0, No load, TA = 25°C 6 7.5 6 7.5 mW ICC Supply current (each amplifier) VO = 0, No load, TA = 25°C 200 250 200 250 µA VO1/VO2 Crosstalk attenuation AVD = 100, TA = 25°C 120 (1) (2) 6 TA = Full range 10 TA = 25°C 3 TA = Full range 3 V V ±10 6 4 6 V/mV 4 1 1 1012 1012 Ω 80 86 dB 80 95 dB 120 MHz dB All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Full range for TA is 0°C to 70°C for TL06xC, TL06xAC, and TL06xBC and –40°C to 85°C for TL06xI. Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 12. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible. Submit Documentation Feedback Copyright © 1978–2015, Texas Instruments Incorporated Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B www.ti.com SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 6.8 Electrical Characteristics for TL06xxC and TL06xI VCC± = ±15 V (unless otherwise noted) TEST CONDITIONS (1) PARAMETER TL061BC, TL062BC, TL064BC MIN TA = 25°C VIO Input offset voltage VO = 0, RS = 50 Ω αVIO Temperature coefficient of input offset voltage VO = 0, RS = 50 Ω, TA = Full range IIO Input offset current VO = 0 Input bias current (2) IIB TYP MAX 2 3 TA = Full range MIN MAX 3 6 9 10 5 TA = Full range 100 5 30 TA = Full range 200 30 7 pA 20 nA Maximum peak output voltage swing RL = 10 kΩ, TA = 25°C ±10 ±13.5 RL ≥ 10 kΩ, TA = Full range ±10 AVD Large-signal differential voltage amplification VO = ±10 V, RL ≥ 2 kΩ B1 Unity-gain bandwidth RL = 10 kΩ, TA = 25°C ri Input resistance TA = 25°C CMRR Common-mode rejection ratio VIC = VICRmin, VO = 0, RS = 50 Ω, TA = 25°C 80 86 kSVR Supply-voltage rejection ratio (ΔVCC±/ΔVIO) VCC = ±9 V to ±15 V, VO = 0, RS = 50 Ω, TA = 25°C 80 95 PD Total power dissipation (each amplifier) VO = 0, No load, TA = 25°C 6 7.5 6 7.5 mW ICC Supply current (each amplifier) VO = 0, No load, TA = 25°C 200 250 200 250 µA VO1/VO2 Crosstalk attenuation AVD = 100, TA = 25°C 120 (1) (2) TA = 25°C 4 TA = Full range 4 ±13.5 nA 200 ±11 VOM ±10 pA 10 TA = 25°C Common-mode input voltage range ±11 100 –12 to 15 VICR –12 to 15 mV μV/°C 10 3 TA = 25°C UNIT TYP 5 TA = 25°C VO = 0 TL061I, TL062I, TL064I V V ±10 6 4 6 V/mV 4 1 1 1012 1012 MHz Ω 80 86 dB 80 95 dB 120 dB All characteristics are measured under open-loop conditions with zero common-mode input voltage, unless otherwise specified. Full range for TA is 0°C to 70°C for TL06xC, TL06xAC, and TL06xBC and –40°C to 85°C for TL06xI. Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 12. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible. 6.9 Electrical Characteristics for TL06xM and TL064M VCC± = ±15 V (unless otherwise noted) TEST CONDITIONS (1) PARAMETER TL061M, TL062M MIN TA = 25°C VIO Input offset voltage VO = 0, RS = 50 Ω αVIO Temperature coefficient of input offset voltage VO = 0, RS = 50 Ω, TA = –55°C to 125°C IIO Input offset current VO = 0 VICR (1) (2) (3) Common-mode input voltage range VO = 0 TA = 25°C 3 6 MIN TYP MAX 3 9 9 15 10 5 100 5 100 20 (2) 20 (2) TA = 125°C 20 20 30 200 30 200 TA = –55°C 50 (2) 50 (2) TA = 125°C 50 50 ±11 –12 to 15 ±11 UNIT mV μV/°C 10 TA = –55°C TA = 25°C Input bias current (3) MAX TA = –55°C to 125°C TA = 25°C IIB TL064M TYP –12 to 15 pA nA pA nA V All characteristics are measured under open-loop conditions, with zero common-mode voltage, unless otherwise specified. This parameter is not production tested. Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 12. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible. Copyright © 1978–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B 7 TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 www.ti.com Electrical Characteristics for TL06xM and TL064M (continued) VCC± = ±15 V (unless otherwise noted) TEST CONDITIONS (1) PARAMETER TL061M, TL062M MIN TYP ±13.5 VOM Maximum peak output voltage swing RL = 10 kΩ, TA = 25°C ±10 RL ≥ 10 kΩ, TA = –55°C to 125°C ±10 AVD Large-signal differential voltage amplification VO = ±10 V, RL ≥ 2 kΩ B1 Unity-gain bandwidth RL = 10 kΩ, TA = 25°C TA = 25°C 4 TA = –55°C to 125°C 4 TL064M MAX MIN TYP ±10 ±13.5 MAX V ±10 6 4 UNIT 6 V/mV 4 MHz 12 12 Ω ri Input resistance TA = 25°C CMRR Common-mode rejection ratio VIC = VICRmin, VO = 0, RS = 50 Ω, TA = 25°C 80 86 80 86 dB kSVR Supply-voltage rejection ratio (ΔVCC±/ΔVIO) VCC = ±9 V to ±15 V, VO = 0, RS = 50 Ω, TA = 25°C 80 95 80 95 dB PD Total power dissipation (each amplifier) VO = 0, No load, TA = 25°C 6 7.5 6 7.5 mW ICC Supply current (each amplifier) VO = 0, No load, TA = 25°C 200 250 200 250 µA VO1/VO2 Crosstalk attenuation AVD = 100, TA = 25°C 120 10 10 120 dB 6.10 Operating Characteristics VCC± = ±15 V, TA= 25°C PARAMETER TEST CONDITIONS SR Slew rate at unity gain (1) VI = 10 V, RL = 10 kΩ, CL = 100 pF, see Figure 16 tr Rise-time Overshoot factor VI = 20 V, RL = 10 kΩ, CL = 100 pF, see Figure 16 Equivalent input noise voltage RS = 20 Ω f = 1 kHz Vn (1) 8 MIN TYP MAX UNIT 1.5 3.5 V/μs 0.2 μs 10% 42 nV/√Hz Slew rate at –55°C to 125°C is 0.7 V/μs min. Submit Documentation Feedback Copyright © 1978–2015, Texas Instruments Incorporated Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B www.ti.com SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 6.11 Typical Characteristics Data at high and low temperatures are applicable only within the specified operating free-air temperature ranges of the various devices. Table 1. Table of Graphs FIGURE Maximum peak output voltage versus Supply voltage Figure 1 Maximum peak output voltage versus Free-air temperature Figure 2 Maximum peak output voltage versus Load resistance Figure 3 Maximum peak output voltage versus Frequency Figure 4 Differential voltage amplification versus Free-air temperature Figure 5 Large-signal differential voltage amplification versus Frequency Figure 6 Phase shift versus Frequency Figure 6 Supply current versus Supply voltage Figure 7 Supply current versus Free-air temperature Figure 8 Total power dissipation versus Free-air temperature Figure 9 Common-mode rejection ratio versus Free-air temperature Figure 10 Normalized unity-gain bandwidth versus Free-air temperature Figure 11 Normalized slew rate versus Free-air temperature Figure 11 Normalized phase shift versus Free-air temperature Figure 11 Input bias current versus Free-air temperature Figure 12 Voltage-follower large-signal pulse response versus Time Figure 13 Output voltage versus Elapsed time Figure 14 Equivalent input noise voltage versus Frequency Figure 15 Copyright © 1978–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B 9 TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 www.ti.com ±15 VOM − Maximum Peak Output Voltage − V RL = 10 kΩ TA = 25°C See Figure 2 ±12.5 ±12.5 ±10 ±7.5 ±5 ±2.5 ±10 ±7.5 ±5 ±2.5 0 2 0 4 6 8 10 12 14 0 −75 16 VCC± = ±15 V RL = 10 kΩ See Figure 2 −50 |VCC±| − Supply Voltage − V Figure 1. Maximum Peak Output Voltage vs Supply Voltage VOM − Maximum Peak Output Voltage − V VOM − Maximum Peak Output Voltage − V VCC± = ±15 V TA = 25°C See Figure 2 ±10 ±7.5 ±5 ±2.5 100 50 VCC± = ±15 V 75 100 125 RL = 10 kΩ TA = 25°C See Figure 2 ±12.5 VCC± = ±12 V ±10 ±7.5 ±5 VCC± = ±5 V ±2.5 200 400 700 1 k 2k 4k 1k 7 k 10 k 10 k 100 k 100 10 AVD − Large-Signal Differential Voltage Amplification − V/mV VCC± = ±15 V RL = 10 kΩ 4 2 1 −75 10 M Figure 4. Maximum Peak Output Voltage vs Frequency Figure 3. Maximum Peak Output Voltage vs Load Resistance 7 1M f − Frequency − Hz RL − Load Resistance − Ω AVD − Differential Voltage Amplification − V/mV 25 0 0 VCC± = ±15 V Rext = 0 RL = 10 kΩ TA = 25°C 10 Phase Shift (right scale) 1 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 Submit Documentation Feedback 0° 45° 90° 0.1 AVD (left scale) 0.01 135° 0.001 −50 Figure 5. Differential Voltage Amplification vs Free-Air Temperature 10 0 Figure 2. Maximum Peak Output Voltage vs Free-Air Temperature ±15 ±12.5 −25 TA − Free-Air Temperature − °C 1 10 100 1k Phase Shift VOM − Maximum Peak Output Voltage − V ±15 10 k 100 k 1M 180° 10 M f − Frequency − Hz Figure 6. Large-Signal Differential Voltage Amplification and Phase Shift vs Frequency Copyright © 1978–2015, Texas Instruments Incorporated Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B www.ti.com SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 250 TA = 25°C No Signal No Load 200 I CC± ICC − Supply Current − µA I CC± ICC − Supply Current − µA 250 150 100 50 150 100 50 0 2 4 6 8 10 12 14 16 |VCC±| − Supply Voltage − V TA − Free-Air Temperature − °C Figure 7. Supply Current vs Supply Voltage Figure 8. Supply Current vs Free-Air Temperature 87 CMRR − Common-Mode Rejection Ratio − dB 30 25 TL064 VCC± = ±15 V No Signal No Load 20 15 TL062 10 TL061 5 0 −75 −50 −25 0 25 50 75 100 VCC± = ±15 V RL = 10 kΩ 86 85 84 83 82 81 −75 125 Slew Rate (left scale) 0.7 −75 1 0.99 VCC± = ±15 V RL = 10 kΩ f = B1 for Phase Shift −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 0.98 0.97 125 Figure 11. Normalized Unity-Gain Bandwidth, Slew Rate, and Phase Shift vs Free-Air Temperature Copyright © 1978–2015, Texas Instruments Incorporated IIB IIB − Input Bias Current − nA 1.01 0.9 0.8 25 50 75 100 125 VCC± = ±15 V 1.02 Phase Shift (right scale) 1.1 1 0 100 40 Unity-Gain Bandwidth (left scale) −25 Figure 10. All Except TL06_C Common-Mode Rejection Ratio vs Free-Air Temperature 1.03 Normalized Phase Shift Normalized Unity-Gain Bandwidth and Slew Rate Figure 9. Total Power Dissipation vs Free-Air Temperature 1.3 −50 TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C 1.2 VCC± = ±15 V No Signal No Load 0 −75 0 P PD D − Total Power Dissipation − mW 200 10 4 1 0.4 0.1 0.04 0.01 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 Figure 12. Input Bias Current vs Free-Air Temperature Submit Documentation Feedback Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B 11 TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 www.ti.com 6 28 Input 24 Overshoot VO − Output Voltage − mV Input and Output Voltages − V 4 2 0 Output −2 VCC± = ±15 V RL = 10 kΩ CL = 100 pF TA = 25°C −4 −6 20 16 12 8 4 10% VCC± = ±15 V RL = 10 kΩ TA = 25°C 0 tr −4 0 2 4 6 t − Time − µs 8 0 10 Figure 13. Voltage-Follower Large-Signal Pulse Response vs Time 0.2 0.4 0.6 0.8 1 t − Elapsed Time − µs 1.2 1.4 Figure 14. Output Voltage vs Elapsed Time V n − Equivalent Input Noise Voltage − nV/ Hz 100 VCC± = ±15 V RS = 20 Ω TA = 25°C 90 80 70 60 50 40 30 20 10 0 10 40 100 400 1 k 4 k 10 k f − Frequency − Hz 40 k 100 k Figure 15. Equivalent Input Noise Voltage vs Frequency 12 Submit Documentation Feedback Copyright © 1978–2015, Texas Instruments Incorporated Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B www.ti.com SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 7 Parameter Measurement Information − OUT VI + RL = 2 kΩ CL = 100 pF Figure 16. Unity-Gain Amplifier 10 kΩ 1 kΩ − VI OUT + RL CL = 100 pF Figure 17. Gain-of-10 Inverting Amplifier − IN− TL061 N2 + IN+ OUT N1 100 kΩ 1.5 kΩ VCC− Figure 18. Input Offset-Voltage Null Circuit Copyright © 1978–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B 13 TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 www.ti.com 8 Detailed Description 8.1 Overview The JFET-input operational amplifiers of the TL06x series are designed as low-power versions of the TL08x series amplifiers. They feature high input impedance, wide bandwidth, high slew rate, and low input offset and input bias currents. The TL06x series features the same terminal assignments as the TL07x and TL08x series. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in an integrated circuit. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from −40°C to 85°C, and the M-suffix devices are characterized for operation over the full military temperature range of −55°C to 125°C. 8.2 Functional Block Diagram VCC+ IN+ 50 Ω IN− 100 Ω C1 OFFSET N1 OFFSET N2 OUT VCC− TL061 Only C1 = 10 pF on TL061, TL062, and TL064 Component values shown are nominal. 8.3 Feature Description 8.3.1 Common-Mode Rejection Ratio The common-mode rejection ratio (CMRR) of an amplifier is a measure of how well the device rejects unwanted input signals common to both input leads. It is found by taking the ratio of the change in input offset voltage to the change in the input voltage and converting to decibels. Ideally the CMRR is infinite, but in practice, amplifiers are designed to have it as high as possible. The CMRR of this device is 86 dB. 8.3.2 Slew Rate The slew rate is the rate at which an operational amplifier can change its output when there is a change on the input. These devices have a 3.5-V/μs slew rate. 14 Submit Documentation Feedback Copyright © 1978–2015, Texas Instruments Incorporated Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B www.ti.com SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 8.4 Device Functional Modes These devices are powered on when the supply is connected. This device can be operated as a single supply operational amplifier or dual supply amplifier depending on the application. Copyright © 1978–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B 15 TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 www.ti.com 9 Applications and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The TL06x series of operational amplifiers can be used in countless applications. The few applications in this section show principles used in all applications of these parts. 9.2 Typical Applications 9.2.1 Inverting Amplifier Application A typical application for an operational amplifier in an inverting amplifier. This amplifier takes a positive voltage on the input, and makes it a negative voltage of the same magnitude. In the same manner, it also makes negative voltages positive. RF RI Vsup+ VOUT VIN + Vsup- Figure 19. Schematic for Inverting Amplifier Application 9.2.1.1 Design Requirements The supply voltage must be chosen such that it is larger than the input voltage range and output range. For instance, this application will scale a signal of ±0.5 V to ±1.8 V. Setting the supply at ±12 V is sufficient to accommodate this application. 9.2.1.2 Detailed Design Procedure Determine the gain required by the inverting amplifier: (1) (2) Once the desired gain is determined, choose a value for RI or RF. Choosing a value in the kilohm range is desirable because the amplifier circuit will use currents in the milliamp range. This ensures the part will not draw too much current. This example will choose 10 kΩ for RI which means 36 kΩ will be used for RF. This was determined by Equation 3. (3) 16 Submit Documentation Feedback Copyright © 1978–2015, Texas Instruments Incorporated Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B www.ti.com SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 Typical Applications (continued) 9.2.1.3 Application Curve 2 VIN 1.5 VOUT 1 Volts 0.5 0 -0.5 -1 -1.5 -2 0 0.5 1 Time (ms) 1.5 2 Figure 20. Input and Output Voltages of the Inverting Amplifier 9.3 System Examples 9.3.1 General Applications RF = 100 kΩ VCC+ 10 kΩ 0.1% 10 kΩ 0.1% − 3.3 kΩ + VCC+ VCC− − TL061 Output 100 kΩ + VCC+ VCC+ + TL064 CF = 3.3 µF 1 MΩ + − TL064 10 kΩ 0.1% − TL064 10 kΩ 0.1% 100 kΩ 3.3 kΩ + 100 kΩ f= VCC− VCC− Figure 21. Instrumentation Amplifier Figure 22. 0.5-Hz Square-Wave Oscillator − 1 MΩ − − 1 µF + Figure 23. High-Q Notch Filter Copyright © 1978–2015, Texas Instruments Incorporated Output B 100 kΩ VCC+ VCC+ TL064 Output C + C3 = 110 pF 2 1 fO = = 1 kHz 2π ´ R1´ C1 C1 = C2 = 100 µF − C1 TL064 100 kΩ 100 kΩ R1 = R2 = 2 ´ R3 = 1.5 MΩ VCC+ + + Input VCC− TL064 − Output R2 R3 C2 Output A + C3 VCC+ TL064 VCC+ TL061 R1 9.1 kΩ 1 2π ´ RF ´ CF VCC+ Input 1 kΩ −15 V VCC− Input B Output − Input A 15 V TL064 100 kΩ Figure 24. Audio-Distribution Amplifier Submit Documentation Feedback Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B 17 TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 www.ti.com System Examples (continued) VCC+ 15 V 10 kΩ 10 kΩ 0.1 µF 10 kΩ 10 kΩ + 100 pF Output TL061 10 kΩ − Output TL061 50 Ω 10 kΩ + N2 10 kΩ 5 kΩ 1 MΩ − TIL601 10 kΩ 10 kΩ 0.1 µF N1 250 kΩ −15 V Figure 25. Low-Level Light Detector Preamplifier 10 kΩ 0.1 µF 100 kΩ 0.06 µF 0.06 µF + TL061 − 1.2 MΩ 47 kΩ Figure 26. AC Amplifier 1 kΩ IN+ + TL062 − 1 µF 10 kΩ 0.002 µF 100 kΩ 50 kΩ Output 100 kΩ 2.7 kΩ 100 kΩ 270 Ω 0.003 µF 0.001 µF + 10 kΩ 100 kΩ 50 kΩ 20 µF 0.02 µF 1 kΩ 1 kΩ 100 kΩ IN− Figure 27. Microphone Preamplifier With Tone Control 18 Submit Documentation Feedback − TL062 + Figure 28. Instrumentation Amplifier Copyright © 1978–2015, Texas Instruments Incorporated Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B www.ti.com SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 System Examples (continued) IC PREAMPLIFIER RESPONSE CHARACTERISTICS 25 Max Bass 20 VCC± = ±15 V TA = 25°C 15 Voltage Amplification − dB Max Treble 10 5 0 −5 −10 −15 −20 Min Treble Min Bass −25 20 40 100 200 400 1k 2k 4k 10 k 20 k f − Frequency − Hz 220 kΩ 0.00375 µF 0.003 µF 10 kΩ 0.03 µF 0.01 µF 27 kΩ MIN 100 kΩ Bass MAX VCC+ 100 Ω 1 µF Input 100 Ω + TL062 − 10 kΩ 3.3 kΩ MIN 100 kΩ Treble MAX VCC+ + TL062 0.03 µF VCC− VCC− 0.003 µF 10 kΩ Balance 10 pF 75 µF 47 kΩ + 50 pF Output − 5 kΩ Gain 10 pF + 68 kΩ 47 µF Figure 29. IC Preamplifier 10 Power Supply Recommendations CAUTION Supply voltages larger than 36 V for a single supply, or outside the range of ±18 V for a dual supply can permanently damage the device (see the Absolute Maximum Ratings). Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high impedance power supplies. For more detailed information on bypass capacitor placement, refer to the Layout. Copyright © 1978–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B 19 TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 www.ti.com 11 Layout 11.1 Layout Guidelines For best operational performance of the device, use good PCB layout practices, including: • Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry. – Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single supply applications. • Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. For more detailed information, refer to Circuit Board Layout Techniques, (SLOA089). • To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace. • Place the external components as close to the device as possible. Keeping RF and RG close to the inverting input minimizes parasitic capacitance, as shown in Layout Examples. • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. • Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 11.2 Layout Examples RIN VIN RG + VOUT RF Figure 30. Operational Amplifier Schematic for Noninverting Configuration Place components close to device and to each other to reduce parasitic errors Run the input traces as far away from the supply lines as possible RF NC NC IN1í VCC+ IN1+ OUT VCCí NC VS+ Use low-ESR, ceramic bypass capacitor RG GND VIN RIN GND Only needed for dual-supply operation GND VS(or GND for single supply) VOUT Ground (GND) plane on another layer Figure 31. Operational Amplifier Board Layout for Noninverting Configuration 20 Submit Documentation Feedback Copyright © 1978–2015, Texas Instruments Incorporated Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B TL061, TL061A, TL061B TL062, TL062A, TL062B, TL064, TL064A, TL064B www.ti.com SLOS078L – NOVEMBER 1978 – REVISED MAY 2015 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation, see the following: Circuit Board Layout Techniques, SLOA089 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TL061 Click here Click here Click here Click here Click here TL061A Click here Click here Click here Click here Click here TL061B Click here Click here Click here Click here Click here TL062 Click here Click here Click here Click here Click here TL062A Click here Click here Click here Click here Click here TL062B Click here Click here Click here Click here Click here TL064 Click here Click here Click here Click here Click here TL064A Click here Click here Click here Click here Click here TL064B Click here Click here Click here Click here Click here 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.4 Trademarks E2E is a trademark of Texas Instruments. 12.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser based versions of this data sheet, refer to the left hand navigation. Copyright © 1978–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TL061 TL061A TL061B TL062 TL062A TL062B TL064 TL064A TL064B 21 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 81023022A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 81023022A TL062MFKB Samples 8102302PA ACTIVE CDIP JG 8 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8102302PA TL062M Samples 81023032A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 81023032A TL064MFKB Samples 8102303CA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8102303CA TL064MJB Samples 8102303DA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8102303DA TL064MWB Samples TL061ACD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 061AC Samples TL061ACDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 061AC Samples TL061ACP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL061ACP Samples TL061BCP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL061BCP Samples TL061BCPE4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL061BCP Samples TL061CD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL061C Samples TL061CDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL061C Samples TL061CP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL061CP Samples TL061CPSR ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T061 Samples TL061ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL061I Samples TL061IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL061I Samples TL061IDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL061I Samples TL061IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 TL061IP Samples TL061IPE4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 TL061IP Samples Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TL062ACD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 062AC Samples TL062ACDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 062AC Samples TL062ACDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 062AC Samples TL062ACP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL062ACP Samples TL062ACPSR ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T062A Samples TL062BCD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 062BC Samples TL062BCDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 062BC Samples TL062BCP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL062BCP Samples TL062CD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL062C Samples TL062CDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL062C Samples TL062CDRE4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL062C Samples TL062CDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL062C Samples TL062CP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL062CP Samples TL062CPE4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL062CP Samples TL062CPS ACTIVE SO PS 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T062 Samples TL062CPSR ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T062 Samples TL062CPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T062 Samples TL062CPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T062 Samples TL062CPWRG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T062 Samples TL062ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL062I Samples TL062IDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL062I Samples Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TL062IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL062I Samples TL062IDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL062I Samples TL062IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 TL062IP Samples TL062IPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 Z062 Samples TL062IPWRG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 Z062 Samples TL062MFKB ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 81023022A TL062MFKB Samples TL062MJG ACTIVE CDIP JG 8 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 TL062MJG Samples TL062MJGB ACTIVE CDIP JG 8 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8102302PA TL062M Samples TL064ACD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL064AC Samples TL064ACDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL064AC Samples TL064ACN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL064ACN Samples TL064BCD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL064BC Samples TL064BCDG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL064BC Samples TL064BCDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL064BC Samples TL064BCN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL064BCN Samples TL064CD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL064C Samples TL064CDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL064C Samples TL064CN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL064CN Samples TL064CNSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL064 Samples TL064CPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T064 Samples Addendum-Page 3 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TL064CPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 T064 Samples TL064ID ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I Samples TL064IDG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I Samples TL064IDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 TL064I Samples TL064IDRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I Samples TL064IN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 TL064IN Samples TL064INE4 ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 TL064IN Samples TL064INS ACTIVE SO NS 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I Samples TL064INSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL064I Samples TL064IPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 Z064 Samples TL064MFKB ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 81023032A TL064MFKB Samples TL064MJ ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 TL064MJ Samples TL064MJB ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8102303CA TL064MJB Samples TL064MWB ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8102303DA TL064MWB Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Addendum-Page 4 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of