TL3474IDR


   
      
    SLVS461B − JANUARY 2003 − REVISED JULY 2003 D D D D D D D D D D D, N, OR PW PACKAGE (TOP VIEW) Low Offset . . . 3 mV (Max) for A-Grade Wide Gain-Bandwidth Product . . . 4 MHz High Slew Rate . . . 13 V/µs Fast Settling Time . . . 1.1 µs to 0.1% Wide-Range Single-Supply Operation . . . 4 V to 36 V Wide Input Common-Mode Range Includes Ground (VCC−) Low Total Harmonic Distortion . . . 0.02% Large-Capacitance Drive Capability . . . 10,000 pF Output Short-Circuit Protection Alternative to MC33074/A and MC34074/A 1OUT 1IN− 1IN+ VCC+ 2IN+ 2IN− 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 4OUT 4IN− 4IN+ VCC−/GND 3IN+ 3IN− 3OUT description/ordering information ORDERING INFORMATION TA VIOmax AT 25°C PDIP (N) A-grade: 3 mV SOIC (D) TSSOP (PW) 0°C to 70°C PDIP (N) Standard grade: 10 mV SOIC (D) TSSOP (PW) PDIP (N) A-grade: 3 mV SOIC (D) TSSOP (PW) −40°C to 105°C PDIP (N) Standard grade: 10 mV ORDERABLE PART NUMBER PACKAGE† SOIC (D) TSSOP (PW) Tube of 25 TL3474ACN Tube of 50 TL3474ACD Reel of 2500 TL3474ACDR Tube of 90 TL3474ACPW Reel of 2000 TL3474ACPWR Tube of 25 TL3474CN Tube of 50 TL3474CD Reel of 2500 TL3474CDR Tube of 90 TL3474CPW Reel of 2000 TL3474CPWR Tube of 25 TL3474AIN Tube of 50 TL3474AID Reel of 2500 TL3474AIDR Tube of 90 TL3474AIPW Reel of 2000 TL3474AIPWR Tube of 25 TL3474IN Tube of 50 TL3474ID Reel of 2500 TL3474IDR Tube of 90 TL3474IPW Reel of 2000 TL3474IPWR TOP-SIDE MARKING TL3474ACN TL3474A T3474A TL3474CN TL3474C TL3474 Z3474A TL3474AI Z3474A TL3474IN TL3474I Z3474 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2003, Texas Instruments Incorporated 
 
 ! " #$%! "  &$'(#! )!%* )$#!" # ! "&%##!" &% !+% !%" 
%," "!$%!" "!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)% !%"!/  (( &%!%"* POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 

   
      
    SLVS461B − JANUARY 2003 − REVISED JULY 2003 description/ordering information (continued) Quality, low-cost, bipolar fabrication with innovative design concepts is employed for the TL3474, TL3474A operational amplifiers. These devices offer 4 MHz of gain-bandwidth product, 13-V/µs slew rate, and fast settling time without the use of JFET device technology. Although the TL3474 and TL3474A can be operated from split supplies, they are particularly suited for single-supply operation because the common-mode input voltage range includes ground potential (VCC−). With a Darlington transistor input stage, these devices exhibit high input resistance, low input offset voltage, and high gain. The all-npn output stage, characterized by no dead-band crossover distortion and large output voltage swing, provides high-capacitance drive capability, excellent phase and gain margins, low open-loop high-frequency output impedance, and symmetrical source/sink ac frequency response. These low-cost amplifiers are an alternative to the MC34074/A and MC33074/A operational amplifiers. schematic (each amplifier) VCC+ OUT IN− IN+ VCC−/GND 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 

   
      
    SLVS461B − JANUARY 2003 − REVISED JULY 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage: VCC+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V VCC− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±36 V Input voltage, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC± Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±80 mA Total current into VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA Total current out of VCC− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited Package thermal impedance, θJA (see Notes 4 and 5): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC−/GND. 2. Differential voltages are at the noninverting input with respect to the inverting input. Excessive input current can flow when the input is less than VCC− − 0.3 V. 3. The output can be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. 4. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 5. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions MIN VCC± Supply voltage VIC Common-mode input voltage TA Operating free-air temperature VCC = 5 V VCC± = ±15 V TL3474C, TL3474AC TL3474I, TL3474AI POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MAX 4 36 0 2.8 −15 12.8 0 70 −40 105 UNIT V V °C 3 

   
      
    SLVS461B − JANUARY 2003 − REVISED JULY 2003 electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER VIO αVIO IIO Input offset current IIB Input bias current VOH VOL AVD VCC = 5 V Input offset voltage Temperature coefficient of input offset voltage VICR TEST CONDITIONS Common-mode input voltage range High-level output voltage Low-level output voltage Large-signal differential voltage amplification VIC = 0, VO = 0, RS = 50 Ω TA TL3474 MIN TYP† MAX TL3474A MIN TYP† MAX 25°C 1.5 10 1.5 3 25°C 1.0 10 1.0 3 VCC = ±15 V Full range‡ VCC = ±15 V Full range‡ 10 25°C 6 VCC = ±15 V Full range‡ VCC = ±15 V Full range‡ 6 500 100 −15 to 12.8 Full range‡ −15 to 12.8 −15 to 12.8 VCC+ = 5 V, VCC− = 0, RL = 2 kΩ 25°C 3.7 4 3.7 4 RL = 10 kΩ 25°C 13.6 14 13.6 14 RL = 2 kΩ Full range‡ 13.4 V 13.4 25°C 0.1 0.3 0.1 0.3 RL = 10 kΩ 25°C −14.7 −14.3 −14.7 −14.3 RL = 2 kΩ Full range‡ Source: VID = 1 V, 25 Full range‡ 20 VIC = VICR(min), RS = 50 Ω kSVR Supply-voltage rejection ratio (∆VCC±/∆VIO) VCC± = ±13.5 V to ±16.5 V, RS = 100 Ω ICC Supply current (per channel) No load 100 V −13.5 25 100 V/mV Common-mode rejection ratio VO = 0, −13.5 25°C nA V VCC+ = 5 V, VCC− = 0, RL = 2 kΩ VO = ±10 V, RL = 2 kΩ nA 500 700 20 −10 −34 −10 −34 20 27 20 27 25°C 65 97 80 97 dB 25°C 70 97 70 97 dB mA 25°C Full range‡ 3.5 4.5 3.5 4.5 4.5 5.5 4.5 5.5 25°C 3.5 4.5 3.5 4.5 VCC+ = 5 V, VO = 2.5 V, VCC− = 0, No load † All typical values are at TA = 25°C. ‡ Full range is 0°C to 70°C for the TL3474C, TL3474AC devices and −40°C to 105°C for the TL3474I, TL3474AI devices. 4 75 300 −15 to 12.8 Sink: VID = −1 V, CMRR 75 700 RS = 50 Ω µV/°C 10 25°C 25°C Short-circuit output current 100 mV 5 300 25°C VO = 0 VO = 0 IOS 12 UNIT POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 mA 

   
      
    SLVS461B − JANUARY 2003 − REVISED JULY 2003 operating characteristics, VCC± = ±15 V, TA = 25°C TL3474 PARAMETER TEST CONDITIONS SR+ Positive slew rate SR− Negative slew rate VI = −10 V to 10 V, RL = 2 kΩ, CL = 300 pF ts Settling time AVD = −1, 10-V step Vn Equivalent input noise voltage f = 1 kHz, In Equivalent input noise current THD AV = 1 MIN TYP 8 10 TL3474A MAX MIN TYP 8 10 MAX UNIT V/ s V/µs AV = −1 13 13 To 0.1% 1.1 1.1 To 0.01% 2.2 2.2 RS = 100 Ω 49 49 nV/√Hz f = 1 kHz 0.22 0.22 pA/√Hz Total harmonic distortion VO(PP) = 2 V to 20 V, RL = 2 kΩ, AVD = 10, f = 10 kHz 0.02 0.02 % GBW Gain-bandwidth product f =100 kHz BW Power bandwidth VO(PP) = 20 V, RL = 2 kΩ, AVD = 1, THD = 5.0% φm Phase margin RL = 2 kΩ, RL = 2 kΩ, Gain margin RL = 2 kΩ, RL = 2 kΩ, ri Differential input resistance Ci Input capacitance Channel separation zo Open-loop output impedance 4 MHz 160 160 kHz CL = 0 70 70 CL = 300 pF 50 50 CL = 0 12 12 4 4 VIC = 0 150 150 MΩ VIC = 0 f = 10 kHz 2.5 2.5 pF 101 101 dB 20 20 Ω f = 1 MHz, 3 CL = 300 pF AV = 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4 3 µss deg dB 5 

   
      
    SLVS461B − JANUARY 2003 − REVISED JULY 2003 TYPICAL CHARACTERISTICS (TA = 25°C UNLESS OTHERWISE NOTED) OUTPUT IMPEDANCE vs FREQUENCY 80 0.6 VCC± = ±15 V VCM = 0 V VO = 0 V ∆IO = ±0.5 mA 70 60 VCC± = ±15 V VO = 2 Vpp RL = 2 k 0.5 AV = 1000 50 THD − % Impedance − Ω TOTAL HARMONIC DISTORTION vs FREQUENCY 40 0.4 0.3 AV = 1000 30 0.2 20 AV = 100 AV = 100 10 0.1 AV = 1 AV = 10 AV = 10 AV = 1 0 1k 10 k 100 k 1M 0 10 M 10 1k 100 Frequency − Hz Figure 2 NORMALIZED INPUT BIAS CURRENT vs TEMPERATURE GAIN AND PHASE vs FREQUENCY 35 −100 15 VCC± = ±15 V Vo = 0 V RL = 2 k −150 −200 0 Gain 0 pF −5 −250 Input Bias Current (Normalized) −50 Phase − Deg Gain − dB 20 1.4 1.2 1 0.8 0.6 Gain 300 pF −10 −15 −300 100 K 6 VCC± = ±15 V VCM = 0 Phase 0 pF Phase 300 pF 5 1.6 0 25 10 100 k Frequency − Hz Figure 1 30 10 k 1M 10 M 0.4 −55 −40 0 25 70 Frequency − Hz TA − Temperature − °C Figure 3 Figure 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 85 125 

   
      
    SLVS461B − JANUARY 2003 − REVISED JULY 2003 TYPICAL CHARACTERISTICS (TA = 25°C UNLESS OTHERWISE NOTED) OFFSET VOLTAGE DRIFT vs TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 20 18 TA = −55°C 14 V IO − Offset − mV I CC − Supply Current − mA 16 12 10 TA = 25°C 8 6 TA = 125°C 4 2 0 4 9 14 19 24 29 34 VCC± = ±15 V VCM = 0 V −55 −25 0 VCC − Supply Voltage − V Figure 5 75 100 125 NORMALIZED SLEW RATE vs TEMPERATURE 1.5 VCC± = ±15 V VCC± = ±15 V AV = 1 RL = 2 k CL = 500 pF 1.4 1.2 Slew Rate (Normalized) I IB − Input Bias Current (Normalized) 50 Figure 6 NORMALIZED INPUT BIAS CURRENT vs INPUT COMMON-MODE VOLTAGE 1.4 25 TA − Temperature − °C 1 0.8 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 −14 −10 −6 −2 2 6 10 14 0.6 −55 −25 0 25 50 75 100 125 TA − Temperature − °C VIC − Input Common-Mode Voltage − V Figure 7 Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 

   
      
    SLVS461B − JANUARY 2003 − REVISED JULY 2003 TYPICAL CHARACTERISTICS (TA = 25°C UNLESS OTHERWISE NOTED) COMMON-MODE REJECTION vs FREQUENCY 120 VCC± = ±15 V VCM = 0 V ∆VCM = ±15 V 25°C 100 125°C −55°C CMRR − dB 80 60 40 55°C 25°C 125°C 20 0 10 100 1k 10 k 100 k Frequency − Hz Figure 9 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1M 10 M PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TL3474ACD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 TL3474A TL3474ACDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 TL3474A TL3474ACN ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) NIPDAU N / A for Pkg Type 0 to 70 TL3474ACN TL3474ACPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 T3474A TL3474ACPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 T3474A TL3474AID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 105 TL3474AI TL3474AIDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 105 TL3474AI TL3474AIDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 105 TL3474AI TL3474AIN ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) NIPDAU N / A for Pkg Type -40 to 105 TL3474AIN TL3474AIPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 105 Z3474A TL3474AIPWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 105 Z3474A TL3474AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 105 Z3474A TL3474CD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 TL3474C TL3474CDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 TL3474C TL3474CN ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) NIPDAU N / A for Pkg Type 0 to 70 TL3474CN TL3474CPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 T3474 TL3474CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 T3474 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TL3474ID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 105 TL3474I TL3474IDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 105 TL3474I TL3474IN ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) NIPDAU N / A for Pkg Type -40 to 105 TL3474IN TL3474IPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 105 Z3474 TL3474IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 105 Z3474 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of