TL432A-Q1
TL432B-Q1
www.ti.com
SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
ADJUSTABLE PRECISION SHUNT REGULATORS
Check for Samples: TL432A-Q1, TL432B-Q1
FEATURES
•
•
•
•
•
1
•
•
•
•
Qualified for Automotive Applications
AEC-Q100 Qualified With the Following
Results:
– Device Temperature Grade 1: –40°C to
125°C Ambient Operating Temperature
Range
– Device HBM ESD Classification Level H2
– Device CDM ESD Classification Level C3B
Operation From –40°C to 125°C
Reference Voltage Tolerance at 25°C
– 0.5%...B Grade
– 1%...A Grade
Typical Temperature Drift...14 mV
Low Output Noise
Typical Output Impedance...0.2 Ω
Sink Current Capability...1 mA to 100 mA
Adjustable Output Voltage...Vref to 36 V
DBZ (SOT-23-3) PACKAGE
(TOP VIEW)
REF
1
3
CATHODE
ANODE
2
DESCRIPTION/ORDERING INFORMATION
The TL432x-Q1 devices are three-terminal adjustable shunt regulators with specified thermal stability over the
automotive temperature range. The output voltage can be set to any value between Vref (approximately 2.5 V)
and 36 V with two external resistors (see Figure 17). These devices have a typical output impedance of 0.2 Ω.
Active output circuitry provides a very sharp turn-on characteristic, making these devices excellent replacements
for Zener diodes in many applications such as onboard regulation, adjustable power supplies, and switching
power supplies.
The TL432x-Q1 devices are offered in two grades with initial tolerances (at 25°C) of 0.5% and 1%, for the B and
A grade, respectively. In addition, low output drift vs temperature ensures good stability over the entire
temperature range.
The devices are characterized for operation from –40°C to 125°C.
ORDERING INFORMATION (1)
TA
–40°C to 125°C
(1)
(2)
Vref TOLERANCE
(TA = 25°C)
A Grade: 1%
B Grade: 0.5 %
PACKAGE (2)
SOT23 – DBZ
Reel of 3000
ORDERABLE
PART NUMBER
TOP-SIDE MARKING
TL432AQDBZRQ1
TOIQ
TL432BQDBZRQ1
TOHQ
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2012, Texas Instruments Incorporated
TL432A-Q1
TL432B-Q1
SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
www.ti.com
SYMBOL
REF
ANODE
CATHODE
FUNCTIONAL BLOCK DIAGRAM
CATHODE
REF
Vref
ANODE
EQUIVALENT SCHEMATIC
CATHODE
800 W
800 W
20 pF
REF
150 W
3.28 kW
2.4 kW
7.2 kW
4 kW
10 kW
20 pF
1 kW
800 W
ANODE
NOTE: All component values are nominal.
2
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SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VKA
Cathode voltage (2)
IKA
Continuous cathode current range
37 V
–100 mA to 150 mA
–50 μA to 10 mA
Reference input current range
TJ
Operating virtual-junction temperature
Tstg
Storage temperature range
(1)
(2)
150°C
–65°C to 150°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Voltage values are with respect to the ANODE terminal, unless otherwise noted.
PACKAGE THERMAL DATA
PACKAGE
BOARD
θJC
θJA
SOT-23-3 (DBZ)
High K, JESD 51-7
76°C/W
206°C/W
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
VKA
Cathode voltage
Vref
36
V
IKA
Cathode current
1
100
mA
TA
Operating free-air temperature
–40
125
°C
2
kV
750
V
ESD Ratings
Human-body model (HBM) AEC-Q100 classification level H2
Charged-device model (CDM) AEC-Q100 classification level C3B
Copyright © 2008–2012, Texas Instruments Incorporated
Product Folder Link(s): TL432A-Q1 TL432B-Q1
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UNIT
3
TL432A-Q1
TL432B-Q1
SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
www.ti.com
TL432A-Q1 ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
PARAMETER
TEST
CIRCUIT
TEST CONDITIONS
MIN
TYP
MAX
UNIT
2470
2495
2520
mV
14
34
mV
–1.4
–2.7
–1
–2
Vref
Reference voltage
Figure 2
VKA = Vref, IKA = 10 mA
VI(dev)
Deviation of reference voltage
over full temperature range
(see Figure 1)
Figure 2
VKA = Vref, IKA = 10 mA, TA = –40°C to 125°C
ΔVref/
ΔVKA
Ratio of change in reference
voltage to the change in cathode
voltage
Figure 3
IKA = 10 mA
Iref
Reference current
Figure 3
IKA = 10 mA, R1 = 10 kΩ, R2 = ∞
2
4
μA
II(dev)
Deviation of reference current
over full temperature range
(see Figure 1)
Figure 3
IKA = 10 mA, R1 = 10 kΩ, R2 = ∞,
TA = –40°C to 125°C
0.8
2.5
μA
Imin
Minimum cathode current for
regulation
Figure 2
VKA = Vref
0.4
0.7
mA
Ioff
Off-state cathode current
Figure 4
VKA = 36 V, Vref = 0
0.1
0.5
μA
|zKA|
Dynamic impedance
(see Figure 1)
Figure 2
IKA = 1 mA to 100 mA, VKA = Vref, f ≤ 1 kHz
0.2
0.5
Ω
MIN
TYP
MAX
UNIT
2483
2495
2507
mV
14
34
mV
–1.4
–2.7
–1
–2
ΔVKA = 10 V – Vref
ΔVKA = 36 V – 10 V
mV/V
TL432B-Q1 ELECTRICAL CHARACTERISTICS
over recommended operating conditions, TA = 25°C (unless otherwise noted)
PARAMETER
TEST
CIRCUIT
TEST CONDITIONS
Vref
Reference voltage
Figure 2
VKA = Vref, IKA = 10 mA
VI(dev)
Deviation of reference voltage
over full temperature range
(see Figure 1)
Figure 2
VKA = Vref, IKA = 10 mA, TA = –40°C to 125°C
ΔVref/
ΔVKA
Ratio of change in reference
voltage to the change in cathode
voltage
Figure 3
IKA = 10 mA
Iref
Reference current
Figure 3
IKA = 10 mA, R1 = 10 kΩ, R2 = ∞
2
4
μA
II(dev)
Deviation of reference current
over full temperature range
(see Figure 1)
Figure 3
IKA = 10 mA, R1 = 10 kΩ, R2 = ∞,
TA = –40°C to 125°C
0.8
2.5
μA
Imin
Minimum cathode current for
regulation
Figure 2
VKA = Vref
0.4
0.7
mA
Ioff
Off-state cathode current
Figure 4
VKA = 36 V, Vref = 0
0.1
0.5
μA
|zKA|
Dynamic impedance
(see Figure 1)
Figure 2
IKA = 1 mA to 100 mA, VKA = Vref, f ≤ 1 kHz
0.2
0.5
Ω
4
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ΔVKA = 10 V – Vref
ΔVKA = 36 V – 10 V
mV/V
Copyright © 2008–2012, Texas Instruments Incorporated
Product Folder Link(s): TL432A-Q1 TL432B-Q1
TL432A-Q1
TL432B-Q1
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SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
Deviation Parameters
The deviation parameters Vref(dev) and Iref(dev) are defined as the differences between the maximum and minimum
values obtained over the recommended temperature range. The average full-range temperature coefficient of the
reference voltage, αVref, is defined as:
Ťa Ť ǒ
V ref
Ǔ
ppm
+
°C
ǒ
Ǔ
V
I(dev)
V ref at 25°C
10 6
Maximum Vref
Minimum Vref
DT A
VI(dev)
∆TA
where:
∆TA is the recommended operating free-air temperature range of the device.
a Vref can be positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at
the lower temperature.
Example: Vref = 2495 mV at 25°C, VI(dev) = 14 mV, ∆TA = 165°C for TL432B
Ťa Ť +
V
ref
14 mV Ǔ
ǒ2495
mV
10 6
165°C
[ 34
ppm
°C
Because minimum Vref occurs at the lower temperature, the coefficient is positive.
Dynamic Impedance
The dynamic impedance is defined as:
|z KA| +
DVKA
DI KA
When the device is operating with two external resistors (see Figure 3), the total dynamic impedance of the circuit
is given by:
|zȀ| + DV [ |z KA| 1 ) R1
DI
R2
ǒ
Ǔ
Figure 1. Calculating Deviation Parameters and Dynamic Impedance
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TL432A-Q1
TL432B-Q1
SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
www.ti.com
PARAMETER MEASUREMENT INFORMATION
Input
VKA
IKA
Vref
Figure 2. Test Circuit for VKA = Vref
VKA
Input
IKA
R1
Iref
R2
Vref
Ǔ
ǒ
VKA + Vref 1 ) R1 ) Iref
R2
R1
Figure 3. Test Circuit for VKA > Vref
Input
VKA
Ioff
Figure 4. Test Circuit for Ioff
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SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
TYPICAL CHARACTERISTICS
Data at high and low temperatures is applicable only within the recommended operating free-air temperature ranges of the
various devices.
Table 1. Graphs
FIGURE
Reference voltage vs Free-air temperature
Figure 5
Reference current vs Free-air temperature
Figure 6
Cathode current vs Cathode voltage
Figure 7, Figure 8
Off-state cathode current vs Free-air temperature
Figure 9
Ratio of delta reference voltage to delta cathode voltage vs Free-air temperature
Figure 10
Equivalent input noise voltage vs Frequency
Figure 11
Equivalent input noise voltage over a 10-s period
Figure 12
Small-signal voltage amplification vs Frequency
Figure 13
Reference impedance vs Frequency
Figure 14
Pulse response
Figure 15
Stability boundary conditions
Figure 16
REFERENCE CURRENT
vs
FREE-AIR TEMPERATURE
REFERENCE VOLTAGE
vs
FREE-AIR TEMPERATURE
2600
R1 = 10 kΩ
R2 = ∞
IKA = 10 mA
Vref = 2550 mV (see Note A)
2560
I ref − Reference Current − µ A
V ref − Reference Voltage − mV
2580
5
VKA = Vref
IKA = 10 mA
2540
2520
Vref = 2495 mV (see Note A)
2500
2480
2460
Vref = 2440 mV (see Note A)
2440
4
3
2
1
2420
2400
−75
−50
−25
0
25
50
75
100
125
TA − Free-Air Temperature − °C
0
−75
−25
−50
0
25
50
75
100
125
TA − Free-Air Temperature − °C
A. Data is for devices having the indicated value of Vref at IKA = 10
mA, TA = 25°C.
Figure 5.
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Product Folder Link(s): TL432A-Q1 TL432B-Q1
Figure 6.
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TL432A-Q1
TL432B-Q1
SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
www.ti.com
CATHODE CURRENT
vs
CATHODE VOLTAGE
CATHODE CURRENT
vs
CATHODE VOLTAGE
150
800
VKA = Vref
TA = 25°C
125
VKA = Vref
TA = 25°C
600
I KA − Cathode Current − µ A
I KA − Cathode Current − mA
100
75
50
25
0
−25
−50
Imin
400
200
0
−75
−100
−2
−1
0
2
1
−200
−1
3
0
VKA − Cathode Voltage − V
Figure 7.
RATIO OF DELTA REFERENCE VOLTAGE TO
DELTA CATHODE VOLTAGE
vs
FREE-AIR TEMPERATURE
− 0.85
2.5
VKA = 36 V
Vref = 0
VKA = 3 V to 36 V
− 0.95
2
∆V ref / ∆V KA − mV/V
I off − Off-State Cathode Current − µ A
3
Figure 8.
OFF-STATE CATHODE CURRENT
vs
FREE-AIR TEMPERATURE
1.5
1
0.5
0
−75
−1.05
−1.15
−1.25
−1.35
−50
−25
0
25
50
75
TA − Free-Air Temperature − °C
100
125
−1.45
−75
−50
−25
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0
25
50
75
100
125
TA − Free-Air Temperature − °C
Figure 9.
8
2
1
VKA − Cathode Voltage − V
Figure 10.
Copyright © 2008–2012, Texas Instruments Incorporated
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TL432A-Q1
TL432B-Q1
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SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
Vn − Equivalent Input Noise Voltage − nV/ Hz
260
IO = 10 mA
TA = 25°C
240
220
200
180
160
140
120
100
10
100
1k
10 k
100 k
f − Frequency − Hz
Figure 11.
Copyright © 2008–2012, Texas Instruments Incorporated
Product Folder Link(s): TL432A-Q1 TL432B-Q1
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9
TL432A-Q1
TL432B-Q1
SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
www.ti.com
EQUIVALENT INPUT NOISE VOLTAGE
OVER A 10-S PERIOD
6
5
4
Vn - Equivalent Input Noise Voltage - µV
3
2
1
0
-1
-2
-3
f = 0.1 to 10 Hz
IKA = 10 mA
TA = 25°C
-4
-5
-6
0
1
2
3
4
5
6
t - Time - s
7
8
9
10
19.1 V
1 kΩ
500 µF
910 Ω
2000 µF
VCC
TL432x-Q1
(DUT)
VCC
1 µF
TLE2027
AV = 10 V/mV
+
820 Ω
TLE2027
+
-
16 kΩ
16 kΩ
-
16 Ω
160 kΩ
1 µF
22 µF
To
Oscilloscope
33 kΩ
AV = 2 V/V
0.1 µF
33 kΩ
VEE
VEE
Figure 12. Test Circuit for Equivalent Input Noise Voltage
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SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
SMALL-SIGNAL VOLTAGE AMPLIFICATION
vs
FREQUENCY
IKA = 10 mA
TA = 25°C
A V − Small-Signal Voltage Amplification − dB
60
IKA = 10 mA
TA = 25°C
50
Output
15 kΩ
IKA
232 Ω
40
9 µF
+
30
−
8.25 kΩ
20
GND
TEST CIRCUIT FOR VOLTAGE AMPLIFICATION
10
0
1k
10 k
100 k
1M
10 M
f − Frequency − Hz
Figure 13.
REFERENCE IMPEDANCE
vs
FREQUENCY
|z KA| − Reference Impedance − Ω
100
IKA = 10 mA
TA = 25°C
1 kΩ
Output
10
IKA
50 Ω
−
+
GND
1
TEST CIRCUIT FOR REFERENCE IMPEDANCE
0.1
1k
10 k
100 k
1M
10 M
f − Frequency − Hz
Figure 14.
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11
TL432A-Q1
TL432B-Q1
SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
www.ti.com
PULSE RESPONSE
6
TA = 25°C
Input
Input and Output Voltage − V
5
220 Ω
Output
4
Pulse
Generator
f = 100 kHz
3
50 Ω
Output
GND
2
TEST CIRCUIT FOR PULSE RESPONSE
1
0
−1
0
1
2
3
4
5
6
7
t − Time − µs
Figure 15.
STABILITY BOUNDARY CONDITIONS†
100
90
I KA − Cathode Current − mA
80
150 Ω
A VKA = Vref
B VKA = 5 V
C VKA = 10 V
D VKA = 15 Vf
IKA
+
B
70
VBATT
CL
−
TA = 25°C
60
C
Stable
Stable
50
A
TEST CIRCUIT FOR CURVE A
40
A
30
D
IKA
20
150 Ω
R1 = 10 kΩ
B
10
0
0.001
CL
+
0.01
0.1
1
10
R2
CL − Load Capacitance − µF
†
−
The areas under the curves represent conditions that may cause the
device to oscillate. For curves B, C, and D, R2 and V+ were adjusted
to establish the initial VKA and IKA conditions with CL = 0. VBATT and
CL then were adjusted to determine the ranges of stability.
VBATT
TEST CIRCUIT FOR CURVES B, C, AND D
Figure 16.
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SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
APPLICATION INFORMATION
Table 2. Application Circuits
FIGURE
Shunt regulator
Figure 17
Single-supply comparator with temperature-compensated threshold
Figure 18
Precision high-current series regulator
Figure 19
Output control of a three-terminal fixed regulator
Figure 20
High-current shunt regulator
Figure 21
Crowbar circuit
Figure 22
Precision 5-V 1.5-A regulator
Figure 23
Efficient 5-V precision regulator
Figure 24
PWM converter with reference
Figure 25
Voltage monitor
Figure 26
Delay timer
Figure 27
Precision current limiter
Figure 28
Precision constant-current sink
Figure 29
R
(see Note A)
VO
VI(BATT)
R1
0.1%
Vref
TL432x-Q1
R1 ö
æ
VO = ç 1 +
÷ Vref
è R2 ø
R2
0.1%
RETURN
A.
R should provide cathode current ≥1 mA to the TL432x-Q1 at minimum VI(BATT).
Figure 17. Shunt Regulator
VI(BATT)
TL432x-Q1
VO
Von ≈ 2 V
Voff ≈ VI(BATT)
Input
VIT ≈ 2.5 V
GND
Figure 18. Single-Supply Comparator With Temperature-Compensated Threshold
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TL432A-Q1
TL432B-Q1
SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
www.ti.com
VI(BATT)
R
(see Note A)
2N222
2N222
30 Ω
R1 ö
æ
VO = ç 1 +
÷ Vref
è R2 ø
4.7 kΩ
0.01 µF
TL432x-Q1
VO
R1
0.1%
R2
0.1%
A.
R should provide cathode current ≥1 mA to the TL432x-Q1 at minimum VI(BATT).
Figure 19. Precision High-Current Series Regulator
VI(BATT)
IN
OUT
VO
uA7805
Common
R1
TL432x-Q1
R1 ö
æ
VO = ç 1 +
÷ Vref
è R2 ø
Minimum VO = Vref + 5 V
R2
Figure 20. Output Control of a Three-Terminal Fixed Regulator
VO
VI(BATT)
R1
R1 ö
æ
VO = ç 1 +
÷ Vref
è R2 ø
TL432x-Q1
R2
Figure 21. High-Current Shunt Regulator
VI(BATT)
VO
R1
TL432x-Q1
C
(see Note A)
R2
A.
See the stability boundary conditions in Figure 16 to determine allowable values for C.
Figure 22. Crowbar Circuit
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SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
OUT
IN
VI(BATT)
VO ≈ 5 V, 1.5 A
LM317
Adjust
8.2 kΩ
243 Ω
0.1%
TL432x-Q1
243 Ω
0.1%
Figure 23. Precision 5-V 1.5-A Regulator
VI(BATT)
VO ≈ 5 V
Rb
(see Note A)
27.4 kΩ
0.1%
TL432x-Q1
27.4 kΩ
0.1%
A.
Rb should provide cathode current ≥1 mA to the TL432x-Q1.
Figure 24. Efficient 5-V Precision Regulator
12 V
VCC
6.8 kΩ
5V
10 kΩ
10 kΩ
0.1%
TL432x-Q1
10 kΩ
0.1%
X
Not
Used
+ TL598
Feedback
Figure 25. PWM Converter With Reference
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TL432B-Q1
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R3
(see Note A)
VI(BATT)
æ R1B ö
Low Limit = ç 1 +
÷ Vref
è R2B ø
æ R1A ö
High Limit = ç 1 +
÷ Vref
è R2A ø
R4
(see Note A)
R1B
R1A
TL432x-Q1
R2A
A.
LED on When Low Limit < VI(BATT) < High Limit
R2B
R3 and R4 are selected to provide the desired LED intensity and cathode current ≥1 mA to the TL432x-Q1 at the
available VI(BATT).
Figure 26. Voltage Monitor
650 Ω
12 V
2 kΩ
R
TL432x-Q1
Off
æ 12 V ö
Delay = R ´ C ´ In ç
÷
è 12 V - Vref ø
C
On
Figure 27. Delay Timer
RCL
0.1%
IO
Iout =
VI(BATT)
R1
R1 =
TL432x-Q1
Vref
+ IKA
RCL
VI(BATT)
IO
+I
hFE KA
Figure 28. Precision Current Limiter
VI(BATT)
IO
IO =
TL432x-Q1
Vref
RS
RS
0.1%
Figure 29. Precision Constant-Current Sink
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SLVS900A – NOVEMBER 2008 – REVISED JULY 2012
REVISION HISTORY
Changes from Original (November, 2008) to Revision A
Page
•
Added AEC-Q100 info to features ........................................................................................................................................ 1
•
Added ESD ratings information to recommended operating conditions table ...................................................................... 3
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PACKAGE OPTION ADDENDUM
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11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
TL432AQDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
TOIQ
TL432BQDBZRQ1
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
TOHQ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TL432A-Q1, TL432B-Q1 :
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
• Catalog: TL432A, TL432B
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
TL432AQDBZRQ1
SOT-23
DBZ
3
3000
180.0
8.4
TL432BQDBZRQ1
SOT-23
DBZ
3
3000
179.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.15
2.95
1.22
4.0
8.0
Q3
3.15
2.95
1.22
4.0
8.0
Q3
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TL432AQDBZRQ1
SOT-23
DBZ
3
3000
203.0
203.0
35.0
TL432BQDBZRQ1
SOT-23
DBZ
3
3000
203.0
203.0
35.0
Pack Materials-Page 2
4203227/C
PACKAGE OUTLINE
DBZ0003A
SOT-23 - 1.12 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
2.64
2.10
1.4
1.2
PIN 1
INDEX AREA
1.12 MAX
B
A
0.1 C
1
0.95
3.04
2.80
1.9
3X
3
0.5
0.3
0.2
2
(0.95)
C A B
0.25
GAGE PLANE
0 -8 TYP
0.10
TYP
0.01
0.20
TYP
0.08
0.6
TYP
0.2
SEATING PLANE
4214838/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
www.ti.com
EXAMPLE BOARD LAYOUT
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X (0.95)
2
(R0.05) TYP
(2.1)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214838/C 04/2017
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X(0.95)
2
(R0.05) TYP
(2.1)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214838/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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