TL974IPWR

Product Folder Sample & Buy Technical Documents Support & Community Tools & Software TL971, TL972, TL974 SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 TL97x Output Rail-To-Rail Very-Low-Noise Operational Amplifiers 1 Features 3 Description • The TL97x family of single, dual, and quad operational amplifiers operates at voltages as low as ±1.35 V and features output rail-to-rail signal swing. The TL97x boast characteristics that make them particularly well suited for portable and batterysupplied equipment. Very low noise and low distortion characteristics make them ideal for audio preamplification. 1 • • • • • • Rail-to-Rail Output Voltage Swing: ±2.4 V at VCC = ±2.5 V Very Low Noise Level: 4 nV/√Hz Ultra-Low Distortion: 0.003% High Dynamic Features: 12 MHz, 5 V/μs Operating Range: 2.7 V to 12 V Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model – 1500-V Charged-Device Model The TL971 is housed in the space-saving 5-pin SOT23 package, which simplifies board design because of the ability to be placed anywhere (outside dimensions are 2.8 mm × 2.9 mm). Device Information(1) PART NUMBER 2 Applications • • • Portable Equipment – Music Players – Tablets – Cell Phones Instrumentation and Sensors Professional Audio Circuits TL971 TL972 TL974 PACKAGE (PIN) BODY SIZE (NOM) SOIC (8) 4.90 mm × 3.90 mm SOT-23 (5) 2.80 mm × 2.90 mm MSOP (8) 3.00 mm × 3.00 mm PDIP (8) 9.60 mm × 6.40 mm SOIC (8) 4.90 mm × 3.90 mm TSSOP (8) 3.00 mm × 4.40 mm PDIP (14) 19.30 mm × 6.40 mm SOIC (14) 8.60 mm × 3.90 mm TSSOP (14) 5.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 4 Simplified Schematic VIN RIN RG + VOUT RF 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TL971, TL972, TL974 SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Simplified Schematic............................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 1 2 3 4 7.1 7.2 7.3 7.4 7.5 7.6 4 4 4 4 5 5 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 9 8.1 Overview ................................................................... 9 8.2 Functional Block Diagram ......................................... 9 8.3 Feature Description................................................... 9 8.4 Device Functional Modes........................................ 10 9 Application and Implementation ........................ 11 9.1 Typical Application ................................................. 11 10 Power Supply Recommendations ..................... 13 11 Layout................................................................... 13 11.1 Layout Guidelines ................................................. 13 11.2 Layout Example .................................................... 13 12 Device and Documentation Support ................. 15 12.1 12.2 12.3 12.4 Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 15 15 15 15 13 Mechanical, Packaging, and Orderable Information ........................................................... 15 5 Revision History Changes from Revision G (May 2012) to Revision H Page • Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table, Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1 • Deleted Ordering Information table. ....................................................................................................................................... 1 Changes from Revision F (December 2009) to Revision G • 2 Page Changed slew rate MIN value. ............................................................................................................................................... 5 Submit Documentation Feedback Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 TL971, TL972, TL974 www.ti.com SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 6 Pin Configuration and Functions TL971...DBV PACKAGE (TOP VIEW) OUT VCC– IN+ 1 5 VCC+ 2 3 4 IN– TL972...D, DGK, P, OR PW PACKAGE (TOP VIEW) TL971...D PACKAGE (TOP VIEW) NC IN– IN+ VCC– 1 8 2 7 3 6 4 5 NC VC C + OUT1 IN1– IN1+ VCC– OUT NC 1 8 VCC+ 2 7 3 6 OUT2 IN2– IN2+ 4 5 NC – No internal connection TL972...DRG PACKAGE (TOP VIEW) TL974...D, N, OR PW PACKAGE (TOP VIEW) VCC+ OUT1 1 IN1– 2 8 7 OUT2 IN1+ 3 6 IN2– VCC– 4 5 IN2+ OUT1 IN1– IN1+ VCC+ 1 14 2 13 3 12 4 11 IN2+ IN2– OUT2 5 10 6 9 7 8 OUT4 IN4– IN4+ VCC– IN3+ IN3– OUT3 Pin Functions PIN TL971 NAME TL971 TL972 TL974 TYPE DESCRIPTION DBV D D, DGK, P, PW IN+ 3 3 — — — I Noninverting input IN– 4 2 — — — I Inverting input IN1+ — — 3 3 3 I Noninverting input IN1– — — 2 2 2 I Inverting input IN2+ — — 5 5 5 I Noninverting input IN2– — — 6 6 6 I Inverting input IN3+ — — — — 10 I Noninverting input IN3– — — — — 9 I Inverting input IN4+ — — — — 12 I Noninverting input IN4– — — — — 13 I Inverting input — — — — No Connect DRG D, N, PW 1 NC — 5 8 OUT 1 6 — — — O Output OUT1 — — 1 1 1 O Output OUT2 — — 7 7 7 O Output OUT3 — — — — 8 O Output OUT4 — — — — 14 O Output VCC+ 5 7 8 8 4 - Positive supply VCC– 2 4 4 4 11 - Negative supply Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 Submit Documentation Feedback 3 TL971, TL972, TL974 SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCC MAX 2.7 15 V ±1 V V VCC– – 0.3 VCC+ + 0.3 V 150 °C 150 °C (2) VID Differential input voltage VIN Input voltage range (3) TJ Maximum junction temperature Tstg Storage temperature range (1) MIN Supply voltage range –65 UNIT Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Differential voltages for the noninverting input terminal are with respect to the inverting input terminal. The input and output voltages must never exceed VCC + 0.3 V. (2) (3) 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) 2000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) 1500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions VCC Supply voltage VICM Common-mode input voltage TA Operating free-air temperature MIN MAX 2.7 12 UNIT VCC– + 1.15 VCC+ – 1.15 V –40 125 °C V 7.4 Thermal Information THERMAL METRIC (1) RθJA (1) (2) (3) 4 Package thermal impedance, junction to free air TL971 TL972 D (2) DBV (2) 8 PINS 5 PINS 97 206 D (2) DGK (3) DRG (3) TL974 P (2) PW (2) D (2) 8 PINS 97 172 44 N (2) PW (2) UNIT 113 °C/W 14 PINS 85 149 86 80 For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953). Package thermal impedance is calculated in accordance with JESD 51-7. Package thermal impedance is calculated in accordance with JESD 51-5. Submit Documentation Feedback Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 TL971, TL972, TL974 www.ti.com SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 7.5 Electrical Characteristics VCC+ = 2.5 V, VCC– = –2.5 V, full-range TA = –40°C to 125°C (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX 1 4 25°C VIO Input offset voltage αVIO Input offset voltage drift VICM = 0 V, VO = 0 V 25°C 5 IIO Input offset current VICM = 0 V, VO = 0 V 25°C 10 IIB Input bias current VICM = 0 V, VO = 0 V 25°C 200 VICM Common-mode input voltage CMRR Common-mode rejection ratio SVR Supply-voltage rejection ratio AVD Full range UNIT mV 6 μV/°C 150 nA 750 Full range nA 1000 25°C –1.35 VICM = ±1.35 V 25°C 60 85 dB VCC = ±2 V to ±3 V 25°C 60 70 dB Large-signal voltage gain RL = 2 kΩ 25°C 70 80 dB VOH High-level output voltage RL = 2 kΩ 25°C 2 VOL Low-level output voltage RL = 2 kΩ 25°C 25°C Isource Output source current Isink Output sink current ICC Supply current (per amplifier) Unity gain, No load GBWP Gain bandwidth product f = 100 kHz, RL = 2 kΩ, CL = 100 pF 1.35 2.4 V –2.4 1.2 VOUT = ±2.5 V Full range 1 25°C 50 VOUT = ±2.5 V Full range 25 V –2 V 1.4 mA 80 25°C mA 2 2.8 Full range mA 3.2 25°C 8.5 12 25°C 2.8 5 Full range 2.8 MHz SR Slew rate AV = 1, VIN = ±1 V V/μs Φm Phase margin at unity gain RL = 2 kΩ, CL =100 pF 25°C 60 ° Gm Gain margin RL = 2 kΩ, CL =100 pF 25°C 10 dB Vn Equivalent input noise voltage f = 100 kHz 25°C 4 nV/√Hz THD Total harmonic distortion f = 1 kHz, Av = –1, RL = 10 kΩ 25°C 0.003 % 7.6 Typical Characteristics 50 40 120 40 120 30 80 30 80 20 40 20 40 10 0 10 0 -40 -10 -80 -10 -120 -20 -160 -30 -20 -30 VCC = 2.7 V RL = 10 kΩ k© CL = 100 pF -40 10k 100k 1k 1.E+03 1.E+04 1.E+05 1M 1.E+06 10M 1.E+07 -200 100M 1.E+08 f O = 17.3 MHz 0 0 200 Φ M = 64.4° 160 -40 Phase – ° Gain – dB f O = 8.4 MHz Gain – dB 60 160 ΦMM = 63.7° 50 Phase – ° 200 60 -80 VCC = 5 V -120 RL = 10 k© kΩ -160 CL = 100 pF -40 1k 1.E+03 10k 1.E+04 100k 1.E+05 1M 1.E+06 10M 1.E+07 -200 100M 1.E+08 f – Frequency – Hz f – Frequency – Hz Figure 1. Gain And Phase vs Frequency Figure 2. Gain And Phase vs Frequency Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 Submit Documentation Feedback 5 TL971, TL972, TL974 SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 www.ti.com Typical Characteristics (continued) 1 1 VCC = 2.7 V f = 1 kHz Gain = -1 V/V VCC = 5 V VIN = 1 Vrms Gain = -1 V/V 0.1 THD + Noise – % THD – % 0.1 0.01 RL = 2 kΩ k◊ RL = 10 kΩ kΩ RL = 2 k 0.01 0.001 RL = 10 kΩ k◊ 0.001 0.0001 10 1.E+01 100 1.E+02 1.E+03 1k 10k 1.E+04 0 1.E+05 100k 0.25 0.5 0.75 1 1.25 1.5 Frequency – Hz Output Voltage – Vrms Figure 3. Total Harmonic Distortion vs Frequency Figure 4. Total Harmonic Distortion + Noise vs Output Voltage 100 1 nV/√Hz Input Voltage Noise – nV/sqrt(Hz) VCC = 5 V f = 1 kHz Gain = -1 V/V THD + Noise – % 0.1 0.01 kΩ RL = 2 k 0.001 RL = 10 kΩ k 10 VCC = 10 V RS = 100 Ω © AV = 40 dB 1 10 100 1.E+01 1.E+02 0.0001 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 1k 1.E+03 10k 1.E+04 100k 1.E+05 f – Frequency – Hz Output Voltage – Vrms Figure 5. Total Harmonic Distortion + Noise vs Output Voltage Figure 6. Input Voltage Noise vs Frequency 32 20 CL = 250 pF Gain Bandwidth Product – MHz Gain Bandwidth Product – MHz 28 16 12 8 4 CL = 130 pF 24 CL = 30 pF 20 16 12 8 4 0 0 2 -2 -1.5 -1 -0.5 0 0.5 1 1.5 4 2 6 8 10 12 14 Supply Voltage – V Output Current – mA Figure 7. Gain Bandwidth Product vs Output Current 6 Submit Documentation Feedback Figure 8. Gain Bandwidth Product vs Supply Voltage Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 TL971, TL972, TL974 www.ti.com SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 100 100 90 90 80 80 70 70 Phase Margin – ° Phase Margin – ° Typical Characteristics (continued) 60 50 40 CL = 30 pF CL = 130 pF 60 50 CL = 250 pF 40 30 30 20 20 10 10 0 0 2 -2 -1.5 -1 -0.5 0 0.5 1 1.5 4 6 2 8 10 12 14 Supply Voltage – V Output Current – mA Figure 10. Phase Margin vs Supply Voltage Figure 9. Phase Margin vs Output Current 20 18 CL = 30 pF CL = 130 pF 14 CL = 250 pF 12 0.25 V/div Gain Margin – dB 16 10 8 6 4 2 0 2 4 6 8 10 12 14 1 µs/div Supply Voltage – V Figure 12. Input Response Figure 11. Gain Margin vs Supply Voltage 10 100 VIN- = -0.2 V Output Voltage to Supply Voltage – V 90 80 PSRR – dB 70 60 50 40 30 20 VIN+ = 0 V 1 VCC = 2.7 V VCC = 5 V 0.1 0.01 10 0 1k 1.E+03 0.001 0.01 1.E-02 10k 1.E+04 100k 1.E+05 1M 1.E+06 0.1 1.E-01 1 1.E+00 10 1.E+01 Output Current – mA Frequency – Hz Figure 13. Power-Supply Ripple Rejection vs Frequency Figure 14. Output Voltage vs Output Current Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 Submit Documentation Feedback 7 TL971, TL972, TL974 SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 www.ti.com Typical Characteristics (continued) 100 12 11 Fall 9 Slew Rate – V/µs ℵ Output Impedance – Ω 10 10 1 VCC = 2.7 V Rise 8 7 6 5 4 0.1 3 2 VCC = 5 V 0.01 100 1.E+02 1.E+03 1k 10k 1.E+04 1 100k 1.E+05 1.E+06 1M 0 2 Frequency – Hz 4 6 8 10 12 14 16 Supply Voltage – V Figure 15. Output Impedance vs Frequency 8 Submit Documentation Feedback Figure 16. Slew Rate vs Supply Voltage Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 TL971, TL972, TL974 www.ti.com SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 8 Detailed Description 8.1 Overview The TL97x family of operational amplifiers operates at voltages as low as ±1.35 V and features output rail-to-rail signal swing. The TL97x boast characteristics that make them particularly well suited for portable and batterysupplied equipment. Very low noise and low distortion characteristics make them ideal for audio preamplification. The TL97x family comes in single, dual, and quad operational amplifier packages of varying sizes. The TL971 is housed in the space-saving 5-pin SOT-23 package, which simplifies board design because of the ability to be placed anywhere (outside dimensions are 2.8 mm × 2.9 mm). 8.2 Functional Block Diagram VCC+ 1.4 mA IN+ IN± OUT VCC± 8.3 Feature Description 8.3.1 Slew Rate The slew rate is the rate at which an operational amplifier can change its output when there is a change on the input. The TL97x devices have a 5 V/μs slew rate. 8.3.2 Unity-Gain Bandwidth The unity-gain bandwidth is the frequency up to which an amplifier with a unity gain may be operated without greatly distorting the signal. The TL97x devices have a 12-MHz unity-gain bandwidth. Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 Submit Documentation Feedback 9 TL971, TL972, TL974 SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 www.ti.com Feature Description (continued) 8.3.3 Low Total Harmonic Distortion Harmonic distortions to an audio signal are created by electronic components in a circuit. Total harmonic distortion (THD) is a measure of harmonic distortions accumulated by a signal in an audio system. The TL97x devices have a very low THD of 0.003% meaning that they will add little harmonic distortion when used in audio signal applications. 8.3.4 Operating Voltage The TL97x devices are fully specified and ensured for operation from 2.7 V to 12 V. In addition, many specifications apply from –40°C to 125°C. 8.4 Device Functional Modes The TL97x devices are powered on when the supply is connected. Each of these devices can be operated as a single supply operational amplifier or dual supply amplifier depending on the application. 10 Submit Documentation Feedback Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 TL971, TL972, TL974 www.ti.com SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Typical Application The voltage follower configuration of the operational amplifier is used for applications where a weak signal is used to drive a relatively high current load. This circuit is also called a buffer amplifier or unity gain amplifier. The inputs of an operational amplifier have a very high resistance which puts a negligible current load on the voltage source. The output resistance of the operational amplifier is almost negligible, so it can provide as much current as necessary to the output load. 12 V VOUT + VIN Figure 17. Voltage follower schematic 9.1.1 Design Requirements • Input at positive Terminal • Output range of 0 V to 12 V • Input range of 0 V to 12 V • Short-circuit feedback to negative input for unity gain 9.1.2 Detailed Design Procedure 9.1.2.1 Output Voltage Swing The output voltage of an operational amplifier is limited by its internal circuitry to some level below the supply rails. For this amplifier, the output voltage must be within ±12 V. 9.1.2.2 Supply and Input Voltage For correct operation of the amplifier, neither input must be higher than the recommended positive supply rail voltage or lower than the recommended negative supply rail voltage. The chosen amplifier must be able to operate at the supply voltage that accommodates the inputs. Because the input for this application goes up to 12 V, the supply voltage must be 15 V. Using a negative voltage on the lower rail rather than ground, allows the amplifier to maintain linearity for the full range of inputs. Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 Submit Documentation Feedback 11 TL971, TL972, TL974 SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 www.ti.com Typical Application (continued) 9.1.3 Application Curves for Output Characteristics 12 1 10 0 ±1 IIO (mA) VOUT (V) 8 6 ±2 ±3 4 ±4 2 ±5 0 ±6 0 2 4 6 8 10 VIN (V) 0 12 2 4 6 VIN (V) C001 Figure 18. Output Voltage vs Input Voltage 8 10 12 C002 Figure 19. Current Drawn by Input of Voltage Follower (IIO) vs Input Voltage 12 10 ICC (mA) 8 6 4 2 0 0 2 4 6 8 10 VIN (V) 12 C003 Figure 20. Current Dawn from Supply (ICC) vs Input Voltage 12 Submit Documentation Feedback Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 TL971, TL972, TL974 www.ti.com SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 10 Power Supply Recommendations The TL97x devices are specified for operation from 2.7 to 12 V; many specifications apply from -40 °C to 125 °C. CAUTION Supply voltages larger than 15 V can permanently damage the device (see the Absolute Maximum Ratings). Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high impedance power supplies. For more detailed information on bypass capacitor placement, refer to the Layout Guidelines. 11 Layout 11.1 Layout Guidelines • • • • • • For best operational performance of the device, use good PCB layout practices, including: Noise can propagate into analog circuitry through the power pins of the circuit as a whole and the operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry. – Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single supply applications. Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. For more detailed information, refer to Circuit Board Layout Techniques, SLOA089. To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace. Place the external components as close to the device as possible. Keeping RF and RG close to the inverting input minimizes parasitic capacitance, as shown in Layout Example. Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 11.2 Layout Example VIN RIN RG + VOUT RF Figure 21. Operational Amplifier Schematic for Noninverting Configuration Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 Submit Documentation Feedback 13 TL971, TL972, TL974 SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 www.ti.com Layout Example (continued) Place components close to device and to each other to reduce parasitic errors Run the input traces as far away from the supply lines as possible RF NC NC GND IN1í VCC+ VIN IN1+ OUT VCCí NC VS+ Use low-ESR, ceramic bypass capacitor RG RIN GND Only needed for dual-supply operation GND VS(or GND for single supply) VOUT Ground (GND) plane on another layer Figure 22. Operational Amplifier Board Layout for Noninverting Configuration 14 Submit Documentation Feedback Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 TL971, TL972, TL974 www.ti.com SLOS467H – OCTOBER 2006 – REVISED JANUARY 2015 12 Device and Documentation Support 12.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TL971 Click here Click here Click here Click here Click here TL972 Click here Click here Click here Click here Click here TL974 Click here Click here Click here Click here Click here 12.2 Trademarks All trademarks are the property of their respective owners. 12.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: TL971 TL972 TL974 Submit Documentation Feedback 15 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TL971ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Z971 Samples TL971IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Z971 Samples TL971IDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Z971 Samples TL972ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Z972 Samples TL972IDGKR ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TSA Samples TL972IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Z972 Samples TL972IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 TL972IP Samples TL972IPE4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 TL972IP Samples TL972IPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Z972 Samples TL972IPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Z972 Samples TL974ID ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TL974I Samples TL974IDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TL974I Samples TL974IN ACTIVE PDIP N 14 25 RoHS & Non-Green NIPDAU N / A for Pkg Type -40 to 125 TL974IN Samples TL974INE4 ACTIVE PDIP N 14 25 RoHS & Non-Green NIPDAU N / A for Pkg Type -40 to 125 TL974IN Samples TL974IPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Z974 Samples TL974IPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Z974 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of