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TLC2274IDG4

TLC2274IDG4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC14_150MIL

  • 描述:

    IC OPAMP GP 2.25MHZ RRO 14SOIC

  • 数据手册
  • 价格&库存
TLC2274IDG4 数据手册
Product Folder Sample & Buy Support & Community Tools & Software Technical Documents TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 TLC227x, TLC227xA: Advanced LinCMOS Rail-to-Rail Operational Amplifiers 1 Features • • • • 1 • • • • • • • Output Swing Includes Both Supply Rails Low Noise: 9 nV/√Hz Typical at f = 1 kHz Low-Input Bias Current: 1-pA Typical Fully-Specified for Both Single-Supply and SplitSupply Operation Common-Mode Input Voltage Range Includes Negative Rail High-Gain Bandwidth: 2.2-MHz Typical High Slew Rate: 3.6-V/μs Typical Low Input Offset Voltage: 950 μV Maximum at TA = 25°C Macromodel Included Performance Upgrades for the TLC272 and TLC274 Available in Q-Temp Automotive The TLC227x also make great upgrades to the TLC27x in standard designs. They offer increased output dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set allows them to be used in a wider range of applications. For applications that require higher output drive and wider input voltage range, see the TLV2432 and TLV2442 devices. If the design requires single amplifiers, see the TLV2211, TLV2221 and TLV2231 family. These devices are single rail-to-rail operational amplifiers in the SOT-23 package. Their small size and low power consumption make them ideal for high density, battery-powered equipment. Device Information(1) PART NUMBER TLC2272 2 Applications White Goods (Refrigerators, Washing Machines) Hand-held Monitoring Systems Configuration Control and Print Support Transducer Interfaces Battery-Powered Applications 3 Description The TLC2272 and TLC2274 are dual and quadruple operational amplifiers from Texas Instruments. Both devices exhibit rail-to-rail output performance for increased dynamic range in single- or split-supply applications. The TLC227x family offers 2 MHz of bandwidth and 3 V/μs of slew rate for higher-speed applications. These devices offer comparable AC performance while having better noise, input offset voltage, and power dissipation than existing CMOS operational amplifiers. The TLC227x has a noise voltage of 9 nV/√Hz, two times lower than competitive solutions. The TLC227x family of devices, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for high-impedance sources such as piezoelectric transducers. Because of the micropower dissipation levels, these devices work well in handheld monitoring and remote-sensing applications. In addition, the rail-to-rail output feature, with single- or split-supplies, makes this family a great choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the TLC227xA family is available with a maximum input offset voltage of 950 μV. This family is fully characterized at 5 V and ±5 V. TLC2274 BODY SIZE (NOM) 4.40 mm × 3.00 mm SOIC (8) 3.91 mm × 4.90 mm SO (8) 5.30 mm × 6.20 mm PDIP (8) 6.35 mm × 9.81 mm TSSOP (14) 4.40 mm × 5.00 mm SOIC (14) 3.91 mm × 8.65 mm SO (14) 5.30 mm × 10.30 mm PDIP (14) 6.35 mm × 19.30 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Maximum Peak-to-Peak Output Voltage vs Supply Voltage V(OPP) V O(PP) − Maximum Peak-to-Peak Output Voltage − V • • • • • PACKAGE TSSOP (8) 16 TA = 25°C 14 12 IO = ± 50 µA 10 IO = ± 500 µA 8 6 4 4 6 8 10 12 14 16 |VDD ±| − Supply Voltage − V 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 7 1 1 1 2 3 5 Absolute Maximum Ratings ...................................... 5 ESD Ratings.............................................................. 5 Recommended Operating Conditions....................... 5 Thermal Information .................................................. 6 TLC2272 and TLC2272A Electrical Characteristics VDD = 5 V ................................................................... 6 TLC2272 and TLC2272A Electrical Characteristics VDD± = ±5 V................................................................ 8 TLC2274 and TLC2274A Electrical Characteristics VDD = 5 V ................................................................... 9 TLC2274 and TLC2274A Electrical Characteristics VDD± = ±5 V.............................................................. 11 Typical Characteristics ............................................ 13 Detailed Description ............................................ 24 7.1 7.2 7.3 7.4 8 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ 24 24 24 24 Application and Implementation ........................ 25 8.1 Application Information............................................ 25 8.2 Typical Application .................................................. 26 9 Power Supply Recommendations...................... 28 10 Layout................................................................... 29 10.1 Layout Guidelines ................................................. 29 10.2 Layout Example .................................................... 29 11 Device and Documentation Support ................. 30 11.1 11.2 11.3 11.4 11.5 Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 30 30 30 30 30 12 Mechanical, Packaging, and Orderable Information ........................................................... 30 4 Revision History Changes from Revision G (May 2004) to Revision H Page • Added Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Supportsection, and Mechanical, Packaging, and Orderable Information section. ..................................................................................................................... 1 • Added ESD Rating table for the D and PW package devices. .............................................................................................. 5 2 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 5 Pin Configuration and Functions TLC2272 D, JG, P, or PW Package 8-Pin SOIC, CDIP, PDIP, or TSSOP Top View 1OUT 1IN − 1IN + VDD − /GND 1 8 2 7 3 6 4 5 VDD + 2OUT 2IN − 2IN + 1OUT 1IN − 1IN + VDD + 2IN + 2IN − 2OUT NC 1OUT NC VDD+ NC TLC2272 FK Package 20-Pin LCCC Top View TLC2274 D, J, N, PW, or W Package 14-Pin SOIC, CDIP, PDIP, TSSOP, or CFP Top View 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC 2 OUT NC 2 IN− NC 1 10 2 9 3 8 4 7 5 6 3 12 4 11 5 10 6 9 7 8 4OUT 4IN − 4IN + VDD − 3IN + 3IN − 3OUT 1IN + NC VDD + NC 2IN + 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4IN + NC VDD − NC 3IN + 2IN − 2OUT NC 3OUT 3IN − TLC2272 U Package 10-Pin CFP Top View NC 1 OUT 1 IN− 1 IN+ VDD−/GND 13 1IN − 1OUT NC 4OUT 4IN − 4 14 2 TLC2274 FK Package 20-Pin LCCC Top View NC VDD−/GND NC 2 IN+ NC NC 1 IN− NC 1 IN+ NC 1 NC VDD+ 2 OUT 2 IN− 2 IN+ Copyright © 1997–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 3 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com Pin Functions PIN NO. TLC2272 NAME I/O TLC2274 DESCRIPTION D, JG, P, or PW FK U D, J, N, PW, or W FK 1IN+ 3 7 4 3 4 I Non-inverting input, Channel 1 1IN- 2 5 3 2 3 I Inverting input, Channel 1 1OUT 1 2 2 1 2 O Output, Channel 1 2IN+ 5 12 6 5 8 I Non-inverting input, Channel 2 2IN- 6 15 7 6 9 I Inverting input, Channel 2 2OUT 7 17 8 7 10 O Output, Channel 2 3IN+ — — — 10 14 I Non-inverting input, Channel 3 3IN- — — — 9 13 I Inverting input, Channel 3 3OUT — — — 8 12 O Output, Channel 3 4IN+ — — — 12 18 I Non-inverting input, Channel 4 4IN- — — — 13 19 I Inverting input, Channel 4 4OUT — — — 14 20 O Output, Channel 4 VDD+ 8 20 9 4 6 — Positive (highest) supply VDD– — — — 11 16 — Negative (lowest) supply VDD–/GND 4 10 5 — — — Negative (lowest) supply — 1, 3, 4, 6, 8, 9, 11, 13, 14, 16, 18, 19 1, 10 — 1, 5, 7, 11, 15, 17 — No Connection NC 4 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT 8 V Supply voltage, VDD+ (2) VDD- (2) –8 V Differential input voltage, VID (3) ±16 V VDD+ V Input current, II (any input) ±5 mA Output current, IO ±50 mA Total current into VDD+ ±50 mA ±50 mA Input voltage, VI(any input) (2) VDD− − 0.3 Total current out of VDD– Duration of short-circuit current at (or below) 25°C (4) Unlimited C level parts Operating free-air temperature range, TA 0 70 I, Q level parts –40 125 M level parts –55 125 °C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds D, N, P or PW package 260 °C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds J or U package 300 °C 150 °C Storage temperature, Tstg (1) (2) (3) (4) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD. Differential voltages are at IN+ with respect to IN–. Excessive current will flow if input is brought below VDD– − 0.3 V. The output may be shorted to either supply. Temperature or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. 6.2 ESD Ratings VALUE V(ESD) (1) Electrostatic discharge Human-body model (HBM), per AEC Q100-002 (1) Q-grade and M-grade devices in D and PW packages ±2000 Charged-device model (CDM), per AEC Q100-011 Q-grade and M-grade devices in D and PW packages ±1000 UNIT V AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions VDD± VI VIC Supply voltage Input voltage Common-mode input voltage Copyright © 1997–2016, Texas Instruments Incorporated MIN MAX C LEVEL PARTS ±2.2 ±8 I LEVEL PARTS ±2.2 ±8 Q LEVEL PARTS ±2.2 ±8 M LEVEL PARTS ±2.2 ±8 C LEVEL PARTS VDD− VDD+ −1.5 I LEVEL PARTS VDD− VDD+ −1.5 Q LEVEL PARTS VDD− VDD+ −1.5 M LEVEL PARTS VDD− VDD+ −1.5 C LEVEL PARTS VDD− VDD+ −1.5 I LEVEL PARTS VDD− VDD+ −1.5 Q LEVEL PARTS VDD− VDD+ −1.5 M LEVEL PARTS VDD− VDD+ −1.5 UNIT Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM V V V 5 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com Recommended Operating Conditions (continued) MIN MAX 0 70 I LEVEL PARTS –40 125 Q LEVEL PARTS –40 125 M LEVEL PARTS –55 125 C LEVEL PARTS TA Operating free-air temperature UNIT °C 6.4 Thermal Information TLC2272 THERMAL METRIC (1) TLC2274 D (SOIC) P (PDIP) PW (TSSOP) FK (LCCC) U (CFP) D (SOIC) N (PDIP) PW (TSSOP) FK (LCCC) J (CDIP) UNIT 8-PIN 8-PIN 8-PIN 20-PIN 10-PIN 14-PIN 14-PIN 14-PIN 20-PIN 14-PIN RθJA Junction-to-ambient thermal resistance (2) (3) 115.6 58.5 175.8 — — 83.8 — 111.6 — — °C/W RθJC(top) Junction-to-case (top) thermal resistance (2) (3) 61.8 48.3 58.8 18 121.3 43.2 34 41.2 16 16.2 °C/W RθJB Junction-to-board thermal resistance 55.9 35.6 104.3 — — 38.4 — 54.7 — — °C/W ψJT Junction-to-top characterization parameter 14.3 25.9 5.9 — — 9.4 — 3.9 — — °C/W ψJB Junction-to-board characterization parameter 55.4 35.5 102.6 — — 38.1 — 53.9 — — °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — — — — 8.68 — — — — — °C/W (1) (2) (3) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA) / θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7 (plastic) or MIL-STD-883 Method 1012 (ceramic). 6.5 TLC2272 and TLC2272A Electrical Characteristics VDD = 5 V at specified free-air temperature, VDD = 5 V; TA = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS TLC2272 VIO VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω Input offset voltage TLC2272A TLC2272 TLC2272A αVIO Temperature coefficient of input offset voltage Input offset voltage long-term drift IIO IIB VICR (1) (2) 6 (2) Input offset current Input bias current Common-mode input voltage MIN TA = 25°C TYP MAX 300 2500 300 Full Range (1) 2 VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 0.002 VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω RS = 50 Ω; |VIO | ≤ 5 mV μV/°C μV/mo All level parts TA = 25°C C level part TA = 0°C to 80°C 100 I level part TA = –40°C to 85°C 150 Q level part TA = –40°C to 125°C 800 M level part TA = –55°C to 125°C All level parts TA = 25°C C level part TA = 0°C to 80°C 100 I level part TA = –40°C to 85°C 150 Q level part TA = –40°C to 125°C 800 M level part TA = –55°C to 125°C TA = 25°C Full Range (1) µV 1500 VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 950 3000 UNIT 0.5 60 pA 800 1 60 pA 800 –0.3 2.5 4 0 2.5 3.5 V TA = –55°C to 125°C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 TLC2272 and TLC2272A Electrical Characteristics VDD = 5 V (continued) at specified free-air temperature, VDD = 5 V; TA = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS MIN IOH = −20 μA VOH High-level output voltage IOH = −200 μA IOH = −1 mA TA = 25°C 4.85 Full Range (1) 4.85 TA = 25°C 4.25 Full Range (1) 4.25 IOL = 50 μA VOL Low-level output voltage VIC = 2.5 V IOL = 500 μA IOL = 5 mA C level part Large-signal differential voltage amplification AVD VIC = 2.5 V, VO = 1 V to 4 V; RL = 10 kΩ (3) I level part Q level part M level part V 4.65 0.09 0.15 0.15 TA = 25°C 0.9 Full Range (1) 15 TA = 0°C to 80°C 15 TA = 25°C 15 TA = –40°C to 85°C 15 TA = 25°C 10 TA = –40°C to 125°C 10 TA = 25°C 10 TA = –55°C to 125°C 10 1.5 35 35 35 V/mV 35 175 ri Common-mode input resistance ci Common-mode input capacitance f = 10 kHz, P package zo Closed-loop output impedance f = 1 MHz, AV = 10 CMRR Common-mode rejection ratio VIC = 0 V to 2.7 V, VO = 2.5 V, RS = 50 Ω TA = 25°C 70 Full Range (1) 70 kSVR Supply-voltage rejection ratio (ΔVDD / ΔVIO) VDD = 4.4 V to 16 V, VIC = VDD / 2, no load TA = 25°C 80 Full Range (1) 80 IDD Supply currrent VO = 2.5 V, no load SR Slew rate at unity gain VO = 0.5 V to 2.5 V, RL = 10 kΩ (3), CL = 100 pF (3) Vn Equivalent input noise voltage VNPP Peak-to-peak equivalent input noise voltage In Equivalent input noise current 1012 Ω 12 Ω 8 pF 140 Ω 10 TA = 25°C 75 2.2 Full Range (1) dB 3 3 TA = 25°C 2.3 Full Range (1) 1.7 3.6 50 f = 1 kHz 9 f = 0.1 Hz to 1 Hz dB 95 f = 10 Hz 1 f = 0.1 Hz to 10 Hz 1.4 0.6 VO = 0.5 V to 2.5 V, f = 20 kHz, RL = 10 kΩ (3) V 1.5 TA = 25°C Differential input resistance AV = 1 0.0013% AV = 10 0.004% AV = 100 0.03% Gain-bandwidth product f = 10 kHz, RL = 10 kΩ (3), CL = 100 pF (3) Maximum output-swing bandwidth VO(PP) = 2 V, AV = 1, RL = 10 kΩ (3), CL = 100 pF (3) ts Settling time AV = –1, RL = 10 kΩ (3), Step = 0.5 V to 2.5 V, CL = 100 pF (3) φm Phase margin at unity gain RL = 10 kΩ (3), CL = 100 pF (3) 50° Gain margin RL = 10 kΩ (3), CL = 100 pF (3) 10 (3) UNIT 4.93 Full Range (1) rid BOM MAX 0.01 TA = 25°C VIC = 2.5 V, VO = 1 V to 4 V; RL = 1 MΩ (3) THD+N Total harmonic distortion + noise TYP 4.99 mA V/µs nV/√Hz µV fA/√Hz 2.18 MHz 1 MHz To 0.1% 1.5 To 0.01% 2.6 µs dB Referenced to 0 V. Copyright © 1997–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 7 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com 6.6 TLC2272 and TLC2272A Electrical Characteristics VDD± = ±5 V at specified free-air temperature, VDD± = ±5 V; TA = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS TLC2272 VIO Input offset voltage VIC = 0 V, VO = 0 V, RS = 50 Ω TLC2272A TLC2272 TLC2272A αVIO IIO Temperature coefficient of input offset voltage VIC = 0 V, VO = 0 V, RS = 50 Ω Input offset voltage long-term drift (2) VIC = 0 V, VO = 0 V, RS = 50 Ω Input offset current IIB Input bias current VICR Common-mode input voltage VIC = 0 V, VO = 0 V, RS = 50 Ω VIC = 0 V, VO = 0 V, RS = 50 Ω MIN TA = 25°C Maximum positive peak output voltage Full Range (1) C level part TA = 0°C to 80°C 100 I level part TA = –40°C to 85°C 150 Q level part TA = –40°C to 125°C 800 M level part TA = –55°C to 125°C All level parts TA = 25°C C level part TA = 0°C to 80°C 100 I level part TA = –40°C to 85°C 150 Q level part TA = –40°C to 125°C 800 M level part TA = –55°C to 125°C 0.5 IO = −200 μA IO = 500 μA C level part I level part Large-signal differential voltage amplification 60 pA 800 1 60 pA 800 –5.3 0 4 –5 0 3.5 V 4.99 IO = 5 mA AVD μV/mo 0.002 Full Range (1) µV μV/°C 2 TA = 25°C UNIT 1500 TA = 25°C RS = 50 Ω; |VIO | ≤ 5 mV VIC = 0 V, 950 3000 TA = 25°C 4.85 Full Range (1) 4.85 TA = 25°C 4.25 Full Range (1) 4.25 IO = 50 μA Maximum negative peak output voltage 2500 All level parts IO = −1 mA VOM- MAX 300 300 IO = −20 μA VOM+ TYP VO = ±4 V; RL = 10 kΩ Q level part M level part 4.93 V 4.65 –4.99 TA = 25°C –4.85 Full Range (1) –4.85 TA = 25°C –3.5 Full Range (1) –3.5 TA = 25°C 25 TA = 0°C to 80°C 25 TA = 25°C 25 TA = –40°C to 85°C 25 TA = 25°C 20 TA = –40°C to 125°C 20 TA = 25°C 20 TA = –55°C to 125°C 20 VO = ±4 V; RL = 1 MΩ –4.91 V –4.1 50 50 50 V/mV 50 300 rid Differential input resistance 1012 ri Common-mode input resistance 1012 Ω ci Common-mode input capacitance f = 10 kHz, P package 8 pF zo Closed-loop output impedance f = 1 MHz, AV = 10 130 Ω CMRR Common-mode rejection ratio VIC = –5 V to 2.7 V, VO = 0 V, RS = 50 Ω TA = 25°C 75 Full Range (1) 75 kSVR Supply-voltage rejection ratio (ΔVDD / ΔVIO) VDD+ = 2.2 V to ±8 V, VIC = 0 V, no load TA = 25°C 80 Full Range (1) 80 IDD Supply currrent VO = 0 V, no load (1) (2) 8 TA = 25°C Ω 80 dB 95 2.4 Full Range (1) dB 3 3 mA TA = –55°C to 125°C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 TLC2272 and TLC2272A Electrical Characteristics VDD± = ±5 V (continued) at specified free-air temperature, VDD± = ±5 V; TA = 25°C, unless otherwise noted. PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VNPP Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD+N Total harmonic distortion + noise TEST CONDITIONS VO = ±2.3 V, RL = 10 kΩ, CL = 100 pF MIN TYP TA = 25°C 2.3 3.6 Full Range (1) 1.7 f = 10 Hz 50 f = 1 kHz 9 f = 0.1 Hz to 1 Hz MAX V/µs nV/√Hz 1 f = 0.1 Hz to 10 Hz µV 1.4 0.6 VO = ±2.3, f = 20 kHz, RL = 10 kΩ AV = 1 0.0011% AV = 10 0.004% AV = 100 0.03% UNIT fA/√Hz Gain-bandwidth product f = 10 kHz, RL = 10 kΩ, CL = 100 pF 2.25 MHz Maximum output-swing bandwidth VO(PP) = 4.6 V, AV = 1, RL = 10 kΩ, CL = 100 pF 0.54 MHz ts Settling time AV = –1, RL = 10 kΩ, Step = –2.3 V to 2.3 V, CL = 100 pF φm Phase margin at unity gain RL = 10 kΩ, CL = 100 pF 52° Gain margin RL = 10 kΩ, CL = 100 pF 10 BOM To 0.1% 1.5 To 0.01% 3.2 µs dB 6.7 TLC2274 and TLC2274A Electrical Characteristics VDD = 5 V at specified free-air temperature, VDD = 5 V; TA = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS TLC2274 VIO Input offset voltage VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω TLC2274A TLC2274 TLC2274A αVIO IIO IIB VICR MIN TA = 25°C 2500 950 3000 Full Range (1) UNIT µV 1500 Temperature coefficient of input offset voltage VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 2 μV/°C Input offset voltage long-term drift (2) VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω 0.002 μV/mo Input offset current Input bias current Common-mode input voltage VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω VIC = 0 V, VDD± = ±2.5 V, VO = 0 V, RS = 50 Ω RS = 50 Ω; |VIO | ≤ 5 mV High-level output voltage IOH = −200 μA IOH = −1 mA (1) (2) MAX 300 300 All level parts TA = 25°C C level part TA = 0°C to 80°C 100 I level part TA = –40°C to 85°C 150 Q level part TA = –40°C to 125°C 800 M level part TA = –55°C to 125°C All level parts TA = 25°C C level part TA = 0°C to 80°C 100 I level part TA = –40°C to 85°C 150 Q level part TA = –40°C to 125°C 800 M level part TA = –55°C to 125°C TA = 25°C Full Range (1) 0.5 60 pA 800 1 60 pA 800 –0.3 2.5 4 0 2.5 3.5 IOH = −20 μA VOH TYP V 4.99 TA = 25°C 4.85 Full Range (1) 4.85 TA = 25°C 4.25 Full Range (1) 4.25 4.93 V 4.65 TA = –55°C to 125°C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. Copyright © 1997–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 9 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com TLC2274 and TLC2274A Electrical Characteristics VDD = 5 V (continued) at specified free-air temperature, VDD = 5 V; TA = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS MIN IOL = 50 μA VOL Low-level output voltage IOL = 500 μA VIC = 2.5 V IOL = 5 mA C level part Large-signal differential voltage amplification AVD VIC = 2.5 V, VO = 1 V to 4 V; RL = 10 kΩ (3) I level part Q level part M level part TYP MAX UNIT 0.01 TA = 25°C 0.09 Full Range (1) 0.15 0.15 TA = 25°C 0.9 Full Range (1) V 1.5 1.5 TA = 25°C 15 TA = 0°C to 80°C 15 TA = 25°C 15 TA = –40°C to 85°C 15 TA = 25°C 10 TA = –40°C to 125°C 10 TA = 25°C 10 TA = –55°C to 125°C 10 VIC = 2.5 V, VO = 1 V to 4 V; RL = 1 MΩ (3) 35 35 35 V/mV 35 175 rid Differential input resistance 1012 ri Common-mode input resistance 1012 Ω ci Common-mode input capacitance f = 10 kHz, P package 8 pF zo Closed-loop output impedance f = 1 MHz, AV = 10 140 Ω CMRR Common-mode rejection ratio VIC = 0 V to 2.7 V, VO = 2.5 V, RS = 50 Ω TA = 25°C 70 Full Range (1) 70 kSVR Supply-voltage rejection ratio (ΔVDD / ΔVIO) VDD = 4.4 V to 16 V, VIC = VDD / 2, no load TA = 25°C 80 Full Range (1) 80 IDD Supply currrent VO = 2.5 V, no load SR Slew rate at unity gain VO = 0.5 V to 2.5 V, RL = 10 kΩ (3), CL = 100 pF (3) Vn Equivalent input noise voltage VNPP Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD+N Total harmonic distortion + noise BOM TA = 25°C 75 4.4 2.3 Full Range (1) 1.7 3.6 f = 10 Hz 50 f = 1 kHz 9 1 1.4 0.6 VO = 0.5 V to 2.5 V, f = 20 kHz, RL = 10 kΩ (3) AV = 1 0.0013% AV = 10 0.004% AV = 100 0.03% Gain-bandwidth product f = 10 kHz, RL = 10 kΩ (3), CL = 100 pF (3) Maximum output-swing bandwidth VO(PP) = 2 V, AV = 1, RL = 10 kΩ (3), CL = 100 pF (3) (3) mA V/µs nV/√Hz µV fA/√Hz MHz 1 MHz To 0.1% 1.5 To 0.01% 2.6 Settling time AV = –1, RL = 10 kΩ , Step = 0.5 V to 2.5 V, CL = 100 pF (3) φm Phase margin at unity gain RL = 10 kΩ (3), CL = 100 pF (3) 50° Gain margin RL = 10 kΩ (3), CL = 100 pF (3) 10 10 6 2.18 ts (3) dB 6 TA = 25°C f = 0.1 Hz to 10 Hz dB 95 Full Range (1) f = 0.1 Hz to 1 Hz Ω µs dB Referenced to 0 V. Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 6.8 TLC2274 and TLC2274A Electrical Characteristics VDD± = ±5 V at specified free-air temperature, VDD± = ±5 V; TA = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS TLC2274 VIO Input offset voltage VIC = 0 V, VO = 0 V, RS = 50 Ω TLC2274A TLC2274 TLC2274A αVIO IIO Temperature coefficient of input offset voltage VIC = 0 V, VO = 0 V, RS = 50 Ω Input offset voltage long-term drift (2) VIC = 0 V, VO = 0 V, RS = 50 Ω Input offset current IIB Input bias current VICR Common-mode input voltage VIC = 0 V, VO = 0 V, RS = 50 Ω VIC = 0 V, VO = 0 V, RS = 50 Ω MIN TA = 25°C Maximum positive peak output voltage Full Range (1) μV/mo 0.002 TA = 0°C to 80°C 100 I level part TA = –40°C to 85°C 150 Q level part TA = –40°C to 125°C 800 M level part TA = –55°C to 125°C All level parts TA = 25°C C level part TA = 0°C to 80°C 100 I level part TA = –40°C to 85°C 150 Q level part TA = –40°C to 125°C 800 M level part TA = –55°C to 125°C 0.5 60 Full Range (1) pA 800 1 TA = 25°C 60 pA 800 –5.3 0 4 –5 0 3.5 V 4.99 IO = −200 μA IO = 500 μA C level part I level part Large-signal differential voltage amplification µV μV/°C 2 C level part IO = 5 mA AVD UNIT 1500 TA = 25°C RS = 50 Ω; |VIO | ≤ 5 mV VIC = 0 V 950 3000 TA = 25°C 4.85 Full Range (1) 4.85 TA = 25°C 4.25 Full Range (1) 4.25 IO = 50 μA Maximum negative peak output voltage 2500 All level parts IO = −1 mA VOM- MAX 300 300 IO = −20 μA VOM+ TYP VO = ±4 V; RL = 10 kΩ Q level part M level part 4.93 V 4.65 –4.99 TA = 25°C –4.85 Full Range (1) –4.85 TA = 25°C –3.5 Full Range (1) –3.5 TA = 25°C 25 TA = 0°C to 80°C 25 TA = 25°C 25 TA = –40°C to 85°C 25 TA = 25°C 20 TA = –40°C to 125°C 20 TA = 25°C 20 TA = –55°C to 125°C 20 VO = ±4 V; RL = 1 MΩ –4.91 V –4.1 50 50 50 V/mV 50 300 rid Differential input resistance 1012 ri Common-mode input resistance 1012 Ω ci Common-mode input capacitance f = 10 kHz, P package 8 pF zo Closed-loop output impedance f = 1 MHz, AV = 10 130 Ω CMRR Common-mode rejection ratio VIC = –5 V to 2.7 V, VO = 0 V, RS = 50 Ω TA = 25°C 75 Full Range (1) 75 kSVR Supply-voltage rejection ratio (ΔVDD / ΔVIO) VDD+ = 2.2 V to ±8 V, VIC = 0 V, no load TA = 25°C 80 Full Range (1) 80 IDD Supply currrent VO = 0 V, no load (1) (2) TA = 25°C Ω 80 dB 95 4.8 Full Range (1) dB 6 6 mA TA = –55°C to 125°C. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. Copyright © 1997–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 11 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com TLC2274 and TLC2274A Electrical Characteristics VDD± = ±5 V (continued) at specified free-air temperature, VDD± = ±5 V; TA = 25°C, unless otherwise noted. PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VNPP Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD+N Total harmonic distortion + noise TEST CONDITIONS VO = ±2.3 V, RL = 10 kΩ, CL = 100 pF MIN TYP TA = 25°C 2.3 3.6 Full Range (1) 1.7 f = 10 Hz 50 f = 1 kHz 9 f = 0.1 Hz to 1 Hz MAX 1 f = 0.1 Hz to 10 Hz 1.4 0.6 VO = ±2.3, f = 20 kHz, RL = 10 kΩ AV = 1 0.0011% AV = 10 0.004% AV = 100 0.03% UNIT V/µs nV/√Hz µV fA/√Hz Gain-bandwidth product f = 10 kHz, RL = 10 kΩ, CL = 100 pF 2.25 MHz Maximum output-swing bandwidth VO(PP) = 4.6 V, AV = 1, RL = 10 kΩ, CL = 100 pF 0.54 MHz ts Settling time AV = –1, RL = 10 kΩ, Step = –2.3 V to 2.3 V, CL = 100 pF φm Phase margin at unity gain RL = 10 kΩ, CL = 100 pF 52° Gain margin RL = 10 kΩ, CL = 100 pF 10 BOM 12 Submit Documentation Feedback To 0.1% 1.5 To 0.01% 3.2 µs dB Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 6.9 Typical Characteristics Table 1. Table of Graphs FIGURE (1) Distribution 1, 2, 3, 4 VIO Input offset voltage αVIO Input offset voltage temperature coefficient Distribution IIB /IIO Input bias and input offset current vs Free-air temperature VI Input voltage VOH vs Common-mode voltage 5, 6 7, 8, 9, 10 (2) vs Supply voltage 11 (2) 12 vs Free-air temperature 13 (2) High-level output voltage vs High-level output current 14 (2) VOL Low-level output voltage vs Low-level output current 15, 16 (2) VOM+ Maximum positive peak output voltage vs Output current 17 (2) VOM- Maximum negative peak output voltage vs Output current 18 (2) VO(PP) Maximum peak-to-peak output voltage vs Frequency 19 vs Supply voltage 20 IOS Short-circuit output current VO Output voltage vs Differential input voltage Large-signal differential voltage amplification vs Load resistance Large-signal differential voltage amplification and phase margin vs Frequency Large-signal differential voltage amplification vs Free-air temperature Output impedance vs Frequency 29, 30 vs Frequency 31 vs Free-air temperature 32 AVD z0 CMRR Common-mode rejection ratio kSVR Supply-voltage rejection ratio IDD Supply current SR Slew rate VO Vn vs Free-air temperature vs Frequency 27 (2), 28 (2) 33, 34 vs Free-air temperature 35 (2) vs Supply voltage 36 (2), 37 (2) vs Free-air temperature 38 (2), 39 (2) vs Load Capacitance vs Free-air temperature 40 41 (2) 42, 43 Voltage-follower large-signal pulse response 44, 45 Inverting small-signal pulse response 46, 47 Voltage-follower small-signal pulse response 48, 49 vs Frequency 50, 51 52 Integrated noise voltage vs Frequency 53 Total harmonic distortion + noise vs Frequency 54 Gain-bandwidth product (1) (2) 24 25, 26 Noise voltage over a 10-second period φm 22, 23 Inverting large-signal pulse response Equivalent input noise voltage THD+N 21 (2) vs Supply voltage vs Free-air temperature 55 56 (2) Phase margin vs Load capacitance 57 Gain margin vs Load capacitance 58 For all graphs where VDD = 5 V, all loads are referenced to 2.5 V. Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. Copyright © 1997–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 13 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 15 20 891 Amplifiers From 2 Wafer Lots VDD = ± 2.5 V TA = 25°C Percentage of Amplifiers − % Percentage of Amplifiers − % 20 www.ti.com 10 5 0 −1.6 −1.2 − 0.8 − 0.4 0 0.4 0.8 1.2 15 10 5 0 −1.6 −1.2 −0.8 − 0.4 1.6 0 0.4 0.8 1.2 1.6 VIO − Input Offset Voltage − mV VIO − Input Offset Voltage − mV Figure 1. Distribution of TLC2272 Input Offset Voltage Figure 2. Distribution of TLC2272 Input Offset Voltage 20 20 992 Amplifiers From 2 Wafer Lots VDD = ± 5 V Percentage of Amplifiers − % Percentage of Amplifiers − % 992 Amplifiers From 2 Wafer Lots VDD = ± 2.5 V 15 10 5 0 − 1.6 −1.2 − 0.8 −0.4 0 0.4 0.8 1.2 15 10 5 0 − 1.6 −1.2 −0.8 1.6 −0.4 0 0.4 0.8 1.2 1.6 VIO − Input Offset Voltage − mV VIO − Input Offset Voltage − mV Figure 3. Distribution of TLC2274 Input Offset Voltage Figure 4. Distribution of TLC2274 Input Offset Voltage 1 VDD = 5 V TA = 25°C RS = 50 Ω VIO − Input Offset Voltage − mV VIO VIO VIO − Input Offset Voltage − mV 1 0.5 0 −0.5 −1 −1 0 1 2 3 4 5 VIC − Common-Mode Voltage − V Figure 5. Input Offset Voltage vs Common-Mode Voltage 14 891 Amplifiers From 2 Wafer Lots VDD = ± 5 V TA = 25°C Submit Documentation Feedback VDD = ± 5 V TA = 25°C RS = 50 Ω 0.5 0 −0.5 −1 −6 −5 −4 −3 −2 −1 0 1 2 3 4 5 VIC − Common-Mode Voltage − V Figure 6. Input Offset Voltage vs Common-Mode Voltage Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 20 25 128 Amplifiers From 2 Wafer Lots VDD = ± 2.5 V P Package 25°C to 125°C 15 10 5 0 −5 −4 −3 −2 −1 0 1 2 3 4 128 Amplifiers From 2 Wafer Lots VDD = ± 5 V P Package 25°C to 125°C 20 Percentage of Amplifiers − % Percentage of Amplifiers − % 25 15 10 5 0 −5 −4 5 Figure 7. Distribution of TLC2272 vs Input Offset Voltage Temperature Coefficient −1 0 2 1 3 4 5 25 20 Percentage of Amplifiers − % 128 Amplifiers From 2 Wafer Lots VDD = ± 2.5 V N Package TA = 25°C to 125°C 15 10 5 128 Amplifiers From 2 Wafer Lots VDD = ± 2.5 V N Package TA = 25°C to 125°C 20 15 10 5 0 −4 −3 −2 −1 0 1 2 3 4 5 −5 −4 −3 −2 −1 0 1 2 3 4 5 α VIO − Temperature Coefficient − µV/°C α VIO − Temperature Coefficient − µV/°C Figure 9. Distribution of TLC2274 vs Input Offset Voltage Temperature Coefficient Figure 10. Distribution of TLC2274 vs Input Offset Voltage Temperature Coefficient 12 35 30 TA = 25°C RS = 50 Ω 10 VDD = ± 2.5 V VIC = 0 V VO = 0 V RS = 50 Ω 8 6 25 20 IIB 15 IIO 10 V I − Input Voltage − V Percentage of Amplifiers − % IIB I IO − Input Bias and Input Offset Currents − pA IIB and IIO −2 Figure 8. Distribution of TLC2272 vs Input Offset Voltage Temperature Coefficient 25 0 −5 −3 αV IO − Temperature Coefficient − µV/°C αV IO − Temperature Coefficient − µV/°C 4 2 |VIO| ≤ 5 mV 0 −2 −4 −6 5 −8 − 10 0 25 45 65 85 105 125 TA − Free-Air Temperature − °C Figure 11. Input Bias and Input Offset Current vs Free-Air Temperature Copyright © 1997–2016, Texas Instruments Incorporated 2 3 4 5 6 7 8 |VDD ±| − Supply Voltage − V Figure 12. Input Voltage vs Supply Voltage Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 15 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com 5 6 VDD = 5 V V0H V OH − High-Level Output Voltage − V VDD = 5 V V I − Input Voltage − V 4 3 |VIO| ≤ 5 mV 2 1 0 −1 −75 − 50 5 4 TA = 125°C 3 TA = 25°C 2 TA = − 55°C 1 0 − 25 0 25 50 75 100 125 0 TA − Free-Air Temperature − °C Figure 13. Input Voltage vs Free-Air Temperature 1.4 VOL VOL − Low-Level Output Voltage − V VOL VOL − Low-Level Output Voltage − V VDD = 5 V TA = 25°C 1 VIC = 0 V 0.8 VIC = 1.25 V 0.6 VIC = 2.5 V 0.2 0 1 2 3 4 IOL − Low-Level Output Current − mA 4 VDD = 5 V VIC = 2.5 V 1.2 1 TA = 125°C 0.8 TA = 25°C 0.6 TA = − 55°C 0.4 0.2 5 0 Figure 15. Low-Level Output Voltage vs Low-Level Output Current 5 VDD ± = ± 5 V 4 TA = − 55°C TA = 25°C 3 TA = 125°C 2 1 0 1 2 3 4 5 |IO| − Output Current − mA Figure 17. Maximum Positive Peak Output Voltage vs Output Current Submit Documentation Feedback 5 1 2 3 4 IOL − Low-Level Output Current − mA 6 Figure 16. Low-Level Output Voltage vs Low-Level Output Current V OM − − Maximum Negative Peak Output Voltage − V V OM + − Maximum Positive Peak Output Voltage − V 3 0 0 16 2 Figure 14. High-Level Output Voltage vs High-Level Output Current 1.2 0.4 1 IOH − High-Level Output Current − mA − 3.8 VDD = ± 5 V VIC = 0 V −4 TA = 125°C − 4.2 TA = 25°C − 4.4 TA = − 55°C − 4.6 − 4.8 −5 0 1 2 3 4 5 6 IO − Output Current − mA Figure 18. Maximum Positive Peak Output Voltage vs Output Current Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 10 16 RL = 10 kΩ TA = 25°C 9 IIOS OS − Short-Circuit Output Current − mA V(OPP) V O(PP) − Maximum Peak-to-Peak Output Voltage − V www.ti.com 8 7 6 VDD = 5 V 5 4 VDD = ± 5 V 3 2 1 VID = − 100 mV 12 8 4 0 VID = 100 mV −4 VO = 0 V TA = 25°C −8 0 10 k 100 k 2 10 M 1M f − Frequency − Hz VO − Output Voltage − V IIOS OS − Short-Circuit Output Current − mA 4 7 −3 −1 −5 3 2 0 − 800 125 VDD = ± 5 V TA = 25°C RL = 10 kΩ VIC = 0 V 1 −1 800 −400 0 400 VID − Differential Input Voltage − µV 1200 Figure 22. Output Voltage vs Differential Input Voltage 1000 VO = ± 1 V TA = 25°C AVD AVD− Large-Signal Differential Voltage Amplification − dB −25 0 25 50 75 100 TA − Free-Air Temperature − °C Figure 21. Short-Circuit Output Current vs Free-Air Temperature VO − Output Voltage − V 8 1 VID = 100 mV 3 7 VDD = 5 V TA = 25°C RL = 10 kΩ VIC = 2.5 V VID = − 100 mV 5 6 5 11 −50 5 Figure 20. Short-Circuit Output Current vs Supply Voltage VO = 0 V VDD = ± 5 V − 75 4 |VDD ±| − Supply Voltage − V Figure 19. Maximum Peak-to-Peak Output Voltage vs Frequency 15 3 100 VDD = ± 5 V 10 VDD = 5 V 1 −3 −5 0 250 500 750 1000 −1000 − 750 − 500 − 250 VID − Differential Input Voltage − µV Figure 23. Output Voltage vs Differential Input Voltage Copyright © 1997–2016, Texas Instruments Incorporated 0.1 0.1 1 10 RL − Load Resistance − kΩ 100 Figure 24. Large-Signal Differential Voltage Amplification vs Load Resistance Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 17 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com 80 135° 60 40 90° 20 45° 0 0° −20 −45° −40 1k 10 k 100 k 1M −90° 10 M 90° 20 45° 0° 0 −20 −45° −40 1k 10 k AVD AVD− Large-Signal Differential Voltage Amplification − V/mV AVD AVD− Large-Signal Differential Voltage Amplification − V/mV 1k VDD = 5 V VIC = 2.5 V VO = 1 V to 4 V RL = 1 MΩ 100 RL = 10 kΩ 10 − 75 −50 − 25 0 25 50 75 100 TA − Free-Air Temperature − °C VDD = ± 5 V VIC = 0 V VO = ± 4 V RL = 1 MΩ 100 RL = 10 kΩ 10 − 75 125 Figure 27. Large-Signal Differential Voltage Amplification vs Free-Air Temperature 125 VDD = ± 5 V TA = 25°C zo O zo − Output Impedance − Ω zo O zo − Output Impedance − Ω − 25 0 25 50 75 100 TA − Free-Air Temperature − °C 1000 VDD = 5 V TA = 25°C 18 −50 Figure 28. Large-Signal Differential Voltage Amplification vs Free-Air Temperature 1000 100 AV = 100 10 AV = 10 0.1 100 −90° 10 M 100 k 1M f − Frequency − Hz Figure 26. Large-Signal Differential Voltage Amplification and Phase Margin vs Frequency 1k 1 135° 40 f − Frequency − Hz Figure 25. Large-Signal Differential Voltage Amplification and Phase Margin vs Frequency 180° VDD = ± 5 V RL = 10 kΩ CL = 100 pF TA = 25°C φ om m − Phase Margin AVD AVD− Large-Signal Differential Voltage Amplification − dB 60 180° AVD AVD− Large-Signal Differential Voltage Amplification − dB VDD = 5 V RL = 10 kΩ CL = 100 pF TA = 25°C φ om m − Phase Margin 80 AV = 1 100 AV = 100 10 AV = 10 1 AV = 1 1k 10 k 100 k 1M 0.1 100 1k 10 k 100 k 1M f − Frequency − Hz f − Frequency − Hz Figure 29. Output Impedance vs Frequency Figure 30. Output Impedance vs Frequency Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 90 TA = 25°C CMRR − Common-Mode Rejection Ratio − dB CMRR − Common-Mode Rejection Ratio − dB 100 VDD = ± 5 V 80 VDD = 5 V 60 40 20 100 1k 10 k 100 k 1M 82 VDD = ± 5 V VIC = − 5 V to 2.7 V 78 VDD = 5 V 74 VIC = 0 V to 2.7 V 70 −75 0 10 86 10 M −50 Figure 31. Common-Mode Rejection Ratio vs Frequency kSVR k SVR − Supply-Voltage Rejection Ratio − dB kSVR k SVR − Supply-Voltage Rejection Ratio − dB 50 75 100 125 80 60 kSVR+ 40 kSVR − 20 0 100 1k 10 k 100 k 1M VDD = ± 5 V TA = 25°C 80 60 kSVR+ 40 kSVR − 20 0 −20 10 10 M 100 f − Frequency − Hz 1k 10 k 100 k 1M 10 M f − Frequency − Hz Figure 33. Supply-Voltage Rejection Ratio vs Frequency Figure 34. Supply-Voltage Rejection Ratio vs Frequency 110 3 VDD ± = ± 2.2 V to ± 8 V VO = 0 V VO = 0 V No Load 105 2.4 IIDD DD − Supply Current − mA kSVR k SVR − Supply Voltage Rejection Ratio − dB 25 100 VDD = 5 V TA = 25°C 100 95 1.8 TA = 25°C TA = − 55°C 1.2 TA = 125°C 0.6 90 85 − 75 0 Figure 32. Common-Mode Rejection Ratio vs Free-Air Temperature 100 −20 10 −25 TA − Free-Air Temperature − °C f − Frequency − Hz 0 − 50 −25 0 25 50 75 100 125 TA − Free-Air Temperature − °C Figure 35. Supply-Voltage Rejection Ratio vs Free-Air Temperature Copyright © 1997–2016, Texas Instruments Incorporated 0 1 2 3 4 5 6 |VDD ± | − Supply Voltage − V 7 8 Figure 36. TLC2272 Supply Current vs Supply Voltage Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 19 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com 3 6 VO = 0 V No Load VDD = ± 5 V VO = 0 V 2.4 3.6 IIDD DD − Supply Current − mA IIDD DD − Supply Current − mA 4.8 TA = 25°C TA = − 55°C 2.4 TA = 125°C 1.2 0 VDD = 5 V VO = 2.5 V 1.8 1.2 0.6 0 1 2 3 4 5 6 7 0 −75 8 − 50 −25 0 25 50 75 125 TA − Free-Air Temperature − °C Figure 37. TLC2274 Supply Current vs Supply Voltage Figure 38. TLC2272 Supply Current vs Free-Air Temperature 6 5 VDD = 5 V AV = − 1 TA = 25°C VDD = ± 5 V VO = 0 V 4 SR − Slew Rate − V/ µs IIDD DD − Supply Current − mA 4.8 VDD = 5 V VO = 2.5 V 3.6 2.4 0 − 75 SR − 3 2 SR + 1 1.2 − 50 − 25 0 25 50 75 100 0 10 125 100 1k CL − Load Capacitance − pF TA − Free-Air Temperature − °C 5 5 VDD = 5 V RL = 10 kΩ CL = 100 pF TA = 25°C AV = − 1 SR − 4 VO − Output Voltage − mV VO SR − Slew Rate − V/ µs 4 SR + 3 2 VDD = 5 V RL = 10 kΩ CL = 100 pF AV = 1 1 0 − 75 10 k Figure 40. Slew Rate vs Load Capacitance Figure 39. TLC2274 Supply Current vs Free-Air Temperature 20 100 |VDD ± | − Supply Voltage − V 3 2 1 0 −50 −25 0 25 50 75 100 125 0 1 2 3 4 5 6 7 8 9 TA − Free-Air Temperature − °C t − Time − µs Figure 41. Slew Rate vs Free-Air Temperature Figure 42. Inverting Large-Signal Pulse Response Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 5 3 2 4 VO − Output Voltage − V VO 4 V VO O − Output Voltage − V 5 VDD = ± 5 V RL = 10 kΩ CL = 100 pF TA = 25°C AV = − 1 1 0 −1 −2 VDD = 5 V RL = 10 kΩ CL = 100 pF AV = 1 TA = 25°C 3 2 1 −3 −4 −5 0 0 1 2 3 4 5 6 7 8 9 0 1 2 3 t − Time − µs Figure 43. Inverting Large-Signal Pulse Response 5 5 6 7 8 9 2 VDD = 5 V RL = 10 kΩ CL = 100 pF TA = 25°C AV = −1 2.6 VO − Output Voltage − V VO 3 Figure 44. Voltage-Follower Large-Signal Pulse Response 2.65 VDD = ± 5 V RL = 10 kΩ CL = 100 pF TA = 25°C AV = 1 4 VO − Output Voltage − V VO 4 t − Time − µs 1 0 −1 −2 −3 2.55 2.5 2.45 −4 −5 2.4 0 1 2 3 4 5 6 7 8 9 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 t − Time − µs t − Time − µs Figure 45. Voltage-Follower Large-Signal Pulse Response Figure 46. Inverting Small-Signal Pulse Response 2.65 VDD = ± 5 V RL = 10 kΩ CL = 100 pF TA = 25°C AV = 1 50 2.6 VO − Output Voltage − V VO VO − Output Voltage − mV VO 100 0 −50 VDD = 5 V RL = 10 kΩ CL = 100 pF TA = 25°C AV = 1 2.55 2.5 2.45 2.4 −100 0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.5 1 1.5 t − Time − µs t − Time − µs Figure 47. Inverting Small-Signal Pulse Response Figure 48. Voltage-Follower Small-Signal Pulse Response Copyright © 1997–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 21 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 VDD = ± 5 V RL = 10 kΩ CL = 100 pF TA = 25°C AV = 1 50 Vn nV HzHz Vn − Equivalent Input Noise Voltage − nV/ VO − Output Voltage − mV VO 100 www.ti.com 0 −50 VDD = 5 V TA = 25°C RS = 20 Ω 40 30 20 10 0 −100 100 1k f − Frequency − Hz Figure 49. Voltage-Follower Small-Signal Pulse Response Figure 50. Equivalent Input Noise Voltage vs Frequency 1 1.5 60 1000 VDD = ± 5 V TA = 25°C RS = 20 Ω 500 40 30 20 250 0 −250 −500 10 −750 0 10 −1000 10 k 100 1k f − Frequency − Hz 10 1 0.1 100 1k 6 8 10 Figure 52. Noise Voltage Over a 10 Second Period THD + N − Total Harmonic Distortion Plus Noise − % Calculated Using Ideal Pass-Band Filter Lower Frequency = 1 Hz TA= 25°C 10 4 t − Time − s 100 1 2 0 Figure 51. Equivalent Input Noise Voltage vs Frequency µ V RMS Integrated Noise Voltage − uVRMS VDD = 5 V f = 0.1 Hz to 10 Hz TA = 25°C 750 Noise Voltage − nV Vn nV HzHz Vn − Equivalent Input Noise Voltage − nV/ 0.5 10 10 k t − Time − µs 0 22 60 10 k 100 k 1 VDD = 5 V TA = 25°C RL = 10 kΩ 0.1 AV = 100 0.01 AV = 10 0.001 0.0001 100 AV = 1 1k 10 k 100 k f − Frequency − Hz f − Frequency − Hz Figure 53. Integrated Noise Voltage vs Frequency Figure 54. Total Harmonic Distortion + Noise vs Frequency Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 3 f = 10 kHz RL = 10 kΩ CL = 100 pF TA = 25°C 2.4 VDD = 5 V f = 10 kHz RL = 10 kΩ CL = 100 pF 2.8 Gain-Bandwidth Product − MHz Gain-Bandwidth Product − MHz 2.5 2.3 2.2 2.1 2.6 2.4 2.2 2 1.8 1.6 1.4 2 0 1 6 2 3 4 5 |VDD ±| − Supply Voltage − V 7 8 Figure 55. Gain-Bandwidth Product vs Supply Voltage 75° −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 Figure 56. Gain-Bandwidth Product vs Free-Air Temperature 15 VDD = ± 5 V TA = 25°C Rnull = 100 Ω 60° 12 Rnull = 50 Ω Gain Margin − dB φ m − Phase Margin om − 75 45° Rnull = 20 Ω 30° VDD = 5 V AV = 1 RL = 10 kΩ TA = 25°C 9 6 10 kΩ 15° 10 kΩ 0° 10 3 VDD + Rnull VI Rnull = 0 CL VDD − Rnull = 10 Ω 100 1000 CL − Load Capacitance − pF 10000 Figure 57. Phase Margin vs Load Capacitance Copyright © 1997–2016, Texas Instruments Incorporated 0 10 100 1000 CL − Load Capacitance − pF 10000 Figure 58. Gain Margin vs Load Capacitance Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 23 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com 7 Detailed Description 7.1 Overview The TLC227x and TLC227xA families of devices are rail-to-rail output operational amplifiers. These devices operate from 4.4-V to 16-V single supply and ±2.2-V ±8-V dual supply, are unity-gain stable, and are suitable for a wide range of general-purpose applications. 7.2 Functional Block Diagram VDD + Q3 Q6 Q9 Q12 Q14 Q16 IN + OUT C1 IN − R5 Q1 Q4 Q13 Q15 Q17 D1 Q2 Q5 R3 R4 Q7 Q8 Q10 Q11 R1 R2 VDD− Table 2. Device Component Count (1) (1) Component TLC2272 TLC2274 Transistors 38 76 Resistors 26 52 Diodes 9 18 Capacitors 3 6 Includes both amplifiers and all ESD, bias, and trim circuitry. 7.3 Feature Description The TLC227x and TLC227xA family of devices feature 2-MHz bandwidth and voltage noise of 9 nV/√Hz with performance rated from 4.4 V to 16 V across an automotive temperature range (–40°C to 125°C). LinMOS suits a wide range of audio, automotive, industrial, and instrumentation applications. 7.4 Device Functional Modes The TLC227x and TLC227xA families of devices is powered on when the supply is connected. The devices may operate with single or dual supply, depending on the application. The devices are in its full performance once the supply is above the recommended value. 24 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information 8.1.1 Macromodel Information Macromodel information provided was derived using MicroSim Parts™, the model generation software used with MicroSim PSpice™. The Boyle macromodel (1) and subcircuit in Figure 59 were generated using the TLC227x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): • Maximum positive output voltage swing • Maximum negative output voltage swing • Slew rate • Quiescent power dissipation • Input bias current • Open-loop voltage amplification • Unity gain frequency • Common-mode rejection ratio • Phase margin • DC output resistance • AC output resistance • Short-circuit output current limit 99 DIN 3 EGND + VCC + 9 RSS 10 VC IN − J1 DP J2 11 VAD VCC − DC 12 − − − + VIN 7 + GCM GA VLIM − RD2 60 + − + DIP C2 6 8 C1 RD1 R2 − 53 IN + HLIM − + 91 + VIP 90 RO2 VB RP 2 1 92 FB − + ISS RO1 DE 54 4 − 5 + VE .SUBCKT TLC227x 1 2 3 4 5 C1 11 1214E−12 C2 6 760.00E−12 DC 5 53DX DE 54 5DX DLP 90 91DX DLN 92 90DX DP 4 3DX EGND 99 0POLY (2) (3,0) (4,) 0 .5 .5 FB 99 0POLY (5) VB VC VE VLP VLN 0 + 984.9E3 −1E6 1E6 1E6 −1E6 GA 6 011 12 377.0E−6 GCM 0 6 10 99 134E−9 ISS 3 10DC 216.OE−6 HLIM 90 0VLIM 1K J1 11 210 JX J2 12 110 JX R2 6 9100.OE3 OUT RD1 60 112.653E3 RD2 60 122.653E3 R01 8 550 R02 7 9950 RP 3 44.310E3 RSS 10 99925.9E3 VAD 60 4−.5 VB 9 0DC 0 VC 3 53 DC .78 VE 54 4DC .78 VLIM 7 8DC 0 VLP 91 0DC 1.9 VLN 0 92DC 9.4 .MODEL DX D (IS=800.0E−18) .MODEL JX PJF (IS=1.500E−12BETA=1.316E-3 + VTO=−.270) .ENDS Figure 59. Boyle Macromodel and Subcircuit (1) Macromodeling of Integrated Circuit Operational Amplifiers, IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). Copyright © 1997–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 25 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com 8.2 Typical Application 8.2.1 High-Side Current Monitor VBAT V1 ILOUD V2 RS 0.1 µF R1 R ILOAD VOUT + _ R2 47 kΩ Rg Figure 60. Equivalent Schematic (Each Amplifier) 8.2.1.1 Design Requirements For this design example, use the parameters listed in Table 3 as the input parameters. Table 3. Design Parameters PARAMETER VALUE VBAT Battery Voltage 12 V RSENSE Sense Resistor ILOAD Load Current 0.1 Ω 0 A to 10 A Operational Amplifier Set in Differential configuration with Gain = 10 8.2.1.2 Detailed Design Procedure This circuit is designed for measuring the high-side current in automotive body control modules with 12-V battery or similar applications. The operational amplifier is set as differential with an external resistor network. 8.2.1.2.1 Differential Amplifier Equations Equation 1 and Equation 2 are used to calculate VOUT. VOUT VOUT æ R R 1æ R R ç 1+ ç 1 + - 1 ç 2 è R2 Rg Rg ç Rg R2 V1 + V2 = ´ + ç R R R ç 2 1+ 1 1+ 1 çç R2 R2 è æ R R 1æ R R ç 1+ ç 1 + - 1 2 çè R2 Rg Rg ç Rg R2 = ´ VBAT + ç R1 R R ç 1+ 1+ 1 çç R2 R2 è ö ö ÷ ÷ ÷ ø (V - V ) ÷ 1 2 ÷ ÷ ÷÷ ø (1) ö ö ÷ ÷ ÷ ÷ ø ´R ´I S Load ÷ ÷ ÷÷ ø (2) In an ideal case R1 = R and R2 = Rg, and VOUT can then be calculated using Equation 3: Rg VOUT = ´ RS ´ ILoad R 26 Submit Documentation Feedback (3) Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 However, as the resistors have tolerances, they cannot be perfectly matched. R1 = R ± ΔR1 R2 = R2 ± ΔR2 R = R ± ΔR Rg = Rg ± ΔRg DR Tol = R (4) By developing the equations and neglecting the second order, the worst case is when the tolerances add up. This is shown by Equation 5. æ æ Rg 2R ö ö Rg VOUT = ± (4 Tol) ´ VBAT + ç 1 ± 2 Tol ç 1 + ÷÷ ´ RS ´ ILOAD ç ÷÷ ç R + Rg è R + Rg ø ø R è where • • Tol = 0.01 for 1% Tol = 0.001 for 0.1% (5) If the resistors are perfectly matched, then Tol = 0 and VOUT is calculated using Equation 6. Rg VOUT = ´ RS ´ ILOAD R (6) The highest error is from the Common mode, as shown in Equation 7. Rg 4 (Tol) ´ VBAT R + Rg (7) Gain of 10, Rg / R = 10, and Tol = 1%: Common mode error = ((4 × 0.01) / 1.1) × 12 V = 0.436 V Gain of 10 and Tol = 0.1%: Common mode error = 43.6 mV The resistors were chosen from 2% batches. R1 and R 12 kΩ R2 and Rg 120 kΩ Ideal Gain = 120 / 12 = 10 The measured value of the resistors: R1 = 11.835 kΩ R = 11.85 kΩ R2 = 117.92 kΩ Rg = 118.07 kΩ Copyright © 1997–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 27 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com 1.2 12 1 10 Output Voltage (V) Output Voltage (V) 8.2.1.3 Application Curves 0.8 0.6 0.4 0.2 8 6 4 2 Measured Ideal Measured Ideal 0 0 0 0.2 0.4 0.6 0.8 Load Current (A) 1 Figure 61. Output Voltage Measured vs Ideal (0 to 1 A) 1.2 D001 0 2 4 6 8 Load Current (A) 10 12 D001 Figure 62. Output Voltage Measured vs Ideal (0 to 10 A) 9 Power Supply Recommendations Supply voltage for a single supply is from 4.4 V to 16 V, and from ±2.2 V to ±8 V for dual supply. In the high-side sensing application, the supply is connected to a 12-V battery. 28 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM www.ti.com SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 10 Layout 10.1 Layout Guidelines The TLC227x and TLC227xA families of devices are wideband amplifiers. To realize the full operational performance of the devices, good high-frequency printed-circuit-board (PCB) layout practices are required. Lowloss 0.1-μF bypass capacitors must be connected between each supply pin and ground as close to the device as possible. The bypass capacitor traces should be designed for minimum inductance. 10.2 Layout Example Figure 63. Layout Example Copyright © 1997–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM 29 TLC2272, TLC2272A, TLC2272M, TLC2272AM TLC2274, TLC2274A, TLC2274M, TLC2274AM SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016 www.ti.com 11 Device and Documentation Support 11.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 4. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TLC2272 Click here Click here Click here Click here Click here TLC2272A Click here Click here Click here Click here Click here TLC2272M Click here Click here Click here Click here Click here TLC2272AM Click here Click here Click here Click here Click here TLC2274 Click here Click here Click here Click here Click here TLC2274A Click here Click here Click here Click here Click here TLC2274M Click here Click here Click here Click here Click here TLC2274AM Click here Click here Click here Click here Click here 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.3 Trademarks E2E is a trademark of Texas Instruments. MicroSim Parts, PSpice are trademarks of MicroSim. All other trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 30 Submit Documentation Feedback Copyright © 1997–2016, Texas Instruments Incorporated Product Folder Links: TLC2272 TLC2272A TLC2272M TLC2272AM TLC2274 TLC2274A TLC2274M TLC2274AM PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TLC2272ACD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AC Samples TLC2272ACDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AC Samples TLC2272ACDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AC Samples TLC2272ACDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AC Samples TLC2272ACP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type TLC2272AC Samples TLC2272ACPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM P2272A Samples TLC2272ACPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM P2272A Samples TLC2272AID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AI Samples TLC2272AIDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AI Samples TLC2272AIDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AI Samples TLC2272AIDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AI Samples TLC2272AIP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type TLC2272AI Samples TLC2272AMD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AM Samples TLC2272AMDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AM Samples TLC2272AMDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AM Samples TLC2272AMDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272AM Samples TLC2272AQD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM C2272A Samples TLC2272AQDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM C2272A Samples TLC2272AQDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM C2272A Samples TLC2272AQDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM C2272A Samples Addendum-Page 1 -55 to 125 -55 to 125 -40 to 125 -40 to 125 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TLC2272CD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2272C Samples TLC2272CDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2272C Samples TLC2272CDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2272C Samples TLC2272CP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TLC2272CP Samples TLC2272CPS ACTIVE SO PS 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2272 Samples TLC2272CPSR ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2272 Samples TLC2272CPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2272 Samples TLC2272CPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2272 Samples TLC2272ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272I Samples TLC2272IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272I Samples TLC2272IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type TLC2272IP Samples TLC2272IPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM Y2272 Samples TLC2272IPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM Y2272 Samples TLC2272IPWRG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM Y2272 Samples TLC2272MD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272M Samples TLC2272MDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272M Samples TLC2272MDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2272M Samples TLC2272QPWRG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM T2272Q Samples TLC2274ACD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2274AC Samples TLC2274ACDG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2274AC Samples TLC2274ACDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2274AC Samples Addendum-Page 2 -55 to 125 -55 to 125 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TLC2274ACDRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 2274AC Samples TLC2274ACN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TLC2274ACN Samples TLC2274ACPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2274A Samples TLC2274ACPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2274A Samples TLC2274ACPWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 P2274A Samples TLC2274AID ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2274AI Samples TLC2274AIDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2274AI Samples TLC2274AIN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 TLC2274AIN Samples TLC2274AIPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Y2274A Samples TLC2274AIPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Y2274A Samples TLC2274AIPWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 Y2274A Samples TLC2274AMD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 2274AM Samples TLC2274AMDG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 2274AM Samples TLC2274AMDRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 2274AM Samples TLC2274AQD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TLC2274A Samples TLC2274AQDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TLC2274A Samples TLC2274AQDRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM PJ2274A Samples TLC2274CD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2274C Samples TLC2274CDG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2274C Samples TLC2274CDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2274C Samples TLC2274CN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type TLC2274CN Samples Addendum-Page 3 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TLC2274CNE4 ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type TLC2274CN Samples TLC2274CNS ACTIVE SO NS 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2274 Samples TLC2274CNSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2274 Samples TLC2274CPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM P2274 Samples TLC2274CPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM P2274 Samples TLC2274ID ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2274I Samples TLC2274IDG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2274I Samples TLC2274IDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2274I Samples TLC2274IN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type TLC2274IN Samples TLC2274IPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM Y2274 Samples TLC2274IPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM Y2274 Samples TLC2274IPWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM Y2274 Samples TLC2274MD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2274M Samples TLC2274MDG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM PJ2274M Samples TLC2274MDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM TLC2274M Samples TLC2274MDRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM PJ2274M Samples TLC2274MN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -55 to 125 TLC2274MN Samples TLC2274QD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TLC2274 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. Addendum-Page 4 -55 to 125 -55 to 125 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
TLC2274IDG4 价格&库存

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