TLC59025
TLC59025
SLVS934C – JUNE 2009 – REVISED FEBRUARY
2021
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
www.ti.com
TLC59025 Low-Power 16-Channel Constant-Current LED Sink Driver
1 Features
3 Description
•
•
The TLC59025 device is designed for LED displays
and LED lighting applications. The TLC59025
contains a 16-bit shift register and data latches, which
convert serial input data into parallel output format. At
the TLC59025 output stage, 16 regulated-current
ports provide uniform and constant current for driving
LEDs within a wide range of VF variations. Used in
system design for LED display applications (for
example, LED panels), the TLC59025 provides great
flexibility and device performance. Users can adjust
the output current from 3 mA to 45 mA through an
external resistor, Rext, which gives flexibility in
controlling the light intensity of LEDs. TLC59025 is
designed for up to 17 V at the output port. The high
clock frequency, 30 MHz, also satisfies the system
requirements of high-volume data transmission.
•
•
•
•
•
•
•
•
•
•
16 constant current output channels
Matches industry standard IOUT to external
resistor ratio
Constant output current invariant to load voltage
change
Output current accuracy:
– Between channels: < ±5% (maximum)
– Between ICs: < ±6% (maximum)
Constant output current range:
3 mA to 45 mA
Output current adjusted by external resistor
Fast response of output current, OE (minimum):
100 ns
30-MHz clock frequency
Schmitt-trigger inputs
3.0-V to 5.5-V supply voltage
Thermal shutdown for overtemperature protection
ESD performance: 1-kV HBM
2 Applications
•
•
•
•
•
Gaming machine / entertainment
General LED applications
LED display systems
Signs LED lighting
White goods
The serial data is transferred into TLC59025 through
SDI, shifted in the shift register, and transferred out
through SDO. LE can latch the serial data in the shift
register to the output latch. OE enables the output
drivers to sink current.
Device Information (1)
PART NUMBER
TLC59025
(1)
PACKAGE
BODY SIZE (NOM)
SSOP (24)
8.65 mm × 3.90 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
IOUT – mA
40
30
20
10
0
0
500
1000
1500
2000
2500
3000
3500
4000
Rext – P
W
Typical Application Diagram
IOUT vs REXT
An©IMPORTANT
NOTICEIncorporated
at the end of this data sheet addresses availability, warranty, changes, use in
safety-critical
applications,
Copyright
2021 Texas Instruments
Submit
Document
Feedback
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Product Folder Links: TLC59025
1
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics for 3-V Input Voltage...........5
6.6 Electrical Characteristics for 5.5-V Input Voltage........6
6.7 Power Dissipation Ratings.......................................... 6
6.8 Timing Requirements.................................................. 7
6.9 Switching Characteristics for 3-V Input Voltage.......... 8
6.10 Switching Characteristics for 5.5-V Input Voltage..... 9
6.11 Typical Characteristics............................................ 10
7 Parameter Measurement Information.......................... 11
8 Detailed Description......................................................13
8.1 Overview................................................................... 13
8.2 Functional Block Diagram......................................... 13
8.3 Feature Description...................................................13
8.4 Device Functional Modes..........................................13
9 Application and Implementation.................................. 14
9.1 Application Information............................................. 14
9.2 Typical Application.................................................... 15
10 Power Supply Recommendations..............................16
11 Layout........................................................................... 16
11.1 Layout Guidelines................................................... 16
11.2 Layout Example...................................................... 16
12 Device and Documentation Support..........................17
12.1 Support Resources................................................. 17
12.2 Trademarks............................................................. 17
12.3 Electrostatic Discharge Caution..............................17
12.4 Glossary..................................................................17
13 Mechanical, Packaging, and Orderable
Information.................................................................... 17
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (February 2015) to Revision C (February 2021)
Page
• Updated the numbering format for tables, figures and cross-references throughout the document ..................1
• Updated "TJ" to "TA" in Electrical Characteristics for 3-V Input Voltage table.....................................................5
• Updated "TJ" to "TA" in Electrical Characteristics for 5.5-V Input Voltage table..................................................6
• Added note to Constant Current section...........................................................................................................13
Changes from Revision A (March 2013) to Revision B (February 2015)
Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section................................................................................................................................................................ 1
• Deleted the Ordering Information table ..............................................................................................................1
2
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
5 Pin Configuration and Functions
Figure 5-1. DBQ Package 24-Pin SSOP Top View
Table 5-1. Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
CLK
3
I
Clock input for data shift on rising edge
GND
1
—
Ground for control logic and current sink
LE
4
I
Data strobe input
Serial data is transferred to the respective latch when LE is high.
The data is latched when LE goes low.
LE has an internal pulldown resistor.
OE
21
I
Output enable
When OE is active (low), the output drivers are enabled.
When OE is high, all output drivers are turned OFF (blanked).
OE has an internal pullup resistor.
OUT0
5
O
Constant-current output
OUT1
6
O
Constant-current output
OUT2
7
O
Constant-current output
OUT3
8
O
Constant-current output
OUT4
9
O
Constant-current output
OUT5
10
O
Constant-current output
OUT6
11
O
Constant-current output
OUT7
12
O
Constant-current output
OUT8
13
O
Constant-current output
OUT9
14
O
Constant-current output
OUT10
15
O
Constant-current output
OUT11
16
O
Constant-current output
OUT12
17
O
Constant-current output
OUT13
18
O
Constant-current output
OUT14
19
O
Constant-current output
OUT15
20
O
Constant-current output
R-EXT
23
I
Input used to connect an external resistor (Rext) for setting output currents
SDI
2
I
Serial-data input to the Shift register
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
3
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
Table 5-1. Pin Functions (continued)
PIN
NAME
I/O
NO.
DESCRIPTION
SDO
22
O
Serial-data output to the following SDI of next driver IC or to the microcontroller
VDD
24
—
Supply voltage
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VDD
Supply voltage
MIN
MAX
UNIT
0
7
V
VI
Input voltage
–0.4
VDD + 0.4
V
VO
Output voltage
–0.5
20
V
IOUT
Output current
45
mA
IGND
GND terminal current
750
mA
TJ
Operating virtual-junction temperature
–40
150
°C
Tstg
Storage temperature
–55
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
±1000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
V
±500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as
±1000 V may actually have higher performance.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as ±500
V may actually have higher performance.
6.3 Recommended Operating Conditions
Over operating free-air temperature range (unless otherwise noted)
4
VDD
Supply voltage
VO
Output voltage
VIH
Input voltage
VIL
Output voltage
IOUT
Output current
IOH
High-level output current, source
IOL
Low-level output current, sink
TA
Operating free-air temperature
VO ≥ 0.6 V
MIN
MAX
3
5.5
V
17
V
0.7 × VDD
VDD + 0.4
V
GND
0.3 × VDD
V
3
VO ≥ 1.0 V
mA
45
mA
–1
mA
1
mA
–40
Submit Document Feedback
UNIT
125
°C
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
6.4 Thermal Information
TLC59025
THERMAL METRIC
(1)
UNIT
DBQ (SSOP)
24 PINS
RθJA
(1)
Junction-to-ambient thermal resistance
Mounted on JEDEC 1-layer board (JESD 51-3), No airflow
99.8
°C/W
Mounted on JEDEC 4-layer board (JESD 51-7), No airflow
61
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics for 3-V Input Voltage
VDD = 3 V, TA = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Ileak
Output leakage current
VOH = 17 V
VOH
High-level output voltage
SDO, IOL = –1 mA
VOL
Low-level output voltage
SDO, IOH = 1 mA
IO(1)
IO(2)
IOUT vs
VOUT
TA = 25°C
0.5
TA = 125°C
2
VDD – 0.4
13
Output current error, die-die
±3%
±6%
Output current error, channel-tochannel
IOL = 13 mA, VO = 0.6 V, Rext = 1440 Ω,
TA = 25°C
±1.5%
±5%
VO = 0.8 V, Rext = 720 Ω
Output current error, die-die
IOL = 26 mA, VO = 0.8 V, Rext = 720 Ω,
TA = 25°C
±3%
±6%
Output current error, channel-tochannel
IOL = 26 mA, VO = 0.8 V, Rext = 720 Ω,
TA = 25°C
±1.5%
±5%
Output current vs
output voltage regulation
VO = 1 V to 3 V, IO = 13 mA
VDD = 3.0 V to 5.5 V, IO = 13 mA to 45 mA
Pullup resistance
OE
Pulldown resistance
LE
Restart temperature hysteresis
Supply current
Input capacitance
26
±0.1
%/V
±1
kΩ
500
175
kΩ
200
15
7
°C
°C
10
Rext = 1440 Ω
9
12
Rext = 720 Ω
11
13
VI = VDD or GND, CLK, SDI, SDO, OE
V
mA
500
Rext = Open
μA
mA
Output current 2
150
UNIT
V
0.4
VOUT = 0.6 V, Rext = 1440 Ω
Thys
(1)
MAX
IOL = 13 mA, VO = 0.6 V, Rext = 1440 Ω,
TA = 25°C
Overtemperature shutdown (1)
CIN
TYP
Output current 1
Tsd
IDD
MIN
10
mA
pF
Specified by design
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
5
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
6.6 Electrical Characteristics for 5.5-V Input Voltage
VDD = 5.5 V, TA = –40°C to 125°C (unless otherwise noted)
PARAMETER
Ileak
TEST CONDITIONS
Output leakage current
VOH = 17 V
VOH
High-level output voltage
SDO, IOL = –1 mA
VOL
Low-level output voltage
SDO, IOH = 1 mA
IO(1)
IO(2)
IOUT vs
VOUT
MIN
TA = 25°C
MAX
0.5
TA = 125°C
2
VDD – 0.4
VOUT = 0.6 V, Rext = 1440 Ω
Output current error, die-die
IOL = 13 mA, VO = 0.6 V, Rext = 1440 Ω,
TA = 25°C
±3%
±6%
Output current error, channel-tochannel
IOL = 13 mA, VO = 0.6 V, Rext = 1440 Ω,
TA = 25°C
±1.5%
±5%
Output current 2
VO = 0.8 V, Rext = 720 Ω
Output current error, die-die
IOL = 26 mA, VO = 0.8 V, Rext = 720 Ω,
TA = 25°C
±3%
±6%
Output current error, channel-tochannel
IOL = 26 mA, VO = 0.8 V, Rext = 720 Ω,
TA = 25°C
±1.5%
±5%
Output current vs
output voltage regulation
VO = 1 V to 3 V , IO = 26 mA
VDD = 3.0 V to 5.5 V, IO = 13 mA to 45 mA
Pullup resistance
OE
Pulldown resistance
LE
Overtemperature shutdown (1)
Thys
Restart temperature hysteresis
13
IDD
Supply current
CIN
Input capacitance
%/V
±1
500
kΩ
500
175
kΩ
200
15
°C
°C
9
11
Rext = 1440 Ω
12
14
Rext = 720 Ω
14
16
VI = VDD or GND, CLK, SDI, SDO, OE
V
mA
±0.1
Rext = Open
μA
mA
26
150
UNIT
V
0.4
Output current 1
Tsd
(1)
TYP
10
mA
pF
Specified by design
6.7 Power Dissipation Ratings
MIN
PD
6
Power dissipation
Mounted on JEDEC 4-layer board (JESD 51-7),
No airflow, TA = 25°C, TJ = 125°C
Submit Document Feedback
DBQ package
MAX
1.6
UNIT
W
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
6.8 Timing Requirements
VDD = 3 V to 5.5 V (unless otherwise noted)
MIN
MAX
UNIT
tw(L)
LE pulse duration
15
ns
tw(CLK)
CLK pulse duration
15
ns
tw(OE)
OE pulse duration
300
ns
tsu(D)
Setup time for SDI
3
ns
th(D)
Hold time for SDI
2
ns
tsu(L)
Setup time for LE
5
ns
th(L)
Hold time for LE
fCLK
Clock frequency
5
ns
Cascade operation
0
1
2
3
4
5
6
7
8
30
MHz
9 10 11 12 13 14 15
CLK
OE
1
LE
0
SDI
off
OUT0
on
off
OUT1
on
off
OUT2
on
off
OUT3
on
off
OUT15
on
SDO
Don't care
Figure 6-1. Timing Diagram
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
7
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
6.9 Switching Characteristics for 3-V Input Voltage
VDD = 3 V, TA = –40°C to 125°C (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
tPLH1
Low-to-high propagation delay time, CLK to OUTn
30
45
60
ns
tPLH2
Low-to-high propagation delay time, LE to OUTn
30
45
60
ns
tPLH3
Low-to-high propagation delay time, OE to OUTn
30
45
60
ns
tPLH4
Low-to-high propagation delay time, CLK to SDO
30
40
ns
tPHL1
High-to-low propagation delay time, CLK to OUTn
40
65
100
ns
tPHL2
High-to-low propagation delay time, LE to OUTn
40
65
100
ns
tPHL3
High-to-low propagation delay time, OE to OUTn
40
65
100
ns
tPHL4
High-to-low propagation delay time, CLK to SDO
30
40
ns
tw(CLK)
Pulse duration, CLK
tw(L)
Pulse duration LE
tw(OE)
Pulse duration, OE
th(D)
tsu(D)
VIH = VDD, VIL = GND,
Rext = 720 Ω, VL = 4 V,
RL = 88 Ω, CL = 10 pF
15
ns
15
ns
300
ns
Hold time, SDI
2
ns
Setup time, SDI
3
ns
th(L)
Hold time, LE
5
ns
tsu(L)
Setup time, LE
5
ns
tr
Rise time, CLK (1)
500
ns
tf
Fall time, CLK (1)
500
ns
tor
Rise time, outputs (off)
35
50
70
ns
tof
Rise time, outputs (on)
15
50
120
ns
fCLK
Clock frequency
30
MHz
(1)
8
TEST CONDITIONS
Cascade operation
If the devices are connected in cascade and tr or tf is large, it may be critical to achieve the timing required for data transfer between
two cascaded devices.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
6.10 Switching Characteristics for 5.5-V Input Voltage
VDD = 5.5 V, TA = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPLH1
Low-to-high propagation delay time, CLK to OUTn
20
35
55
ns
tPLH2
Low-to-high propagation delay time, LE to OUTn
20
35
55
ns
tPLH3
Low-to-high propagation delay time, OE to OUTn
20
35
55
ns
tPLH4
Low-to-high propagation delay time, CLK to SDO
20
30
ns
tPHL1
High-to-low propagation delay time, CLK to OUTn
15
28
42
ns
tPHL2
High-to-low propagation delay time, LE to OUTn
15
28
42
ns
tPHL3
High-to-low propagation delay time, OE to OUTn
15
tPHL4
High-to-low propagation delay time, CLK to SDO
tw(CLK)
Pulse duration, CLK
tw(L)
Pulse duration LE
tw(OE)
Pulse duration, OE
th(D)
tsu(D)
VIH = VDD, VIL = GND,
Rext = 720 Ω, VL = 4 V,
RL = 88 Ω, CL = 10 pF
28
42
ns
20
30
ns
10
ns
10
ns
200
ns
Hold time, SDI
2
ns
Setup time, SDI
3
ns
th(L)
Hold time, LE
5
ns
tsu(L)
Setup time, LE
5
ns
tr
Rise time, CLK (1)
500
ns
tf
Fall time, CLK (1)
500
ns
tor
Rise time, outputs (off)
25
45
65
ns
tof
Rise time, outputs (on)
7
12
20
ns
fCLK
Clock frequency
30
MHz
(1)
Cascade operation
If the devices are connected in cascade and tr or tf is large, it may be critical to achieve the timing required for data transfer between
two cascaded devices.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
9
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
6.11 Typical Characteristics
Figure 6-2. CLK to OUT7
Figure 6-3. OE to OUT1
Figure 6-4. OE to OUT7
10
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
7 Parameter Measurement Information
IDD
VDD
OE
IIH, IIL
IOUT
OUT0
CLK
LE
OUT15
SDI
VIH, VIL
R-EXT
GND
SDO
Iref
Figure 7-1. Test Circuit for Electrical Characteristics
IDD
IOUT
VDD
VIH, VIL
OE
CLK
LE
Function
Generator
OUT0
OUT15
RL
CL
SDI
Logic input
waveform
VIH = VDD
VIL = 0V
R-EXT
GND
SDO
Iref
CL
VL
Figure 7-2. Test Circuit for Switching Characteristics
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
11
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
tw(CLK)
CLK
50%
tsu(D)
SDI
50%
50%
th(D)
50%
50%
tPLH4, tPHL4
50%
SDO
tw(L)
50%
LE
tsu(L)
th(L)
OE Low
OE
LOW
tPLH2, tPHL2
Output off
OUTn
50%
Output on
tPLH1, tPHL1
tw(OE)
HIGH
OE Pulsed
OE
50%
50%
tPLH3
tPHL3
Output off
OUTn
90%
90%
50%
50%
10%
10%
tof
tor
Figure 7-3. Normal Mode Timing Waveforms
12
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
8 Detailed Description
8.1 Overview
The TLC59025 is a 16-channel LED driver designed for LED displays and LED lighting applications. The
TLC59025 contains a 16-bit shift register and data latches, which convert serial input data into parallel output
format. At the TLC59025 output stage, 16 regulated-current ports provide uniform and constant current for
driving LEDs within a wide range of VF variations. Used in system design for LED display applications (for
example, LED panels), the TLC59025 provides great flexibility and device performance. Users can adjust the
output current from 3 mA to 45 mA through an external resistor, REXT, which gives flexibility in controlling the
light intensity of LEDs. TLC59025 is designed for up to 17 V at the output port. The high clock frequency, 30
MHz, also satisfies the system requirements of high-volume data transmission.
8.2 Functional Block Diagram
OUT0
R-EXT
OUT14 OUT15
OUT1
I/O REGULATOR
VDD
8
OUTPUT DRIVER
OE
CONTROL
LOGIC
16
16
16-BIT OUTPUT
LATCH
LE
CONFIGURATION
LATCHES
16
CLK
8
16-BIT SHIFT
REGISTER
SDI
SDO
16
8.3 Feature Description
8.3.1 Constant Current
In LED display applications, TLC59025 provides nearly no current variations from channel to channel and from
IC to IC. While IOUT ≤ 45 mA, the maximum current skew between channels is less than ±5% and between ICs is
less than ±6%.
Note
When the TLC59025 is used in very low current applications, reduced current accuracy can be
expected. For example, current accuracy is estimated to degrade to as much as ±10% when Iout =
1.7 mA.
8.4 Device Functional Modes
Table 8-1 lists the functional modes for the TLC59025.
Table 8-1. Truth Table in Normal Operation
CLK
LE
OE
SDI
OUT0... OUT15... OUT15
SDO
↑
H
L
Dn
Dn...Dn – 7...Dn – 15
Dn – 15
↑
L
L
Dn + 1
No change
Dn – 14
↑
H
L
Dn + 2
Dn + 2...Dn – 5...Dn – 13
Dn – 13
↓
X
L
Dn + 3
Dn + 2...Dn – 5...Dn – 13
Dn – 13
↓
X
H
Dn + 3
off
Dn – 13
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
13
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
9.1.1 Turning on the LEDs
To turn on an LED connected to one of the outputs of the device, the output must be pulled low. To do this, the
SDI signal must let the device know which outputs should be activated. Using the rising edge of CLK, the logic
level of the SDI signal latches the desired state of each output into the shift register. Once this is complete, the
LE signal must be toggled from low to high then back to low. Once /OE is pulled down, the corresponding
outputs will be pulled low and the LEDs will be turned on. The below diagram shows outputs 0, 3, 4, 5, 10, 13,
and 15 being activated.
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
CLK
OE
1
LE
0
SDI
off
OUT0
on
off
OUT1
on
off
OUT2
on
off
OUT3
on
off
OUT15
on
SDO
Don't care
Figure 9-1. Timing Diagram
14
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
9.2 Typical Application
This application shows how to calculate the output current for OUT0 through OUT15.
Figure 9-2. Typical Application Diagram
9.2.1 Design Requirements
For the following design procedure, the input voltage (VDD) is between 3 V and 5.5 V.
9.2.2 Detailed Design Procedure
9.2.2.1 Adjusting Output Current
TLC59025 sets IOUT based on the external resistor REXT. Users can follow the below formula to calculate the
target output current IOUT,target in the saturation region:
IOUT,target = (1.21 V / REXT) × 15.5
Where REXT is the external resistance connected between R-EXT and GND. Using this equation, the output
current is calculated to be approximately 26 mA at 720 Ω and 13 mA at 1440 Ω.
9.2.3 Application Curve
The default relationship after power on between IOUT,target and REXT is shown in Figure 9-3.
IOUT – mA
40
30
20
10
0
0
500
1000
1500
2000
2500
3000
3500
4000
Rext – P
W
Figure 9-3. Default Relationship Curve Between IOUT,target and Rext After Power Up
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
15
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
10 Power Supply Recommendations
The TLC59025 is designed to operate with a VDD range between 3 V and 5.5 V.
11 Layout
11.1 Layout Guidelines
The SDI, CLK, SDO, LE, and OE signals should all be kept from potential noise sources.
All traces carrying power through the LEDs should be wide enough to handle necessary currents.
All LED current passes through the device and into the ground node. There must be a strong connection
between the device ground and the circuit board ground.
11.2 Layout Example
Figure 11-1. Layout Recommendation
16
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
TLC59025
www.ti.com
SLVS934C – JUNE 2009 – REVISED FEBRUARY 2021
12 Device and Documentation Support
12.1 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.2 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.3 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.4 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLC59025
17
PACKAGE OPTION ADDENDUM
www.ti.com
15-Jan-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLC59025IDBQR
ACTIVE
SSOP
DBQ
24
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TLC59025I
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
