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TLC59212
SCLS713A – MARCH 2009 – REVISED JULY 2015
TLC59212 8-Bit Open-Collector Sink Driver with Latch
1 Features
3 Description
•
•
•
•
The TLC59212 device is an 8-bit open-collector driver
with latch designed for 5-V VCC operation.
1
•
LBC3S (Lin BiCMOS) Process
High Voltage Output (VOUT = 24 V)
Output Current (IOL Maximum = 40 mA)
Latch-Up Performance Exceeds 250 mA Per
JEDEC Standard JESD-17
ESD Protection Exceeds JESD 22
– 2000-V Human Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged Device Model (C101)
These circuits are positive-edge-triggered D-type flipflops with a direct clear (CLR) input. Information at
the data (D) input meeting the setup time
requirements is transferred to the Y output on the
positive-going edge of the clock (CLK) pulse. Clock
triggering occurs at a particular voltage level and is
not directly related to the transition time of the
positive-going pulse. When CLK is at either the high
or low level, the D-input has no effect at the output.
The TLC59212 is characterized for operation from
–40°C to 85°C.
2 Applications
•
•
•
Lamps and Displays (LED)
Hammers
Relay
Device Information(1)
PART NUMBER
TLC59212
PACKAGE
BODY SIZE (NOM)
PDIP (20)
24.33 mm × 6.35 mm
TSSOP (20)
6.50 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Diagram
Y7
Y8
D7
D8
Y6
Y5
Y4
Y3
Y2
Y1
VCC
VLED
CLK
D6
D5
D4
D3
D2
D1
CLR
TLC59212
MCU
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLC59212
SCLS713A – MARCH 2009 – REVISED JULY 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
4
4
4
4
5
5
5
6
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 7
Detailed Description .............................................. 8
8.1 Overview ................................................................... 8
8.2 Functional Block Diagram ......................................... 8
8.3 Feature Description................................................... 8
8.4 Device Functional Modes.......................................... 8
9
Application and Implementation .......................... 9
9.1 Application Information.............................................. 9
9.2 Typical Application ................................................... 9
10 Power Supply Recommendations ..................... 10
11 Layout................................................................... 11
11.1 Layout Guidelines ................................................. 11
11.2 Layout Example .................................................... 11
12 Device and Documentation Support ................. 12
12.1
12.2
12.3
12.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
12
12
12
12
13 Mechanical, Packaging, and Orderable
Information ........................................................... 12
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (March 2009) to Revision A
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
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SCLS713A – MARCH 2009 – REVISED JULY 2015
5 Pin Configuration and Functions
N or PW Package
20-Pin PDIP or TSSOP
Top View
CLR
D1
D2
D3
D4
D5
D6
D7
D8
CLK
1
20
VCC
2
19
3
18
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
GND
4
17
5
16
6
15
7
14
8
13
9
12
10
11
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
CLR
1
I
Direct clear of output
D1
2
I
Input control to the current sink driver
D2
3
I
Input control to the current sink driver
D3
4
I
Input control to the current sink driver
D4
5
I
Input control to the current sink driver
D5
6
I
Input control to the current sink driver
D6
7
I
Input control to the current sink driver
D7
8
I
Input control to the current sink driver
D8
9
I
Input control to the current sink driver
CLK
10
I
Clock to positive edge triggered D flipflops
GND
11
—
Ground
Y8
12
O
Output to load
Y7
13
O
Output to load
Y6
14
O
Output to load
Y5
15
O
Output to load
Y4
16
O
Output to load
Y3
17
O
Output to load
Y2
18
O
Output to load
Y1
19
O
Output to load
Vcc
20
I
Supply voltage
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SCLS713A – MARCH 2009 – REVISED JULY 2015
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
–0.5
7
V
–0.5
7
V
–0.5
30
V
40
mA
–20
mA
85
°C
150
°C
VCC
Supply voltage
D
Input voltage
D, CLK, CLR
VO
Output voltage
H output
IO
Output current
1 bit for output low
IIK
Input clamp current
VI < 0 V
TA
Operating free-air temperature
–40
Tstg
Storage temperature
–65
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
VCC = 4.5 V to 5.5 V. Over operating free-air temperature range (unless otherwise noted)
MIN
MAX
4.5
5.5
V
High-level input voltage
VCC × 0.7
VCC
V
VIL
Low-level input voltage
0
VCC × 0.3
V
VO
Output voltage
0
24
V
IO
Output current, Duty cycle < 100%
0
40
mA
TA
Operating free-air temperature
–40
85
°C
VCC
Supply voltage
VIH
UNIT
6.4 Thermal Information
TLC59212
THERMAL METRIC (1)
N (PDIP)
PW (TSSOP)
20 PINS
20 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
55.8
96.0
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
47.4
29.8
°C/W
RθJB
Junction-to-board thermal resistance
36.8
47.3
°C/W
ψJT
Junction-to-top characterization parameter
24.3
1.8
°C/W
ψJB
Junction-to-board characterization parameter
36.6
46.7
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
Vt+
Positive-going input threshold D, CLR, CLK
Vt–
Negative-going input
threshold
D, CLR, CLK
1.5
Vt
Hysteresis
D, CLR, CLK
0.5
VO(off)
Output tr sustain voltage
Ice = 1 mA
24
IOZ
Output tr leakage current
VO = 24 V
IIH
High-level input current
IIL
Ioff
TYP
MAX
UNIT
3.5
V
V
2
V
0
5
μA
VCC = 5.5 V, VI = 5.5 V
0
1
μA
Low-level input current
VCC = 5.5 V, VI = 0 V
0
–1
μA
Leakage current
VI = 0 to 5 V, VO = 0 to 30 V, VCC = 0
0
5
μA
Output = all OFF
0
5
Output = all ON
8
20
V
ICC
Supply current
VI = 0 to 5 V, VO = 0 to 30 V,
VCC = 0
VOL
Low-level output voltage
VCC = 4.5 V, IO = 40 mA
0.32
0.55
V
rON
ON-state resistance
VCC = 4.5 V, IO = 10 mA
8
13
Ω
Ci
Input capacitance
VI = VCC or GND
5
μA
pF
6.6 Timing Requirements
over TA = –40°C to 85°C, VCC = 4.5 V to 5.5 V, O/C to Y (unless otherwise noted)
MIN
MAX
UNIT
tsu
Setup time
CLK
VDD = 4.5 V to 5.5 V
5
ns
th
Hold time
CLK
VDD = 4.5 V to 5.5 V
15
ns
tw
Pulse width
CLK, CLR
VDD = 4.5 V to 5.5 V
20
ns
6.7 Switching Characteristics
over operating free-air temperature range (unless otherwise noted), see Figure 2
PARAMETER
TEST
CONDITIONS
LOAD
CAPACITANCE
TA = 25°C
MIN
TA = –40°C to 85°C
TYP
MAX
MIN
MAX
UNIT
tTLH
Output = low to high
CL = 50 pF, RL = 500 Ω
60
185
185
ns
tTHL
Output = high to low
CL = 50 pF, RL = 500 Ω
10
185
185
ns
tPLH
Output = low to high
CL = 50 pF, RL = 500 Ω
70
210
250
ns
tPHL
Output = high to low
CL = 50 pF, RL = 500 Ω
45
210
250
ns
tPHLR
CLR-Y
CL = 50 pF, RL = 500 Ω
70
210
250
ns
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6.8 Typical Characteristics
Figure 1. Output Voltage and Current Response
6
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7 Parameter Measurement Information
VCC
RL = 500 Ω
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT FOR
OPEN-COLLECTOR OUTPUT
5V
50%
tsu
th
GND
tf
tr
10%
D
50%
90%
50%
tw
90%
50%
5V
50%
10%
tPHL
CLK
GND
tPLH
90%
90%
50%
10%
50%
10%
tTHL
VCC
Y
GND
tTLH
VOLTAGE WAVEFORMS
A.
CL includes probe and jig capacitance.
B.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns,
and tf ≤ 3 ns.
C.
The outputs are measured one at a time with one transition per measurement.
D.
tPLH and tPHL are the same as tpd.
Figure 2. Test Circuit and Voltage Waveforms
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8 Detailed Description
8.1 Overview
The TLC59212 device is an 8-bit open-collector driver with latch designed for 5-V VCC operation.
8.2 Functional Block Diagram
Y2
Y1
19
Y3
18
Y4
Y5
16
17
Y6
15
Y8
Y7
13
14
12
CLK
10
D
D
D
D
D
D
D
D
CK
CK
CK
CK
CK
CK
CK
CK
R
R
R
R
R
R
R
R
CLR
1
2
D1
(1)
3
5
4
D2
D3
6
D4
D5
7
D6
8
9
11
D7
D8
GND
This symbol is in accordance with ANSI/IEEE Standard 91-1984 and IEC Publication 617-12.
Figure 3. Logic Symbol
8.3 Feature Description
Each of the 8 channels is controlled by its input (Dn), a direct clear (CLR), and clock (CLK) through a positiveedge-triggered D-type flip-flops. Information at the data (D) input meeting the setup time requirements is
transferred to the output (Y) on the positive-going edge of the clock (CLK) pulse. When CLK is at either the high
or low level, the D-input has no effect at the output. When CLR is at low level, the D-input has no effect at the
output.
8.4 Device Functional Modes
Table 1 lists the functional modes of the TLC59212.
Table 1. Function Table (Each Latch) (1)
INPUTS
(1)
8
OUTPUT
Y
CLR
CLK
D
L
X
X
H*
H
↑
L
H*
H
↑
H
L
H
L
X
Y0
H
↓
X
Y0
L: Low-level
H: High-level
H*: with pullup resistor
X: Irrelevant
↑: Rising edge
↓: Falling edge
Z : High-impedance (OFF)
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
In LED display application, TLC59212 is used to drive the current sink for 8 LEDs in parallel. LED display pattern
can be created by providing different bit pattern. At every positive clock edge, new bit pattern will be transferred
to LED display.
9.2 Typical Application
Y7
Y8
D7
D8
Y6
Y5
Y4
Y3
Y2
Y1
VCC
VLED
CLK
D6
D5
D4
D3
D2
D1
CLR
TLC59212
MCU
Figure 4. Typical Application Diagram
9.2.1 Design Requirements
For LED display application, LED is selected based on the application. The current level is determined by the
required brightness. Given the available LED supply, the resistor value could be determined. The TCL59212 has
a maximum current requirement less than 40mA for constant on application.
9.2.2 Detailed Design Procedure
The selection of supply voltage (VLED), LED, and resistor sets the current of the LED.
VR + VL + VOL = VLED
I = (VLED - VL - VOL) /R
(1)
(2)
VR is the voltage drop across the resistor, VL is the voltage drop across the LED when LED is on, VOL is the
output voltage at the collector when the driver is enabled. For example, when VLED = 5 V, VL = 2.4 V, and VOL
= 0.35 V, a 55-Ω resistor is used to obtain output current 40 mA.
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Typical Application (continued)
9.2.3 Application Curve
Figure 5. Output Voltage and Current Response
10 Power Supply Recommendations
The supply voltage to TLC59212 is from 4.5 V to 5.5 V. The voltage at output can be up to 24 V.
10
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11 Layout
11.1 Layout Guidelines
The traces that carry current from the LED cathodes to the output pins must be wide enough to support the
current (up to 40 mA).
11.2 Layout Example
To MCU
VCC
CLR
D1
Y1
To MCU
D2
Y2
To MCU
D3
Y3
To MCU
D4
Y4
To MCU
D5
Y5
To MCU
D6
Y6
To MCU
D7
Y7
To MCU
D8
Y8
To MCU
CLK
VLED
To MCU
VCC
GND
VIA to GND
Figure 6. Layout Recommendation
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SCLS713A – MARCH 2009 – REVISED JULY 2015
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12 Device and Documentation Support
12.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.2 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
12
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLC59212IPWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
Y59212
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
