TLC7705QPWREP

TLC7701-EP, TLC7705-EP, TLC7733-EP SGLS013E – MARCH 2003 – REVISED NOVEMBER 2011 www.ti.com MICROPOWER SUPPLY VOLTAGE SUPERVISORS Check for Samples: TLC7701-EP, TLC7705-EP, TLC7733-EP FEATURES SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS 1 • • • • • • • • • • Power-On Reset Generator Automatic Reset Generation After Voltage Drop Precision Voltage Sensor Temperature-Compensated Voltage Reference Programmable Delay Time by External Capacitor Supply Voltage Range . . . 2 V to 6 V Defined RESET Output from VDD ≥ 1 V Power-Down Control Support for Static RAM With Battery Backup Maximum Supply Current of 16 mA Power Saving Totem-Pole Outputs • • • • Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Extended (–40°C/125°C and –55°C/125°C), Temperature Ranges (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability • • • (1) Additional temperature ranges available - contact factory D OR PW PACKAGE (TOP VIEW) CONTROL RESIN CT GND 1 8 2 7 3 6 4 5 VDD SENSE RESET RESET DESCRIPTION The TLC77xx family of micropower supply voltage supervisors provide reset control, primarily in microcomputer and microprocessor systems. During power-on, RESET is asserted when VDD reaches 1 V. After minimum VDD (≥ 2 V) is established, the circuit monitors SENSE voltage and keeps the reset outputs active as long as SENSE voltage (VI(SENSE)) remains below the threshold voltage. An internal timer delays return of the output to the inactive state to ensure proper system reset. The delay time (td) is determined by an external capacitor: td = 2.1 × 104 × CT (1) Where CT is in farads td is in seconds Except for the TLC7701, which can be customized with two external resistors, each supervisor has a fixed sense threshold voltage set by an internal voltage divider. When SENSE voltage drops below the threshold voltage, the outputs become active and stay in that state until SENSE voltage returns above threshold voltage and the delay time (td) has expired. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2011, Texas Instruments Incorporated TLC7701-EP, TLC7705-EP, TLC7733-EP SGLS013E – MARCH 2003 – REVISED NOVEMBER 2011 www.ti.com In addition to the power-on reset and undervoltage-supervisor function, the TLC77xx adds power-down control support for static RAM. When CONTROL is tied to GND, RESET will act as active high. The voltage monitor contains additional logic intended for control of static memories with battery backup during power failure. By driving the chip select (CS) of the memory circuit with the RESET output of the TLC77xx and with the CONTROL driven by the memory bank select signal (CSH1) of the microprocessor (see Figure 11), the memory circuit is automatically disabled during a power loss. (In this application the TLC77xx power has to be supplied by the battery.) ORDERING INFORMATION TA -40°C to 125°C -55°C to 125°C (1) PACKAGE (1) TSSOP - PW ORDERABLE PART NUMBER TOP-SIDE MARKING VID NUMBER TLC7701QPWREP 7701QE V62/04604 - 01XE TLC7705QPWREP 7705QE V62/04604 - 02XE Tape and reel TSSOP - PW Tape and reel SOIC - D Tape and reel TLC7733QPWREP 7733QE V62/04604 - 03XE TLC7701MPWREP 7701ME V62/04604 - 04XE TLC7733MPWREP 7733ME V62/04604 - 06XE TLC7701MDREP 7701ME V62/04604 - 04YE The PW package is only available left-end taped and reeled (indicated by the R suffix on the device type; e.g., TLC7701QPWREP). Table 1. FUNCTION TABLE (1) CONTROL RESIN VI(SENSE) > VIT+ RESET RESET L L False H L L L L True H L H False H L L H True L (1) H (1) H L False H L H L True H L H H False H L H H True H H (1) RESET and RESET states shown are valid for t > td. ≥1 COMP 7 S SENSE S VDD) ±10 mA IOK Output clamp current, (VO < 0 or VO > VDD) ±10 mA TA Operating free-air temperature range Tstg Storage temperature range (1) (2) TL77xxQ -40 to 125 TL77xxM -55 to 125 °C °C -65 to 150 Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to GND. THERMAL INFORMATION TLC77xx-EP THERMAL METRIC (1) TLC77xx-EP D PW 8 PINS 8 PINS θJA Junction-to-ambient thermal resistance 97.1 168 θJC Junction-to-case thermal resistance 39.4 38.9 θJB Junction-to-board thermal resistance - 96.6 ψJT Junction-to-top characterization parameter - 1.5 ψJB Junction-to-board characterization parameter - 94.7 (1) UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. RECOMMENDED OPERATING CONDITIONS (1) over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VDD Supply voltage 2 6 V VI Input voltage 0 VDD V (2) VIH High-level input voltage at RESIN and CONTROL VIL Low-level input voltage at RESIN and CONTROL IOH High-level output current, VDD ≥ 2.7 V IOL Low-level output current, VDD ≥ 2.7 V Δt/ΔV Input transition rise and fall rate at RESIN and CONTROL TA Operating free-air temperature range (1) (2) 4 0.7×VDD V 0.2×VDD -2 V mA 2 mA 100 ns/V Q temperature range -40 125 M temperature range -55 125 °C Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction of overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging. To ensure a low supply current, VIL should be kept -0.3 V. Submit Documentation Feedback Copyright © 2003–2011, Texas Instruments Incorporated Product Folder Link(s): TLC7701-EP TLC7705-EP TLC7733-EP TLC7701-EP, TLC7705-EP, TLC7733-EP SGLS013E – MARCH 2003 – REVISED NOVEMBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS over recommended operating conditions (1) (unless otherwise noted) PARAMETER High-level output voltage VOH TEST CONDITIONS IOH = - 20 μA IOH = - 20 mA Low-level output voltage VOL IOH = - 20 μA IOH = - 20 mA Negative-going input threshold voltage, SENSE (3) VIT- 1.8 2.5 2.5 VDD = 4.5 V 4.3 4.3 VDD = 4.5 V 3.7 Power-up reset voltage (4) II Input current V 3.7 0.2 VDD = 2.7 V 0.2 0.2 VDD = 4.5 V 0.2 0.2 0.5 0.5 VDD = 4.5 V 1.04 VDD = 2 V to 6 V 1.1 1.16 4.43 4.5 4.63 2.855 2.93 3.03 V V 2.8 2.93 3.03 30 VDD = 2 V to 6 V 70 mV 70 70 IOL = 20 μA 1 1 RESIN VI = 0 V to VDD 2 2 CONTROL VI = VDD 7 15 7 15 SENSE VI = 5 V 5 10 5 10 μA SENSE, TLC7701 only VI = 5 V Supply current IDD(d) Supply current during td VDD = 5 V, VCT = 0 , RESIN = VDD, SENSE = VDD CONTROL = 0 V, Outputs open CI Input capacitance, SENSE VI = 0 V to VDD (1) (2) (3) (4) UNIT MAX 0.2 RESIN = VDD, SENSE = VDD ≥ VITmax + 0.2 V CONTROL = 0 V, Outputs open IDD TYP (2) VDD = 2 V TLC7733 Vres MIN 1.8 TLC7733 TLC7705 TA = -55°C to 125°C MAX VDD = 2.7 V TLC7701 Hysteresis voltage, SENSE Vhys TYP (2) VDD = 2 V TLC7701 TLC7705 TA = -40°C to 125°C MIN V 2 9 16 9 18 μA 120 150 120 150 μA 50 50 pF All characteristics are measured with CT = 0.1 μF. Typical values apply at TA = 25°C. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 μF) should be connected near the supply terminals. The lowest supply voltage at which RESET becomes active. The symbol Vres is not currently listed within EIA or JEDEC standards for semiconductor symbology. Rise time of VDD ≥ 15 ms/V. Copyright © 2003–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TLC7701-EP TLC7705-EP TLC7733-EP 5 TLC7701-EP, TLC7705-EP, TLC7733-EP SGLS013E – MARCH 2003 – REVISED NOVEMBER 2011 www.ti.com SWITCHING CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) MEASURED PARAMETER td Delay time tPLH Propagation delay time, low-to-high level output tPLH Propagation delay time, high-to-low level output tPLH Propagation delay time, low-to-high level output tPLH Propagation delay time, high-to-low level output tPLH Propagation delay time, low-to-high level output tPLH Propagation delay time, high-to-low level output tPLH Propagation delay time, low-to-high level output tPLH Propagation delay time, high-to-low level output tPLH Propagation delay time, low-to-high level output tPLH Propagation delay time, high-to-low level output Low-level minimum pulse duration to switch RESET and RESET tr Rise time tf Fall time (1) 6 FROM (INPUT) TO (OUTPUT) TA = -40°C to 125°C TEST CONDITIONS RESIN = 0.7 × VDD, CONTROL = 0.2 × VDD,CT = 100 nF, TA = Full range, See timing diagram MIN TYP TA = -55°C to 125°C MAX MIN TYP MAX UNIT ms 1.1 2.1 4.2 2.1 20 20 5 5 5 5 20 20 20 20 60 60 65 65 20 20 58 58 58 58 RESET VIH = VIT+max + 0.2 V, VIL = VIT-min - 0.2 V, RESIN = 0.7 × VDD,CONTROL = 0.2 × VDD, CT = NC (1) SENSE μs RESET μs RESET VIH = 0.7 × VDD, VIL = 0.2 × VDD,SENSE = VIT+max + 0.2 V, CONTROL = 0.2 × VDD, CT = NC (1) RESIN ns RESET CONTR OL RESET μs VIH = 0.7 × VDD, VIL = 0.2 × VDD,SENSE = VIT+max + 0.2 V, RESIN = 0.7 × VDD, CT = NC (1) ns ns SENSE VIH = VIT+max + 0.2 V, VIL = VIT-min - 0.2 V 3 4 RESIN VIL = 0.2 × VDD, VIH = 0.7 × VDD 1 1 RESET and RESET μs 10% to 90% 8 8 90% to 10% 4 4 ns/V NC = No capacitor, and includes up to 100-pF probe and jig capacitance. Submit Documentation Feedback Copyright © 2003–2011, Texas Instruments Incorporated Product Folder Link(s): TLC7701-EP TLC7705-EP TLC7733-EP TLC7701-EP, TLC7705-EP, TLC7733-EP SGLS013E – MARCH 2003 – REVISED NOVEMBER 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION 5V DUT RL (see Note A) A. For switching characteristics, RL = 2 kΩ B. CL = 50 pF includes jig and probe capacitance CL (see Note B) Figure 2. RESET AND RESET Output Configurations I, Q, and Y suffixed devices tw(L) 0.7 × V DD 0.5 × V DD 0.2 × V DD M suffixed devices tw(L) tw(L) 2.7 V 1.5 V 0.4 V (a) RESIN VIT+max + 200 mV VIT+ VIT- min - 200 mV VIT(b) SENSE Figure 3. Input Pulse Definition Waveforms Copyright © 2003–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TLC7701-EP TLC7705-EP TLC7733-EP 7 TLC7701-EP, TLC7705-EP, TLC7733-EP SGLS013E – MARCH 2003 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS SUPPLY CURRENT vs SUPPLY VOLTAGE 10 9 1.005 8 1.004 I DD - Suppl y Current - µA Normalized Input Threshold Voltage - VIT- (TA )/V IT- (25 °C) NORMALIZED INPUT THRESHOLD VOLTAGE vs TEMPERATURE 1.003 1.002 1.001 1 7 6 5 4 3 RESIN = V DD = -1 V to 6.5 V SENSE = GND CONTROL = GND CT = Open = 100 pF TA = 25°C 2 1 0.999 0 0.998 0.997 -40 -1 -0.5 -20 0 20 40 60 80 100 0.5 1.5 2.5 3.5 4.5 5.5 6.5 VDD - Suppl y Voltage - V 120 TA - Temperature - °C Figure 4. Figure 5. HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 5 6 4 0°C 3.5 -55 °C 125°C 3 2.5 85°C 2 25°C 1.5 -40 °C 1 0.5 0 -0.5 VDD = 4.5 V RESIN = 4.5 V SENSE = 0.5 V CONTROL = 0 V CT = Open = 100 pF -1 5 0 -5 -10 -15 -20 -25 -30 -35 -40 IOH - High-Le vel Output Current - mA VOL - Lo w-Level Output Voltage - V VOH - High-Le vel Output Voltage - V 4.5 5 4 VDD = 4.5 V RESIN = 4.5 V SENSE = 5 V CONTROL = 0 V CT = Open = 100 pF 125°C 85°C 25°C 0°C 3 2 -40 °C 1 -55 °C 0 -1 -5 0 5 Figure 6. 8 Submit Documentation Feedback 10 15 20 25 30 IOL - Lo w-Level Output Current - mA Figure 7. Copyright © 2003–2011, Texas Instruments Incorporated Product Folder Link(s): TLC7701-EP TLC7705-EP TLC7733-EP TLC7701-EP, TLC7705-EP, TLC7733-EP SGLS013E – MARCH 2003 – REVISED NOVEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) INPUT CURRENT vs INPUT VOLTAGE AT SENSE MINIMUM PULSE DURATION AT SENSE vs SENSE THRESHOLD OVERDRIVE 7 6 VDD = 4.5 V CT = Open = 100 pF t w - Minim um Pulse Duration at SENSE - µs 8 125°C I I - Input Current - µA 4 -55 °C 2 0 -2 125°C -4 -55 °C -6 -8 -10 -1 VDD = 2 V Control = 0.4 V RESIN = 1.4 V CT = Open = 100 pF 6 5 4 3 2 1 0 0 1 2 3 4 VI - Input Voltage at SENSE - V 5 6 0 50 100 150 Figure 8. Copyright © 2003–2011, Texas Instruments Incorporated 200 250 300 350 400 Sense Threshold Overdrive - mV Figure 9. Submit Documentation Feedback Product Folder Link(s): TLC7701-EP TLC7705-EP TLC7733-EP 9 TLC7701-EP, TLC7705-EP, TLC7733-EP SGLS013E – MARCH 2003 – REVISED NOVEMBER 2011 www.ti.com APPLICATION INFORMATION VDD 0.1 µF 0.1 µF 100 kΩ VDD VDD TLC77xx RESIN RESET SENSE RESET CT RESET TMS70C20 NC CONTROL RESET GND GND Figure 10. Reset Controller in a Microcomputer System VDD 0.1 µF VDD TLC77xx RESIN 0.1 µF 0.1 µF SENSE RESET CONTROL VDD CT RESET CS RESET GND CSH1 32K 8 CMOS RAM TMS370 16 ADD0 - 15 A0 - A15 8 DATA0 - 7 D0 - D7 R/W R/W GND GND Figure 11. Data Retention During Power Down Using Static CMOS RAMs 10 Submit Documentation Feedback Copyright © 2003–2011, Texas Instruments Incorporated Product Folder Link(s): TLC7701-EP TLC7705-EP TLC7733-EP PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TLC7701MDREP ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 7701ME TLC7701MPWREP ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 7701ME TLC7701MPWREPG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 7701ME TLC7701QPWREP ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 7701QE TLC7705QPWREP ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 7705QE TLC7733MPWREP ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 7733ME TLC7733QPWREP ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 7733QE V62/04604-01XE ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 7701QE V62/04604-02XE ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 7705QE V62/04604-03XE ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 7733QE V62/04604-04XE ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 7701ME V62/04604-04YE ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 7701ME V62/04604-06XE ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 7733ME (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of