TLC7705QPWRQ1

TLC7701-Q1, TLC7705-Q1, TLC7733-Q1 MICROPOWER SUPPLY VOLTAGE SUPERVISORS  SGLS208A − OCTOBER 2003 − REVISED MAY 2008 D Qualified for Automotive Applications D Power-On Reset Generator D Automatic Reset Generation After D D D D D D D D Voltage Drop Precision Voltage Sensor Temperature-Compensated Voltage Reference Programmable Delay Time by External Capacitor Supply Voltage Range . . . 2 V to 6 V Defined RESET Output from VDD ≥ 1 V Power-Down Control Support for Static RAM With Battery Backup Maximum Supply Current of 16 μA Power Saving Totem-Pole Outputs PW PACKAGE (TOP VIEW) CONTROL RESIN CT GND 1 8 2 7 3 6 4 5 VDD SENSE RESET RESET description The TLC77xx family of micropower supply voltage supervisors provide reset control, primarily in microcomputer and microprocessor systems. During power-on, RESET is asserted when VDD reaches 1 V. After minimum VDD (≥ 2 V) is established, the circuit monitors SENSE voltage and keeps the reset outputs active as long as SENSE voltage (VI(SENSE)) remains below the threshold voltage. An internal timer delays return of the output to the inactive state to ensure proper system reset. The delay time, td, is determined by an external capacitor: td = 2.1 × 104 × CT Where CT is in farads td is in seconds Except for the TLC7701, which can be customized with two external resistors, each supervisor has a fixed SENSE threshold voltage set by an internal voltage divider. When SENSE voltage drops below the threshold voltage, the outputs become active and stay in that state until SENSE voltage returns above threshold voltage and the delay time, td, has expired. In addition to the power-on-reset and undervoltage-supervisor function, the TLC77xx adds power-down control support for static RAM. When CONTROL is tied to GND, RESET will act as active high. The voltage monitor contains additional logic intended for control of static memories with battery backup during power failure. By driving the chip select (CS) of the memory circuit with the RESET output of the TLC77xx and with the CONTROL driven by the memory bank select signal (CSH1) of the microprocessor (see Figure 10), the memory circuit is automatically disabled during a power loss. (In this application the TLC77xx power has to be supplied by the battery.) Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 2008, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TLC7701-Q1, TLC7705-Q1, TLC7733-Q1 MICROPOWER SUPPLY VOLTAGE SUPERVISORS  SGLS208A − OCTOBER 2003 − REVISED MAY 2008 ORDERING INFORMATION†} ORDERABLE PART NUMBER PACKAGE§ TA −40°C to 125°C TOP-SIDE MARKING TSSOP − PW Tape and reel TLC7701QPWRQ1 7701Q1 TSSOP − PW Tape and reel TLC7705QPWRQ1 7705Q1 TSSOP − PW Tape and reel TLC7733QPWRQ1 7733Q1 † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. § The PW package is only available left-end taped and reeled (indicated by the R suffix on the device type; e.g., TLC7701QPWREP). FUNCTION TABLE CONTROL RESIN VI(SENSE)>VIT+ RESET RESET L L False H L L L True H L L H False H L L H True L§ H§ H L False H L H L True H L 1 H H False H L 2 H § logic symbol¶ H True H H§ SENSE RESIN VIT 2 CONTROL 3 1 RESET and RESET states shown are valid for t > td. POST OFFICE BOX 655303 S S VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 10 mA Output clamp current, IOK (VO < 0 or VO > VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 10 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: TL77xxQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to GND. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING PW DERATING FACTOR ABOVE TA = 25°C 525 mW 4.2 mW/°C TA = 85°C POWER RATING TA = 125°C POWER RATING 273 mW 105 mW recommended operating conditions at specified temperature range Supply voltage, VDD Input voltage, VI High-level input voltage at RESIN and CONTROL‡, VIH Low-level input voltage at RESIN and CONTROL‡, High-level output current, IOH Low-level output current, IOL MIN MAX UNIT 2 6 V 0 VDD V 0.7×VDD VIL 27V VDD ≥ 2.7 Input transition rise and fall rate at RESIN and CONTROL, Δt/ΔV Operating free-air temperature range, TA ‡ 4 −40 To ensure a low supply current, VIL should be kept < 0.3 V and VIH > VDD − 0.3 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V 0.2×VDD V −2 mA 2 mA 100 ns/V 125 °C TLC7701-Q1, TLC7705-Q1, TLC7733-Q1 MICROPOWER SUPPLY VOLTAGE SUPERVISORS  SGLS208A − OCTOBER 2003 − REVISED MAY 2008 electrical characteristics over recommended operating conditions (see Note 2) (unless otherwise noted) TLC77xx PARAMETER VOH High level output voltage High-level TEST CONDITIONS IOH = − 20 μA IOH = − 2 mA VOL Low level output voltage Low-level IOL = 20 μA IOL = 2 mA VDD = 2 V 1.8 VDD = 2.7 V 2.5 VDD = 4.5 V 4.3 VDD = 4.5 V 3.7 TLC7705 0.2 0.2 VDD = 4.5 V 0.2 Hysteresis voltage, SENSE VDD = 2 V to 6 V II 1.1 1.16 4.43 4.5 4.63 2.855 2.93 3.03 VDD = 2 V to 6 V V mV 70 IOL = 20 μA 1 RESIN VI = 0 V to VDD 2 CONTROL VI = VDD 7 15 SENSE VI = 5 V 5 10 SENSE, TLC7701 only VI = 5 V Power-up reset voltage‡ Input current 1.04 30 TLC7733 Vres V 0.5 TLC7701 TLC7705 UNIT V VDD = 4.5 V Negative-going N ti i iinputt th threshold h ld voltage, lt SENSE (see Note 3) MAX VDD = 2.7 V TLC7733 Vhys TYP† VDD = 2 V TLC7701 VIT − MIN V μA 2 IDD Supply current RESIN = VDD, SENSE = VDD ≥ VITmax + 0.2 V CONTROL = 0 V, Outputs open IDD(d) Supply current during td VDD = 5 V, RESIN = VDD, CONTROL = 0 V, CI Input capacitance, SENSE VI = 0 V to VDD VCT = 0 , SENSE = VDD, Outputs open 9 16 μA 120 150 μA 50 pF † Typical values apply at TA = 25°C. ‡ The lowest supply voltage at which RESET becomes active. The symbol V res is not currently listed within EIA or JEDEC standards for semiconductor symbology. Rise time of VDD ≥ 15 μs/V. NOTES: 2. All characteristics are measured with CT = 0.1 μF. 3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 μF) should be connected near the supply terminals. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TLC7701-Q1, TLC7705-Q1, TLC7733-Q1 MICROPOWER SUPPLY VOLTAGE SUPERVISORS  SGLS208A − OCTOBER 2003 − REVISED MAY 2008 switching characteristics at VDD = 5 V, RL = 2 kΩ, CL = 50 pF, TA = Full Range (unless otherwise noted) MEASURED PARAMETER td Delay time tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output TO (OUTPUT) VI(SENSE) ≥ VIT+ RESET and RESET tr Rise time tf Fall time † 6 TEST CONDITIONS RESIN = 0.7 × VDD, CONTROL = 0.2 × VDD, CT = 100 nF, TA = Full range, See timing diagram MIN TYP MAX 1.1 2.1 4.2 UNIT ms 20 RESET SENSE RESET VIH = VIT+max + 0.2 0 2 V, V VIL = VIT−min − 0.2 V, RESIN = 0.7 0 7 × VDD, CONTROL = 0.2 × VDD, CT = NC† 5 μss 5 20 20 RESET RESIN RESET CONTROL Low-level minimum pulse duration to switch RESET and RESET TLC77xx FROM (INPUT) RESET VIH = 0.7 0 7 × VDD, VIL = 0.2 × VDD, SENSE = VIT+max + 0 0.2 V, 2V CONTROL = 0.2 × VDD, CT = NC† 60 ns 65 20 μs VIH = 0.7 × VDD, VIL = 0.2 × VDD, 2V SENSE = VIT+max + 0 0.2 V, 58 ns RESIN = 0.7 × VDD, CT = NC† 58 ns SENSE VIH = VIT+max + 0.2 V, VIL = VIT−min − 0.2 V, 3 RESIN VIL = 0.2 × VDD, VIH = 0.7 × VDD 1 RESET and RESET μss 10% to 90% 8 90% to 10% 4 ns/V NC = No capacitor, and includes up to 100-pF probe and jig capacitance. POST OFFICE BOX 655303 μs • DALLAS, TEXAS 75265 TLC7701-Q1, TLC7705-Q1, TLC7733-Q1 MICROPOWER SUPPLY VOLTAGE SUPERVISORS  SGLS208A − OCTOBER 2003 − REVISED MAY 2008 PARAMETER MEASUREMENT INFORMATION 5V DUT RL (see Note A) CL (see Note B) NOTES: A. For switching characteristics, RL = 2 kΩ . B. CL = 50 pF includes jig and probe capacitance. Figure 1. RESET AND RESET Output Configurations I, Q, and Y suffixed devices tw(L) 0.7 × VDD 0.5 × VDD 0.2 × VDD M suffixed devices tw(L) tw(L) 2.7 V 1.5 V 0.4 V VIT+max + 200 mV VIT+ VIT−min − 200 mV VIT− (a) RESIN (b) SENSE Figure 2. Input Pulse Definition Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TLC7701-Q1, TLC7705-Q1, TLC7733-Q1 MICROPOWER SUPPLY VOLTAGE SUPERVISORS  SGLS208A − OCTOBER 2003 − REVISED MAY 2008 NORMALIZED INPUT THRESHOLD VOLTAGE vs TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE 10 1.005 9 1.004 8 I DD − Supply Current − μ A Normalized Input Threshold Voltage − VIT− (TA )/V IT− (25 °C) TYPICAL CHARACTERISTICS 1.003 1.002 1.001 1 0.999 7 6 5 4 3 RESIN = VDD = −1 V to 6.5 V SENSE = GND CONTROL = GND CT = Open = 100 pF TA = 25°C 2 1 0.998 0.997 −40 0 −20 0 20 40 60 80 100 −1 −0.5 120 0.5 TA − Temperature − °C 1.5 4 0°C 3.5 −55°C 125°C 3 2.5 85°C 2 25°C 1.5 −40°C 1 VDD = 4.5 V RESIN = 4.5 V SENSE = 0.5 V CONTROL = 0 V CT = Open = 100 pF −1 0 −5 −10 −15 −20 −25 −30 −35 −40 VOL − Low-Level Output Voltage − V VOH − High-Level Output Voltage − V 4.5 5 5 6.5 4 VDD = 4.5 V RESIN = 4.5 V SENSE = 5 V CONTROL = 0 V CT = Open = 100 pF 125°C 85°C 25°C 0°C 3 2 −40°C 1 −55°C 0 −1 −5 0 5 10 Figure 6 Figure 5 POST OFFICE BOX 655303 15 20 25 IOL − Low-Level Output Current − mA IOH − High-Level Output Current − mA 8 5.5 6 5 −0.5 4.5 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 0 3.5 Figure 4 Figure 3 0.5 2.5 VDD − Supply Voltage − V • DALLAS, TEXAS 75265 30 TLC7701-Q1, TLC7705-Q1, TLC7733-Q1 MICROPOWER SUPPLY VOLTAGE SUPERVISORS  SGLS208A − OCTOBER 2003 − REVISED MAY 2008 TYPICAL CHARACTERISTICS INPUT CURRENT vs INPUT VOLTAGE AT SENSE 8 VDD = 4.5 V CT = Open = 100 pF 6 125°C 4 I I − Input Current − μ A −55°C 2 0 −2 125°C −4 −55°C −6 −8 −10 −1 0 1 2 3 4 5 6 VI − Input Voltage at SENSE − V Figure 7 MINIMUM PULSE DURATION AT SENSE vs SENSE THRESHOLD OVERDRIVE t w − Minimum Pulse Duration at SENSE − μ s 7 VDD = 2 V Control = 0.4 V RESIN = 1.4 V CT = Open = 100 pF 6 5 4 3 2 1 0 0 50 100 150 200 250 300 350 400 Sense Threshold Overdrive − mV Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TLC7701-Q1, TLC7705-Q1, TLC7733-Q1 MICROPOWER SUPPLY VOLTAGE SUPERVISORS  SGLS208A − OCTOBER 2003 − REVISED MAY 2008 APPLICATION INFORMATION VDD 0.1 μF 100 kΩ 0.1 μF VDD VDD TLC77xx RESIN RESET SENSE RESET CT RESET RESET TMS70C20 NC CONTROL GND GND Figure 9. Reset Controller in a Microcomputer System VDD 0.1 μF VDD TLC77xx RESIN 0.1 μF 0.1 μF SENSE RESET CONTROL VDD CT RESET CSH1 CS RESET 32K  8 CMOS RAM GND TMS370 16 ADD0 −15 8 DATA0 −7 A0 −A15 D0 −D7 R/W R/W GND GND Figure 10. Data Retention During Power Down Using Static CMOS RAMs 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 23-Apr-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TLC7701QPWRQ1 ACTIVE TSSOP PW 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 7701Q1 TLC7705QPWRG4Q1 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 7705Q1 TLC7733QPWRG4Q1 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 7733Q1 TLC7733QPWRQ1 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 7733Q1 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of