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TLV1701, TLV1702, TLV1704
SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
TLV170x 2.2-V to 36-V, microPower Comparator
1 Features
3 Description
•
The TLV170x family of devices offers a wide supply
range, rail-to-rail inputs, low quiescent current, and
low propagation delay. All these features come in
industry-standard, extremely-small packages, making
these devices the best general-purpose comparators
available.
1
•
•
•
•
•
•
•
Supply Range:
+2.2 V to +36 V or ±1.1 V to ±18 V
Low Quiescent Current:
55 µA per Comparator
Input Common-Mode Range Includes Both Rails
Low Propagation Delay: 560 ns
Low Input Offset Voltage: 300 µV
Open Collector Outputs:
– Up to 36 V Above Negative Supply Regardless
of Supply Voltage
Industrial Temperature Range:
–40°C to +125°C
Small Packages:
– Single: SC70-5, SOT-23-5, SOT553-5
– Dual: VSSOP-8, X2QFN-8
– Quad: TSSOP-14
2 Applications
•
•
•
•
•
The open collector output offers the advantage of
allowing the output to be pulled to any voltage rail up
to +36 V above the negative power supply,
regardless of the TLV170x supply voltage.
These devices are available in single (TLV1701), dual
(TLV1702), and quad (TLV1704) channel versions.
Low input offset voltage, low input bias currents, low
supply current, and open-collector configuration make
the TLV170x family flexible enough to handle almost
any application, from simple voltage detection to
driving a single relay.
All devices are specified for operation across the
expanded industrial temperature range of –40°C to
+125°C.
Device Information(1)
Overvoltage and Undervoltage Detectors
Window Comparators
Overcurrent Detectors
Zero-Crossing Detectors
System Monitoring for:
– Power Supplies
– White Goods
– Industrial Sensors
– Automotive
– Medical
PART NUMBER
TLV1701
TLV1702
TLV1704
½
TLV1702
_
VIN
VOUT
1000n
VTH+
VTH-
VOUT
VPULLUP
+
½
TLV1702
VTH-
SOT-23 (5)
1.60 mm × 2.90 mm
X2QFN (8)
1.50 mm × 1.50 mm
VSSOP (8)(2)
3.00 mm × 3.00 mm
TSSOP (14)
4.40 mm × 5.00 mm
18 V Low-to-High
VIN
RPULLUP
t
GND
VS
1.25 mm × 2.00 mm
1200n
_
Propagation Delay (s)
+
SC-70 (5)
Stable Propagation Delay vs Temperature
VPULLUP
VTH+
BODY SIZE (NOM)
1.20 mm × 1.60 mm
(1) For all available packages, see the package option addendum
at the end of the datasheet.
(2) The VSSOP package is the same as the MSOP package.
TLV1702 as a Window Comparator
VS
PACKAGE
SOT553 (5)
18 V High-to-Low
2.2 V Low-to-High
800n
2.2 V High-to-Low
600n
400n
t
VOD = 100 mV
GND
200n
-40 -25 -10
5
20
35
50
65
Temperature (C)
80
95
110 125
C020
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV1701, TLV1702, TLV1704
SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison ...............................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
5
6
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
6
6
6
6
7
7
7
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information: TLV1701 .................................
Thermal Information: TLV1702 and TLV1704...........
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 11
8.1 Overview ................................................................. 11
8.2 Functional Block Diagram ....................................... 11
8.3 Feature Description................................................. 12
8.4 Device Functional Modes........................................ 12
9
Applications and Implementation ...................... 13
9.1 Application Information............................................ 13
9.2 Typical Application ................................................. 13
10 Power Supply Recommendations ..................... 14
11 Layout................................................................... 15
11.1 Layout Guidelines ................................................. 15
11.2 Layout Example .................................................... 15
12 Device and Documentation Support ................. 16
12.1
12.2
12.3
12.4
12.5
12.6
Documentation Support ........................................
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
16
16
16
16
16
16
13 Mechanical, Packaging, and Orderable
Information ........................................................... 16
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (December 2014) to Revision D
Page
•
Changed document status to Production Data from Mixed Status ........................................................................................ 1
•
Changed status of TLV1702 RUG package to Production Data ............................................................................................ 1
Changes from Revision B (October 2014) to Revision C
Page
•
Changed TLV1701 DCK package from preview to production data ...................................................................................... 1
•
Changed Handling Ratings table to ESD Ratings table, and moved storage temperature to Absolute Maximum
Ratings table........................................................................................................................................................................... 6
Changes from Revision A (September 2014) to Revision B
Page
•
Changed footnote 2 in Device Information table: added TLV1701 to list of available devices .............................................. 1
•
Added TLV1701 to list of production data packages in footnote for the Pin Configuration and Functions section .............. 5
•
Added TLV1701 row to V(ESD) parameter in Handling Ratings table ...................................................................................... 6
2
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SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
Changes from Original (December 2013) to Revision A
Page
•
Changed document format to latest data sheet standards; added new sections and moved existing sections .................... 1
•
Changed TLV1704 PW (TSSOP-14) package from preview to production data ................................................................... 1
•
Added sub-bullet to the Open Collector Outputs feature ....................................................................................................... 1
•
Added second paragraph to the Description section.............................................................................................................. 1
•
Deleted package information from Description section; redundant information ..................................................................... 1
•
Changed Related Products table to Device Comparison table, moved from page 1, and added TLV370x family................ 4
•
Added TLV1701, TLV1702 RUG, and TLV704 package drawings ........................................................................................ 5
•
Added thermal information for TLV1702 RUG, TLV1704 PW, and all TLV1701 packages ................................................... 6
•
Moved switching characteristics parameters from Electrical Characteristics table to new Switching Characteristics table .. 7
•
Changed all typical values in Switching Characteristics table................................................................................................ 7
•
Changed title for Figure 1 ....................................................................................................................................................... 8
•
Changed Figure 8................................................................................................................................................................... 8
•
Changed Figure 9 .................................................................................................................................................................. 8
•
Changed Figure 10................................................................................................................................................................. 8
•
Changed Figure 11................................................................................................................................................................. 8
•
Changed Figure 12................................................................................................................................................................. 8
•
Changed Figure 13................................................................................................................................................................. 9
•
Changed Figure 14................................................................................................................................................................. 9
•
Changed Application Information and moved section ......................................................................................................... 13
•
Deleted Application Examples section ................................................................................................................................. 13
Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: TLV1701 TLV1702 TLV1704
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TLV1701, TLV1702, TLV1704
SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
www.ti.com
5 Device Comparison
DEVICE
TLV3201
TLV3202
TLV3501
TLV3502
FEATURES
40-ns, 40-µA, push-pull comparator
4.5-ns, rail-to-rail, push-pull, high-speed comparator
TLV3401
TLV3402
Nanopower open-drain output comparator
TLV3404
TLV3701
TLV3702
Nanopower push-pull output comparator
TLV3704
REF3325
REF3330
3.9-µA, SC70-3 voltage reference
REF3333
4
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SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
6 Pin Configuration and Functions
TLV1701
DBV (SOT-23-5), DCK (SC70-5), DRL (SOT553-5) Packages
Top View
TLV1702
RUG (X2QFN-8) Package
Top View
V+
IN+
1
V-
2
IN±
3
5
4
V+
8
OUT
1OUT
1
7
2OUT
1IN±
2
6
2IN±
1IN+
3
5
2IN+
4
TLV1702
DGK (VSSOP-8) Package
Top View
1OUT
1
8
V+
1IN±
2
7
2OUT
1IN+
3
6
2IN±
V-
4
5
2IN+
V-
TLV1704
PW (TSSOP-14) Package
Top View
2OUT
1
14 3OUT
1OUT
2
13 4OUT
V+
3
12 V-
1IN±
4
11 4IN+
1IN+
5
10 4IN±
2IN±
6
9
3IN+
2IN+
7
8
3IN±
Pin Functions
PIN
NO.
TLV1701
DBV, DCK, DRL
TLV1702
DGK, RUG
TLV1704
PW
I/O
IN+
1
—
—
I
Noninverting input
1IN+
—
3
5
I
Noninverting input, channel 1
2IN+
—
5
7
I
Noninverting input, channel 2
3IN+
—
—
9
I
Noninverting input, channel 3
4IN+
—
—
11
I
Noninverting input, channel 4
IN–
3
—
—
I
Inverting input
1IN–
—
2
4
I
Inverting input, channel 1
2IN–
—
6
6
I
Inverting input, channel 2
3IN–
—
—
8
I
Inverting input, channel 3
4IN–
—
—
10
I
Inverting input, channel 4
OUT
4
—
—
O
Output
1OUT
—
1
2
O
Output, channel 1
2OUT
—
7
1
O
Output, channel 2
3OUT
—
—
14
O
Output, channel 3
4OUT
—
—
13
O
Output, channel 4
V+
5
8
3
—
Positive (highest) power supply
V–
2
4
12
—
Negative (lowest) power supply
NAME
DESCRIPTION
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TLV1701, TLV1702, TLV1704
SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
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7 Specifications
7.1 Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage
Voltage
Signal input pins
(2)
(VS–) – 0.5
MAX
UNIT
+40 (±20)
V
(VS+) + 0.5
V
±10
mA
Current (2)
Output short-circuit (3)
Continuous
Operating temperature range
–55
Junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
–65
mA
+150
°C
150
°C
+150
°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must be
current limited to 10 mA or less.
Short-circuit to ground; one comparator per package.
7.2 ESD Ratings
VALUE
UNIT
TLV1701 and TLV1702
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
Charged-device model (CDM), per JEDEC specification JESD22-C101
±2000
(2)
±1500
V
TLV1704
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
Charged-device model (CDM), per JEDEC specification JESD22-C101
±1000
(2)
±1500
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage VS = (VS+) – (VS–)
NOM
MAX
UNIT
2.2 (±1.1)
36 (±18)
V
–40
125
°C
Specified temperature
7.4 Thermal Information: TLV1701
TLV1701
THERMAL METRIC (1)
DRL (SOT553)
DCK (SC70)
DBV (SOT23)
5 PINS
5 PINS
5 PINS
271.5
283.6
233.1
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
115.6
94.1
156.4
°C/W
RθJB
Junction-to-board thermal resistance
89.7
61.3
60.6
°C/W
ψJT
Junction-to-top characterization parameter
17.6
1.9
35.7
°C/W
ψJB
Junction-to-board characterization parameter
89.2
60.5
59.7
°C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
°C/W
RθJA
(1)
6
Junction-to-ambient thermal resistance
UNIT
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
7.5 Thermal Information: TLV1702 and TLV1704
TLV1702
THERMAL METRIC (1)
TLV1704
RUG (QFN)
DGK (VSSOP)
PW (TSSOP)
8 PINS
8 PINS
14 PINS
UNIT
205.6
199
128.1
°C/W
θJA
Junction-to-ambient thermal resistance
θJCtop
Junction-to-case (top) thermal resistance
77.1
89.5
56.5
°C/W
θJB
Junction-to-board thermal resistance
107.0
120.4
69.9
°C/W
ψJT
Junction-to-top characterization parameter
2.0
22.0
9.1
°C/W
ψJB
Junction-to-board characterization parameter
107.0
118.7
69.3
°C/W
θJCbot
Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.6 Electrical Characteristics
at TA = +25°C, VS = +2.2 V to +36 V, CL = 15 pF, RPULLUP = 5.1 kΩ, VCM = VS / 2, and VS = VPULLUP (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TA = 25°C, VS = 2.2 V
±0.5
±3.5
mV
TA = 25°C, VS = 36 V
±0.3
±2.5
mV
OFFSET VOLTAGE
VOS
Input offset voltage
TA = –40°C to +125°C
dVOS/dT
Input offset voltage drift
PSRR
Power-supply rejection ratio
TA = –40°C to +125°C
TA = –40°C to +125°C
±5.5
mV
±4
±20
μV/°C
15
100
μV/V
μV/V
20
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
TA = –40°C to +125°C
(V–)
(V+)
V
15
nA
20
nA
INPUT BIAS CURRENT
IB
Input bias current
IOS
Input offset current
CLOAD
Capacitive load drive
5
TA = –40°C to +125°C
0.5
nA
See Typical Characteristics
OUTPUT
VO
ISC
Voltage output swing from rail
IO ≤ 4 mA, input overdrive = 100 mV,
VS = 36 V
900
mV
IO = 0 mA, input overdrive = 100 mV,
VS = 36 V
600
mV
Short circuit sink current
Output leakage current
VIN+ > VIN–
20
mA
70
nA
POWER SUPPLY
VS
IQ
Specified voltage range
2.2
IO = 0 A
Quiescent current (per channel)
55
IO = 0 A, TA = –40°C to +125°C
36
V
75
μA
100
μA
7.7 Switching Characteristics
at TA = +25°C, VS = +2.2 V to +36 V, CL = 15 pF, RPULLUP = 5.1 kΩ, VCM = VS / 2, and VS = VPULLUP (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tpHL
Propagation delay time, high-to-low
Input overdrive = 100 mV
460
ns
tpLH
Propagation delay time, low-to-high
Input overdrive = 100 mV
560
ns
tR
Rise time
Input overdrive = 100 mV
365
ns
tF
Fall time
Input overdrive = 100 mV
240
ns
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SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
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7.8 Typical Characteristics
at TA = +25°C, VS = +5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
75
6
VS = 2.2 V
Input Bias Current (nA)
Quiescent Current ( A)
70
65
VS = ±18 V
60
55
50
VS = 2.2 V
45
4
VS = ±18 V
2
Ibn
40
Ibp
0
35
±40 ±25 ±10
5
20
35
50
65
80
95
110 125
Temperature (C)
±50
Figure 1. Quiescent Current vs Temperature
50
75
125
C007
Figure 2. Input Bias Current vs Temperature
VS = ±1.1 V
±4
Output Voltage (V)
0.75
VS = ±18 V
0.5
0.25
VS = 2.2 V
±6
±8
±10
±12
±14
±16
0
VS = ±18 V
±18
±50
±25
0
25
50
75
100
Temperature (C)
125
0
5
10
15
20
Output Current (mA)
C007
Figure 3. Input Offset Current vs Temperature
C011
Figure 4. Output Voltage vs Output Current
3
3
14 Typical Units Shown
13 Typical Units Shown
2
Offset Voltage (mV)
2
1
0
±1
±2
1
0
±1
±2
VS = ±18 V
VS = 2.2 V
±3
±3
0
6
12
18
24
Common-Mode Voltage (V)
30
36
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0
0.5
1
1.5
Common-Mode Voltage (V)
C027
Figure 5. Offset Voltage vs Common-Mode Voltage
8
100
0
±2
Offset Voltage (mV)
25
Temperature (C)
1
Input Offset Current (nA)
0
±25
C028
2
C028
Figure 6. Offset Voltage vs Common-Mode Voltage
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SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
Typical Characteristics (continued)
at TA = +25°C, VS = +5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
3
1000n
16 Typical Units Shown
18 V Low-to-High
18 V High-to-Low
Propagation Delay (s)
Offset Voltage (mV)
2
1
0
±1
800n
2.2 V Low-to-High
2.2 V High-to-Low
600n
400n
±2
200n
±3
0
6
12
18
24
30
Supply Voltage (V)
36
0
400
600
800
1000
Input Overdrive (mV)
Figure 7. Offset Voltage vs Supply Voltage
C020
Figure 8. Propagation Delay vs Input Overdrive
1200n
2.2 V Supply
18 V Low-to-High
18 V Supply
18 V High-to-Low
1000n
Propagation Delay (s)
Propagation Delay (s)
200
C028
tPLH
2.2 V Low-to-High
800n
2.2 V High-to-Low
600n
400n
tPHL
VOD = 100 mV
200n
20p
200p
2n
Output Capacitive Load (F)
C020
-40 -25 -10
VS = 36 V, Overdrive = 100 mV
Input Voltage (50 mV/div)
Input Voltage (50 mV/div)
50
65
80
95
110 125
C020
Output Voltage
tPLH = 400 ns
Output Voltage (10 V/div)
Output Voltage
35
Figure 10. Propagation Delay vs Temperature
Output Voltage (10 V/div)
tPLH = 440 ns
20
Temperature (C)
Figure 9. Propagation Delay vs Capacitive Load
Input Voltage
5
Input Voltage
VS = 36 V, Overdrive = 100 mV
Time (150 ns/div)
Time (150 ns/div)
C021
Figure 11. Propagation Delay (TpLH)
C021
Figure 12. Propagation Delay (TpHL)
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Typical Characteristics (continued)
tPLH = 560 ns
Output Voltage
Output Voltage
Input Voltage (50 mV/div)
Input Voltage
VS = 2.2 V, Overdrive = 100 mV
tPLH = 460 ns
Input Voltage
VS = 2.2 V, Overdrive = 100 mV
Time (150 ns/div)
Time (150 ns/div)
C021
C021
Figure 13. Propagation Delay (TpLH)
Figure 14. Propagation Delay (TpHL)
35
10
Offset Voltage (mV)
3.5
2.8
2
2.4
1.6
1.2
0.8
0
0.4
-0.4
0
-0.8
5
-1.2
0
15
-2
5
20
-1.6
10
25
-2.4
15
VS = 2.2 V
Distribution Taken from 2524 Comparators
-2.8
20
30
-3.5
Percentage of Comparators (%)
VS = ±18 V
Distribution Taken from 2524 Comparators
-2.5
-1.8
-1.6
-1.4
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2.5
Percentage of Comparators (%)
30
25
Output Voltage (500 mV/div)
Output Voltage (500 mV/div)
Input Voltage (50 mV/div)
at TA = +25°C, VS = +5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
Offset Voltage (mV)
C019
C019
Figure 15. Offset Voltage Production Distribution
Figure 16. Offset Voltage Production Distribution
Short Circuit Current (mA)
30
VS = 2.2 V
25
20
15
10
5
Sink Current
0
0
6
12
18
24
30
Supply Voltage (V)
36
C002
Figure 17. Short-Circuit Current vs Supply Voltage
10
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SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
8 Detailed Description
8.1 Overview
The TLV170x comparators features rail-to-rail input and output on supply voltages as high as 36 V. The rail-torail input stage enables detection of signals close to the supply and ground. The open collector configuration
allows the device to be used in wired-OR configurations, such as a window comparator. A low supply current of
55 μA per channel with small, space-saving packages, makes these comparators versatile for use in a wide
range of applications, from portable to industrial.
8.2 Functional Block Diagram
V+
OUT
IN+
IN-
IN+
IN-
V-
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8.3 Feature Description
8.3.1 Comparator Inputs
Voltage (5 V/div)
The TLV170x are rail-to-rail input comparators, with an input common-mode range that includes the supply rails.
The TLV170x is designed to prevent phase inversion when the input pins exceed the supply voltage. Figure 18
shows the TLV170x response when input voltages exceed the supply, resulting in no phase inversion.
Output Voltage
Input Voltage
Time (5 ms/div)
C030
Figure 18. No Phase Inversion: Comparator Response to Input Voltage
(Propagation Delay Included)
8.4 Device Functional Modes
8.4.1 Setting Reference Voltage
Using a stable reference is important when setting the transition point for the TLV170x. The REF3333, as shown
in Figure 19, provides a 3.3-V reference voltage with low drift and only 3.9 μA of quiescent current.
VS
REF3333
VPULLUP
VS+
GND
RPULLUP
+
TLV1701
_
VIN
VOUT
VS -
Figure 19. Reference Voltage for the TLV170x
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9 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TLV170x can be used in a wide variety of applications, such as zero crossing detectors, window
comparators, over and undervoltage detectors, and high-side voltage sense circuits.
9.2 Typical Application
Comparators are used to differentiate between two different signal levels. For example, a comparator
differentiates between an overtemperature and normal-temperature condition. However, noise or signal variation
at the comparison threshold causes multiple transitions. This application example sets upper and lower
hysteresis thresholds to eliminate the multiple transitions caused by noise.
5V
Rp
5 k
+
5V
+
+V
Vout
Vin
Rx
100 k
Ry
100 k
5V
Rh
576 k
Figure 20. Comparator Schematic with Hysteresis
9.2.1 Design Requirements
The design requirements are as follows:
• Supply voltage: 5 V
• Input: 0 V to 5 V
• Lower threshold (VL) = 2.3 V ±0.1 V
• Upper threshold (VH) = 2.7 V ±0.1 V
• VH – VL = 2.4 V ±0.1 V
• Low power consumption
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Typical Application (continued)
9.2.2 Detailed Design Procedure
Make a small change to the comparator circuit to add hysteresis. Hysteresis uses two different threshold voltages
to avoid the multiple transitions introduced in the previous circuit. The input signal must exceed the upper
threshold (VH) to transition low, or below the lower threshold (VL) to transition high.
Figure 20 illustrates hysteresis on a comparator. Resistor Rh sets the hysteresis level. An open-collector output
stage requires a pullup resistor (Rp). The pullup resistor creates a voltage divider at the comparator output that
introduces an error when the output is at logic high. This error can be minimized if Rh > 100Rp.
When the output is at a logic high (5 V), Rh is in parallel with Rx (ignoring Rp). This configuration drives more
current into Ry, and raises the threshold voltage (VH) to 2.7 V. The input signal must drive above VH = 2.7 V to
cause the output to transition to logic low (0 V).
When the output is at logic low (0 V), Rh is in parallel with Ry. This configuration reduces the current into Ry, and
reduces the threshold voltage to 2.3 V. The input signal must drive below VL = 2.3 V to cause the output to
transition to logic high (5 V).
For more details on this design and other alternative devices that can be used in place of the TLV1702, refer to
Precision Design TIPD144, Comparator with Hysteresis Reference Design.
9.2.3 Application Curve
Figure 21 shows the upper and lower thresholds for hysteresis. The upper threshold is 2.76 V and the lower
threshold is 2.34 V, both of which are close to the design target.
Figure 21. TLV1701 Upper and Lower Threshold with Hysteresis
10 Power Supply Recommendations
The TLV170x is specified for operation from 2.2 V to 36 V (±1.1 to ±18 V); many specifications apply from –40°C
to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are
presented in the Typical Characteristics section.
CAUTION
Supply voltages larger than 40 V can permanently damage the device; see the
Absolute Maximum Ratings.
Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or highimpedance power supplies. For more detailed information on bypass capacitor placement; see the Layout
Guidelines section.
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SBOS589D – DECEMBER 2013 – REVISED JUNE 2015
11 Layout
11.1 Layout Guidelines
Comparators are very sensitive to input noise. For best results, maintain the following layout guidelines:
• Use a printed circuit board (PCB) with a good, unbroken low-inductance ground plane. Proper grounding (use
of ground plane) helps maintain specified performance of the TLV170x.
• To minimize supply noise, place a decoupling capacitor (0.1-μF ceramic, surface-mount capacitor) as close
as possible to VS as shown in Figure 22.
• On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from the output.
• Solder the device directly to the PCB rather than using a socket.
• For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some
degradation to propagation delay when the impedance is low. Run the topside ground plane between the
output and inputs.
• Run the ground pin ground trace under the device up to the bypass capacitor, shielding the inputs from the
outputs.
11.2 Layout Example
V+
IN+
+
OUT
INV(Schematic Representation)
Run the input traces
as far away from
the supply lines
as possible
Use low-ESR, ceramic
bypass capacitor
VS+
IN+
IN+
GND
V+
VS± or GND
V±
OUT
OUT
IN-
INGND
Only needed for
dual-supply
operation
Figure 22. Comparator Board Layout
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
TIDU020 — Precision Design, Comparator with Hysteresis Reference Design.
SBOS392 — REF3333 Data Sheet
12.2 Related Links
Table 1 lists quick access links. Categories include technical documents, support and community resources,
tools and software, and quick access to sample or buy.
Table 1. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TLV1701
Click here
Click here
Click here
Click here
Click here
TLV1702
Click here
Click here
Click here
Click here
Click here
TLV1704
Click here
Click here
Click here
Click here
Click here
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLV1701AIDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
ZAYF
TLV1701AIDBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
ZAYF
TLV1701AIDCKR
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
SIR
TLV1701AIDCKT
ACTIVE
SC70
DCK
5
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
SIR
TLV1701AIDRLR
ACTIVE
SOT-5X3
DRL
5
4000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SIS
TLV1701AIDRLT
ACTIVE
SOT-5X3
DRL
5
250
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
SIS
TLV1702AIDGK
ACTIVE
VSSOP
DGK
8
80
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
1702
TLV1702AIDGKR
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
1702
TLV1702AIRUGR
ACTIVE
X2QFN
RUG
8
3000
RoHS & Green
Call TI | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
FC
TLV1704AIPW
ACTIVE
TSSOP
PW
14
90
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TL1704
TLV1704AIPWR
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TL1704
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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