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Design
TLV1701-Q1, TLV1702-Q1, TLV1704-Q1
SLOS890C – OCTOBER 2015 – REVISED DECEMBER 2019
TLV170x-Q1 2.2-V to 36-V, microPower Comparator
1 Features
3 Description
•
•
The TLV1701-Q1 (Single), TLV1702-Q1 (Dual) and
TLV1704-Q1 (Quad) devices offers a wide supply
range, rail-to-rail inputs, low quiescent current, and
low propagation delay. All these features come in
industry-standard, extremely-small packages, making
these devices the best general-purpose comparators
available.
1
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
AEC Q100-Qualified With the Following Results
– Device Temperature Grade 1: –40°C to
+125°C Ambient Operating Temperature
– Device HBM ESD Classification Level 2
(TLV1701-Q1)
– Device HBM ESD Classification Level 1C
(TLV1702-Q1,TLV1704-Q1)
– Device CDM ESD Classification Level C6
Supply Range: 2.2 V to 36 V or ±1.1 V to ±18 V
Low Quiescent Current: 55 µA per Comparator
Input Common-Mode Range Includes Both Rails
Low Propagation Delay: 560 ns
Low Input Offset Voltage: 300 µV
Open Collector Outputs:
– Up to 36 V Above Negative Supply Regardless
of Supply Voltage
Industrial Temperature Range: –40°C to +125°C
Small Packages:
– Single: SOT23-5 and SC-70-5
– Dual: VSSOP-8
– Quad: TSSOP-14
The open collector output offers the advantage of
allowing the output to be pulled to any voltage rail up
to 36 V above the negative power supply, regardless
of the TLV170x-Q1 supply voltage.
The device is a microPower comparator. Low input
offset voltage, low input bias currents, low supply
current, and open-collector configuration make the
TLV170x-Q1 device flexible enough to handle almost
any application, from simple voltage detection to
driving a single relay.
The device is specified for operation across the
expanded industrial temperature range of –40°C to
+125°C.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SOT-23 (5)
1.60 mm × 2.90 mm
SC-70 (5)
1.25 mm × 2.00 mm
TLV1702-Q1
VSSOP (8)
3.00 mm × 3.00 mm
2 Applications
TLV1704-Q1
TSSOP (14)
4.40 mm × 5.00 mm
•
•
•
•
•
(1) For all available packages, see the package option addendum
at the end of the data sheet.
Overvoltage and Undervoltage Detectors
Window Comparators
Overcurrent Detectors
Zero-Crossing Detectors
System Monitoring for:
– White Goods
– Automotive
– Medical
TLV1702-Q1 as a Window Comparator
TLV1701-Q1
Stable Propagation Delay vs Temperature
V(PULLUP)
V(th+)
+
½
Device
_
1200n
18 V Low-to-High
VI
R(PULLUP)
VO
1000n
V(th+)
V(th±)
t
VI
V(th±)
GND
VS
+ ½
Device
_
VO
V(PULLUP)
18 V High-to-Low
2.2 V Low-to-High
800n
2.2 V High-to-Low
600n
400n
t
GND
Propagation Delay (s)
VS
200n
-40 -25 -10
5
20
35
50
65
Temperature (C)
80
95
110 125
C012
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV1701-Q1, TLV1702-Q1, TLV1704-Q1
SLOS890C – OCTOBER 2015 – REVISED DECEMBER 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
5
7.1
7.2
7.3
7.4
7.5
7.6
7.7
5
5
5
5
6
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 10
8.3 Feature Description................................................. 11
8.4 Device Functional Modes........................................ 11
9
Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Application ................................................. 12
10 Power Supply Recommendations ..................... 13
11 Layout................................................................... 14
11.1 Layout Guidelines ................................................. 14
11.2 Layout Example .................................................... 14
12 Device and Documentation Support ................. 15
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Support Resources ...............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
15
15
15
15
15
15
15
13 Mechanical, Packaging, and Orderable
Information ........................................................... 15
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (September 2017) to Revision C
Page
•
Added DCK Package Information........................................................................................................................................... 1
•
Changed incorrect front page HBM ESD classification level from 3A to 2 for TLV1701-Q1 ................................................. 1
•
Changed incorrect front page CDM from C5 back to C6 ....................................................................................................... 1
Changes from Revision A (December 2015) to Revision B
Page
•
Added TLV1701-Q1 device to data sheet .............................................................................................................................. 1
•
Added TLV1701-Q1 to ESD table and specified the ESD ratings under each device ........................................................... 5
Changes from Original (November 2015) to Revision A
•
2
Page
Added TLV1704-Q1 device to data sheet .............................................................................................................................. 1
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Product Folder Links: TLV1701-Q1 TLV1702-Q1 TLV1704-Q1
TLV1701-Q1, TLV1702-Q1, TLV1704-Q1
www.ti.com
SLOS890C – OCTOBER 2015 – REVISED DECEMBER 2019
5 Device Comparison Table
Table 1. Related Products
DEVICE
TLC3702-Q1
TLC3704-Q1
TLV3012-Q1
TLV3501-Q1
TLV3502-Q1
TLV3701-Q1
TLV3702-Q1
FEATURES
Push-pull, 20-µA, 20-mA drive
Push-pull, 5-µA, integrated 1.242-V reference
Push-Pull, 3.2 mA, 4.5-ns propagation delay
Push-pull, 560-nA, reverse battery to 16 V
REF50xx-Q1
Series reference, 0.1% tolerance, 8 ppm/°C
TL4050xx-Q1
Shunt reference, 0.1% tolerance, 50 ppm/°C
TLVH431-Q1
Adjustable Shunt Reference, 1.24 V to 18 V
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3
TLV1701-Q1, TLV1702-Q1, TLV1704-Q1
SLOS890C – OCTOBER 2015 – REVISED DECEMBER 2019
www.ti.com
6 Pin Configuration and Functions
TLV1701-Q1 DBV and DCK Packages
5-Pin SOT-23 and SC70
Top View
IN+
1
V-
2
IN±
3
5
V+
4
OUT
TLV1702-Q1 DGK Package
8-Pin VSSOP
Top View
1OUT
1
8
V+
1IN±
2
7
2OUT
1IN+
3
6
2IN±
V-
4
5
2IN+
TLV1704-Q1 PW Package
14-Pin TSSOP
Top View
2OUT
1
14 3OUT
1OUT
2
13 4OUT
V+
3
12 V-
1IN±
4
11 4IN+
1IN+
5
10 4IN±
2IN±
6
9
3IN+
2IN+
7
8
3IN±
Pin Functions
PIN
TLV1701-Q1
DBV, DCK
TLV1702-Q1
DGK
TLV1704-Q1
PW
I/O
IN+
1
—
—
I
Noninverting input
1IN+
—
3
5
I
Noninverting input, channel 1
2IN+
—
5
7
I
Noninverting input, channel 2
3IN+
—
—
9
I
Noninverting input, channel 3
4IN+
—
—
11
I
Noninverting input, channel 4
IN–
3
—
—
I
Inverting input
1IN–
—
2
4
I
Inverting input, channel 1
2IN–
—
6
6
I
Inverting input, channel 2
3IN–
—
—
8
I
Inverting input, channel 3
4IN–
—
—
10
I
Inverting input, channel 4
OUT
4
—
—
O
Output
1OUT
—
1
2
O
Output, channel 1
2OUT
—
7
1
O
Output, channel 2
3OUT
—
—
14
O
Output, channel 3
4OUT
—
—
13
O
Output, channel 4
V+
5
8
3
—
Positive (highest) power supply
V–
2
4
12
—
Negative (lowest) power supply
NAME
4
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DESCRIPTION
Copyright © 2015–2019, Texas Instruments Incorporated
Product Folder Links: TLV1701-Q1 TLV1702-Q1 TLV1704-Q1
TLV1701-Q1, TLV1702-Q1, TLV1704-Q1
www.ti.com
SLOS890C – OCTOBER 2015 – REVISED DECEMBER 2019
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
Supply voltage
Voltage
Signal input pins
(2)
(VS–) – 0.5
MAX
UNIT
40 (±20)
V
(VS+) + 0.5
V
±10
mA
Current (2)
Output short-circuit (3)
Continuous
Operating temperature
–55
Junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
–65
mA
150
°C
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must be
current limited to 10 mA or less.
Short-circuit to ground; one comparator per package.
7.2 ESD Ratings
VALUE
UNIT
TLV1701-Q1
V(ESD)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002 (1)
±2000
Charged-device model (CDM), per AEC Q100-011
±1000
Human-body model (HBM), per AEC Q100-002 (1)
±1000
Charged-device model (CDM), per AEC Q100-011
±1000
Human-body model (HBM), per AEC Q100-002 (1)
±1000
Charged-device model (CDM), per AEC Q100-011
±1000
V
TLV1702-Q1
V(ESD)
Electrostatic discharge
V
TLV1704-Q1
V(ESD)
(1)
Electrostatic discharge
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage VS = (VS+) – (VS–)
NOM
MAX
UNIT
2.2 (±1.1)
36 (±18)
V
–40
125
°C
Specified temperature
7.4 Thermal Information
TLV1701-Q1
THERMAL METRIC (1)
RθJA
TLV1704-Q1
DCK (SC-70)
DGK (VSSOP)
PW (TSSOP)
5 PINS
5 PINS
8 PINS
14 PINS
UNIT
233.1
222.5
199
128.1
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
156.4
137.2
89.5
56.5
°C/W
RθJB
Junction-to-board thermal resistance
60.6
71.3
120.4
69.9
°C/W
ψJT
Junction-to-top characterization parameter
35.7
44.6
22
9.1
°C/W
ψJB
Junction-to-board characterization parameter
59.7
71.0
118.7
69.3
°C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
N/A
°C/W
(1)
Junction-to-ambient thermal resistance
TLV1702-Q1
DBV (SOT-23)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2015–2019, Texas Instruments Incorporated
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SLOS890C – OCTOBER 2015 – REVISED DECEMBER 2019
www.ti.com
7.5 Electrical Characteristics
at TA = 25°C, VS = 2.2 V to 36 V, CL = 15 pF, RPULLUP = 5.1 kΩ, VCM = VS / 2, and VS = VPULLUP (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TA = 25°C, VS = 2.2 V
±0.5
±3.5
mV
TA = 25°C, VS = 36 V
±0.3
±2.5
mV
OFFSET VOLTAGE
VOS
Input offset voltage
TA = –40°C to +125°C
±5.5
TA = 25°C, VS = 36 V, TLV1701-Q1 Only
±0.4
TA = –40°C to +125°C, TLV1701-Q1 Only
dVOS/dT
Input offset voltage drift
PSRR
Power-supply rejection ratio
±3.2
mV
±6.3
TA = –40°C to +125°C
±4
±20
μV/°C
TA = 25°C
15
100
μV/V
TA = –40°C to +125°C
20
μV/V
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
TA = –40°C to +125°C
(V–)
(V+)
V
15
nA
20
nA
INPUT BIAS CURRENT
IB
Input bias current
IOS
Input offset current
CLOAD
Capacitive load drive
TA = 25°C
5
TA = –40°C to +125°C
0.5
nA
See Typical Characteristics
OUTPUT
VO
ISC
Voltage output swing from rail
IO ≤ 4 mA, input overdrive = 100 mV,
VS = 36 V
900
mV
IO = 0 mA, input overdrive = 100 mV,
VS = 36 V
600
mV
Short circuit sink current
Output leakage current
VIN+ > VIN–
20
mA
70
nA
POWER SUPPLY
VS
IQ
Specified voltage range
2.2
Quiescent current (per channel)
IO = 0 A
55
IO = 0 A, TA = –40°C to +125°C
36
V
75
μA
100
μA
7.6 Switching Characteristics
at TA = 25°C, VS = +2.2 V to +36 V, CL = 15 pF, RPULLUP = 5.1 kΩ, VCM = VS / 2, and VS = VPULLUP (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tpHL
Propagation delay time, high-to-low
Input overdrive = 100 mV
460
ns
tpLH
Propagation delay time, low-to-high
Input overdrive = 100 mV
560
ns
tR
Rise time
Input overdrive = 100 mV
365
ns
tF
Fall time
Input overdrive = 100 mV
240
ns
6
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SLOS890C – OCTOBER 2015 – REVISED DECEMBER 2019
7.7 Typical Characteristics
at TA = 25°C, VS = 5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
6
75
VS = 2.2 V
VS = ±18 V
65
Input Bias Current (nA)
Quiescent Current ( A)
70
60
55
50
VS = 2.2 V
45
4
VS = ±18 V
2
Ibn
40
Ibp
35
0
±40 ±25 ±10
5
20
35
50
65
80
95
110 125
Temperature (ƒC)
±50
50
75
100
125
Temperature (ƒC)
Figure 1. Quiescent Current vs Temperature
C015
Figure 2. Input Bias Current vs Temperature
0
VS = ±1.1 V
±2
±4
Output Voltage (V)
0.75
VS = ±18 V
0.5
0.25
VS = 2.2 V
±6
±8
±10
±12
±14
±16
0
±50
±25
0
25
50
75
100
VS = ±18 V
±18
125
Temperature (ƒC)
0
5
10
15
20
Output Current (mA)
C014
Figure 3. Input Offset Current vs Temperature
C011
Figure 4. Output Voltage vs Output Current
3
3
2
2
Offset Voltage (mV)
Offset Voltage (mV)
25
C017
1
Input Offset Current (nA)
0
±25
1
0
-1
-2
1
0
-1
-2
-3
-3
0
6
VS = ±18 V
12
18
24
Common-Mode Voltage (V)
30
36
14 typical units shown
Figure 5. Offset Voltage vs Common-Mode Voltage
Copyright © 2015–2019, Texas Instruments Incorporated
0
0.5
D003
1
1.5
Common-Mode Voltage (V)
VS = 2.2 V
2
D002
13 typical units shown
Figure 6. Offset Voltage vs Common-Mode Voltage
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Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
3
1000n
“18 V Low-to-High
“18 V High-to-Low
Propagation Delay (s)
Offset Voltage (mV)
2
1
0
-1
800n
2.2 V Low-to-High
2.2 V High-to-Low
600n
400n
-2
200n
0
-3
0
6
12
18
24
Supply Voltage (V)
30
200
400
36
600
800
1000
Input Overdrive (mV)
C020
D001
16 typical units shown
Figure 8. Propagation Delay vs Input Overdrive
Figure 7. Offset Voltage vs Supply Voltage
1200n
18 V Low-to-High
2.2 V Supply
“18 V Supply
18 V High-to-Low
Propagation Delay (s)
Propagation Delay (s)
1000n
tPLH
2.2 V Low-to-High
800n
2.2 V High-to-Low
600n
400n
tPHL
200n
20p
200p
2n
Output Capacitive Load (F)
C020
-40 -25 -10
5
20
35
50
65
80
95
110 125
Temperature (C)
C012
VOD = 100 mV
,QSXW9ROWDJH P9GLY
2XWSXW9ROWDJH
2XWSXW9ROWDJH
W3/+ QV
,QSXW9ROWDJH
7LPH QVGLY
7LPH QVGLY
&
VS = 36 V
Overdrive = 100 mV
Figure 11. Propagation Delay (TpLH)
8
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2XWSXW9ROWDJH 9GLY
W3/+ QV
2XWSXW9ROWDJH 9GLY
,QSXW9ROWDJH
Figure 10. Propagation Delay vs Temperature
,QSXW9ROWDJH P9GLY
Figure 9. Propagation Delay vs Capacitive Load
&
VS = 36 V
Overdrive = 100 mV
Figure 12. Propagation Delay (TpHL)
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SLOS890C – OCTOBER 2015 – REVISED DECEMBER 2019
Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
2XWSXW9ROWDJH
,QSXW9ROWDJH P9GLY
,QSXW9ROWDJH P9GLY
W3/+ QV
2XWSXW9ROWDJH
W3/+ QV
,QSXW9ROWDJH
7LPH QVGLY
7LPH QVGLY
&
VS = 2.2 V
&
Overdrive = 100 mV
VS = 2.2 V
Figure 13. Propagation Delay (TpLH)
Overdrive = 100
mV
Figure 14. Propagation Delay (TpHL)
30
35
25
30
Percentage of Comparators (%)
20
15
10
5
20
15
10
5
3.5
2.8
2
2.4
1.6
1.2
0.8
0
0.4
-0.4
-0.8
-1.2
-2
-1.6
-3.5
D005
Offset Voltage (mV)
VS = ±18 V
-2.4
0
-2.5
-1.8
-1.6
-1.4
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2.5
0
25
-2.8
Percentage of Comparators (%)
2XWSXW9ROWDJH P9GLY
2XWSXW9ROWDJH P9GLY
,QSXW9ROWDJH
Offset Voltage (mV)
Distribution taken from 2524 comparators
VS = 2.2 V
Figure 15. Offset Voltage Production Distribution
D004
Distribution taken from 2524 comparators
Figure 16. Offset Voltage Production Distribution
30
Short Circuit Current (mA)
VS = 2.2 V
25
20
15
10
5
0
0
6
12
18
24
Supply Voltage (V)
30
36
C016
Sink current
Figure 17. Short-Circuit Current vs Supply Voltage
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8 Detailed Description
8.1 Overview
The TLV170x-Q1 comparator features rail-to-rail input and output on supply voltages as high as 36 V. The rail-torail input stage enables detection of signals close to the supply and ground. The open-collector configuration
allows the device to be used in wired-OR configurations, such as a window comparator. A low supply current of
55 μA per channel with small, space-saving packages, makes these comparators versatile for use in a wide
range of applications, from portable to industrial.
8.2 Functional Block Diagram
V+
OUT
IN+
IN-
IN+
IN-
V-
10
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SLOS890C – OCTOBER 2015 – REVISED DECEMBER 2019
8.3 Feature Description
8.3.1 Comparator Inputs
Voltage (5 V/div)
The TLV170x-Q1 device is a rail-to-rail input comparator, with an input common-mode range that includes the
supply rails. The TLV170x-Q1 device is designed to prevent phase inversion when the input pins exceed the
supply voltage. Figure 18 shows the TLV170x-Q1 device response when input voltages exceed the supply,
resulting in no phase inversion.
Output Voltage
Input Voltage
Time (5 ms/div)
C030
Figure 18. No Phase Inversion: Comparator Response to Input Voltage
(Propagation Delay Included)
8.4 Device Functional Modes
8.4.1 Setting Reference Voltage
Using a stable reference is important when setting the transition point for the TLV170x-Q1 device. The REF3333,
as shown in Figure 19, provides a 3.3-V reference voltage with low drift and only 3.9 μA of quiescent current.
VS
REF3333
V(PULLUP)
VS+
GND
+
Device
_
VI
R(PULLUP)
VO
VS±
Figure 19. Reference Voltage for the TLV170x-Q1
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TLV170x-Q1 device can be used in a wide variety of applications, such as zero crossing detectors, window
comparators, over and undervoltage detectors, and high-side voltage sense circuits.
9.2 Typical Application
Comparators are used to differentiate between two different signal levels. For example, a comparator
differentiates between an overtemperature and normal-temperature condition. However, noise or signal variation
at the comparison threshold causes multiple transitions. This application example sets upper and lower
hysteresis thresholds to eliminate the multiple transitions caused by noise.
5V
Rp
5 kŸ
+
5V
+
+V
Vout
Vin
Rx
100 kŸ
Ry
100 kŸ
5V
Rh
576 kŸ
Figure 20. Comparator Schematic With Hysteresis
9.2.1 Design Requirements
The design requirements are as follows:
• Supply voltage: 5 V
• Input: 0 V to 5 V
• Lower threshold (VL) = 2.3 V ±0.1 V
• Upper threshold (VH) = 2.7 V ±0.1 V
• VH – VL = 2.4 V ±0.1 V
• Low-power consumption
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Typical Application (continued)
9.2.2 Detailed Design Procedure
Make a small change to the comparator circuit to add hysteresis. Hysteresis uses two different threshold voltages
to avoid the multiple transitions introduced in the previous circuit. The input signal must exceed the upper
threshold (VH) to transition low, or below the lower threshold (VL) to transition high.
Figure 20 illustrates hysteresis on a comparator. Resistor Rh sets the hysteresis level. An open-collector output
stage requires a pullup resistor (Rp). The pullup resistor creates a voltage divider at the comparator output that
introduces an error when the output is at logic high. This error can be minimized if Rh > 100 Rp.
When the output is at a logic high (5 V), Rh is in parallel with Rx (ignoring Rp). This configuration drives more
current into Ry, and raises the threshold voltage (VH) to 2.7 V. The input signal must drive above VH = 2.7 V to
cause the output to transition to logic low (0 V).
When the output is at logic low (0 V), Rh is in parallel with Ry. This configuration reduces the current into Ry, and
reduces the threshold voltage to 2.3 V. The input signal must drive below VL = 2.3 V to cause the output to
transition to logic high (5 V).
For more details on this design and other alternative devices that can be used in place of the TLV1702, refer to
Precision Design TIPD144, Comparator with Hysteresis Reference Design.
9.2.3 Application Curve
Figure 21 shows the upper and lower thresholds for hysteresis. The upper threshold is 2.76 V and the lower
threshold is 2.34 V, both of which are close to the design target.
Figure 21. TLV1701 Upper and Lower Threshold With Hysteresis
10 Power Supply Recommendations
The TLV170x-Q1 device is specified for operation from 2.2 V to 36 V (±1.1 to ±18 V); many specifications apply
from –40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or
temperature are presented in the Typical Characteristics section.
CAUTION
Supply voltages larger than 40 V can permanently damage the device; see the
Absolute Maximum Ratings.
Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or highimpedance power supplies. For more detailed information on bypass capacitor placement; see the Layout
Guidelines section.
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11 Layout
11.1 Layout Guidelines
Comparators are very sensitive to input noise. For best results, maintain the following layout guidelines:
• Use a printed-circuit board (PCB) with a good, unbroken low-inductance ground plane. Proper grounding (use
of ground plane) helps maintain specified performance of the TLV170x-Q1 device.
• To minimize supply noise, place a decoupling capacitor (0.1-μF ceramic, surface-mount capacitor) as close
as possible to VS as shown in Figure 22.
• On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from the output.
• Solder the device directly to the PCB rather than using a socket.
• For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some
degradation to propagation delay when the impedance is low. Run the topside ground plane between the
output and inputs.
• Run the ground pin ground trace under the device up to the bypass capacitor, shielding the inputs from the
outputs.
11.2 Layout Example
V+
IN+
+
OUT
INV(Schematic Representation)
Run the input traces
as far away from
the supply lines
as possible
Use low-ESR, ceramic
bypass capacitor
VS+
IN+
IN+
GND
V+
VS± or GND
V±
OUT
OUT
IN-
INGND
Only needed for
dual-supply
operation
Figure 22. Comparator Board Layout
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SLOS890C – OCTOBER 2015 – REVISED DECEMBER 2019
12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
• Precision Design, Comparator with Hysteresis Reference Design, TIDU020
• REF33xx 3.9-μA, SC70-3, SOT-23-3, and UQFN-8, 30-ppm/°C Drift Voltage Reference, SBOS392
12.2 Related Links
Table 2 lists quick access links. Categories include technical documents, support and community resources,
tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TLV1701-Q1
Click here
Click here
Click here
Click here
Click here
TLV1702-Q1
Click here
Click here
Click here
Click here
Click here
TLV1704-Q1
Click here
Click here
Click here
Click here
Click here
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLV1701AQDCKRQ1
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1FG
TLV1701QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1701
TLV1702AQDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1702Q
TLV1704AQPWQ1
PREVIEW
TSSOP
PW
14
90
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
T1704Q1
TLV1704AQPWRQ1
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
T1704Q1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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