TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
D
D
D
D
D
D
D
Wide Range of Supply Voltages Over
Specified Temperature Range:
TA = – 40°C to 85°C . . . 2 V to 8 V
Fully Characterized at 3 V and 5 V
Single-Supply Operation
Common-Mode Input-Voltage Range
Extends Below the Negative Rail and up to
VDD –1 V at 25°C
Output Voltage Range Includes Negative
Rail
D
D
D
High Input Impedance . . . 1012 Ω Typ
Low Noise . . . 25 nV/√Hz Typically at
f = 1 kHz (High-Bias Mode)
ESD-Protection Circuitry
Designed-In Latch-Up Immunity
Bias-Select Feature Enables Maximum
Supply Current Range From 17 µA to
1.5 mA at 25°C
D OR P PACKAGE
(TOP VIEW)
OFFSET N1
IN –
IN +
GND
1
8
2
7
3
6
4
5
PW PACKAGE
(TOP VIEW)
1
2
3
4
OFFSET N1
IN –
IN +
GND
BIAS SELECT
VDD
OUT
OFFSET N2
8
7
6
5
BIAS SELECT
VDD
OUT
OFFSET N2
description
The TLV2341 operational amplifier has been specifically developed for low-voltage, single-supply applications
and is fully specified to operate over a voltage range of 2 V to 8 V. The device uses the Texas Instruments
silicon-gate LinCMOS technology to facilitate low-power, low-voltage operation and excellent offset-voltage
stability. LinCMOS technology also enables extremely high input impedance and low bias currents allowing
direct interface to high-impedance sources.
The TLV2341 offers a bias-select feature, which allows the device to be programmed with a wide range of
different supply currents and therefore different levels of ac performance. The supply current can be set at
17 µA, 250 µA, or 1.5 mA, which results in slew-rate specifications between 0.02 and 2.1 V/µs (at 3 V).
The TLV2341 operational amplifiers are especially well suited to single-supply applications and are fully
specified and characterized at 3-V and 5-V power supplies. This low-voltage single-supply operation combined
with low power consumption makes this device a good choice for remote, inaccessible, or portable
battery-powered applications. The common-mode input range includes the negative rail.
The device inputs and outputs are designed to withstand – 100-mA currents without sustaining latch-up. The
TLV2341 incorporates internal ESD-protection circuits that prevents functional failures at voltages up to
2000 V as tested under MIL-STD 883 C, Methods 3015.2; however, care should be exercised in handling these
devices as exposure to ESD may result in the degradation of the device parametric performance.
AVAILABLE OPTIONS
PACKAGED DEVICES
TA
VIOmax
AT 25°C
SMALL
OUTLINE
(D)
PLASTIC
DIP
(P)
TSSOP
(PW)
CHIP
FORM
(Y)
– 40°C to 85°C
8 mV
TLV2341ID
TLV2341IP
TLV2341IPWLE
TLV2341Y
The D package is available taped and reeled. Add R suffix to the device type (e.g., TLV2341IDR).
The PW package is only available left-end taped and reeled (e.g., TLV2341IPWLE).
LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
bias-select feature
The TLV2342 offers a bias-select feature that allows the user to select any one of three bias levels, depending
on the level of performance desired. The tradeoffs between bias levels involve ac performance and power
dissipation (see Table 1).
Table 1. Effect of Bias Selection on Performance
MODE
TYPICAL PARAMETER VALUES
TA = 25°C, VDD = 3 V
HIGH BIAS
RL = 10 kΩ
MEDIUM BIAS
RL = 100 kΩ
LOW BIAS
RL = 1 MΩ
UNIT
PD
SR
Power dissipation
975
195
15
µW
Slew rate
2.1
0.38
0.02
V/µs
Vn
B1
Equivalent input noise voltage at f = 1 kHz
25
32
68
nV/√Hz
Unity-gain bandwidth
790
300
27
kHz
φm
AVD
Phase margin
46°
39°
34°
Large-signal differential voltage amplification
11
83
400
V/mV
bias selection
Bias selection is achieved by connecting BIAS SELECT to one of three voltage levels (see Figure 1). For
medium-bias applications, it is recommended that the bias-select pin be connected to the midpoint between the
supply rails. This procedure is simple in split-supply applications since this point is ground. In single-supply
applications, the medium-bias mode necessitates using a voltage divider as indicated in Figure 1. The use of
large-value resistors in the voltage divider reduces the current drain of the divider from the supply line. However,
large-value resistors used in conjunction with a large-value capacitor require significant time to charge up to
the supply midpoint after the supply is switched on. A voltage other than the midpoint may be used if it is within
the voltages specified in the following table.
VDD
Low
Medium
To the Bias-Select Pin
1 MΩ
High
BIAS MODE
BIAS-SELECT VOLTAGE
(single supply)
Low
Medium
High
VDD
1 V to VDD – 1 V
GND
1 MΩ
0.01 µ F
Figure 1. Bias Selection for Single-Supply Applications
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
high-bias mode
In the high-bias mode, the TLV2341 series feature low offset voltage drift, high input impedance, and low noise.
Speed in this mode approaches that of BiFET devices but at only a fraction of the power dissipation.
medium-bias mode
The TLV2341 in the medium-bias mode features a low offset voltage drift, high input impedance, and low noise.
Speed in this mode is similar to general-purpose bipolar devices but power dissipation is only a fraction of that
consumed by bipolar devices.
low-bias mode
In the low-bias mode, the TLV2341 features low offset voltage drift, high input impedance, extremely low power
consumption, and high differential voltage gain.
ORDER OF CONTENTS
TOPIC
BIAS MODE
Schematic
all
Absolute maximum ratings
all
Recommended operating conditions
all
Electrical characteristics
Operating characteristics
Typical characteristics
high
(Figures 2 – 31)
Electrical characteristics
Operating characteristics
Typical characteristics
medium
(Figures 32 – 61)
Electrical characteristics
Operating characteristics
Typical characteristics
low
(Figures 62 – 91)
Parameter measurement information
all
Application information
all
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TLV2341Y chip information
This chip, when properly assembled, displays characteristics similar to the TLV2341. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
(2)
(1)
(8)
(7)
OFFSET N1
IN +
IN –
OFFSET N2
48
BIAS SELECT
VDD
(7)
(1)
(3)
(2)
+
(6)
OUT
–
(5)
(4)
(8)
GND
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
(3)
(4)
(5)
(6)
TJmax = 150°C
TOLERANCES ARE ± 10%.
ALL DIMENSIONS ARE IN MILS.
55
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
equivalent schematic
VDD
P3
P12
P9A
P4
P1
P2
R6
P5
P9B
P11
R2
IN –
R1
N5
P10
R5
P6A
C1
P6B
P7B
P7A
P8
N12
N3
N9
N6
N7
N1
N2
N4
R3
D1
R4
N13
D2
R7
OFFSET
N1
OFFSET
N2
OUT
GND
COMPONENT COUNT†
Transistors
Diodes
Resistors
Capacitors
27
2
7
1
† Includes the amplifier and all
ESD, bias, and trim circuitry
BIAS
SELECT
5
SLOS110A – MAY 1992 – REVISED AUGUST 1994
N10
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IN +
N11
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
Differential input voltage (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD ±
Input voltage range, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to VDD
Input current, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 mA
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 30 mA
Duration of short-circuit current at (or below) TA = 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any conditions beyond those indicated under “recommended operating conditions” is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may effect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at the noninverting input with respect to the inverting input.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 85°C
POWER RATING
D
725 mW
5.8 mW/°C
377 mW
P
1000 mW
8.0 mW/°C
520 mW
PW
525 mW
4.2 mW/°C
273 mW
recommended operating conditions
Supply voltage, VDD
Common mode input voltage,
voltage VIC
Common-mode
VDD = 3 V
VDD = 5 V
Operating free-air temperature, TA
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MIN
MAX
2
8
– 0.2
1.8
– 0.2
3.8
– 40
85
UNIT
V
V
°C
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
HIGH-BIAS MODE
electrical characteristics at specified free-air temperature
TLV2341I
PARAMETER
TEST
CONDITIONS
TA†
VDD = 3 V
TYP
MAX
MIN
VIO
Input offset voltage
αVIO
Average
g temperature of input
offset voltage
IIO
Input offset current (see Note 4)
IIB
Input bias current (see Note 4)
VICR
VO = 1 V,
VIC = 1 V,,
RS = 50 Ω,
RL = 10 kΩ
VO = 1 V,,
VIC = 1 V
25°C
0.1
85°C
22
VO = 1 V,,
VIC = 1 V
25°C
0.6
85°C
175
VIC = 1 V,
VID = 100 mV
mV,
IOH = – 1 mA
VOL
Low level output voltage
Low-level
AVD
Large-signal
g
g
differential
voltage amplification
VIC = 1 V,
RL = 10 kΩ
kΩ,
See Note 6
CMRR
Common mode rejection ratio
Common-mode
VO = 1 V,
VIC = VICRmin
min,
RS = 50 Ω
Supply-voltage
y
g rejection
j
ratio
(∆VDD /∆VIO)
II(SEL)
Bias select current
Supply current
VIC = 1 V,
VID = – 100 mV
mV,
IOL = 1 mA
VIC = 1 V,
VO = 1 V,
V
RS = 50 Ω
VI(SEL) = 0
VO = 1 V,
VIC = 1 V
V,
No load
8
1.1
10
27
2.7
High level output voltage
High-level
UNIT
8
mV
Full range
25°C
– 0.2
to
2
Full range
– 0.2
to
1.8
25°C
1.75
Full range
1.7
Common-mode input voltage
g range
g
(see Note 5)
kSVR
0.6
25°C to
85°C
VOH
IDD
25°C
VDD = 5 V
TYP
MAX
MIN
10
µV/°C
27
2.7
0.1
1000
24
1000
0.6
2000
– 0.3
to
2.3
200
– 0.2
to
4
2000
– 0.3
to
4.2
3.2
pA
V
– 0.2
to
3.8
1.9
pA
V
3.7
V
25°C
3
120
150
90
150
mV
Full range
190
25°C
3
Full range
2
25°C
65
Full range
60
25°C
70
Full range
65
11
190
5
23
V/mV
3.5
78
65
80
dB
60
95
70
95
dB
65
25°C
– 1.2
25°C
325
Full range
µA
– 1.4
1500
675
2000
1600
µA
2200
† Full range is – 40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
HIGH-BIAS MODE
operating characteristics at specified free-air temperature, VDD = 3 V
PARAMETER
SR
Slew rate at unity gain
TEST CONDITIONS
VIC = 1 V,
RL = 10 kΩ
kΩ,
See Figure 92
VI(PP) = 1 V,
CL = 20 pF,
pF
TA
TLV2341I
MIN
TYP
25°C
2.1
85°C
1.7
UNIT
V/µs
Vn
Equivalent input noise voltage
f = kHz,,
See Figure 93
RS = 20 Ω,,
25°C
25
BOM
Maximum output
output-swing
swing bandwidth
VO = VOH,
RL = 10 kΩ,
CL = 20 pF,,
See Figure 92
25°C
170
85°C
145
B1
Unity gain bandwidth
Unity-gain
VI = 10 mV,,
RL = 10 kΩ,
CL = 20 pF,,
See Figure 94
25°C
790
85°C
690
f = B1,
RL = 1 MΩ,
– 40°C
53°
Phase margin
VI = 10 mV,
CL = 20 pF,
See Figure 94
25°C
49°
85°C
47°
φm
MAX
nV/√Hz
kHz
kHz
operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
SR
Slew rate at unity gain
TEST CONDITIONS
VIC = 1 V
V,
RL = 10 kΩ,,
CL = 20 pF,
See
Figure 92
S Fi
VI(PP) = 1 V
VI(PP) = 2
2.5
5V
TA
TLV2341I
MIN
TYP
25°C
3.6
85°C
2.8
25°C
2.9
85°C
2.3
Vn
Equivalent input noise voltage
f = 1 kHz,,
See Figure 93
RS = 20 Ω,,
25°C
25
BOM
Maximum output-swing
output swing bandwidth
VO = VOH,
RL = 10 kΩ,
CL = 20 pF,,
See Figure 92
25°C
320
85°C
250
B1
Unity gain bandwidth
Unity-gain
VI = 10 mV,,
RL = 10 kΩ,
CL = 20 pF,,
See Figure 94
25°C
1.7
85°C
1.2
f = B1,
RL = 10 kΩ,
– 40°C
49°
Phase margin
VI = 10 mV,
CL = 20 pF,
See Figure 94
25°C
46°
85°C
43°
φm
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MAX
UNIT
V/µs
nV/√Hz
kHz
MHz
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
HIGH-BIAS MODE
electrical characteristics, TA = 25°C
TLV2341I
PARAMETER
VIO
Input offset voltage
IIO
IIB
Input offset current (see Note 4)
Input bias current (see Note 4)
TEST CONDITIONS
VO = 1 V,
RS = 50 Ω,
VIC = 1 V,
RL = 10 k Ω
VO = 1 V,
VO = 1 V,
VIC = 1 V
VIC = 1 V
VICR
Common mode input voltage
Common-mode
range (see Note 5)
High level output voltage
High-level
VIC = 1 V,
IOH = – 1
mA
VID = 100 mV,
VOH
VOL
Low level output voltage
Low-level
VIC = 1 V,,
IOL = 1 mA
VID = – 100 mV,,
AVD
Large-signal differential voltage
amplification
VIC = 1 V,
See Note 6
RL = 10 kΩ,
CMRR
Common mode rejection ratio
Common-mode
VO = 1 V,,
RS = 50 Ω
kSVR
Supply-voltage
y
g rejection
j
ratio
(∆VDD /∆VIO)
VO = 1 V,,
RS = 50 Ω
II(SEL)
Bias select current
VI(SEL) = 0
IDD
Supply current
VO = 1 V,
No load
VDD = 3 V
MIN
TYP
MAX
0.6
VDD = 5 V
TYP
MAX
UNIT
MIN
8
1.1
8
mV
0.1
0.1
pA
0.6
0.6
pA
– 0.2
to
2
– 0.3
to
2.3
– 0.2
to
4
– 0.3
to
4.2
V
1 75
1.75
19
1.9
32
3.2
37
3.7
V
120
150
90
150
mV
3
11
50
23
V/mV
VIC = VICRmin,,
65
78
65
80
dB
VIC = 1 V,,
70
95
70
95
dB
– 1.4
µA
– 1.2
VIC = 1 V,
325
1500
675
1600
µA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
Table of Graphs
FIGURE
VIO
αVIO
Input offset voltage
Distribution
2,3
Input offset voltage temperature coefficient
Distribution
4,5
VOH
High-level
g
output voltage
g
vs Output current
g
vs Supply voltage
vs Temperature
VOL
Low level output voltage
Low-level
vs Common-mode
Common mode input
in ut voltage
vs Temperature
vs Differential input voltage
vs Low-level output current
9
10,, 12
11
13
AVD
Large-signal
g
g
differential voltage
g amplification
vs Supply
y voltage
g
vs Temperature
vs Frequency
14
15
26, 27
IIB
IIO
Input bias current
vs Temperature
16
Input offset current
vs Temperature
16
VIC
Common-mode input voltage
vs Supply voltage
17
IDD
Supply current
vs Supply
y voltage
g
vs Temperature
18
19
SR
Slew rate
vs Supply
y voltage
g
vs Temperature
20
21
Bias select current
vs Supply voltage
22
Maximum peak-to-peak output voltage
vs Frequency
23
B1
Unity gain bandwidth
Unity-gain
vs Temperature
vs Supply voltage
24
25
φm
Phase margin
g
vs Supply
y voltage
g
vs Temperature
vs Load capacitance
28
29
30
Vn
Equivalent input noise voltage
vs Frequency
31
Phase shift
vs Frequency
26, 27
VO(PP)
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
6
7
8
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
60
50
VDD = 3 V
TA = 25°C
P Package
VDD = 5 V
TA = 25°C
P Package
50
Percentage of Units – %
Percentage of Units – %
40
30
20
40
30
20
10
10
0
–5
–4 –3
–2
–1
0
1
2
3
4
0
–5
5
–4 –3
Figure 2
0
1
2
3
4
5
8
10
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
50
60
VDD = 3 V
TA = 25°C to 85°C
P Package
50
Percentage of Units – %
40
Percentage of Units – %
–1
Figure 3
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
30
20
10
0
–10 – 8
–2
VIO – Input Offset Voltage – mV
VIO – Input Offset Voltage – mV
VDD = 5 V
TA = 25°C to 85°C
P Package
Outliers:
(1) 20.5 mV/°C
40
30
20
10
–6
–4
–2
0
2
4
6
8
10
αVIO – Temperature Coefficient – µV/°C
0
–10 – 8
–6
–4
–2
0
2
4
6
αVIO – Temperature Coefficient – µV/°C
Figure 4
Figure 5
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
8
VIC = 1 V
VID = 100 mV
TA = 25°C
4
VV0H
OH – High-Level Output Voltage – V
VV0H
OH – High-Level Output Voltage – V
5
VDD = 5 V
3
VDD = 3 V
2
1
0
VIC = 1 V
VID = 100 mV
RL = 1 MΩ
TA = 25°C
6
4
2
0
0
–2
–4
–6
–8
0
2
4
6
VDD – Supply Voltage – V
IOH – High-Level Output Current – mA
Figure 6
Figure 7
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
700
VDD = 3 V
VIC = 1 V
VID = 100 mV
2.4
1.8
1.2
0
– 75
IOH = – 500 µA
IOH = – 1 mA
IOH = – 2 mA
IOH = – 3 mA
IOH = – 4 mA
– 50
VDD = 5 V
IOL = 5 mA
TA = 25°C
650
VOL
VOL – Low-Level Output Voltage – mV
VV0H
OH – High-Level Output Voltage – V
3
0.6
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
600
550
VID = –100 mV
500
450
400
VID = –1 V
350
300
0
1
2
3
VIC – Common-Mode Input Voltage – V
Figure 8
12
8
Figure 9
POST OFFICE BOX 655303
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
800
185
VDD = 3 V
VIC = 1 V
VID = – 100 mV
IOL = 1 mA
VOL
VOL – Low-Level Output Voltage – mV
VOL
VOL – Low-Level Output Voltage – mV
200
150
125
100
75
50
– 75
VDD = 5 V
VIC = |VID / 2|
IOL = 5 mA
TA = 25°C
700
600
500
400
300
200
100
0
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
–1
Figure 10
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
1
VDD = 5 V
VIC = 0.5 V
VID = – 1 V
IOL = 5 mA
600
500
400
300
200
100
0
– 75
VIC = 1 V
VID = – 100 mV
TA = 25°C
0.9
VOL
VOL – Low-Level Output Voltage – V
VOL
VOL – Low-Level Output Voltage – mV
900
700
–8
Figure 11
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
800
–2 –3
–4
–5
–6
–7
VID – Differential Input Voltage – V
0.8
VDD = 5 V
0.7
0.6
0.5
VDD = 3 V
0.4
0.3
0.2
0.1
0
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
7
1
2
3
4
5
6
IOL – Low-Level Output Current – mA
Figure 12
8
Figure 13
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
50
60
RL = 10 kΩ
A VD – Large-Signal Differential Voltage
Amplification – V/mV
A VD – Large-Signal Differential Voltage
Amplification – V/mV
RL = 10 kΩ
50
TA = – 40°C
40
30
20
TA = 25°C
10
TA = 85°C
0
0
2
4
6
45
40
35
30
VDD = 5 V
25
20
15
VDD = 3 V
10
5
0
– 75
8
– 50
– 25
Figure 14
102
VIC
V
IC – Common-Mode Input Voltage – V
IIB
I IB and IIIO
IO – Input Bias and Offset Currents – pA
75
100
125
8
VDD = 3 V
VIC = 1 V
See Note A
IIB
101
IIO
1
TA = 25°C
6
4
2
0
35
45
55
65
75
85
95
105 115 125
0
TA – Free-Air Temperature – °C
2
4
6
VDD – Supply Voltage – V
NOTE: The typical values of input bias current and input offset
current below 5 pA were determined mathematically.
Figure 16
14
50
COMMON-MODE INPUT VOLTAGE
POSITIVE LIMIT
vs
SUPPLY VOLTAGE
104
0.1
25
25
Figure 15
INPUT BIAS CURRENT AND INPUT OFFSET
CURRENT
vs
FREE-AIR TEMPERATURE
103
0
TA – Free-Air Temperature – °C
VDD – Supply Voltage – V
Figure 17
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
2
2
1.75
VIC = 1 V
VO = 1 V
No Load
1.6
IIDD
DD – Supply Current – mA
IIDD
DD – Supply Current – mA
VIC = 1 V
VO = 1 V
No Load
TA = – 40°C
1.2
TA = 25°C
0.8
TA = 85°C
0.4
1.5
1.25
1
VDD = 5 V
0.75
VDD = 3 V
0.5
0.25
0
0
2
4
6
0
–75 – 50
8
– 25
Figure 18
75
100
125
8
VI(PP) = 1 V
AV = 1
RL = 10 kΩ
CL = 20 pF
TA = 25°C
7
VI(PP) = 1 V
AV = 1
RL = 10 kΩ
CL = 20 pF
6
SR – Slew Rate – V/us
V/µ s
SR – Slew Rate – V/us
V/µ s
50
SLEW RATE
vs
FREE-AIR TEMPERATURE
8
6
25
Figure 19
SLEW RATE
vs
SUPPLY VOLTAGE
7
0
TA – Free-Air Temperature – °C
VDD – Supply Voltage – V
5
4
3
2
5
VDD = 5 V
4
3
VDD = 3 V
2
1
1
0
0
2
4
6
8
0
– 75
– 50
– 25
0
25
50
75
100
125
TA – Free-Air Temperature – °C
VDD – Supply Voltage – V
Figure 20
Figure 21
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
BIAS SELECT CURRENT
vs
SUPPLY VOLTAGE
–3
TA = 25°C
VI(SEL) = 0
Bias Select Current – µ
nA
A
– 2.4
– 1.8
– 1.2
– 0.6
0
2
4
6
VDD – Supply Voltage – V
8
V O(PP) – Maximum Peak-to-Peak Output Voltage – V
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
5
RL = 10 kΩ
VDD = 5 V
4
3
VDD = 3 V
2
TA = – 40°C
TA = 25°C
1
TA = 85°C
0
10
10 0
1000
f – Frequency – kHz
Figure 22
Figure 23
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
2.1
3.5
VI = 10 mV
RL = 10 kΩ
CL = 20 pF
VI = 10 mV
RL = 10 kΩ
CL = 20 pF
TA = 25°C
1.9
B1
B
1 – Unity-Gain Bandwidth – MHz
B1
B
1 – Unity-Gain Bandwidth – MHz
10000
2.9
2.3
VDD = 5 V
1.7
1.1
VDD = 3 V
1.7
1.5
1.3
1.1
0.9
0.7
0.5
0.3
0.5
– 75
0.1
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
1
3
4
Figure 25
POST OFFICE BOX 655303
5
6
VDD – Supply Voltage – V
Figure 24
16
2
• DALLAS, TEXAS 75265
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8
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
10 7
– 60°
VDD = 3 V
RL = 10 kΩ
CL = 20 pF
TA = 25°C
10 6
10 5
– 30°
0°
10 4
30°
AVD
10 3
60°
Phase Shift
10 2
90°
10 1
120°
1
150°
0.1
10
100
1K
10 K
100 K
1M
Phase Shift
A VD – Large-Signal Differential Voltage Amplification
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
180°
10 M
f – Frequency – Hz
Figure 26
10 7
– 60°
VDD = 5 V
RL = 10 kΩ
CL = 20 pF
TA = 25°C
10 6
10 5
10 4
– 30°
0°
30°
AVD
10 3
60°
10 2
Phase Shift
A VD – Large-Signal Differential Voltage Amplification
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
90°
Phase Shift
10 1
120°
1
150°
0.1
10
100
1k
10 k
100 k
1M
180°
10 M
f – Frequency – Hz
Figure 27
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
PHASE MARGIN
vs
SUPPLY VOLTAGE
60°
53°
VI = 10 mV
RL = 10 kΩ
CL = 20 pF
TA = 25°C
58°
56°
φ m – Phase Margin
om
51°
φ m – Phase Margin
om
VI = 10 mV
RL = 10 kΩ
CL = 20 pF
49°
47°
54°
52°
VDD = 3 V
50°
48°
46°
VDD = 5 V
44°
42°
40°
– 75
45°
0
2
4
6
8
– 50
VDD – Supply Voltage – V
Figure 28
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
Vn
nV HzHz
Vn – Equivalent Input Noise Voltage – nV/
50°
45°
VDD = 3 V
φ m – Phase Margin
om
125
Figure 29
PHASE MARGIN
vs
LOAD CAPACITANCE
40°
VDD = 5 V
35°
30°
VI = 10 mV
RL = 10 kΩ
TA = 25°C
400
RS = 20 Ω
TA = 25°C
300
200
VDD = 5 V
100
VDD = 3 V
0
25°
0
10
20
30
40
50
60
70
80
90
100
1
10
Figure 30
Figure 31
POST OFFICE BOX 655303
100
f – Frequency – Hz
CL – Load Capacitance – pF
18
– 25 – 0
25
50
75 100
TA – Free-Air Temperature – °C
• DALLAS, TEXAS 75265
1000
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
MEDIUM-BIAS MODE
electrical characteristics at specified free-air temperature
TLV2341I
PARAMETER
TEST
CONDITIONS
TA†
VDD = 3 V
TYP
MAX
MIN
VIO
I
Input
t offset
ff t voltage
lt
VO = 1 V,
VIC = 1 V,
RS = 50 Ω,
RL = 100 kΩ
25°C
0.6
25°C to
85°C
IIO
Input offset current (see Note 4)
VO = 1 V,,
VIC = 1 V
IIB
Input bias current (see Note 4)
VO = 1 V,,
VIC = 1 V
25°C
0.6
85°C
175
VIC = 1 V,
VID = 100 mV,
mV
IOH = – 1 mA
VOL
Low level output voltage
Low-level
AVD
Large-signal
g
g
differential
voltage amplification
VIC = 1 V,
RL = 100 kΩ
kΩ,
See Note 6
CMRR
Common mode rejection ratio
Common-mode
VO = 1 V,
VIC = VICRmin
min,
RS = 50 Ω
VIC = 1 V,
VID = – 100 mV,
mV
IOL = 1 mA
1.1
8
10
1
17
1.7
25°C
0.1
0.1
85°C
22
25°C
– 0.2
to
2
Full range
– 0.2
to
1.8
25°C
1.75
Full range
1.7
Common-mode input voltage
g range
g
(see Note 5)
High level output voltage
High-level
8
10
Average
g temperature coefficient of
input offset voltage
VOH
UNIT
mV
V
Full range
αVIO
VICR
VDD = 5 V
TYP
MAX
MIN
1000
24
2000
200
µV/°C
1000
0.6
– 0.3
to
2.3
– 0.2
to
4
2000
– 0.3
to
4.2
3.2
pA
V
– 0.2
to
3.8
1.9
pA
V
3.9
V
3
25°C
115
150
95
150
mV
Full range
190
25°C
25
Full range
15
25°C
65
Full range
60
83
190
25
170
V/mV
15
92
65
91
dB
60
Supply-voltage
y
g rejection
j
ratio
(∆VDD /∆VIO)
VIC = 1 V,
VO = 1 V,
V
RS = 50 Ω
25°C
70
kSVR
Full range
65
II(SEL)
Bias select current
VI(SEL) = 0
25°C
– 100
65
Supply current
VO = 1 V,
VIC = 1 V
V,
No load
25°C
IDD
94
70
94
dB
65
Full range
– 130
250
105
360
nA
280
µA
400
† Full range is – 40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
POST OFFICE BOX 655303
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
MEDIUM-BIAS MODE
operating characteristics at specified free-air temperature, VDD = 3 V
PARAMETER
SR
Slew rate at unity gain
TEST CONDITIONS
VIC = 1 V,
RL = 100 kΩ
kΩ,
See Figure 92
VI(PP) = 1 V,
CL = 20 pF,
pF
TA
TLV2341I
MIN
TYP
25°C
0.38
85°C
0.29
25°C
32
UNIT
V/µs
Vn
Equivalent input noise voltage
f = kHz,,
See Figure 93
RS = 20 Ω,,
BOM
Maximum output-swing
output swing bandwidth
VO = VOH,
RL = 100 kΩ,
CL = 20 pF,,
See Figure 92
25°C
34
85°C
32
B1
Unity gain bandwidth
Unity-gain
VI = 10 mV,,
RL = 100 kΩ,
CL = 20 pF,,
See Figure 94
25°C
300
85°C
235
f = B1,
RL = 100 kΩ,
– 40°C
42°
Phase margin
VI = 10 mV,
CL = 20 pF,
See Figure 94
25°C
39°
85°C
36°
φm
MAX
nV/√Hz
kHz
kHz
operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
SR
Slew rate at unity gain
TEST CONDITIONS
VIC = 1 V
V,
RL = 100 kΩ,,
CL = 20 pF,
See
92
S Figure
Fi
VI(PP) = 1 V
VI(PP) = 2
2.5
5V
TA
TLV2341I
MIN
TYP
25°C
0.43
85°C
0.35
25°C
0.40
85°C
0.32
Vn
Equivalent input noise voltage
f =1 kHz,,
See Figure 93
RS = 20 Ω,,
25°C
32
BOM
Maximum output-swing
output swing bandwidth
VO = VOH,
RL = 100 kΩ,
CL = 20 pF,,
See Figure 92
25°C
55
85°C
45
B1
Unity gain bandwidth
Unity-gain
VI = 10 mV,,
RL = 100 kΩ,
CL = 20 pF,,
See Figure 94
25°C
525
85°C
370
f = B1,
RL = 100 kΩ,
– 40°C
43°
Phase margin
VI = 10 mV,
CL = 20 pF,
See Figure 94
25°C
40°
85°C
38°
φm
20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MAX
UNIT
V/µs
nV/√Hz
kHz
kHz
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
MEDIUM-BIAS MODE
electrical characteristics, TA = 25°C
TLV2341I
PARAMETER
VIO
Input offset voltage
IIO
IIB
Input offset current (see Note 4)
Input bias current (see Note 4)
TEST CONDITIONS
VO = 1 V,
RS = 50 Ω,
VIC = 1 V,
RL = 100 k Ω
VO = 1 V,
VO = 1 V,
VIC = 1 V
VIC = 1 V
VDD = 3 V
MIN
TYP
MAX
0.6
VDD = 5 V
TYP
MAX
UNIT
MIN
8
1.1
8
mV
0.1
0.1
pA
0.6
0.6
pA
– 0.2
to
2
– 0.3
to
2.3
– 0.2
to
4
– 0.3
to
4.2
V
1 75
1.75
19
1.9
32
3.2
39
3.9
V
VICR
Common-mode input voltage
g
range (see Note 5)
VOH
High level output voltage
High-level
VIC = 1 V,,
IOH = – 1 mA
VID = 100 mV,,
VOL
Low level output voltage
Low-level
VIC = 1 V,,
IOL = 1 mA
VID = – 100 mV,,
AVD
Large-signal differential voltage
amplification
VIC = 1 V,
See Note 6
RL = 100 kΩ,
25
83
25
170
V/mV
CMRR
Common mode rejection ratio
Common-mode
VO = 1 V,,
RS = 50 Ω
VIC = VICRmin,,
65
92
65
91
dB
kSVR
Supply-voltage
ratio
y
g rejection
j
(∆VDD /∆VID)
VO = 1 V,,
RS = 50 Ω
VIC = 1 V,,
70
94
70
94
dB
II(SEL)
Bias select current
VI(SEL) = 0
– 130
nA
Supply current
VO = 1 V,
No load
IDD
115
150
– 100
VIC = 1 V,
65
250
95
105
150
280
mV
µA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
21
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
Table of Graphs
FIGURE
VIO
αVIO
Input offset voltage
Distribution
32, 33
Input offset voltage temperature coefficient
Distribution
34, 35
VOH
High-level
g
output voltage
g
vs Output current
g
vs Supply voltage
vs Temperature
VOL
Low level output voltage
Low-level
vs Common-mode
Common mode input
in ut voltage
vs Temperature
vs Differential input voltage
vs Low-level output current
39
40,, 42
41
43
AVD
Large-signal
g
g
differential voltage
g amplification
vs Supply
y voltage
g
vs Temperature
vs Frequency
44
45
56, 57
IIB
IIO
Input bias current
vs Temperature
46
Input offset current
vs Temperature
46
VIC
Common-mode input voltage
vs Supply voltage
47
IDD
Supply current
vs Supply
y voltage
g
vs Temperature
48
49
SR
Slew rate
vs Supply
y voltage
g
vs Temperature
50
51
Bias select current
vs Supply current
52
Maximum peak-to-peak output voltage
vs Frequency
53
B1
Unity gain bandwidth
Unity-gain
vs Temperature
vs Supply voltage
54
55
φm
Phase margin
g
vs Supply
y voltage
g
vs Temperature
vs Load capacitance
58
59
60
Vn
Equivalent input noise voltage
vs Frequency
61
Phase shift
vs Frequency
56, 57
VO(PP)
22
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
36
37
38
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
50
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
60
VDD = 3 V
TA = 25°C
P Package
VDD = 5 V
TA = 25°C
P Package
50
Percentage of Units – %
Percentage of Units – %
40
30
20
40
30
20
10
10
0
–5
–4
–3
–2
–1
0
1
2
3
4
0
–5
5
–4
–3
Figure 32
–1
0
1
2
3
4
5
Figure 33
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
50
60
VDD = 3 V
TA = 25°C to 85°C
P Package
Percentage of Units – %
40
Percentage of Units – %
–2
VIO – Input Offset Voltage – mV
VIO – Input Offset Voltage – mV
30
20
10
0
–10 – 8
VDD = 5 V
TA = 25°C to 85°C
50 P Package
Outliers:
(1) 33 mV/°C
40
30
20
10
–6
–4
–2
0
2
4
6
8
10
αVIO – Temperature Coefficient – µV/°C
0
–10 – 8
–6
–4
–2
0
2
4
6
8
10
αVIO – Temperature Coefficient – µV/°C
Figure 34
Figure 35
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23
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
HIGH-LEVEL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
8
VIC = 1 V
VID = 100 mV
TA = 25°C
VV0H
OH – High-Level Output Voltage – V
VV0H
OH – High-Level Output Voltage – V
5
4
VDD = 5 V
3
VDD = 3 V
2
1
0
VIC = 1 V
VID = 100 mV
RL = 100 kΩ
TA = 25°C
6
4
2
0
0
–2
–4
–6
–8
0
2
4
6
VDD – Supply Voltage – V
IOH – High-Level Output Current – mA
Figure 37
Figure 36
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
700
VDD = 3 V
VIC = 1 V
VID = 100 mV
VOL
VOL – Low-Level Output Voltage – mV
VV0H
OH – High-Level Output Voltage – V
3
2.4
1.8
1.2
0.6
0
– 75
IOH = – 500 µA
IOH = – 1 mA
IOH = – 2 mA
IOH = – 3 mA
IOH = – 4 mA
VDD = 5 V
IOL = 5 mA
TA = 25°C
650
600
550
VID = –100 mV
500
450
400
VID = –1 V
350
300
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
1
2
3
VIC – Common-Mode Input Voltage – V
Figure 38
24
8
Figure 39
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
185
170
800
VDD = 3 V
VIC = 1 V
VID = – 100 mV
IOL = 1 mA
VOL
VOL – Low-Level Output Voltage – mV
VOL
VOL – Low-Level Output Voltage – mV
200
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
155
140
125
110
95
80
65
50
– 75
VDD = 5 V
VIC = |VID / 2|
IOL = 5 mA
TA = 25°C
700
600
500
400
300
200
100
0
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
–2
–4
–6
VID – Differential Input Voltage – V
Figure 40
Figure 41
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
1000
700
VDD = 5 V
VIC = 0.5 V
VID = – 1 V
IOL = 5 mA
VOL
VOL – Low-Level Output Voltage – mV
VOL
VOL – Low-Level Output Voltage – mV
900
800
600
500
400
300
200
100
0
– 75
–8
VIC = 1 V
VID = – 100 mV
TA = 25°C
900
800
VDD = 5 V
700
600
VDD = 3 V
500
400
300
200
100
0
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
7
1
2
3
4
5
6
IOL – Low-Level Output Current – mA
Figure 42
8
Figure 43
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
500
RL = 100 kΩ
450
A VD – Large-Signal Differential Voltage
Amplification – V/mV
A VD – Large-Signal Differential Voltage
Amplification – V/mV
500
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
400
350
TA = – 40°C
300
250
TA = 25°C
200
150
TA = 85°C
100
50
0
0
2
4
6
RL = 100 kΩ
450
400
350
300
250
VDD = 5 V
200
150
VDD = 3 V
100
50
0
– 75
8
– 50
– 25
Figure 44
100
125
102
TA = 25°C
VVIC
IC – Common-Mode Input Voltage
IIB
I IB and IIIO
IO – Input Bias and Offset Currents – pA
75
8
VDD = 3 V
VIC = 1 V
See Note A
IIB
101
IIO
1
6
4
2
0
45
65
85
105
125
0
TA – Free-sAir Temperature – °C
NOTE A: The typical values of input bias current and input offset
current below 5 pA are determined mathematically.
Figure 46
26
50
COMMON-MODE INPUT VOLTAGE POSITIVE LIMIT
vs
SUPPLY VOLTAGE
104
.01
25
25
Figure 45
INPUT BIAS CURRENT AND INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
103
0
TA – Free-Air Temperature – °C
VDD – Supply Voltage – V
2
4
6
VDD – Supply Voltage – V
Figure 47
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
175
250
VIC = 1 V
VO = 1 V
No Load
VIC = 1 V
VO = 1 V
No Load
150
175
IIDD
µA
DD – Supply Current – uA
IIDD
µA
DD – Supply Current – uA
200
TA = – 40°C
150
TA = 25°C
125
100
TA = 85°C
75
125
100
VDD = 5 V
75
VDD = 3 V
50
50
25
25
0
0
2
4
6
0
–75
8
–50
–25
Figure 48
0.8
SR – Slew Rate – V/us
V/µs
SR – Slew Rate – V/us
V/µs
0.9
VIC = 1 V
VI(PP) = 1 V
AV = 1
RL = 100 kΩ
CL = 20 pF
TA = 25°C
0.6
0.5
0.4
75
100
125
0.7
VIC = 1 V
VI(PP) = 1 V
AV = 1
RL = 100 kΩ
CL = 20 pF
0.6
0.5
VDD = 5 V
0.4
VDD = 3 V
0.3
0.3
0
50
SLEW RATE
vs
FREE-AIR TEMPERATURE
0.9
0.7
25
Figure 49
SLEW RATE
vs
SUPPLY VOLTAGE
0.8
0
TA – Free-Air Temperature – °C
VDD – Supply Voltage – V
2
4
6
VDD – Supply Voltage – V
8
0.2
– 75
– 50
– 25
0
25
50
75
100
125
TA – Free-Air Temperature – °C
Figure 50
Figure 51
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27
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
BIAS SELECT CURRENT
vs
SUPPLY VOLTAGE
TA = 25°C
VI(SEL) = 1/2 VDD
– 270
Bias Select Current – nA
– 240
– 210
– 180
– 150
– 120
– 90
– 60
– 30
0
0
2
4
6
8
V O(PP) – Maximum Peak-to-Peak Output Voltage – V
– 300
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
5
RL = 100 kΩ
VDD = 5 V
4
TA = – 40°C
3
VDD = 3 V
2
TA = 85°C
1
TA = 25°C
0
10
10
100
f – Frequency – kHz
VDD – Supply Voltage – V
Figure 52
Figure 53
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
1000
1000
VI = 10 mV
RL = 100 kΩ
CL = 20 pF
800
700
VDD = 5 V
600
500
400
VDD = 3 V
300
VI = 10 mV
RL = 100 kΩ
CL = 20 pF
TA = 25°C
900
B1
B 1 – Unity-Gain Bandwidth – kHz
B1
B
1 – Unity-Gain Bandwidth – kHz
900
200
– 75
800
700
600
500
400
300
200
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
1
2
3
4
Figure 55
POST OFFICE BOX 655303
5
6
VDD – Supply Voltage – V
Figure 54
28
1000
• DALLAS, TEXAS 75265
7
8
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
107
– 60°
VDD = 3 V
RL = 100 kΩ
CL = 20 pF
TA = 25°C
106
105
– 30°
0°
104
30°
AVD
103
60°
102
90°
Phase Shift
A VD – Large-Signal Differential Voltage Amplification
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
Phase Shift
101
120°
1
150°
0.1
1
10
100
1k
10 k
100 k
180°
1M
f – Frequency – Hz
Figure 56
107
VDD = 5 V
RL = 100 kΩ
CL = 20 pF
TA = 25°C
106
105
– 60°
– 30°
0°
104
30°
AVD
103
60°
102
90°
Phase Shift
A VD – Large-Signal Differential Voltage Amplification
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
Phase Shift
101
120°
1
150°
0.1
1
10
100
1k
10 k
f – Frequency – Hz
100 k
180°
1M
Figure 57
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
PHASE MARGIN
vs
SUPPLY VOLTAGE
50°
45°
VI = 10 mV
RL = 100 kΩ
CL = 20 pF
TA = 25°C
48°
43°
44°
φm – Phase Margin
om
φm – Phase Margin
om
46°
VI = 10 mV
RL = 100 kΩ
CL = 20 pF
42°
40°
38°
41°
VDD = 5 V
39°
VDD = 3 V
36°
37°
34°
32°
30°
0
1
2
3
4
5
6
7
35°
– 75 – 50 – 25
0
25
50
75 100
TA – Free-Air Temperature – °C
8
VDD – Supply Voltage – V
Figure 58
Figure 59
PHASE MARGIN
vs
LOAD CAPACITANCE
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
44°
VI = 10 mV
TA = 25°C
RL = 100 kΩ
φm – Phase Margin
om
40°
VDD = 5 V
38°
VDD = 3 V
36°
34°
32°
30°
Vn
nV HzHz
V
n – Equivalent Input Noise Voltage – nV/
300
42°
28°
0
RS = 20 Ω
TA = 25°C
250
200
150
VDD = 5 V
100
VDD = 3 V
50
0
10
20
30
40
50
60
70
80
90 100
1
CL – Load Capacitance – pF
10
Figure 61
POST OFFICE BOX 655303
100
f – Frequency – Hz
Figure 60
30
125
• DALLAS, TEXAS 75265
1000
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
LOW-BIAS MODE
electrical characteristics at specified free-air temperature
TLV2341I
PARAMETER
TEST
CONDITIONS
TA†
VDD = 3 V
TYP
MAX
MIN
VIO
Input offset voltage
VO = 1 V,
VIC = 1 V,,
RS = 50 Ω,
RL = 1 MΩ
25°C
0.6
25°C to
85°C
IIO
Input offset current (see Note 4)
VO = 1 V,,
VIC = 1 V
25°C
0.1
85°C
22
IIB
Input bias current (see Note 4)
VO = 1 V,,
VIC = 1 V
25°C
0.6
85°C
175
VIC = 1 V,
VID = 100 mV,
mV
IOH = – 1 mA
VOL
Low level output voltage
Low-level
AVD
Large-signal
g
g
differential
voltage amplification
VIC = 1 V,
RL = 1 MΩ,
MΩ
See Note 6
CMRR
Common mode rejection ratio
Common-mode
VO = 1 V,
VIC = VICRmin
min,
RS = 50 Ω
VIC = 1 V,
VID = – 100 mV,
mV
IOL = 1 mA
1.1
8
10
1
25°C
– 0.2
to
2
Full range
– 0.2
to
1.8
25°C
1.75
Full range
1.7
Common-mode input
voltage range (see Note 5)
High level output voltage
High-level
8
10
Average
g temperature of
input offset voltage
VOH
UNIT
mV
Full range
αVIO
VICR
VDD = 5 V
TYP
MAX
MIN
µV/°C
11
1.1
0.1
1000
24
2000
200
1000
0.6
– 0.3
to
2.3
– 0.2
to
4
2000
– 0.3
to
4.2
3.2
pA
V
– 0.2
to
3.8
1.9
pA
V
3.8
V
25°C
3
115
150
95
150
mV
Full range
190
25°C
50
Full range
50
25°C
65
Full range
60
400
190
50
520
V/mV
50
88
65
94
dB
60
Supply-voltage
y
g rejection
j
ratio
(∆VDD /∆VIO)
VIC = 1 V,
VO = 1 V,
V
RS = 50 Ω
25°C
70
kSVR
Full range
65
II(SEL)
Bias select current
VI(SEL) = 0
25°C
10
5
Supply current
VO = 1 V,
VIC = 1 V
V,
No load
25°C
IDD
86
70
86
dB
Full range
65
65
17
10
27
nA
17
µA
27
† Full range is – 40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO(PP) = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
POST OFFICE BOX 655303
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
LOW-BIAS MODE
operating characteristics at specified free-air temperature, VDD = 3 V
PARAMETER
SR
Slew rate at unity gain
TEST CONDITIONS
VIC = 1 V,
RL = 1 MΩ,
MΩ
See Figure 92
VI(PP) = 1 V,
CL = 20 pF,
pF
TA
TLV2341I
MIN
TYP
25°C
0.02
85°C
0.02
UNIT
V/µs
Vn
Equivalent input noise voltage
f = kHz,,
See Figure 93
RS = 20 Ω,,
25°C
68
BOM
Maximum output-swing
output swing bandwidth
VO = VOH,
RL = 1 MΩ,
CL = 20 pF,,
See Figure 92
25°C
2.5
85°C
2
B1
Unity gain bandwidth
Unity-gain
VI = 10 mV,,
RL = 1 MΩ,
CL = 20 pF,,
See Figure 94
25°C
27
85°C
21
f = B1,
RL = 1 MΩ,
– 40°C
39°
Phase margin
VI = 10 mV,
CL = 20 pF,
See Figure 94
25°C
34°
85°C
28°
φm
MAX
nV/√Hz
kHz
kHz
operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
SR
Slew rate at unity gain
TEST CONDITIONS
VIC = 1 V
V,
RL = 1 MΩ,,
CL = 20 pF,
See
92
S Figure
Fi
VI(PP) = 1 V
VI(PP) = 2
2.5
5V
TA
TLV2341I
MIN
TYP
25°C
0.03
85°C
0.03
25°C
0.03
85°C
0.02
Vn
Equivalent input noise voltage
f =1 kHz,,
See Figure 93
RS = 20 Ω,,
25°C
68
BOM
Maximum output-swing
output swing bandwidth
VO = VOH,
RL = 1 MΩ,
CL = 20 pF,,
See Figure 92
25°C
5
85°C
4
B1
Unity gain bandwidth
Unity-gain
VI = 10 mV,,
RL = 1 MΩ,
CL = 20 pF,,
See Figure 94
25°C
85
85°C
55
f = B1,
RL = 1 MΩ,
– 40°C
38°
Phase margin
VI = 10 mV,
CL = 20 pF,
See Figure 94
25°C
34°
85°C
28°
φm
32
POST OFFICE BOX 655303
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MAX
UNIT
V/µs
nV/√Hz
kHz
kHz
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
LOW-BIAS MODE
electrical characteristics, TA = 25°C
TLV2341Y
PARAMETER
TEST CONDITIONS
VDD = 3 V
MIN
TYP
MAX
VDD = 5 V
TYP
MAX
UNIT
MIN
VIO
Input offset voltage
VO = 1 V,
RS = 50 Ω,
VIC = 1 V,
RL = 1 MΩ
0.6
IIO
Input offset current
(see Note 4)
VO = 1 V,
VIC = 1 V
0.1
0.1
pA
IIB
Input bias current
(see Note 4)
VO = 1 V,
VIC = 1 V
0.6
0.6
pA
VICR
Common-mode
Common
mode input voltage
range (see Note 5)
VOH
High level output voltage
High-level
VIC = 1 V,,
IOH = – 1 mA
VID = 100 mV,,
VOL
Low level output voltage
Low-level
VIC = 1 V,,
IOL = 1 mA
VID = – 100 mV,,
AVD
Large-signal differential
voltage amplification
VIC = 1 V,
See Note 6
RL = 1 MΩ,
50
400
50
520
V/mV
CMRR
Common mode rejection ratio
Common-mode
VO = 1 V,,
RS = 50 Ω
VIC = VICRmin,,
65
88
65
94
dB
kSVR
Supply-voltage
y
g rejection
j
ratio
(∆VDD /∆VID)
VDD = 3 V to 5 V,,
VO = 1 V,
VIC = 1 V,,
RS = 50 Ω
70
86
70
86
dB
II(SEL)
Bias select current
VI(SEL) = 0
65
nA
Supply current
VO = 1 V,
No load
IDD
8
1.1
8
mV
– 0.2
to
2
– 0.3
to
2.3
– 0.2
to
4
– 0.3
to
4.2
V
1 75
1.75
19
1.9
32
3.2
38
3.8
V
115
150
10
VIC = 1 V,
5
17
95
10
150
17
mV
µA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
POST OFFICE BOX 655303
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33
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
Table of Graphs
FIGURE
VIO
αVIO
Input offset voltage
Distribution
62, 63
Input offset voltage temperature coefficient
Distribution
64, 65
VOH
High-level
g
output voltage
g
vs Output current
g
vs Supply voltage
vs Temperature
VOL
Low level output voltage
Low-level
vs Common-mode
Common mode input
in ut voltage
vs Temperature
vs Differential input voltage
vs Low-level output current
69
70,, 72
71
73
AVD
Large-signal
g
g
differential voltage
g amplification
vs Supply
y voltage
g
vs Temperature
vs Frequency
74
75
86, 87
IIB
IIO
Input bias current
vs Temperature
76
Input offset current
vs Temperature
76
VIC
Common-mode input voltage
vs Supply voltage
77
IDD
Supply current
vs Supply
y voltage
g
vs Temperature
78
79
SR
Slew rate
vs Supply
y voltage
g
vs Temperature
80
81
Bias select current
vs Supply current
82
Maximum peak-to-peak output voltage
vs Frequency
83
B1
Unity gain bandwidth
Unity-gain
vs Temperature
vs Supply voltage
84
85
φm
Phase margin
g
vs Supply
y voltage
g
vs Temperature
vs Load capacitance
88
89
90
Vn
Equivalent input noise voltage
vs Frequency
91
Phase shift
vs Frequency
86, 87
VO(PP)
34
POST OFFICE BOX 655303
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66
67
68
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
70
50
VDD = 3 V
TA = 25°C
P Package
60
VDD = 5 V
TA = 25°C
P Package
Percentage of Units – %
Percentage of Units – %
40
30
20
50
40
30
20
10
10
0
–5
–4
–3
–2
–1
0
1
2
3
4
0
–5
5
–4
–3
VIO – Input Offset Voltage – mV
Figure 62
–1
0
1
2
3
4
5
8
10
Figure 63
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
50
70
VDD = 3 V
TA = 25°C to 85°C
P Package
Percentage of Units – %
40
Percentage of Units – %
–2
VIO – Input Offset Voltage – mV
30
20
VDD = 5 V
TA = 25°C to 85°C
60 P Package
Outliers:
(1) 19.2 mV/°C
50 (1) 12.1 mV/°C
40
30
20
10
10
0
–10 – 8
–6
–4
–2
0
2
4
6
8
10
αVIO – Temperature Coefficient – µV/°C
0
–10 – 8
–6
–4
–2
0
2
4
6
αVIO – Temperature Coefficient – µV/°C
Figure 64
Figure 65
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TLV2341, TLV2341Y
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OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
VIC = 1 V
VID = 100 mV
TA = 25°C
4
VDD = 5 V
3
VDD = 3 V
2
1
VV0H
OH – High-Level Output Voltage – V
8
5
VV0H
OH – High-Level Output Voltage – V
HIGH-LEVEL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
0
VIC = 1 V
VID = 100 mV
RL = 1 MΩ
TA = 25°C
6
4
2
0
0
–2
–4
–6
–8
0
IOH – High-Level Output Current – mA
Figure 66
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
2.4
1.8
1.2
0.6
VDD = 5 V
IOL = 5 mA
TA = 25°C
650
VOL – Low-Level Output Voltage – mV
VOL
VV0H
OH – High-Level Output Voltage – V
700
VDD = 3 V
VIC = 1 V
VID = 100 mV
0
– 75
IOH = – 500 µA
IOH = – 1 mA
IOH = – 2 mA
IOH = – 3 mA
IOH = – 4 mA
600
550
VID = –100 mV
500
450
400
VID = –1 V
350
300
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
Figure 68
36
8
Figure 67
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
3
2
4
6
VDD – Supply Voltage – V
1
2
3
VIC – Common-Mode Input Voltage – V
Figure 69
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TLV2341, TLV2341Y
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OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
185
170
800
VDD = 3 V
VIC = 1 V
VID = – 100 mV
IOL = 1 mA
VOL
VOL – Low-Level Output Voltage – mV
VOL
VOL – Low-Level Output Voltage – mV
200
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
155
140
125
110
95
80
65
50
– 75
VDD = 5 V
VIC = |VID / 2|
IOL = 5 mA
TA = 25°C
700
600
500
400
300
200
100
0
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
–2
–4
–6
VID – Differential Input Voltage – V
Figure 70
Figure 71
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
700
1
VDD = 5 V
VIC = 0.5 V
VID = – 1 V
IOL = 5 mA
VOL
VOL – Low-Level Output Voltage – mV
VOL
VOL – Low-Level Output Voltage – mV
900
800
600
500
400
300
200
100
0
– 75
–8
VIC = 1 V
VID = – 1 V
TA = 25°C
0.9
0.8
VDD = 5 V
0.7
0.6
0.5
VDD = 3 V
0.4
0.3
0.2
0.1
0
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
7
1
2
3
4
5
6
IOL – Low-Level Output Current – mA
Figure 72
8
Figure 73
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TLV2341, TLV2341Y
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OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
2000
RL = 1 MΩ
RL = 1 MΩ
1800
1800
A VD – Large-Signal Differential Voltage
Amplification – V/mV
A VD – Large-Signal Differential Voltage
Amplification – V/mV
2000
1600
1400
1200
TA = – 40°C
1000
800
600
TA = 25°C
400
200
0
TA = 85°C
0
2
4
6
1600
1400
1200
1000
800
VDD = 5 V
600
VDD = 3 V
400
200
0
– 75
8
– 50
VDD – Supply Voltage – V
Figure 74
8
VDD = 3 V
VIC = 1 V
See Note A
TA = 25°C
102
VVIC
IC – Common-Mode Input Voltage
IIB
I IB and IIIO
IO – Input Bias and Offset Currents – pA
COMMON-MODE INPUT VOLTAGE
POSITIVE LIMIT
vs
SUPPLY VOLTAGE
104
IIB
101
IIO
1
0.1
25
6
4
2
0
35
45
55
65
75
85
95
105 115 125
0
TA – Free-Air Temperature – °C
NOTE A: The typical values of input bias current and input offset
current below 5 pA are determined mathematically.
Figure 76
38
125
Figure 75
INPUT BIAS CURRENT AND INPUT
OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
103
0
25
50
75
100
– 25
TA – Free-Air Temperature – °C
2
4
6
VDD – Supply Voltage – V
Figure 77
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OPERATIONAL AMPLIFIERS
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
30
45
VIC = 1 V
VO = 1 V
No Load
25
IIDD
µA
DD – Supply Current – uA
IIDD
µA
DD – Supply Current – uA
40
35
30
25
20
TA = – 40°C
15
VIC = 1 V
VO = 1 V
No Load
20
15
VDD = 5 V
10
VDD = 3 V
TA = 25°C
10
5
5
TA = 85°C
0
– 75
0
0
2
4
6
VDD – Supply Voltage – V
8
– 50
Figure 78
125
Figure 79
SLEW RATE
vs
SUPPLY VOLTAGE
SLEW RATE
vs
FREE-AIR TEMPERATURE
0.07
0.07
VIC = 1 V
VI(PP) = 1 V
AV = 1
RL = 1 MΩ
CL = 20 pF
TA = 25°C
0.05
0.06
0.05
SR – Slew Rate – V/us
V/µs
0.06
SR – Slew Rate – V/us
V/µs
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
0.04
0.03
0.02
VIC = 1 V
VI(PP) = 1 V
AV = 1
RL = 1 MΩ
CL = 20 pF
0.04
VDD = 5 V
0.03
0.02
VDD = 3 V
0.01
0.01
0
0
2
4
6
8
0
– 75
– 50
VDD – Supply Voltage – V
Figure 80
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
Figure 81
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TLV2341, TLV2341Y
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OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
BIAS SELECT CURRENT
vs
SUPPLY VOLTAGE
150
TA = 25°C
VI(SEL) = VDD
Bias Select Current – nA
120
90
60
30
0
0
2
4
6
VDD – Supply Voltage – V
8
V O(PP) – Maximum Peak-to-Peak Output Voltage – V
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
5
VDD = 5 V
4
TA = – 40°C
TA = 25°C
3
VDD = 3 V
2
1
TA = 85°C
RL = 1 MΩ
0
0.1
1
Figure 82
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
140
120
VI = 10 mV
RL = 1 MΩ
CL = 20 pF
110
VDD = 5 V
95
80
65
50
VDD = 3 V
35
VI = 10 mV
RL = 1 MΩ
CL = 20 pF
TA = 25°C
110
B
B1
1 – Unity-Gain Bandwidth – MHz
B1 – Unity-Gain Bandwidth – kHz
B1
125
100
90
80
70
60
50
40
30
20
– 50
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
125
0
1
2
3
4
Figure 85
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5
6
VDD – Supply Voltage – V
Figure 84
40
100
Figure 83
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
20
– 75
10
f – Frequency – kHz
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TLV2341, TLV2341Y
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OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
107
– 60°
VDD = 3 V
CL = 20 pF
RL = 1 MΩ
TA = 25°C
106
105
– 30°
0°
104
30°
AVD
103
60°
102
Phase Shift
A VD – Large-Signal Differential Voltage Amplification
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
90°
Phase Shift
101
120°
1
150°
0.1
1
10
100
1k
10 k
100 k
180°
1M
f – Frequency – Hz
Figure 86
107
VDD = 5 V
CL = 20 pF
RL = 1 MΩ
TA = 25°C
106
105
– 60°
– 30°
0°
104
30°
AVD
103
60°
102
Phase Shift
A VD – Large-Signal Differential Voltage Amplification
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
90°
Phase Shift
101
120°
1
150°
0.1
1
10
100
1k
10 k
100 k
180°
1M
f – Frequency – Hz
Figure 87
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
PHASE MARGIN
vs
SUPPLY VOLTAGE
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
42°
40°
VDD = 3 V
38°
36°
38°
φm – Phase Margin
om
φm – Phase Margin
om
40°
VI = 10 mV
RL = 1 MΩ
CL = 20 pF
TA = 25°C
36°
34°
VDD = 5 V
34°
32°
30°
28°
26°
24°
32°
VI = 10 mV
RL = 1 MΩ
CL = 20 pF
22°
30°
0
2
4
6
20°
– 75
8
– 50
VDD – Supply Voltage – V
Figure 88
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
40°
Vn
nV HzHz
Vn – Equivalent Input Noise Voltage – nV/
200
38°
36°
φm – Phase Margin
om
125
Figure 89
PHASE MARGIN
vs
LOAD CAPACITANCE
VDD = 3 V
34°
32°
VDD = 5 V
30°
28°
26°
24°
VI = 10 mV
RL = 1 MΩ
TA = 25°C
22°
20°
0
10
20
30
40
50
60
70
80
90 100
VDD = 3 V, 5 V
RS = 20 Ω
TA = 25°C
175
150
125
100
75
50
25
0
1
CL – Load Capacitance – pF
10
Figure 91
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100
f – Frequency – Hz
Figure 90
42
– 25
0
25
50
75 100
TA – Free-Air Temperature – °C
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TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLV2341 is optimized for single-supply operation, circuit configurations used for the various tests
often present some inconvenience since the input signal, in many cases, must be offset from ground. This
inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative
rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives
the same result.
VDD +
VDD
–
+
VI
–
VO
CL
VO
+
VI
CL
RL
RL
VDD –
(b) SPLIT SUPPLY
(a) SINGLE SUPPLY
Figure 92. Unity-Gain Amplifier
2 kΩ
2 kΩ
VDD
VDD +
20 Ω
–
1/2 VDD
–
VO
+
+
VO
20 Ω
20 Ω
20 Ω
VDD –
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 93. Noise-Test Circuits
VI
1/2 VDD
10 kΩ
10 kΩ
VDD
VDD +
100 Ω
–
VO
+
VI
100 Ω
–
+
VO
CL
CL
VDD –
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 94. Gain-of-100 Inverting Amplifier
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PARAMETER MEASUREMENT INFORMATION
input bias current
Because of the high input impedance of the TLV2341 operational amplifier, attempts to measure the input bias
current can result in erroneous readings. The bias current at normal ambient temperature is typically less than
1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are offered to avoid
erroneous measurements:
•
•
Isolate the device from other potential leakage sources. Use a grounded shield around and between the
device inputs (see Figure 95). Leakages that would otherwise flow to the inputs are shunted away.
Compensate for the leakage of the test socket by actually performing an input bias current test (using a
picoammeter) with no device in the test socket. The actual input bias current can then be calculated by
subtracting the open-socket leakage readings from the readings obtained with a device in the test
socket.
Many automatic testers as well as some bench-top operational amplifier testers use the servo-loop
technique with a resistor in series with the device input to measure the input bias current (the voltage
drop across the series resistor is measured and the bias current is calculated). This method requires
that a device be inserted into the test socket to obtain a correct reading; therefore, an open-socket
reading is not feasible using this method.
8
5
V = VIC
1
4
Figure 95. Isolation Metal Around Device Inputs (P package)
low-level output voltage
To obtain low-level supply-voltage operation, some compromise is necessary in the input stage. This
compromise results in the device low-level output voltage being dependent on both the common-mode input
voltage level as well as the differential input voltage level. When attempting to correlate low-level output
readings with those quoted in the electrical specifications, these two conditions should be observed. If
conditions other than these are to be used, please refer to the Typical Characteristics section of this data sheet.
input offset voltage temperature coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This
parameter is actually a calculation using input offset voltage measurements obtained at two different
temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device
and the test socket. This moisture results in leakage and contact resistance which can cause erroneous input
offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the
moisture also covers the isolation metal itself, thereby rendering it useless. These measurements should be
performed at temperatures above freezing to minimize error.
full-power response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage
swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is
44
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PARAMETER MEASUREMENT INFORMATION
generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal
input signal until the maximum frequency is found above which the output contains significant distortion. The
full-peak response is defined as the maximum output frequency, without regard to distortion, above which full
peak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified
in this data sheet and is measured using the circuit of Figure 92. The initial setup involves the use of a sinusoidal
input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is
increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same
amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained
(Figure 96). A square wave is used to allow a more accurate determination of the point at which the maximum
peak-to-peak output is reached.
(a) f = 100 Hz
(b) BOM > f > 100 Hz
(c) f = BOM
(d) f > BOM
Figure 96. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume,
short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET
devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more
pronounced with reduced supply levels and lower temperatures.
APPLICATION INFORMATION
single-supply operation
While the TLV2341 performs well using dualpower supplies (also called balanced or split
supplies), the design is optimized for singlesupply operation. This includes an input commonmode voltage range that encompasses ground as
well as an output voltage range that pulls down to
ground. The supply voltage range extends down
to 2 V, thus allowing operation with supply levels
commonly available for TTL and HCMOS.
Many single-supply applications require that a
voltage be applied to one input to establish a
reference level that is above ground. This virtual
ground can be generated using two large
resistors, but a preferred technique is to use a
virtual-ground generator such as the TLE2426.
The TLE2426 supplies an accurate voltage equal
to VDD/2, while consuming very little power and is
suitable for supply voltages of greater than 4 V.
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VDD
R2
R1
VI
–
ǒ Ǔ
VO
+
TLE2426
V
O
+
V
DD
2
– V
I
R2
R1
) VDD
2
Figure 97. Inverting Amplifier With
Voltage Reference
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OPERATIONAL AMPLIFIERS
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APPLICATION INFORMATION
single-supply operation (continued)
The TLV2341 works well in conjunction with digital logic; however, when powering both linear devices and digital
logic from the same power supply, the following precautions are recommended:
•
•
Power the linear devices from separate bypassed supply lines (see Figure 98); otherwise, the linear
device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital
logic.
Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive
decoupling is often adequate; however, RC decoupling may be necessary in high-frequency
applications.
–
Logic
+
Logic
Power
Supply
Logic
(a) COMMON-SUPPLY RAILS
–
Logic
+
Logic
Power
Supply
Logic
(b) SEPARATE-BYPASSED SUPPLY RAILS (preferred)
Figure 98. Common Versus Separate Supply Rails
input offset voltage nulling
The TLV2341 offers external input offset null control. Nulling of the input offset voltage can be achieved by
adjusting a 25-kΩ potentiometer connected between the offset null terminals with the wiper connected as shown
in Figure 99. The amount of nulling range varies with the bias selection. In the high-bias mode, the nulling range
allows the maximum offset voltage specified to be trimmed to zero. In low-bias and medium-bias modes, total
nulling may not be possible.
–
VDD
+
N2
–
N1 25 kΩ
+
N2
N1 25 kΩ
GND
(b) SPLIT SUPPLY
(a) SINGLE SUPPLY
Figure 99. Input Offset Voltage Null Circuit
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OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
bias selection
Bias selection is achieved by connecting the bias-select pin to one of the three voltage levels (see Figure 100).
For medium-bias applications, it is recommended that the bias-select pin be connected to the midpoint between
the supply rails. This is a simple procedure in split-supply applications, since this point is ground. In
single-supply applications, the medium-bias mode necessitates using a voltage divider as indicated. The use
of large-value resistors in the voltage divider reduces the current drain of the divider from the supply line.
However, large-value resistors used in conjunction with a large-value capacitor require significant time to charge
up to the supply midpoint after the supply is switched on. A voltage other than the midpoint may be used if it
is within the voltages specified in the following table.
VDD
1 MΩ
Low
BIAS MODE
Medium
Low
To BIAS SELECT
High
1 MΩ
BIAS-SELECT VOLTAGE
(single supply)
Medium
VDD
1 V to VDD –1 V
High
GND
0.01 µF
Figure 100. Bias Selection for Single-Supply Applications
input characteristics
The TLV2341 is specified with a minimum and a maximum input voltage that, if exceeded at either input, could
cause the device to malfunction. Exceeding this specified range is a common problem, especially in
single-supply operation. The lower the range limit includes the negative rail, while the upper range limit is
specified at VDD – 1 V at TA = 25°C and at VDD – 1.2 V at all other temperatures.
The use of the polysilicon-gate process and the careful input circuit design gives the TLV2341 good input offset
voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift in CMOS devices
is highly influenced by threshold voltage shifts caused by polarization of the phosphorus dopant implanted in
the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate) alleviates the polarization
problem, thus reducing threshold voltage shifts by more than an order of magnitude. The offset voltage drift with
time has been calculated to be typically 0.1 µV/month, including the first month of operation.
Because of the extremely high input impedance and resulting low bias-current requirements, the TLV2341 is
well suited for low-level signal processing; however, leakage currents on printed-circuit boards and sockets can
easily exceed bias-current requirements and cause a degradation in device performance. It is good practice
to include guard rings around inputs (similar to those of Figure 95 in the Parameter Measurement Information
section). These guards should be driven from a low-impedance source at the same voltage level as the
common-mode input (see Figure 101).
The inputs of any unused amplifiers should be tied to ground to avoid possible oscillation.
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OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
input characteristics (continued)
–
VI
+
VO
VI
–
+
(a) NONINVERTING AMPLIFIER
–
VO
(b) INVERTING AMPLIFIER
+
VI
VO
(c) UNITY-GAIN AMPLIFIER
Figure 101. Guard-Ring Schemes
noise performance
The noise specifications in operational amplifiers circuits are greatly dependent on the current in the first-stage
differential amplifier. The low input bias-current requirements of the TLV2341 results in a very low noise current,
which is insignificant in most applications. This feature makes the device especially favorable over bipolar
devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit greater noise
currents.
feedback
Operational amplifier circuits nearly always
employ feedback, and since feedback is the first
prerequisite for oscillation, caution is appropriate.
Most oscillation problems result from driving
capacitive loads and ignoring stray input
capacitance. A small-value capacitor connected
in parallel with the feedback resistor is an effective
remedy (see Figure 102). The value of this
capacitor is optimized empirically.
–
+
electrostatic-discharge protection
Figure 102. Compensation for Input Capacitance
The TLV2341 incorporates an internal electrostatic-discharge (ESD)-protection circuit that
prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care
should be exercised, however, when handling these devices as exposure to ESD may result in the degradation
of the device parametric performance. The protection circuit also causes the input bias currents to be
temperature dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLV2341 inputs
and output are designed to withstand – 100-mA surge currents without sustaining latch-up; however, techniques
should be used to reduce the chance of latch-up whenever possible. Internal protection diodes should not by
48
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
design be forward biased. Applied input and output voltage should not exceed the supply voltage by more that
300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply transients
should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the supply rails as close
to the device as possible.
The current path established if latch-up occurs is usually between the positive supply rail and ground and can
be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply
voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the
forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of
latch-up occurring increases with increasing temperature and supply voltages.
output characteristics
VDD
The output stage of the TLV2341 is designed to
sink and source relatively high amounts of current
(see Typical Characteristics). If the output is
subjected to a short-circuit condition, this
high-current capability can cause device damage
under certain conditions. Output current capability
increases with supply voltage.
Although the TLV2341 possesses excellent
high-level output voltage and current capability,
methods are available for boosting this capability
if needed. The simplest method involves the use
of a pullup resistor (RP) connected from the output
to the positive supply rail (see Figure 103). There
are two disadvantages to the use of this circuit.
First, the NMOS pulldown transistor N4 (see
equivalent schematic) must sink a comparatively
large amount of current. In this circuit, N4 behaves
like a linear resistor with an on resistance between
approximately 60 Ω and 180 Ω, depending on
how hard the operational amplifier input is driven.
With very low values of RP , a voltage offset from
0 V at the output occurs. Secondly, pullup resistor
RP acts as a drain load to N4 and the gain of the
operational amplifier is reduced at output voltage
levels where N5 is not supplying the output
current.
VI
RP
IP
–
R
+
VO
IF
R2
IL
R1
P
* VO
+ IVDD
)I )I
F
L
P
IP = Pullup Current
Required by the
Operational Amplifier
(typically 500 µA)
RL
Figure 103. Resistive Pullup to Increase VOH
2.5 V
–
VI
VO
+
CL
TA = 25°C
f = 1 kHz
VI(PP) = 1 V
– 2.5 V
Figure 104. Test Circuit for Output Characteristics
All operating characteristics of the TLV2341 are measured using a 20-pF load. The device drives higher
capacitive loads; however, as output load capacitance increases, the resulting response pole occurs at lower
frequencies thereby causing ringing, peaking, or even oscillation (see Figures 105, 106 and 107). In many
cases, adding some compensation in the form of a series resistor in the feedback loop alleviates the problem.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
49
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
output characteristics (continued)
(a) CL = 20 pF, RL = NO LOAD
(b) CL = 130 pF, RL = NO LOAD
(c) CL = 150 pF, RL = NO LOAD
Figure 105. Effect of Capacitive Loads in High-Bias Mode
(a) CL = 20 pF, RL = NO LOAD
(b) CL = 170 pF, RL = NO LOAD
(c) CL = 190 pF, RL = NO LOAD
Figure 106. Effect of Capacitive Loads in Medium-Bias Mode
(a) CL = 20 pF, RL = NO LOAD
(b) CL = 260 pF, RL = NO LOAD
(c) CL = 310 pF, RL = NO LOAD
Figure 107. Effect of Capacitive Loads in Low-Bias Mode
50
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Aug-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TLV2341ID
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
2341I
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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