TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
D
D
D
D
D
D
D
D
D
D
D
Qualified for Automotive Applications
Rail-To-Rail Output
Wide Bandwidth . . . 3 MHz
High Slew Rate . . . 2 .4 V/µs
Supply Voltage Range . . . 2.7 V to 16 V
Supply Current . . . 550 µA/Channel
Input Noise Voltage . . . 39 nV/√Hz
Input Bias Current . . . 1 pA
Specified Temperature Range
−40°C to 125°C . . . Automotive Grade
Ultrasmall Packaging
− 5-Pin SOT-23 (TLV271)
Ideal Upgrade for TLC27x Family
Operational Amplifier
+
−
description
The TLV27x takes the minimum operating supply voltage down to 2.7 V over the extended automotive
temperature range while adding the rail-to-rail output swing feature. This makes it an ideal alternative to the
TLC27x family for applications where rail-to-rail output swings are essential. The TLV27x also provides 3-MHz
bandwidth from only 550 µA.
Like the TLC27x, the TLV27x is fully specified for 5-V and ±5-V supplies. The maximum recommended supply
voltage is 16 V, which allows the devices to be operated from a variety of rechargeable cells (±8 V supplies down
to ±1.35 V).
The CMOS inputs enable use in high-impedance sensor interfaces, with the lower voltage operation making
an attractive alternative for the TLC27x in battery-powered applications.
The 2.7-V operation makes it compatible with Li-Ion powered systems and the operating supply voltage range
of many micropower microcontrollers available today including Texas Instruments MSP430.
SELECTION OF SIGNAL AMPLIFIER PRODUCTS†
VDD (V)
VIO
(µV)
Iq/Ch
(µA)
IIB (pA)
GBW
(MHz)
SR
(V/µs)
SHUTDOWN
RAILTORAIL
SINGLES/DUALS/QUADS
2.7−16
500
550
1
3
2.4
—
O
S/D/Q
TLC27x
3−16
1100
675
1
1.7
3.6
—
—
S/D/Q
TLV237x
2.7−16
500
550
1
3
2.4
Yes
I/O
S/D/Q
TLC227x
4−16
300
1100
1
2.2
3.6
—
O
D/Q
TLV246x
2.7−6
150
550
1300
6.4
1.6
Yes
I/O
S/D/Q
TLV247x
2.7−6
250
600
2
2.8
1.5
Yes
I/O
S/D/Q
TLV244x
2.7−10
300
725
1
1.8
1.4
—
O
D/Q
DEVICE
TLV27x
†
Typical values measured at 5 V, 25°C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2008 Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
FAMILY PACKAGE TABLE{
PACKAGE TYPES}
NUMBER OF
CHANNELS
SOIC
TLV271
1
TLV272
2
TLV274
4
DEVICE
SOT-23
TSSOP
MSOP§
8
5
—
—
8
—
—
8
14
—
14
—
UNIVERSAL
EVM BOARD
See the EVM
Selection Guide
(SLOU060)
†
For the most current package and ordering information, see the Package Option Addendum at
the end of this document, or see the TI web site at http://www.ti.com.
‡ Package
drawings,
thermal
data,
and
symbolization
are
available
at
http://www.ti.com/packaging.
§ Product Preview
TLV271 AVAILABLE OPTIONS
PACKAGED DEVICES
VIOMAX AT
25°C
TA
−40°C to 125°C
SOT-23
SMALL OUTLINE
(D)
5 mV
TLV271QDRQ1
(DBV)
SYMBOL
TLV271QDBVRQ1
271Q
TLV272 AVAILABLE OPTIONS
PACKAGED DEVICES
VIOMAX AT
25°C
TA
−40°C to 125°C
†
5 mV
MSOP
SMALL OUTLINE
(D)
(DGK)
TLV272QDRQ1
TLV272QDGKRQ1†
SYMBOL
Product Preview
TLV274 AVAILABLE OPTIONS
PACKAGED DEVICES
2
TA
VIOMAX AT 25°C
SMALL OUTLINE
(D)
TSSOP
(PW)
−40°C to 125°C
5 mV
TLV274QDRQ1
TLV274QPWRQ1
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
TLV27x PACKAGE PINOUTS(1)
TLV271
D PACKAGE
(TOP VIEW)
TLV271
DBV PACKAGE
(TOP VIEW)
OUT
GND
IN+
1
5
VDD
NC
IN −
IN +
GND
2
3
4
IN −
1
8
2
7
3
6
4
5
8
2
7
3
6
4
5
NC
VDD
OUT
NC
TLV274
D OR PW PACKAGE
TLV272
D OR DGK PACKAGE
(TOP VIEW)
1OUT
1IN −
1IN +
GND
1
(TOP VIEW)
VDD
2OUT
2IN −
2IN+
1OUT
1IN −
1IN+
VDD
2IN+
2IN −
2OUT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT
4IN −
4IN+
GND
3IN+
3IN −
3OUT
NC − No internal connection
(1) SOT−23 may or may not be indicated
TYPICAL PIN 1 INDICATORS
Pin 1
Printed or
Molded Dot
Pin 1
Stripe
Pin 1
Bevel Edges
POST OFFICE BOX 655303
Pin 1
Molded ”U” Shape
• DALLAS, TEXAS 75265
3
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VDD
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.2 V to VDD + 0.2 V
Input current range, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 10 mA
Output current range, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values, except differential voltages, are with respect to GND.
DISSIPATION RATING TABLE
PACKAGE
θJC
(°C/W)
θJA
(°C/W)
TA ≤ 25°C
POWER RATING
TA = 25°C
POWER RATING
D (8)
38.3
176
710 mW
396 mW
D (14)
26.9
122.3
1022 mW
531 mW
DBV (5)
55
324.1
385 mW
201 mW
DGK (8)
54.23
259.96
481 mW
250 mW
PW (14)
29.3
173.6
720 mW
374 mW
recommended operating conditions
Single supply
Supply voltage
voltage, VDD
Split supply
Common-mode input voltage range, VICR
Operating free-air temperature, TA
4
Q-suffix
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MIN
MAX
2.7
16
UNIT
±1.35
±8
0
VDD−1.35
V
−40
125
°C
V
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted)
dc performance
PARAMETER
TEST CONDITIONS
TA†
MIN
25°C
VIO
Input offset voltage
αVIO
Offset voltage drift
/2
VIC = VDD/2,
RL = 10 kΩ,
kΩ
VO = VDD/2
/2,
RS = 50 Ω
VIC = 0 to VDD−1.35V,
1.35V,
RS = 50 Ω
CMRR
Common mode rejection ratio
Common-mode
7V
VDD = 2
2.7
VIC = 0 to VDD−1.35V,
1.35V,
RS = 50 Ω
VDD = 5 V
VIC = 0 to VDD−1.35V,
1.35V,
RS = 50 Ω
VDD = 15 V
VDD = 2
2.7
7V
AVD
Large signal differential voltage
Large-signal
amplification
VO(PP) = VDD/2,
RL = 10 kΩ
VDD = 5 V
VDD = 15 V
†
TYP
MAX
0.5
5
Full range
7
25°C
53
Full range
54
25°C
58
Full range
57
25°C
67
Full range
66
25°C
95
Full range
76
25°C
80
Full range
82
25°C
77
Full range
79
mV
µV/°C
2
25°C
UNIT
70
80
dB
85
106
110
dB
115
Full range is − 40°C to 125°C. If not specified, full range is − 40°C to 125°C.
input characteristics
PARAMETER
TEST CONDITIONS
TA
25°C
IIO
Input offset current
IIB
Input bias current
ri(d)
Differential input resistance
CIC
Common-mode input capacitance
VIC = VDD/2,
VDD = 15 V,
VO = VDD/2,, RS = 50 Ω
MIN
TYP
1
125°C
25°C
1
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
60
1000
125°C
f = 21 kHz
MAX
pA
60
1000
pA
25°C
1000
GΩ
25°C
8
pF
5
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted)
output characteristics
PARAMETER
TEST CONDITIONS
VDD = 2
2.7
7V
VIC = VDD/2,
/2 IOH = −1
1 mA
VDD = 5 V
VDD = 15 V
VOH
High level output voltage
High-level
VDD = 2
2.7
7V
/2 IOH = −5
5 mA
VIC = VDD/2,
VDD = 5 V
VDD = 15 V
TA†
MIN
TYP
25°C
2.55
2.58
Full range
2.48
25°C
4.9
Full range
4.85
25°C
14.92
Full range
14.9
25°C
1.88
Full range
1.42
25°C
4.58
Full range
4.44
25°C
14.7
Full range
14.6
25°C
VDD = 2
2.7
7V
VIC = VDD/2,
/2 IOL = 1 mA
VDD = 5 V
VDD = 15 V
VOL
Low level output voltage
Low-level
VIC = VDD/2,
/2 IOL = 5 mA
VDD = 5 V
VO = 0
0.5
5 V from rail
rail, VDD = 2.7
27V
IO
Output current
VO = 0
0.5
5 V from rail
rail, VDD = 5 V
VO = 0
0.5
5 V from rail
rail, VDD = 15 V
0.1
0.15
0.05
0.08
0.1
0.5
0.7
V
1.15
0.28
0.4
0.54
0.19
Full range
0.3
0.35
25°C
4
25°C
5
Positive rail
25°C
7
Negative rail
25°C
8
Positive rail
25°C
13
Negative rail
25°C
12
• DALLAS, TEXAS 75265
0.15
0.22
0.05
Negative rail
Full range is − 40°C to 125°C. If not specified, full range is − 40°C to 125°C.
‡ Depending on package dissipation rating
POST OFFICE BOX 655303
0.1
Positive rail
†
6
14.8
Full range
25°C
VDD = 15 V
4.68
Full range
25°C
V
2.1
Full range
25°C
VDD = 2
2.7
7V
14.96
Full range
25°C
UNIT
4.93
Full range
25°C
MAX
mA
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted) (continued)
power supply
PARAMETER
IDD
TEST CONDITIONS
Supply current (per channel)
VO = VDD/2
†
Supply voltage rejection ratio
(∆VDD /∆VIO)
VDD = 2.7 V to 15 V,
No load
MIN
TYP
MAX
VDD = 2.7 V
25°C
470
560
VDD = 5 V
25°C
550
660
25°C
750
900
VDD = 15 V
PSRR
TA†
VIC = VDD /2,
Full range
UNIT
µA
1200
25°C
70
Full range
65
80
dB
Full range is − 40°C to 125°C. If not specified, full range is − 40°C to 125°C.
dynamic performance
PARAMETER
UGBW
Unity gain bandwidth
TA†
TEST CONDITIONS
kΩ, CL = 10 pF
RL = 2 kΩ
25°C
2.4
VDD = 5 V to 15 V
25°C
3
25°C
Slew rate at unity gain
VO(PP) = VDD/2,
CL = 50 pF, RL = 10 kΩ,
VDD = 5 V
VDD = 15 V
φm
ts
†
TYP
VDD = 2.7 V
VDD = 2
2.7
7V
SR
MIN
Full range
1.4
MAX
MHz
2.1
V/ s
V/µs
1
25°C
1.4
Full range
1.2
25°C
1.9
Full range
1.4
UNIT
2.4
V/ s
V/µs
2.1
V/ s
V/µs
Phase margin
RL = 2 kΩ
CL = 10 pF
25°C
65
°
Gain margin
RL = 2 kΩ
CL = 10 pF
25°C
18
dB
VDD = 2.7 V,
V(STEP)PP = 1 V, AV = −1,
CL = 10 pF, RL = 2 kΩ
0.1%
VDD = 5 V, 15 V,
V(STEP)PP = 1 V, AV = −1,
CL = 47 pF, RL = 2 kΩ
0.1%
Settling time
2.9
µss
25°C
2
Full range is − 40°C to 125°C. If not specified, full range is − 40°C to 125°C.
noise/distortion performance
PARAMETER
THD + N
TEST CONDITIONS
VDD = 2.7 V,
VO(PP) = VDD/2 V,
RL = 2 kΩ, f = 10 kHz
AV = 1
VDD = 5 V, ±5 V,
VO(PP) = VDD/2 V,
RL = 2 kΩ, f = 10K
AV = 1
Total harmonic distortion plus noise
AV = 10
TA
Equivalent input noise voltage
In
Equivalent input noise current
UNIT
0.05%
0.02%
25°C
25
C
AV = 100
0.09%
0.5%
39
25°C
f = 10 kHz
f = 1 kHz
POST OFFICE BOX 655303
MAX
0.18%
f = 1 kHz
Vn
TYP
0.02%
25°C
25
C
AV = 100
AV = 10
MIN
25°C
• DALLAS, TEXAS 75265
35
0.6
nV/√Hz
fA /√Hz
7
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
CMRR
Common-mode rejection ratio
vs Frequency
Input bias and offset current
vs Free-air temperature
1
VOL
Low-level output voltage
vs Low-level output current
3, 5, 7
VOH
High-level output voltage
vs High-level output current
4, 6, 8
VO(PP)
Peak-to-peak output voltage
vs Frequency
9
IDD
Supply current
vs Supply voltage
10
PSRR
Power supply rejection ratio
vs Frequency
11
AVD
Differential voltage gain & phase
vs Frequency
12
Gain-bandwidth product
vs Free-air temperature
13
vs Supply voltage
14
vs Free-air temperature
15
2
SR
Slew rate
φm
Phase margin
vs Capacitive load
16
Vn
Equivalent input noise voltage
vs Frequency
17
Voltage-follower large-signal pulse response
18, 19
Voltage-follower small-signal pulse response
20
Inverting large-signal response
21, 22
Inverting small-signal response
Crosstalk
8
23
vs Frequency
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
24
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
100
VDD = 5 V, 10 V
80
60
VDD = 2.7 V
40
20
0
10
100
1k
100 k
10 k
1M
250
VDD = 2.7 V, 5 V and 10 V
VIC = VDD/2
200
150
100
50
0
−40 −25 −10 5
TA =−40°C
TA = 125°C
TA = 70°C
TA = 25°C
0.80
TA = 0°C
0.40
TA = 125 °C
4.00
TA = 70 °C
3.50
3.00
2.50
TA = 25 °C
2.00
1.50
TA = 0 °C
1.00
TA = −40 °C
0.50
1 2 3 4 5 6 7 8 9 10 11 12
IOH − High-Level Output Current − mA
8
TA =70°C
TA =25°C
TA =0°C
TA =−40°C
2
80
100
IOL − Low-Level Output Current − mA
Figure 7
3.00
2.50
TA = 25°C
2.00
1.50
TA = 70°C
1.00
TA = 125°C
0.50
5
10
10
VDD = 10 V
8
TA = −40°C
6
TA = 0°C
4
TA = 25°C
2
120
TA = 70°C
TA = 125°C
0
20
40
60
80
100
120
IOH − High-Level Output Current − mA
Figure 8
POST OFFICE BOX 655303
15
20
25
30
35
40
45
IOH − High-Level Output Current − mA
Figure 6
0
0
60
TA = 0°C
3.50
0
PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
V O(PP) − Peak-to-Peak Output Voltage − V
TA =125°C
40
TA = −40°C
4.00
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70
IOL − Low-Level Output Current − mA
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
V OH − High-Level Output Voltage − V
VOL − Low-Level Output Voltage − V
VDD = 10 V
20
VCC = 5 V
4.50
Figure 5
10
0
2 4 6 8 10 12 14 16 18 20 22 24
IOL − Low-Level Output Current − mA
0.00
Figure 4
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
TA = 0 °C
TA = 40 °C
5.00
VDD = 5 V
4.50
0.00
4
0.40
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
V OH − High-Level Output Voltage − V
VOL − Low-Level Output Voltage − V
V OH − High-Level Output Voltage − V
2.40
6
TA = 70 °C
TA = 25 °C
0.80
Figure 3
5.00
VDD = 2.7 V
0
1.20
0
20 35 50 65 80 95 110 125
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
2.80
1.20
1.60
Figure 2
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
1.60
2.00
TA − Free-Air Temperature − °C
Figure 1
2.00
VDD = 2.7 V
2.40 T = 125 °C
A
0.00
−50
f − Frequency − Hz
0.00
2.80
300
VOL − Low-Level Output Voltage − V
120
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
INPUT BIAS AND OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
I IB I IO − Input Bias and Offset Current − pA
CMRR − Common-Mode Rejection Ratio − dB
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
• DALLAS, TEXAS 75265
11
VDD = 10 V
10
9
8
7
6
AV = −10
RL = 2 kΩ
CL = 10 pF
TA = 25°C
THD = 5%
5
VDD = 5 V
4
3
2
VDD = 2.7 V
1
0
10
100
1k
10 k
100 k
1M
10 M
f − Frequency − Hz
Figure 9
9
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
AV = 1
VIC = VDD / 2
I DD − Supply Current − mA/ch
0.9
PSRR − Power Supply Rejection Ratio − dB
1.0
TA = 125°C
0.8
TA = 70°C
0.7
0.6
0.5
0.4
TA = 25°C
0.3
TA = 0°C
0.2
TA = −40°C
0.1
0.0
120
TA = 25°C
100
VDD = 5 V, 10 V
80
VDD = 2.7 V
60
40
20
0
10
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
VDD − Supply Voltage − V
100
1k
180
100
135
Phase
4.0
90
45
60
0
Gain
−45
20
−90
VDD=5 V
RL=2 kΩ
CL=10 pF
TA=25°C
0
−20
−40
10
100
−135
1k
10 k
100 k 1 M
−180
10 M
3.5
VDD = 10 V
3.0
2.5
2.0
VDD = 5 V
VDD = 2.7 V
1.5
1.0
0.5
0.0
−40 −25 −10 5
Figure 13
Figure 12
SLEW RATE
vs
FREE-AIR TEMPERATURE
SLEW RATE
vs
SUPPLY VOLTAGE
SR+
1.0
AV = 1
RL = 10 kΩ
CL = 50 pF
TA = 25°C
0.5
6.5
8.5
10.5
VCC − Supply Voltage −V
Figure 14
10
12.5
80
SR−
2.5
2.0
SR+
1.5
VDD = 5 V
AV = 1
RL = 10 kΩ
CL = 50 pF
VI = 3 V
1.0
0.5
0.0
14.5
VDD = 5 V
RL= 2 kΩ
TA = 25°C
AV = Open Loop
90
0.0
−40 −25 −10 5
20 35 50 65 80 95 110 125
TA − Free-Air Temperature − °C
Figure 15
POST OFFICE BOX 655303
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Phase Margin − °
2.0
4.5
100
3.0
SR − Slew Rate − V/ µ s
SR − Slew Rate − V/ µ s
SR−
2.5
PHASE MARGIN
vs
CAPACITIVE LOAD
3.5
3.0
1.5
20 35 50 65 80 95 110 125
TA − Free-Air Temperature − °C
f − Frequency − Hz
2.5
1M
GAIN BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
GBWP −Gain Bandwidth Product − MHz
120
Phase − °
AVD − Differential Voltage Gain − dB
DIFFERENTIAL VOLTAGE GAIN AND PHASE
vs
FREQUENCY
40
100 k
Figure 11
Figure 10
80
10 k
f − Frequency − Hz
70
Rnull = 100
60
50
40
Rnull = 0
30
Rnull = 50
20
10
0
10
100
CL − Capacitive Load − pF
Figure 16
1000
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
VDD = 2.7, 5, 10 V
TA = 25°C
90
4
80
70
60
50
3
2
1
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 3 VPP
TA = 25°C
VI
0
40
3
30
2
20
1
VO
10
0
0
100
1k
10 k
f − Frequency − Hz
0
100 k
2
6
4
2
VO
0
0
2
4
6
8
0.12
0.08
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 100 mVPP
TA = 25°C
0.04
VI
0.00
0.04
VO
0.00
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
10 12 14 16 18
t − Time − µs
Figure 20
Figure 19
4
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 3 VPP
TA = 25°C
1
0
3
2
1
0
VO
0
2
4
6
8
10
12
14
V − Output Voltage − V
O
VI
16
INVERTING LARGE-SIGNAL RESPONSE
V I − Input Voltage − V
INVERTING LARGE-SIGNAL RESPONSE
2
0.12
0.08
t − Time − µs
3
10 12 14 16 18
V − Output Voltage − mV
O
0
V − Output Voltage − V
O
VDD = 10 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 6 VPP
TA = 25°C
V − Input Voltage − mV
I
V − Input Voltage − V
I
6
VI
8
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
8
2
6
Figure 18
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
4
4
t − Time − µs
8
6
VDD = 10 V
AV = VI = −1
RL = 2 kΩ
CL = 10 pF
TA = 25°C
4
2
0
VI
6
VO
4
2
0
0
t − Time − µs
2
4
6
8
10
t − Time − µs
12
14
V O − Output Voltage − V
10
Figure 17
V − Input Voltage − V
I
V − Output Voltage − V
O
100
V − Input Voltage − V
I
V n − Equivalent Input Noise Voltage − nV/
Hz
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
16
Figure 22
Figure 21
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11
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
CROSSTALK
vs
FREQUENCY
0
0.00
−40
VDD = 5 V
AV = VI = −1
RL = 2 kΩ
CL = 10 pF
VI = 100 mVpp
TA = 25°C
VI
0.10
VO
0.05
0.00
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
Crosstalk − dB
0.05
VDD = 2.7, 5, & 15 V
VI = 1 VDD/2
AV = 1
RL = 2 kΩ
TA = 25°C
−20
0.10
V O − Output Voltage − V
V I − Input Voltage − V
INVERTING SMALL-SIGNAL RESPONSE
−60
−80
−100
Crosstalk
−120
−140
10
100
1k
10 k
f − Frequency − Hz
t − Time − µs
100 k
Figure 24
Figure 23
APPLICATION INFORMATION
driving a capacitive load
When the amplifier is configured in this manner, capacitive loading directly on the output decreases the device’s
phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than
10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown
in Figure 25. A minimum value of 20 Ω should work well for most applications.
RF
RG
−
Input
+
RNULL
Output
CLOAD
VDD/2
Figure 25. Driving a Capacitive Load
12
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TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
APPLICATION INFORMATION
offset voltage
The output offset voltage (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
RF
IIB−
RG
+
−
VI
+
RS
V
VO
OO
+V
IO
ǒ ǒ ǓǓ
R
1)
R
F
"I
G
IB)
R
S
ǒ ǒ ǓǓ
1)
R
R
F
G
"I
IB–
R
F
IIB+
Figure 26. Output Offset Voltage Model
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 27).
RG
RF
V
O +
V
I
VDD/2
VI
ǒ
1)
R
R
F
G
Ǔǒ
Ǔ
1
1 ) sR1C1
−
VO
+
R1
f
–3dB
+
1
2pR1C1
C1
Figure 27. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For the best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency
bandwidth. Failure to do this can result in phase shift of the amplifier.
C1
+
_
VI
R1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
R2
f
C2
RF
RG
–3dB
RG =
+
(
1
2pRC
RF
1
2−
Q
)
VDD/2
Figure 28. 2-Pole Low-Pass Sallen-Key Filter
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
APPLICATION INFORMATION
circuit layout considerations
To achieve the levels of high performance of the TLV27x, follow proper printed-circuit board design techniques.
A general set of guidelines is given in the following.
D Ground planes—It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
D Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
D Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
D Short trace runs/compact part placements—Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This helps to minimize stray capacitance at the
input of the amplifier.
D Surface-mount passive components—Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
APPLICATION INFORMATION
general power dissipation considerations
For a given θJA, the maximum power dissipation is shown in Figure 29 and is calculated by the following formula:
P
D
+
Where:
PD
TMAX
TA
θJA
ǒ
T
Ǔ
–T
MAX A
q
JA
= Maximum power dissipation of TLV27x IC (watts)
= Absolute maximum junction temperature (150°C)
= Free-ambient air temperature (°C)
= θJC + θCA
θJC = Thermal coefficient from junction to case
θCA = Thermal coefficient from case to ambient air (°C/W)
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
2
Maximum Power Dissipation − W
1.75
PDIP Package
Low-K Test PCB
θJA = 104°C/W
1.5
1.25
SOIC Package
Low-K Test PCB
θJA = 176°C/W
TJ = 150°C
MSOP Package
Low-K Test PCB
θJA = 260°C/W
1
0.75
0.5
0.25
SOT-23 Package
Low-K Test PCB
θJA = 324°C/W
0
−55 −40 −25 −10 5 20 35 50 65 80 95 110 125
TA − Free-Air Temperature − °C
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 29. Maximum Power Dissipation vs Free-Air Temperature
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15
TLV271-Q1, TLV272-Q1, TLV274-Q1
FAMILY OF 550-µA/Ch 3-MHz RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
SGLS275A − OCTOBER 2004 − REVISED JUNE 2008
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts Release 9.1, the model generation
software used with Microsim PSpice . The Boyle macromodel (see Note 2) and subcircuit in Figure 30 are
generated using TLV27x typical electrical and operating characteristics at TA = 25°C. Using this information,
output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D Maximum positive output voltage swing
D Unity-gain frequency
D Maximum negative output voltage swing
D Common-mode rejection ratio
D Slew rate
D Phase margin
D Quiescent power dissipation
D DC output resistance
D Input bias current
D AC output resistance
D Open-loop voltage amplification
D Short-circuit output current limit
NOTE 2: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
3
99
VDD
+
egnd
rd1
rd2
rss
ro2
css
fb
rp
−
c1
7
11
12
+
c2
vlim
1
+
r2
9
6
IN+
−
vc
D
D
8
+
−
vb
ga
2
G
G
−
IN−
ro1
gcm
ioff
53
S
S
OUT
dp
91
10
iss
GND
4
dlp
+
dc
−
ve
+ 54
vlp
−
+
hlim
−
5
92
−
vln
+
de
*DEVICE=amp_tlv27x_highVdd,OP AMP,NJF,INT
* amp_tlv_27x_highVdd operational amplifier ”macromodel”
* subcircuit updated using Model Editor release 9.1 on 05/15/00
* at 14:40 Model Editor is an OrCAD product.
*
* connections:
non-inverting input
*
| inverting input
*
| | positive power supply
*
| | | negative power supply
*
| | | | output
*
| | | | |
.subckt amp_tlv27x_highVdd 1 2 3 4 5
*
c1
11
12 457.48E−15
c2
6
7
5.0000E−12
css
10
99 1.1431E−12
dc
5
53 dy
de
54
5
dy
dlp
90
91 dx
dln
92
90 dx
dp
4
3
dx
egnd
99
0
poly(2) (3,0) (4,0) 0 .5 .5
fb
7
99 poly(5) vb vc ve vlp vln 0
176.02E6 −1E3 1E3 180E6
−180E6
ga
gcm
iss
hlim
j1
J2
r2
rd1
rd2
ro1
ro2
rp
rss
vb
vc
ve
vlim
vlp
vln
.model
.model
.model
.model
.ends
6
0
10
90
11
12
6
3
3
8
7
3
10
9
3
54
7
91
0
dx
dy
jx1
jx2
0
11 12 16.272E−6
6
10 99 6.8698E−9
4
dc 1.3371E−6
0
vlim 1K
2
10 jx1
1
10 jx2
9
100.00E3
11
61.456E3
12
61.456E3
5
10
99
10
4
150.51E3
99
149.58E6
0
dc 0
53
dc .78905
4
dc .78905
8
dc 0
0
dc 14.200
92
dc 14.200
D(Is=800.00E−18)
D(Is=800.00E−18 Rs=1m Cjo=10p)
NJF(Is=500.00E−15 Beta=198.03E−6 Vto=−1)
NJF(Is=500.00E−15 Beta=198.03E−6 Vto=−1)
Figure 30. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
16
90
dln
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLV271QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
271Q
TLV271QDRG4Q1
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
T271Q1
TLV271QDRQ1
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
T271Q1
TLV272QDRG4Q1
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
T272Q1
TLV272QDRQ1
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
T272Q1
TLV274QDRG4Q1
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
TLV274Q1
TLV274QDRQ1
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
TLV274Q1
TLV274QPWRG4Q1
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
TLV274Q
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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