User's Guide
SLAU201 – November 2006
TLV320DAC32EVM and TLV320DAC32EVM-PDK
This user's guide describes the characteristics, operation, and use of the
TLV320DAC32EVM, both by itself and as part of the TLV320DAC32EVM-PDK. This
evaluation module (EVM) is a complete stereo audio DAC with digital audio inputs, two
line inputs and analog outputs, extensive audio routing, mixing and effects capabilities.
A complete circuit description, schematic diagram and bill of materials are also
included.
The following related documents are available through the Texas Instruments web site
at www.ti.com.
EVM-Compatible Device Data Sheets
Device
Literature Number
TLV320DAC32
SLAS506
TAS1020B
SLES025
REG1117-3.3
SBVS001
TPS767D318
SLVS209
SN74LVC125A
SCAS290
SN74LVC1G125
SCES223
SN74LVC1G07
SCES296
Contents
1
EVM Overview ............................................................................................................... 2
2
Analog Interface.............................................................................................................. 3
3
Digital Interface .............................................................................................................. 4
4
Power Supplies .............................................................................................................. 5
5
EVM Operation ............................................................................................................... 6
6
Kit Operation ................................................................................................................. 7
7
EVM Bill of Materials ....................................................................................................... 25
Appendix A
TLV320DAC32EVM Schematic ................................................................................. 28
Appendix B
USB-MODEVM Schematic ...................................................................................... 29
Appendix C USB-MODEVM Communications Protocol .................................................................... 30
List of Figures
1
2
3
4
5
6
7
8
9
10
TLV320DAC32EVM-PDK Block Diagram ................................................................................ 7
Digital Audio Data/DAC Tab ............................................................................................... 9
Clocks Tab ................................................................................................................. 12
Filters Tab ................................................................................................................... 13
Enabling Filters ............................................................................................................. 14
Shelf Filters ................................................................................................................. 14
EQ Filters .................................................................................................................... 15
Analog Simulation Filters .................................................................................................. 16
Preset Filters ................................................................................................................ 17
De-emphasis Filters ........................................................................................................ 18
I2S, I2C are trademarks of Koninklijke Philips Electronics N.V.
Windows is a trademark of Microsoft Corporation.
SPI is a trademark of Motorola, Inc.
LabView is a trademark of National Instruments.
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EVM Overview
11
12
13
14
15
16
17
User Filters ..................................................................................................................
3D Effect Settings ..........................................................................................................
Output Stage Configuration Tab .........................................................................................
High Power Output .........................................................................................................
Command Line Interface Tab .............................................................................................
File Menu ....................................................................................................................
Register Data Tab ..........................................................................................................
19
19
20
21
22
23
24
List of Tables
1
2
3
4
5
6
7
8
C-1
C-2
C-3
Analog Interface Pin Out .................................................................................................... 3
Alternate Analog Connectors ............................................................................................... 3
Digital Interface Pin Out ..................................................................................................... 4
Power Supply Pin Out ....................................................................................................... 5
List of Jumpers ............................................................................................................... 6
USB-MODEVM SW2 Settings ............................................................................................. 8
TLV320DAC32EVM Bill of Materials..................................................................................... 25
USB-MODEVM Bill of Materials .......................................................................................... 27
USB Control Endpoint HIDSETREPORT Request .................................................................... 30
Data Packet Configuration ................................................................................................ 30
GPIO Pin Assignments .................................................................................................... 35
1
EVM Overview
1.1
Features
•
•
Full-featured evaluation board for the TLV320DAC32 stereo audio codec.
Modular design for use with a variety of digital signal processor (DSP) and microcontroller interface
boards.
The TLV320DAC32EVM-PDK is a complete evaluation kit, which includes a universal serial bus
(USB)-based motherboard and evaluation software for use with a personal computer running the Microsoft
Windows™ operating system (Win2000 or XP).
1.2
Introduction
The TLV320DAC32EVM is in Texas Instruments' modular EVM form factor, which allows direct evaluation
of the device performance and operating characteristics, and eases software development and system
prototyping. This EVM is compatible with the 5-6K Interface Evaluation Module (SLAU104) and the
HPA-MCUINTERFACE (SLAU106) from Texas Instruments and additional third-party boards which
support TI's Modular EVM format.
The TLV320DAC32EVM-PDK is a complete evaluation/demonstration kit, which includes a USB-based
motherboard called the USB-MODEVM Interface board and evaluation software for use with a personal
computer running the Microsoft Windows operating systems.
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Analog Interface
2
Analog Interface
For maximum flexibility, the TLV320DAC32EVM is designed for easy interfacing to the input and outputs
analog signals. Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a
convenient 10-pin dual row header/socket combination at J1. These headers/sockets provide access to
the analog input and output pins of the device. Consult Samtec at www.samtec.com or call
1-800-SAMTEC-9 for a variety of mating connector options. Table 1 summarizes the analog interface
pinout for the TLV320DAC32EVM.
Table 1. Analog Interface Pin Out
PIN NUMBER
SIGNAL
DESCRIPTION
J1.1
HPLCOM
High Power Output Driver (Left Minus or Multifunctional)
J1.2
HPLOUT
High Power Output Driver (Left Plus)
J1.3
HPRCOM
High Power Output Driver (Right Minus or Multifunctional)
J1.4
HPROUT
High Power Output Driver (Right Plus)
J1.5
NC
Not Connected
J1.6
NC
Not Connected
J1.7
LINE2L
LINE2 Analog Input (Left)
J1.8
LINE2R
LINE2 Analog Input (Right)
J1.9
AGND
Analog Ground
J1.10
NC
Not Connected
J1.11
AGND
Analog Ground
J1.12
NC
Not Connected
J1.13
AGND
Analog Ground
J1.14
MICBIAS
Microphone Bias Voltage Output
J1.15
NC
Not Connected
J1.16
NC
Not Connected
J1.17
AGND
Analog Ground
J1.18
NC
Not Connected
J1.19
AGND
Analog Ground
J1.20
NC
Not Connected
In addition to the analog headers, the analog inputs and outputs may also be accessed through alternate
connectors, either screw terminals or audio jacks. The line input is connected via J8 and the stereo
headphone output (the HP set of outputs) is available at J9.
Table 2 summarizes the screw terminals available on the TLV320DAC32EVM.
Table 2. Alternate Analog Connectors
DESIGNATOR
PIN 1
PIN 2
PIN3
J6
AGND
LINE2INR
LINE2INL
J12
(+) HPLOUT
(–) HPLCOM
AGND
J13
(+) HPROUT
(–) HPRCOM
AGND
J14
(+) HPLOUT
MEASUREMENT
(–) HPLCOM
MEASUREMENT
AGND
J15
(+) HPROUT
MEASUREMENT
(–) HPRCOM
MEASUREMENT
AGND
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Digital Interface
3
Digital Interface
The TLV320DAC32EVM is designed to interface with multiple control platforms. Samtec part numbers
SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin dual row header/socket
combination at J4 and J5. These headers/sockets provide access to the digital control and serial data pins
of the device. Consult Samtec at www.samtec.com or call 1-800- SAMTEC-9 for a variety of mating
connector options. Table 3 summarizes the digital interface pinout for the TLV320DAC32EVM.
Table 3. Digital Interface Pin Out
PIN
NUMBER
4
SIGNAL
DESCRIPTION
J4.1
NC
Not Connected
J4.2
GPIO1
General Purpose Input/Output #1
J4.3
SCLK
SPI Serial Clock
J4.4
DGND
Digital Ground
J4.5
NC
Not Connected
J4.6
GPIO2
General Purpose Input/Output #2
J4.7
SS
SPI Chip Select
J4.8
RESET INPUT
Reset signal input to DAC32EVM
J4.9
NC
Not Connected
J4.10
DGND
Digital Ground
J4.11
MOSI
SPI MOSI Slave Serial Data Input
J4.12
SPI SELECT
Select Pin (SPI vs I2C Control Mode)
J4.13
MISO
SPI MISO Slave Serial Data Output
J4.14
DAC32 RESET
Reset
J4.15
NC
Not Connected
J4.16
SCL
I2C Serial Clock
J4.17
NC
Not Connected
J4.18
DGND
Digital Ground
J4.19
NC
Not Connected
J4.20
SDA
I2C Serial Data Input/Output
J5.1
NC
Not Connected
J5.2
NC
Not Connected
J5.3
BCLK
Audio Serial Data Bus Bit Clock (Input/Output)
J5.4
DGND
Digital Ground
J5.5
NC
Not Connected
J5.6
NC
Not Connected
J5.7
WCLK
Audio Serial Data Bus Word Clock (Input/Output)
J5.8
NC
Not Connected
J5.9
NC
Not Connected
J5.10
DGND
Digital Ground
J5.11
DIN
Audio Serial Data Bus Data Input (Input)
J5.12
NC
Not Connected
J5.13
DOUT
Audio Serial Data Bus Data Output (Output)
J5.14
NC
Not Connected
J5.15
NC
Not Connected
J5.16
SCL
I2C Serial Clock
J5.17
MCLK
Master Clock Input
J5.18
DGND
Digital Ground
J5.19
NC
Not Connected
J5.20
SDA
I2C Serial Data Input/Output
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Power Supplies
2
Note that J5 comprises the signals needed for an I S™ serial digital audio interface; the control interface
(I2C™ and RESET) signals are routed to J4. I2C is actually routed to both connectors; however, the device
is connected only to J4.
4
Power Supplies
J3 provides connection to the common power bus for the TLV320DAC32EVM. Power is supplied on the
pins listed in Table 4.
Table 4. Power Supply Pin Out
SIGNAL PIN NUMBER
SIGNAL
NC J3.1
J3.2 NC
+5VA J3.3
J3.4 NC
DGND J3.5
J3.6 AGND
DVDD (1.8V) J3.7
J3.8 NC
IOVDD (3.3V) J3.9
J3.10 NC
The TLV320DAC32EVM-PDK motherboard (the USB-MODEVM Interface board) supplies power to J3 of
the TLV320DAC32EVM. Power for the motherboard is supplied either through its USB connection or via
terminal blocks on that board.
4.1
Stand-Alone Operation
When used as a stand-alone EVM, power can be applied to J3 directly, making sure to reference the
supplies to the appropriate grounds on that connector.
CAUTION
Verify that all power supplies are within the safe operating limits shown on the
TLV320DAC32 data sheet before applying power to the EVM.
4.2
USB-MODEVM Interface Power
The USB-MODEVM Interface board can be powered from several different sources:
• USB
• 6VDC-10VDC AC/DC external wall supply (not included)
• Lab power supply
When powered from the USB connection, JMP6 should have a shunt from pins 1–2 (this is the default
factory configuration). When powered from 6V-10VDC, either through the J8 terminal block or J9 barrel
jack, JMP6 should have a shunt installed on pins 2–3. If power is applied in any of these ways, onboard
regulators generate the required supply voltages and no further power supplies are necessary.
If lab supplies are used to provide the individual voltages required by the USB-MODEVM Interface, JMP6
should have no shunt installed. Voltages are then applied to J2 (+5VA), J3 (+5VD), J4 (+1.8VD), and J5
(+3.3VD). The +1.8VD and +3.3VD can also be generated on the board by the onboard regulators from
the +5VD supply; to enable this configuration, the switches on SW1 need to be set to enable the
regulators by placing them in the ON position (lower position, looking at the board with text reading
right-side up). If +1.8VD and +3.3VD are supplied externally, disable the onboard regulators by placing
SW1 switches in the OFF position.
Each power supply voltage has an LED (D1-D7) that lights when the power supplies are active.
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EVM Operation
5
EVM Operation
This section provides information on the analog input and output, digital control, and general operating
conditions of the TLV320DAC32EVM.
5.1
Analog Input
The analog input sources can be applied directly to J1 (top or bottom side) or through signal conditioning
modules available for the modular EVM system.
The analog inputs may also be accessed through J8 and and screw terminal, J6.
5.2
Analog Output
The analog outputs from the TLV320DAC32 are available on screw terminals, J12 and J13. They also
may be accessed at the test points on the EVM with the corresponding label. When measuring the
performance of the device, the outputs can be routed through an RC low-pass filter to reduce the
out-of-band noise which can cause incorrect readings from the measurement equipment. These filtered
outputs can be accessed on screw terminals J14 and J15.
5.3
Digital Control
The digital control signals can be applied directly to J4 and J5 (top or bottom side). The modular
TLV320DAC32EVM can also be connected directly to a DSP interface board, such as the
5-6KINTERFACE or HPA-MCUINTERFACE, or to the USB-MODEVM Interface board if purchased as part
of the TLV320DAC32EVM-PDK. See the product folder for this EVM or the TLV320DAC32 for a current
list of compatible interface and/or accessory boards.
5.4
Default Jumper Locations
Table 5 provides a list of jumpers found on the EVM and their factory default conditions.
Table 5. List of Jumpers
6
JUMPER
DEFAULT
POSITION
JUMPER DESCRIPTION
JMP1
Installed
Connects Analog and Digital Grounds.
JMP2
Open
Selects on-board EEPROM as Firmware Source.
JMP5
1-2
Connects the IOVDD supply of the codec to IOVDD or DVDD. It also provides a means of measuring
IOVDD current.
JMP6
Installed
Provides a means of measuring DVDD current.
JMP7
Installed
Provides a means of measuring DRVDD current.
JMP8
Installed
Provides a means of measuring AVDD_DAC current.
JMP9
Open
When installed, allows the USB-MODEVM to hardware reset the device under user control
JMP11
Installed
When installed, shorts across the output capacitor on HPLOUT; remove this jumper if using AC-coupled
output drive
JMP12
Installed
When installed, shorts HPLCOM and HPRCOM. Use only if these signals are set to constant VCM.
JMP13
Installed
When installed, shorts across the output capacitor on HPLCOM; remove this jumper if using AC-coupled
output drive
JMP14
Installed
When installed, shorts across the output capacitor on HPROUT; remove this jumper if using AC-coupled
output drive
JMP15
Installed
When installed, shorts across the output capacitor on HPRCOM; remove this jumper if using AC-coupled
output drive
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Kit Operation
6
Kit Operation
The following section provides information on using the TLV320DAC32EVM-PDK, including set up,
program installation, and program usage.
6.1
TLV320DAC32EVM-PDK Block Diagram change
A block diagram of the TLV320DAC32EVM-PDK is shown in Figure 1. The evaluation kit consists of two
circuit boards connected together. The motherboard is designated as the USB-MODEVM Interface board,
while the daughtercard is the TLV320DAC32EVM described previously in this manual.
TLV320DAC32EVM
EVM Position 1
Control Interface
2
SPI, I C
TAS1020B
USB 8051
Microcontroller
EVM Position 2
USB
2
I S, AC97
Audio Interface
Figure 1. TLV320DAC32EVM-PDK Block Diagram
The USB-MODEVM Interface board is intended to be used in USB mode, where control of the installed
EVM is accomplished using the onboard USB controller device. However, a provision is made for driving
all the data buses (I2C, SPI™, I2S/AC97) externally. The source of these signals is controlled by SW2 on
the USB-MODEVM. See Table 6 for details on the switch settings.
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Table 6. USB-MODEVM SW2 Settings
SW-2 SWITCH
NUMBER
LABEL
SWITCH DESCRIPTION
1
A0
USB-MODEVM EEPROM I2C Address A0
ON: A0 = 0
OFF: A0 = 1
2
A1
USB-MODEVM EEPROM I2C Address A1
ON: A1 = 0
OFF: A1 = 1
3
A2
USB-MODEVM EEPROM I2C Address A2
ON: A2 = 0
OFF: A2 = 1
4
USB I2S
I2S Bus Source Selection
ON: I2S Bus connects to TAS1020B
OFF: I2S Bus connects to USB-MODEVM J14
5
USB MCK
I2S Bus MCLK Source Selection
ON: MCLK connects to TAS1020B
OFF: MCLK connects to USB-MODEVM J14
6
USB SPI
SPI Bus Source Selection
ON: SPI Bus connects to TAS1020B
OFF: SPI Bus connects to USB-MODEVM J15
7
USB RST
RST Source Selection
ON: EVM Reset Signal comes from TAS1020B
OFF: EVM Reset Signal comes from USB-MODEVM J15
8
EXT MCK
External MCLK Selection
ON: MCLK Signal is provided from USB-MODEVM J10
OFF: MCLK Signal comes from either selection of SW2-5
For use with the TLV320DAC32EVM, SW-2 positions 1 through 7 should be set to ON, while SW-2.8
should be set to OFF.
6.2
Installation
Ensure that the TLV320DAC32EVM is installed on the USB-MODEVM Interface board, aligning J1, J3, J4,
and J5 with the corresponding connectors on the USB-MODEVM.
Place the CD-ROM into your PC CD-ROM drive. Locate the Setup program on the disk, and run it. The
Setup program will install the TLV320DAC32 Evaluation software on the user's PC. The software for
NI-VISA Runtime will install automatically if it has not been previously installed. This software allows the
program to communicate with USB.
When the installation completes, click Finish on the TLV320DAC32EVM installer window. The user may
be prompted to restart the computer.
When installation is complete, attach a USB cable from the PC to the USB-MODEVM Interface board. As
configured at the factory, the board will be powered from the USB interface, so the power indicator LEDs
on the USB-MODEVM should light. At this time, the PC may go through an initialization of the drivers to
properly operate the USB-MODEVM interface board. Once this connection is established and any driver
configuration has completed, launch the TLV320DAC32EVM Evaluation software on the PC.
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Kit Operation
The software should automatically find the TLV320DAC32EVM, and a screen similar to the one in
Figure 2 should appear.
Figure 2. Digital Audio Data/DAC Tab
6.3
USB-MODEVM Interface Board
The diagram shown in Figure 1 displays only the basic features of the USB-MODEVM Interface board.
The board is built around a TAS1020B streaming audio USB controller with an 8051-based core. The
board features two positions for modular EVMs, or one double-wide serial modular EVM may be installed.
Since the TLV320DAC32EVM is a double-wide modular EVM, it is installed with connections to both EVM
positions, which connects the TLV320DAC32 digital control interface to the I2C port realized using the
TAS1020B, as well as the TAS1020B digital audio interface..
In the factory configuration, the board is ready to use with the TLV320DAC32EVM. To view all the
functions and configuration options available on the USB-MODEVM board, see the USB-MODEVM
Interface Board schematic in Appendix B.
6.4
Indicators and Main Screen Controls
Figure 2 illustrates the indicators and controls near the top of the screen, and a large tabbed interface
below. This section covers the controls above this tabbed section.
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Kit Operation
6.4.1
Interface Indicator
At the top left of the screen is an Interface indicator. The TLV320DAC32 has an I2C interface. The
indicator is lit after the program begins.
6.4.2
Firmware Information
To the right of the Interface indicator is a group box called Firmware. This box indicates where the
firmware being used is operating from — in this release, the firmware is on the USB-MODEVM, so
USB-MODEVM should be visible in the box labeled Located On:. The version of the firmware appears in
the Version box below this.
6.4.3
Device Connected Indicator
Below the Firmware group box, an indicator labeled DEVICE CONNECTED shows the status of the USB
connection. It the indicator is green, then the USB connection is good and the software is ready to use. If
the indicator is red, then there is an error and the software is not recognizing the EVM.
6.4.4
Device Reset Controls
To the right, the next group box contains controls for resetting the TLV320DAC32. A software reset can be
done by writing to a register in the TLV320DAC32, and this is accomplished by pushing the button labeled
Software Reset. The TLV320DAC32 also may be reset by toggling a pin on the TLV320DAC32, which is
done by pushing the Hardware Reset button.
CAUTION
In order to perform a hardware reset, the RESET jumper (JMP9) must be
installed and SW2-7 on the USB-MODEVM must be turned OFF. Failure to do
either of these steps results in not generating a hardware reset or causing
unstable operation of the EVM, which may require cycling power to the
USB-MODEVM.
The DAC Overflow indicator lights when the overflow flags are set in the TLV320DAC32. These
indicators, as well as the other indicators on this panel, are updated only when the software's front panel
is inactive, once every 20ms. To the far right on this screen, the short-circuit indicators show when a
short-circuit condition is detected, if this feature has been enabled.
6.4.5
Update Buttons Control
Near the left side of the screen is a button labeled Update Buttons. This button defaults to ON and can
be turned off it desired. The buttons allows for the software indicators (buttons, knobs, and dials) to be
automatically updated to reflect the device status when the device is configured by means of the
Command Line Interface (see Section 6.9.1).
6.5
Digital Audio Data/DAC Tab
The Audio Interface tab (Figure 2) sets up the audio data interface to the TLV320DAC32 and controls the
operation of the DAC.
6.5.1
DAC Controls
On the left side of this tab are controls for the left and right DACs.
The DAC controls are set up to allow powering of each DAC individually, and setting the output level.
Each channel's level can be set independently using the corresponding Volume knob. Alternately, by
checking the Slave to Right box, the left channel Volume can be made to track the right channel Volume
knob setting; checking the Slave to Left box causes the right channel Volume knob to track the left
Volume knob setting.
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Kit Operation
Data going to the DACs is selected using the drop-down boxes under the Left and Right Datapath. Each
DAC channel can be selected to be off, use left channel data, use right channel data, or use a mono mix
of the left and right data.
Analog audio coming from the DACs is routed to outputs using the Output Path controls in each DAC
control panel. The DAC outputs can be mixed with the analog inputs (LINE2L, LINE2R) and routed to the
high power outputs using the mixer controls on the High Power Outputs tab. If the DAC is to be routed
directly to HP outputs, this can be selected as choices in the Output Path control. Note that if "HP Output
Driver" option is selected as the output path, the mixer controls on the High Power Output tabs have no
effect.
6.5.2
MICBIAS Control
The microphone bias can either be powered down or set to 2.0V, 2.5V, or the power supply voltage of the
DAC (AVDD).
6.5.3
Digital Audio Data Controls
The DAC32 allows for multiple serial audio digital data configurations to provide maximum flexibility.
For use with the PC software and the USB-MODEVM, the default settings should be used. If using an
external I2S source, or other data source, the interface mode may be selected using the Transfer Mode
control—selecting either I2S mode, DSP mode, or Right- or Left-Justified modes. Word length can be
selected using the Word Length control, and the bit clock rate can also be selected using the Bit Clock
rate control. The Data Word Offset, used in TDM mode (see the SLAS506 product data sheet) can also
be selected on this tab.
Along the bottom of this tab are controls for choosing the BLCK and WCLK as being either inputs or
outputs. When the codec is desired to be a master, BLCK and WCLK should be set to Output. When the
codec is desired to be a slave, the default settings of Input are correct. An indicator that allows for
transmitting BLCK and WCLK when the codec is powered down is also located at the bottom of this tab.
6.6
Clocks Tab
The TLV320DAC32 has a very flexible scheme for generating the clock sources for the DAC sample rate.
The Clocks tab allows access to set the different options for setting up these clocks. Refer to the Audio
Clock Generation Processing figure in the TLV320DAC32 data sheet.
For use with the PC software and the USB-MODEVM, the clock settings must be set a certain way. These
settings are not the default settings of the TLV320DAC32. The EVM-required settings can be loaded
automatically by pushing the Load EVM Clock Settings button at the bottom of this tab. Note that
changing any of the clock settings from the values loaded when this button is pushed may result in the
EVM not working properly with the PC software or USB interface. If an external audio bus is used (audio
not driven over the USB bus), then settings may be changed to any valid combination. See Figure 3.
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Kit Operation
Figure 3. Clocks Tab
The codec clock source is chosen by the DAC_CLK Source control. When this control is set to
CLKDIV_OUT, the PLL is not used; when set to PLLDIV_OUT, the PLL is used to generate the clocks.
6.6.1
Use Without PLL
Setting up the TLV320DAC32 for clocking without using the PLL is straightforward. The CLKDIV_IN
source can be selected as either MCLK or BCLK, the default is MCLK. The CLKDIV_IN frequency is then
entered into the CLKDIV_IN box, in megahertz (MHz). The default value shown, 11.2896MHz, is the
frequency used on the USB-MODEVM board. This value is then divided by the value of Q, which can be
set from 2 to 17; the resulting CLKDIV_OUT frequency is shown in the indicator next to the Q control.
This frequency will then be used to calculate the actual Fsref frequency, and the DAC sample rate, after
the NADC factor is applied to the Fsref. If dual rate mode is desired, this option can be enabled for the
DAC by pressing the corresponding Dual Rate Mode button.
6.6.2
Use With The PLL
When PLLDIV_OUT is selected as the codec clock source, the PLL will be used. The PLL clock source is
chosen using the PLLCLK_IN control, and may be set to either MCLK or BCLK. The PLLCLK_IN
frequency is then entered into the PLLCLK_IN Source box.
The PLL_OUT and PLLDIV_OUT indicators show the resulting PLL output frequencies with the values set
for the P, K, and R parameters of the PLL. See the TLV320DAC32 data sheet for an explanation of these
parameters. The parameters can be set by clicking on the up/down arrows of the P, K, and R combo
boxes, or they can be typed into these boxes. The values can also be calculated by the PC software.
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To use the PC software to find the ideal values of P, K, and R for a given PLL input frequency and desired
Fsref, the Fsref must be set using the switch on this tab; it can be set to either 44.1kHz or 48kHz. Once
the Fsref and PLLCLK_IN values are correctly set, pushing the Search for Ideal Settings button starts
the software searching for ideal combinations of P, K, and R which achieve the desired Fsref. The
possible settings for these parameters are displayed in the spreadsheet-like table labeled Possible
Settings. Clicking on a row in this table sets the P, K, and R values in the software and updates the
PLL_OUT and PLLDIV_OUT readings, as well as the Actual Fsref and Error displays. This process does
not actually load the values into the TLV320DAC32, however; it only updates the displays in the software.
This allows for different possible solutions to be selected and the error evaluated before loading into the
device.
When a suitable combination of P,K, and R have been chosen, pressing the Load Settings into Device?
button will download these values into the appropriate registers on the TLV320DAC32.
Re-sync of the audio bus is enabled using the controls in the lower right corner of this screen. Re-sync is
done if the group delay changes by more than ±FS/4 for the ADC or DAC sample rates (see the
TLV320DAC32 data sheet). The channels can be soft muted when doing the re-sync if the Soft Mute
button is enabled.
6.7
Filters Tab
The TLV320DAC32 has a very rich feature set for applying digital filtering to audio signals. This tab (
Figure 4) controls all of the filter features of the TLV320DAC32. In order to use this tab and have plotting
of filter responses correct, the DAC sample rate must be set correctly. Therefore, the clocks must be set
up correctly in the software following the discussion in Section 6.6.
Figure 4. Filters Tab
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The right-hand side of this tab shows a display that plots the magnitude and phase response of each
biquad section, plus the combined responses of the two biquad sections. The coefficients used for the
plotted responses are shown below the graph for both Biquad 1 and Biquad 2. Note that the plot shows
only the responses of the effect filters, not the combined response of those filter along with the
de-emphasis filters.
6.7.1
Enabling Filters
The de-emphasis and effect filters (the biquad filters) of the TLV320DAC32 are selected using the check
boxes shown in Figure 5. The De-emphasis filters are described in the TLV320DAC32 data sheet, and
their coefficients may be changed (see Section 6.7.6).
Figure 5. Enabling Filters
When designing filters for use with TLV320DAC32, the software allows for several different filter types to
be used. These options are shown on a tab control in the lower left corner of the screen. When a filter
type is selected, and suitable input parameters defined, the response will be shown in the Effect Filter
Response graph. Regardless of the setting for enabling the Effect Filter, the filter coefficients are not
loaded into the TLV320DAC32 until the Download Coefficients button is pressed. To avoid noise during
the update of coefficients, it is recommended that the user uncheck the Effect Filter enable check boxes
before downloading coefficients. Once the desired coefficients are in the TLV320DAC32, enable the Effect
Filters by checking the boxes again.
6.7.2
Shelf Filters
A shelf filter is a simple filter that applies a gain (positive or negative) to frequencies above or below a
certain corner frequency. As shown in Figure 6, in Bass mode a shelf filter applies a gain to frequencies
below the corner frequency; in Treble mode the gain is applied to frequencies above the corner frequency.
Figure 6. Shelf Filters
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To use these filters, enter the gain desired and the corner frequency. Choose the mode to use (Bass or
Treble); the response will be plotted on the Effect Filter Response graph.
6.7.3
EQ Filters
EQ, or parametric, filters can be designed on this tab (see Figure 7). Enter a gain, bandwidth, and a
center frequency (Fc). Either bandpass (positive gain) or band-reject (negative gain) filters can be created
Figure 7. EQ Filters
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6.7.4
Analog Simulation Filters
Biquads are quite good at simulating analog filter designs. For each biquad section on this tab, enter the
desired analog filter type to simulate (Butterworth, Chebyshev, Inverse Chebyshev, Elliptic or Bessel).
Parameter entry boxes appropriate to the filter type will be shown (ripple, for example, with Chebyshev
filters, etc.). Enter the desired design parameters and the response will be shown (see Figure 8.)
Figure 8. Analog Simulation Filters
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6.7.5
Preset Filters
Many applications are designed to provide preset filters common for certain types of program material.
This tab (Figure 9) allows selection of one of four preset filter responses - Rock, Jazz, Classical, or Pop.
Figure 9. Preset Filters
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6.7.6
De-emphasis Filters
The de-emphasis filters used in the TLV320DAC32 can be programmed as described in the
TLV320DAC32 data sheet, using this tab (Figure 10). Enter the coefficients for the de-emphasis filter
response desired. While on this tab, the de-emphasis response will be shown on the Effect Filter
Response graph; however, note that this response is not included in graphs of other effect responses
when on the other filter design tabs.
Figure 10. De-emphasis Filters
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6.7.7
User Filters
If filter coefficients are known, they can be entered directly on this tab (Figure 11) for both biquads for both
left and right channels. The filter response will not be shown on the Effect Filter Response graph for user
filters.
Figure 11. User Filters
6.7.8
3D Effect
The 3D effect is described in the TLV320DAC32 data sheet. It uses the two biquad sections differently
than most other effect filter settings. To use this effect properly, make sure the appropriate coefficients are
already loaded into the two biquad sections. The User Filters tab may be used to load the coefficients
(Figure 12).
Figure 12. 3D Effect Settings
To enable the 3D effect, check the 3D Effect On box. The Depth knob controls the value of the 3D
Attenuation Coefficient.
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Kit Operation
6.8
Output Stage Configuration Tab
The Output Stage Configuration tab (Figure 13) allows for setting several features of the output drivers.
The Configuration may be set as either Fully-Differential or Pseudo-Differential. The output coupling can
be chosen as either capless or AC-coupled. This setting should correspond to the setting of the hardware
switch (SW1) on the TLV320DAC32EVM.
Figure 13. Output Stage Configuration Tab
The Common Mode Voltage of the outputs may be set to 1.35V, 1.5V, 1.65V, or 1.8V using the Common
Mode Voltage control. The Power-On Delay of the output drivers can be set using the corresponding
control from 0µs up to 4 seconds. Ramp-Up Step Timing can also be adjusted from 0ms to 4ms.
The high power outputs of the TLV320DAC32 can be configured to go to a weak common-mode voltage
when powered down. The source of this weak common-mode voltage can be set on this tab with the
Weak Output CM Voltage Source drop-down. Choices for the source are either a resistor divider off the
AVDD_DAC supply, or a bandgap reference. See the data sheet for more details on this option.
The outputs can be set to soft-step their volume changes, using the Output Volume Soft Stepping
control, and set to step once per Fs period, once per two Fs periods, or soft-stepping can be disabled
altogether.
Output short-circuit protection can be enabled in the Short Circuit Protection group box. Short Circuit
Protection can use a current-limit mode, where the drivers will limit current output if a short-circuit
condition is detected, or in a mode where the drivers will power down when such a condition exists.
The LINE2 Bypass Path group box has controls that allow disabling or routing the LINE2 input to the
output stage directly.
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Kit Operation
6.9
High Power Outputs Tab
This tab contains four groupings of controls, one for each of the high power outputs. Each output has a
mixer to mix the LINE2L, LINE2R, DAC_L and DAC_R signals, assuming that the DACs are not routed
directly to the high power outputs (see Section 6.5.1).
Figure 14. High Power Output
The controls are divided such that the right channel controls are on the left side of the tab and the left
channel controls are on the right side of the tab. Each output group contains a power button, 3-state
control button, four mixer volume controls and a output amplifier volume control.
At the right side of the output strip is a master volume knob for that output, which allows muting the output
or applying gain up to 9dB.
The mixer control volume controls allow for each of four input sources to be independently controlled to
allow volume adjustment and summing. Each of these controls allow adjustment of the volume from
–78.3dB to 0dB, including mute.
The power button controls whether the corresponding output is powered up or not. When powered down,
the outputs can be 3-stated or driven weakly to a the output common mode voltage; this option is selected
using the button below the power button.
The COM outputs (HPLCOM and HPRCOM) can be used as independent output channels or can be used
as complementary signals to the HPL and HPR outputs. In these complementary configurations, the COM
outputs can be selected as differential signals to the corresponding outputs or may be set to be a common
mode voltage. When used in these configurations, the power button for the COM output is disabled, as the
power mode for that output will track the power status of the HPL or HPR output that the COM output is
tracking.
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Kit Operation
6.9.1
Command Line Interface Tab
A scripting language controls the TAS1020B on the USB-MODEVM from the LabView™-based PC
software. The main program controls, described previously, only write a script which is then transferred to
an interpreter that sends the appropriate data to the correct USB endpoint. Because this system is
script-based, provisions are made in this tab for the user to view the scripting commands created as the
controls are manipulated, as well as load and execute other scripts that have been written and saved (see
Figure 15). This design allows the software to be used as a test tool, or to provide troubleshooting
information in the event that the user encounters a problem with this EVM.
Figure 15. Command Line Interface Tab
A script is loaded into the command buffer, either by operating the controls on the other tabs or by loading
a script file. When executed, the return packets of data which result from each command is displayed in
the Command History Data array control. When executing several commands, the Command History
Data control only shows the results of the last command. To see the results after every executed
command, use the logging function described below.
The File menu (Figure 16) provides some options for working with scripts. The first option, Open
Command File..., loads a command file script into the command buffer. This script is then executed by
pressing the Execute Command Buffer button.
The second option is Log Script and Results..., which opens a file save dialog box. Choose a location for a
log file to be written using this file save dialog. When the Execute Command Buffer button is pressed, the
script runs, and the script, along with resulting data read back during the script, is saved to the file
specified. The log file is a standard text file that can be opened with any text editor, and looks much like
the source script file, but with the additional information of the result of each script command executed.
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The third menu item is a submenu of Recently Opened Files. This is a list of script files that have
previously been opened, allowing fast access to commonly-used script files. The final menu item is Exit,
which terminates the TLV320DAC32EVM software.
Figure 16. File Menu
Under the Help menu is an About... menu item which displays information about the TLV320DAC32EVM
software.
The actual USB protocol used as well as instructions on writing scripts are detailed in Section C.1. While it
is not necessary to understand or use either the protocol or the scripts directly, understanding them may
be helpful to some users.
6.9.2
Register Data Tab
The Register Data Tab contains two tabs labeled Page 0 Registers and Page 1 Registers. Each tab
contains the current register settings of the codec in table format (see Figure 17).
The first three columns contain the register number and name information. The register number is
displayed in decimal format in the first column and hexadecimal format in the second column. The third
column contains the name of the register. Reserved registers are highlighted gray and should not be read
or written. The remaining columns display the register data in hexadecimal format and in binary format
with bit D7 being the MSB.
The Register Dump to File button allows both pages of the register information to be saved as Excel
files. Each page is saved as a separate file. The user is prompted for the name and location of the files to
be saved.
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Kit Operation
Figure 17. Register Data Tab
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EVM Bill of Materials
7
EVM Bill of Materials
Table 7 and Table 8 contain a complete bill of materials for the modular TLV320DAC32EVM and the
USB-MODEVM Interface Board (included only in the TLV320DAC32EVM-PDK).
Table 7. TLV320DAC32EVM Bill of Materials
REF DES
Install
Value
Size
Description
MFG
MFG P/N
C1–C4
√
10µF
1206
6.3V Ceramic Chip Capacitor, ±10%, X5R
TDK
C3216X5R0J106K
C5, C6
√
0.1µF
0603
16V Ceramic Chip Capacitor, ±10%, X7R
TDK
C1608X7R1C104K
0.1µF
0603
16V Ceramic Chip Capacitor, ±10%, X7R
TDK
C1608X7R1C104K
10µF
1206
6.3V Ceramic Chip Capacitor, ±10%, X5R
TDK
C3216X5R0J106K
NI
1210
C9–C12
C14
√
C15
C16, C17
NI
1206
C18, C19
√
0.1µF
1206
100V Ceramic Chip Capacitor, ±10%, X7R
TDK
C3216X7R2A104K
C20
√
10µF
1206
6.3V Ceramic Chip Capacitor, ±10%, X5R
TDK
C3216X5R0J106K
C21–C26
√
47µF
1210
6.3V Ceramic Chip Capacitor, ±20%, X5R
TDK
C3225X5R0J476M
C27–C30
√
47nF
0603
50V Ceramic Chip Capacitor, ±10%, X7R
TDK
C1608X7R1H473K
0.1µF
0603
16V Ceramic Chip Capacitor, ±10%, X7R
TDK
C1608X7R1C104K
C31
Digi-Key P/N
445-1313-2
R1–R3
√
2.7K
0603
1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ272V
P2.7KGCT-ND
R7, R8
√
0
1206
1/4W 5% Chip Resistor
Panasonic
ERJ-8GEY0R00V
P0.0ECT-ND
R9
√
100K
0603
1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ101V
P100GCT-ND
R10–R13
√
100
0603
1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ101V
P100GCT-ND
R14
√
10
0603
1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ100V
P10GCT-ND
0
0603
1/10W 5% Chip Resistor
Panasonic
ERJ-3GEY0R00V
P0.0GCT-ND
R15
SW1
√
4PDT Right Angle Switch
E-Switch
EG4208
EG1914-ND
SW2
√
2PDT Slide Switch
E-Switch
EG4209
EG1907-ND
J1
√
Plug 2X10
20 Pin SMT Plug
Samtec
TSM-110-01-L-DV-P
Socket 2X10
20 Pin SMT Socket
Samtec
SSW-110-22-F-D-VS-K
J3
√
Plug 2X5
10 Pin SMT Plug
Samtec
TSM-105-01-L-DV-P
Socket 2X5
10 Pin SMT Socket
Samtec
SSW-105-22-F-D-VS-K
Plug 2X10
20 Pin SMT Plug
Samtec
TSM-110-01-L-DV-P
Socket 2X10
20 Pin SMT Socket
Samtec
SSW-110-22-F-D-VS-K
Plug 2X10
20 Pin SMT Plug
Samtec
TSM-110-01-L-DV-P
Socket 2X10
20 Pin SMT Socket
Samtec
SSW-110-22-F-D-VS-K
Screw Terminal Block, 3 Position
On Shore
1ED555/3DS
ED1515-ND
3,5 mm Audio Jack, T-R-S, SMD
CUI Inc
SJ1-3515-SMT
CP1-3515SJCT-ND
KobiConn
161-3335
CUI Inc
SJ1-3515-SMT
CP1-3515SJCT-ND
KobiConn
161-3515-SMT
CP1-3515SJCT-ND
Screw Terminal Block, 3 Position
On Shore
1ED555/3DS
ED1515-ND
J4
J5
√
√
J6
√
J8
√
J9
J12–15
3,5 mm
√
3,5 mm
√
3,5 mm Audio Jack, T-R-S, SMD
Jumper Function
JMP1
√
AGND/DGND
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP2
√
EEPROM enable
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP5
√
IOVDD select
Header 1X3
3 Postion Jumper, 0.1" spacing
Samtec
TSW-103-07-L-S
JMP6
√
DVDD
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP7
√
DRVDD
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP8
√
AVDD
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP9
√
RESET
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP11
√
HPLOUT direct
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP12
√
HPLCOM/
HPRCOM
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP13
√
HPLCOM direct
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP14
√
HPROUT direct
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP15
√
HPRCOM direct
Header 1X2
2 Postion Jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
Jumper Block
Header Shorting Block
Samtec
SNT-100-BK-T
Alternate Label
TP1
√
AGND
Test Point
Keystone
E5011
5011K-ND
TP2
√
DGND
Test Point
Keystone
E5011
5011K-ND
TP5
√
MICBIAS
Miniature Test point Terminal
Keystone
E5000
5000K-ND
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EVM Bill of Materials
Table 7. TLV320DAC32EVM Bill of Materials (continued)
REF DES
Description
MFG
MFG P/N
Digi-Key P/N
TP7
√
LINE2LP
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP8
√
LINE2RP
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP10
√
DIN
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP11
√
WCLK
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP12
√
BCLK
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP13
√
MCLK
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP14
√
AVSS
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP15
√
RESET
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP16
√
SCL
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP17
√
SDA
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP19
√
HPROUT
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP20
√
HPLOUT
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP21
√
DRVSS
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP25
√
HPLCOM
Miniature Test point Terminal
Keystone
E5000
5000K-ND
TP26
√
HPRCOM
Miniature Test point Terminal
Keystone
E5000
5000K-ND
U1
√
SOT-223
3.3V LDO
TI
REG1117-3.3
U2
√
MCP SN-8
64K I2C EEPROM
Microchip
24LC64I/SN
U3
√
RGZ-48
Audio DAC
TI
TLV320DAC32IRHB
26
Install
Value
Size
TLV320DAC32EVM and TLV320DAC32EVM-PDK
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EVM Bill of Materials
Table 8. USB-MODEVM Bill of Materials
Designators
Description
Manufacturer
Mfg. Part Number
R4
10Ω 1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ1300V
R10, R11
27.4Ω 1/16W 1% Chip Resistor
Panasonic
ERJ-3EKF27R4V
R20
75Ω 1/4W 1% Chip Resistor
Panasonic
ERJ-14NF75R0U
R19
220Ω 1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ221V
R14, R21, R22
390Ω 1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ391V
R13
649Ω 1/16W 1% Chip Resistor
Panasonic
ERJ-3EKF6490V
R9
1.5kΩ 1/10W 5%, Chip Resistor
Panasonic
ERJ-3GEYJ1352V
R1–R3, R5–R8
2.7kΩ 1/10W 5%, Chip Resistor
Panasonic
ERJ-3GEYJ272V
R12
3.09kΩ 1/16W 1%, Chip Resistor
Panasonic
ERJ-3EKF3091V
R15, R16
10kΩ 1/10W 5%, Chip Resistor
Panasonic
ERJ-3GEYJ1303V
R17, R18
100kΩ 1/10W 5%, Chip Resistor
Panasonic
ERJ-3GEYJ1304V
RA1
10kΩ 1/8W Octal Isolated Resistor Array
CTS Corporation
742C163103JTR
C18, C19
33pF 50V Ceramic, Chip Capacitor, ±5%, NPO
TDK
C1608C0G1H330J
C13, C14
47pF 50V Ceramic, Chip Capacitor, ±5%, NPO
TDK
C1608C0G1H470J
C20
100pF 50V Ceramic, Chip Capacitor, ±5%, NPO
TDK
C1608C0G1H101J
C21
1000pF 50V Ceramic, Chip Capacitor, ±5%, NPO
TDK
C1608C0G1H102J
C15
0.1µF 16V Ceramic, Chip Capacitor, ±10%,X7R
TDK
C1608X7R1C104K
C16, C17
0.33 µF 16V Ceramic, Chip Capacitor, ±20%,Y5V
TDK
C1608X5R1C334K
C9–C12, C22–C28
1µF 6.3V Ceramic, Chip Capacitor, ±10%, X5R
TDK
C1608X5R0J1305K
C1–C8
10 µF 6.3V Ceramic, Chip Capacitor, ±10%, X5R
TDK
C3216X5R0J1306K
D1
50V, 1A, Diode MELF SMD
Micro Commercial Components
DL4001
D2
Yellow Light Emitting Diode
Lumex
SML-LX0603YW-TR
D3–D7
Green Light Emitting Diode
Lumex
SML-LX0603GW-TR
D5
Red Light Emitting Diode
Lumex
SML-LX0603IW-TR
Q1, Q2
N-Channel MOSFET
Zetex
ZXMN6A07F
X1
6MHz Crystal SMD
Epson
MA-505 6.000M-C0
U8
USB Streaming Controller
Texas Instruments
TAS1020BPFB
U2
5V LDO Regulator
Texas Instruments
REG1117-5
U9
3.3V/1.8V Dual Output LDO Regulator
Texas Instruments
TPS767D318PWP
U3, U4
Quad, 3-State Buffers
Texas Instruments
SN74LVC125APW
U5–U7
Single IC Buffer Driver with Open Drain o/p
Texas Instruments
SN74LVC1G07DBVR
U10
Single 3-State Buffer
Texas Instruments
SN74LVC1G125DBVR
Microchip
24LC64I/SN
U1
64K 2-Wire Serial EEPROM
I2C
USB-MODEVM PCB
Texas Instruments
6463995
TP1–TP6, TP9–TP11
Miniature test point terminal
Keystone Electronics
5000
TP7, TP8
Multipurpose test point terminal
Keystone Electronics
5011
J7
USB Type B Slave Connector Thru-Hole
Mill-Max
897-30-004-90-000000
J13, J2–J5, J8
2-position terminal block
On Shore Technology
ED555/2DS
J9
2.5mm power connector
CUI Stack
PJ-102B
J130
BNC connector, female, PC mount
AMP/Tyco
414305-1
J131A, J132A, J21A, J22A
20-pin SMT plug
Samtec
TSM-110-01-L-DV-P
J131B, J132B, J21B, J22B
20-pin SMT socket
Samtec
SSW-110-22-F-D-VS-K
J133A, J23A
10-pin SMT plug
Samtec
TSM-105-01-L-DV-P
J133B, J23B
10-pin SMT socket
Samtec
SSW-105-22-F-D-VS-K
J6
4-pin double row header (2x2) 0.1"
Samtec
TSW-102-07-L-D
J134, J135
12-pin double row header (2x6) 0.1"
Samtec
TSW-106-07-L-D
JMP1–JMP4, JMP8–JMP14
2-position jumper, 0.1" spacing
Samtec
TSW-102-07-L-S
JMP5, JMP6
3-position jumper, 0.1" spacing
Samtec
TSW-103-07-L-S
JMP7
3-position dual row jumper, 0.1" spacing
Samtec
TSW-103-07-L-D
SW1
SMT, half-pitch 2-position switch
C&K Division, ITT
TDA02H0SK1
SW2
SMT, half-pitch 8-position switch
C&K Division, ITT
TDA08H0SK1
Jumper plug
Samtec
SNT-100-BK-T
SLAU201 – November 2006
Submit Documentation Feedback
TLV320DAC32EVM and TLV320DAC32EVM-PDK
27
www.ti.com
Appendix A
Appendix A TLV320DAC32EVM Schematic
The schematic diagram is provided as a reference.
28
TLV320DAC32EVM Schematic
SLAU201 – November 2006
Submit Documentation Feedback
1
2
3
4
6
5
Revision History
REV
ECN Number
Approved
IOVDD
JMP5
1
2
3
JPR-1X3
J9
2
SW2
DVDD
JMP6
5
6
IOVDD
NI
1
2
3
HEADSET OUTPUT
NI
10uF
C14
10uF
TP20
1
JMP8
NI
1
18
24
25
7
32
1
2
3
4
5
12
13
J6
DRVDD
DRVDD
AVDD_DAC
DVDD
IOVDD
MCLK
BCLK
WCLK
DIN
LDO_SELECT
LINE2LP_2
LINE2LP_1
HPCOM
DRVSS
SDA
SCL
TP5
MICBIAS
HPLOUT
HPLCOM
HPROUT
HPRCOM
26
21
6
31
9
8
17
TP14
NI
3
HPLCOM
JMP14
HPL OUT
2
J13
47uF
C26
TP26
HPRCOM
19
20
23
22
2
MINUS
47uF
JMP15
HPRCOM
3
2
HPRCOM
27
28
29
30
HPR OUT
J14
R10
HPLOUT
1
100
C27
47nF
TP21
2
DRVSS
AVSS
B
3
R11
TP7
LINE2LP
HPLCOM
TP15
LINE2RP
C18
C16
0.1uF
C19
NI
C17
0
0.1uF
NI
R8
SJ-3515-SMT-1
TP8
0
R7
J8
C
HPROUT
HPROUT
C25
TLV320DAC32IRHB
C15
MICBIAS
HPLCOM
2
1
AVSS_DAC
LINE2RP_1
MICBIAS_1
MICBIAS
DRVSS
IN2R
1
1
PLUS
AVSS_DAC
AVSS_DAC
AVSS_DAC
AVSS_DAC
IOVSS
2 IN2R
2
1
RESET
14
16
15
2
MINUS
47uF
JMP13
JMP12
10uF
LINE2LP
LINE2RP
IN2L
J12
47uF
C24
U3
10
11
HPLOUT
PLUS
1
2
NI
C4
2
HPLOUT
C23
+3.3VA
1
TP13
MCLK
LINE 2 IN
1
C12
C
1
JMP11
TP25
HPLCOM
10uF
C31
MCLK
3 IN2L
47uF
NI
C3
TP12
BCLK
BCLK
ESW_EG4208
+3.3VA
2
C11
TP11
WCLK
WCLK
C22
HPLOUT
JMP7
DIN
SJ-3515-SMT-1
C10
C20
TP10
DIN
D
C21 47uF
C9
1
4
SW1
TP19
HPROUT
D
RESET
RESET
R9
100
IOVDD
B
HPL OUT MSRMNT
C28
47nF
100K
TP16
SCL
LINE IN
TP17
SDA
SCL
R2
R12
HPROUT
2.7K
R3
J15
100
1
C29
47nF
2.7K
2
SDA
R13
HPRCOM
3
100
C30
47nF
HPR OUT MSRMNT
ti
A
DATA ACQUISITION PRODUCTS
HIGH PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA
ENGINEER
GREG HUPP
DRAWN BY
GREG HUPP
TITLE
TLV320DAC32EVM
DOCUMENT CONTROL NO.xxxxxxx
SHEET 1
1
2
3
4
5
OF 2
SIZE A
DATE 27-Apr-2006
REV A
FILE
6
A
1
2
3
4
6
5
Revision History
REV
D
ECN Number
Approved
D
J4
J1
HPLCOM
1
3
5
7
9
11
13
15
17
19
HPRCOM
IN2L
A0(-)
A1(-)
A2(-)
A3(-)
AGND
AGND
AGND
VCOM
AGND
AGND
2
4
6
8
10
12
14
16
18
20
A0(+)
A1(+)
A2(+)
A3(+)
A4
A5
A6
A7
REFREF+
1
3
5
7
9
11
13
15
17
19
HPLOUT
HPROUT
IN2R
CNTL
CLKX
CLKR
FSX
FSR
DX
DR
INT
TOUT
GPIO5
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
DGND
SDA
2
4
6
8
10
12
14
16
18
20
JMP9
1
2
RESET
DAUGHTER-SERIAL
MICBIAS
J4A (TOP) = SAM_TSM-110-01-L-DV-P
J4B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
DAUGHTER-ANALOG
J1A (TOP) = SAM_TSM-110-01-L-DV-P
J1B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
RESET
+5VA
C
C
R14
10
+3.3VA
C5
0.1uF
SCL
VOUT
2
SDA
C2
10uF
1
C1
10uF
VIN
GND
U1
REG1117-3.3
3
DIN
WCLK
BCLK
+5VA
J5
-VA
-5VA
AGND
VD1
+5VD
2
4
6
8
10
DAUGHTER-POWER
IOVDD
J3A (TOP) = SAM_TSM-105-01-L-DV-P
J3B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K
1
3
5
7
9
11
13
15
17
19
CNTL
CLKX
CLKR
FSX
FSR
DX
DR
INT
TOUT
GPIO5
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
DGND
SDA
2
4
6
8
10
12
14
16
18
20
MCLK
J5A (TOP) = SAM_TSM-110-01-L-DV-P
J5B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
U2
SCL
VSS
1
2
3
2
2
7
24LC64I/SN
JMP1
1
SDA
TP2
DGND
VCC
WP
8
C6
0.1uF
4
A0
A1
A2
IOVDD
R1
2.7K
TP1
AGND
B
DAUGHTER-SERIAL
5
DVDD
B
+VA
+5VA
DGND
+1.8VD
+3.3VD
6
J3
1
3
5
7
9
JMP2
1
ti
A
DATA ACQUISITION PRODUCTS
HIGH PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA
ENGINEER
GREG HUPP
DRAWN BY
GREG HUPP
TITLE
TLV320DAC32EVM
DOCUMENT CONTROL NO.xxxxxxx
SHEET 2
1
2
3
4
5
OF 2
SIZE A
DATE 27-Apr-2006
REV A
FILE
6
A
www.ti.com
Appendix B
Appendix B USB-MODEVM Schematic
The schematic diagram is provided as a reference.
SLAU201 – November 2006
Submit Documentation Feedback
USB-MODEVM Schematic
29
1
2
3
4
6
5
REVISION HISTORY
REV
IOVDD
R5
2.7K
2
5
9
12
1
USB MCK
4
10
USB I2S
13
J6
Q2
ZXMN6A07F
EXTERNAL I2C
SDA
SCL
WP
8
A0
A1
A2
U1
VCC
C9
1uF
4
1
1
3
5
7
9
11
3
2
44
43
42
41
40
39
37
38
36
35
34
32
R12
3.09K
.001uF
R10
27.4
R11
C13
47pF
C14
47pF
R7
2.7K
JMP8
1
2
P1.2
P1.1
P1.0
+3.3VD
C11
1uF
C12
1uF
C
MOSI
SS
SCLK
RESET
14
VCC
J15
1
3
5
7
9
11
3
6
8
11
1Y
2Y
3Y
4Y
7
GND
2
4
6
8
10
12
EXTERNAL SPI
USB RST
USB SPI
P3.5
JMP13
1
2
D2
+3.3VD
YELLOW
C25
R8
2.7K
P3.4
JMP14
1
2
IOVDD
P3.3
B
U6
1uF
4
2
INT
3
J8
5
B
1A
2A
3A
4A
1OE
2OE
3OE
4OE
JMP12
1
2
SML-LX0603YW-TR
MISO
SN74LVC1G07DBV
SN74LVC125APW
MRESET
649
2
U4
2
5
9
12
1
4
10
13
USB ACTIVE
R13
4
1uF
JMP11
1
2
C10
1uF
EXTERNAL AUDIO DATA
C27 IOVDD
JMP10
1
2
C24
1uF
SW DIP-8
P1.3
JMP9
1
2
SN74LVC1G07DBV
ED555/2DS
+5VD
EXT PWR IN
+1.8VD
R14
390
U9
5
6
4
1
2
3
6VDC-10VDC IN
D3
SML-LX0603GW-TR
JMP6
PWR SELECT
GREEN
3
9
U2
REG1117-5
3
C15 DL4001
0.1uF
VIN
C16
0.33uF
VOUT
GND
D1
10
11
12
2
R15
10K
C6
10uF
1
J9
R16
10K
+5VD
A
+3.3VD
+1.8VD
IOVDD
JMP7
1
2
3
4
5
6
TP6
1IN
1IN
1EN
1GND
2GND
2EN
2IN
2IN
1RESET
1OUT
1OUT
2RESET
2OUT
2OUT
TPS767D318PWP
CUI-STACK PJ102-B
2.5 MM
SW1
1
2
4
3
24
23
22
18
17
R17
100K
C7
10uF
D5
SML-LX0603IW-TR
R18
100K
R4
10
+3.3VD
RED
R19
220
!"
C8
10uF
D4
SML-LX0603GW-TR
C17
0.33uF
1.8VD ENABLE
3.3VD ENABLE
28
GREEN
DATA ACQUISITION PRODUCTS
REGULATOR ENABLE
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA
TITLE
ENGINEER RICK DOWNS
USB-MODEVM INTERFACE
DRAWN BY ROBERT BENJAMIN
DOCUMENT CONTROL NO. 6463996
SHEET 1
2
A
HIGH PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
IOVDD SELECT
1
SW2
1
2
3
4
5
6
7
8
PWR_DWN
U7
31
30
29
27
26
25
24
23
8
21
33
2
16
15
14
13
12
11
10
9
2
4
6
8
10
12
1uF
TP11
+3.3VD
IOVDD
C26
3
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
DVDD
DVDD
DVDD
AVDD
9
10
11
12
13
14
15
17
18
19
20
22
27.4
XTALO
XTALI
PLLFILI
PLLFILO
MCLKI
PUR
DP
DM
DVSS
DVSS
DVSS
AVSS
MRESET
TEST
EXTEN
RSTO
P3.0
P3.1
P3.2/XINT
P3.3
P3.4
P3.5
NC
NC
7
1
2
3
1.5K
+3.3VD
U8
TAS1020BPFB
SCL
SDA
VREN
RESET
MCLKO2
MCLKO1
CSCLK
CDATO
CDATI
CSYNC
CRESET
CSCHNE
46
47
48
1
3
5
6
7
4
16
28
45
100pF
C21
R9
J14
1uF
33pF
MA-505 6.000M-C0
6.00 MHZ
J7 USB SLAVE CONN
897-30-004-90-000000
I2SDOUT
C23
U5
C19
C20
4
3
2
1
BCLK
SN74LVC1G07DBV
33pF
24LC64I/SN
GND
D+
DVCC
X1
C18
A0
A1
A2
USB I2S
USB MCK
USB SPI
USB RST
EXT MCK
LRCLK
IOVDD
4
VSS
R20
75
MCLK
7
GND
R6
2.7K
RA1
10K
I2SDIN
6
5
+3.3VD
SCL
C
SN74LVC1G125DBV
3
6
8
11
1Y
2Y
3Y
4Y
D
2
SN74LVC125APW
+3.3VD
TP10
14
VCC
+3.3VD
5
1
3
1A
2A
3A
4A
1OE
2OE
3OE
4OE
5
2
4
4
1uF
U3
APPROVED
J10
EXT MCLK
U10
3
R3
2.7K
TP9
SDA
1uF
5
C22
Q1
ZXMN6A07F
D
C28 IOVDD
IOVDD
+3.3VD
ENGINEERING CHANGE NUMBER
3
4
5
OF
2
FILE
SIZE B
REV B
DATE 28-Oct-2004
D:\USB-MODEVM\USB Motherboard - ModEvm.ddb - Documents\USB Interface
6
1
2
3
4
5
6
REVISION HISTORY
REV
ENGINEERING CHANGE NUMBER
APPROVED
D
1
2
3
D
J11
J12
A0(+)
A1(+)
A2(+)
A3(+)
A4
A5
A6
A7
REFREF+
2
4
6
8
10
12
14
16
18
20
+5VA
J13A (TOP) = SAM_TSM-105-01-L-DV-P
J13B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K
DAUGHTER-ANALOG
J11A (TOP) = SAM_TSM-110-01-L-DV-P
J11B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
+5VA
+5VD
JMP1
1
2
+VA
+5VA
DGND
+1.8VD
+3.3VD
-VA
-5VA
AGND
VD1
+5VD
2
4
6
8
10
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
DGND
SDA
SCLK
SS
P3.3
J12A (TOP) = SAM_TSM-110-01-L-DV-P
J12B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
+5VA
TP2
10uF
C2
+5VD
TP3
10uF
C3
TP4
10uF
JMP3
PWR_DWN
INT
JMP4
MISO
+3.3VD
MOSI
R1
R21
390
J1
-5VA
R22
390
SCL
2.7K
J2
+5VA
D6
SML-LX0603GW-TR
D7
SML-LX0603GW-TR
GREEN
GREEN
J3
+5VD
TP5
+1.8VD
C
RESET
IOVDD
2
C1
P3.5
P1.0
1
-5VA
P3.4
+5VD
JMP2
1
2
TP1
JMP5
2
4
6
8
10
12
14
16
18
20
-5VA
DAUGHTER-POWER
TP7
TP8
AGND
DGND
JPR-2X1
C
CNTL
CLKX
CLKR
FSX
FSR
DX
DR
INT
TOUT
GPIO5
DAUGHTER-SERIAL
J13
1
3
5
7
9
1
3
5
7
9
11
13
15
17
19
2
A0(-)
A1(-)
A2(-)
A3(-)
AGND
AGND
AGND
VCOM
AGND
AGND
1
1
3
5
7
9
11
13
15
17
19
C4
C5
10uF
10uF
J4
+1.8VD
R2
SDA
2.7K
I2SDOUT
J5
+3.3VD
I2SDIN
LRCLK
BCLK
J21
1
3
5
7
9
11
13
15
17
19
B
A0(-)
A1(-)
A2(-)
A3(-)
AGND
AGND
AGND
VCOM
AGND
AGND
J22
A0(+)
A1(+)
A2(+)
A3(+)
A4
A5
A6
A7
REFREF+
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
+5VA
DAUGHTER-ANALOG
J21A (TOP) = SAM_TSM-110-01-L-DV-P
J21B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
+1.8VD
+VA
+5VA
DGND
+1.8VD
+3.3VD
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
DGND
SDA
2
4
6
8
10
12
14
16
18
20
P1.1
B
P1.2
P1.3
MCLK
DAUGHTER-SERIAL
J23
1
3
5
7
9
CNTL
CLKX
CLKR
FSX
FSR
DX
DR
INT
TOUT
GPIO5
-VA
-5VA
AGND
VD1
+5VD
2
4
6
8
10
-5VA
J22A (TOP) = SAM_TSM-110-01-L-DV-P
J22B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
DAUGHTER-POWER
+3.3VD
+5VD
J23A (TOP) = SAM_TSM-105-01-L-DV-P
J23B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K
!"
A
DATA ACQUISITION PRODUCTS
A
HIGH-PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA
TITLE
ENGINEER
RICK DOWNS
DRAWN BY
ROBERT BENJAMIN
USB-MODEVM INTERFACE
DOCUMENT CONTROL NO. 6463996
SHEET 2
1
2
3
4
5
OF
2
FILE
SIZE B
REV B
DATE 28-Oct-2004
D:\USB-MODEVM\USB Motherboard - ModEvm.ddb - Documents\Daughtercard Interface
6
www.ti.com
Appendix C
Appendix C USB-MODEVM Communications Protocol
The communications protocol used by the USB-MODEVM is provided as a reference.
C.1
USB-MODEVM Protocol
The USB-MODEVM is defined to be a Vendor-Specific class, and is identified on the PC system as an
NI-VISA device. Because the TAS1020B has several routines in its ROM which are designed for use with
HID-class devices, HID-like structures are used, even though the USB-MODEVM is not an HID-class
device. Data is passed from the PC to the TAS1020B using the control endpoint.
Data is sent in an HIDSETREPORT (see Table C-1):
Table C-1. USB Control Endpoint
HIDSETREPORT Request
Part
Value
Description
bmRequestType
0x21
00100001
bRequest
0x09
SET_REPORT
wValue
0x00
Don't care
wIndex
0x03
HID interface is index 3
wLength
calculated by host
Data
Data packet as described below
The data packet consists of the following bytes, shown in Table C-2:
Table C-2. Data Packet Configuration
BYTE NUMBER TYPE
0
Interface
DESCRIPTION
Specifies serial interface and operation. The two values are logically OR'd.
Operation:
READ
WRITE
0x00
0x10
GPIO
SPI_16
I2C_FAS
T
I2C_STD
SPI_8
0x08
0x04
0x02
0x01
0x00
Interface:
1
I2C Slave
Address
Slave address of I2C device or MSB of 16-bit reg addr for SPI
2
Length
Length of data to write/read (number of bytes)
3
Register
address
Address of register for I2C or 8-bit SPI; LSB of 16-bit address for SPI
Data
Up to 60 data bytes could be written at a time. EP0 maximum length is 64. The return packet is
limited to 42 bytes, so advise only sending 32 bytes at any one time.
4..64
Example usage:
Write two bytes (AA, 55) to device starting at register 5 of an I2C device with address A0:
[0]
[1]
[2]
[3]
[4]
[5]
30
0x11
0xA0
0x02
0x05
0xAA
0x55
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Do the same with a fast mode
[0]
[1]
[2]
[3]
[4]
[5]
I2C
device:
0x12
0xA0
0x02
0x05
0xAA
0x55
Do the same with an SPI device which uses an 8-bit register address:
[0]
[1]
[2]
[3]
[4]
[5]
0x10
0xA0
0x02
0x05
0xAA
0x55
Do the same with a 16-bit register address, as found on parts like the TSC2101. Assume the register
address (command word) is 0x10E0:
[0]
[1]
[2]
[3]
[4]
[5]
0x14
0x10→Note: the I2C address now serves as MSB of reg addr.
0x02
0xE0
0xAA
0x55
In each case, the TAS1020B will return, in an HID interrupt packet, the following:
[0]
interface byte | status
status:
REQ_ERROR 0x80
INTF_ERROR 0x40
REQ_DONE 0x20
[1]
for I2C interfaces, the I2C address as sent
for SPI interfaces, the read back data from SPI line for transmission of the corresponding byte
[2]
length as sent
[3]
for I2C interfaces, the reg address as sent
for SPI interfaces, the read back data from SPI line for transmission of the corresponding byte
[4..60]
echo of data packet sent
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USB-MODEVM Protocol
If the command is sent with no problem, the returning byte [0] should be the same as the sent one
logically OR'd with 0x20 – in our first example above, the returning packet should be:
[0]
[1]
[2]
[3]
[4]
[5]
0x31
0xA0
0x02
0x05
0xAA
0x55
If the interface fails (for example, the I2C device does not acknowledge), it would come back as:
[0]
[1]
[2]
[3]
[4]
[5]
0x51→ interface | INTF_ERROR
0xA0
0x02
0x05
0xAA
0x55
If the request is malformed, that is, the interface byte (byte [0]) takes on a value which is not described
above, the return packet would be:
[0]
[1]
[2]
[3]
[4]
[5]
0x93→ you sent 0x13, which is not valid, so 0x93 returned
0xA0
0x02
0x05
0xAA
0x55
Examples above used writes. Reading is similar:
Read two bytes from device starting at register 5 of an I2C device with address A0:
[0]
[1]
[2]
[3]
0x01
0xA0
0x02
0x05
The return packet should be
[0]
[1]
[2]
[3]
[4]
[5]
0x21
0xA0
0x02
0x05
0xAA
0x55
assuming that the values we wrote above starting at Register 5 were actually written to the device.
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Writing Scripts
C.2
Writing Scripts
A script is a text file that contains data to send to the serial control buses. The scripting language is the
parser for the language; therefore, the program is not tolerate mistakes made in the source script file.
However, the formatting of the file is simple.
Each line in a script file is one command. There is no provision for extending lines beyond one line. A line
is terminated by a carriage return.
The first character of a line is the command. Commands are:
i
r
w
#
b
d
Set interface bus to use
Read from the serial control bus
Write to the serial control bus
Comment
Break
Delay
The first command, i, sets the interface to use for the commands to follow. This command must be
followed by one of the following parameters:
i2cstd
Standard mode I2C Bus
i2cfast
Fast mode I2C bus
spi8
SPI bus with 8-bit register addressing
spi16
SPI bus with 16-bit register addressing
gpio
Use the USB-MODEVM GPIO capability
For example, if a fast mode I2C bus is to be used, the script would begin with:
i i2cfast
No data follows the break command. Anything following a comment command is ignored by the parser,
provided that it is on the same line. The delay command allows the user to specify a time, in milliseconds,
that the script will pause before proceeding.
Note:
UNLIKE ALL OTHER NUMBERS USED IN THE SCRIPT COMMANDS, THE DELAY
TIME IS ENTERED IN A DECIMAL FORMAT. Also, note that because of latency in the
USB bus as well as the time it takes the processor on the USB-MODEVM to handle
requests, the delay time may not be precise.
A series of byte values follows either a read or write command. Each byte value is expressed in
hexadecimal, and each byte must be separated by a space. Commands are interpreted and sent to the
TAS1020B by the program using the protocol described in Section C.1.
The first byte following a read or write command is the I2C slave address of the device (if I2C is used) or
the first data byte to write (if SPI is used — note that SPI interfaces are not standardized on protocols, so
the meaning of this byte will vary with the device being addressed on the SPI bus). The second byte is the
starting register address that data will be written to (again, with I2C; SPI varies — see Section C.1 for
additional information about what variations may be necessary for a particular SPI mode). Following these
two bytes are data, if writing; if reading, the third byte value is the number of bytes to read, (expressed in
hexadecimal).
For example, to write the values 0xAA 0x55 to an I2C device with a slave address of 0x90, starting at a
register address of 0x03, one would write:
#example script
i i2cfast
w 90 03 AA 55
r 90 03 2
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Writing Scripts
This script begins with a comment which specifies that a fast I2C bus is used, then writes 0xAA 0x55 to
the I2C slave device at address 0x90. The values are written into registers 0x03 and 0x04. The script then
reads back two bytes from the same device starting at register address 0x03. Note that the slave device
value does not change. It is not necessary to set the R/W bit for I2C devices in the script; this is done by
the read or write commands.
Here is an example of using an SPI device that requires 16-bit register addresses:
#
#
#
#
#
w
w
setup TSC2101 for input and output
uses SPI16 interface
this script sets up DAC and ADC at full volume, input from onboard mic
Page 2: Audio control registers
10 00 00 00 80 00 00 00 45 31 44 FD 40 00 31 C4
13 60 11 20 00 00 00 80 7F 00 C5 FE 31 40 7C 00 02 00 C4 00 00 00 23 10 FE 00 FE 00
Note that blank lines are allowed. However, be sure that the script does not end with a blank line. While
ending with a blank line does not cause the script to fail, the program executes that line, and may prevent
the user from seeing data that was written or read back on the previous command.
In this example, the first two bytes of each command are the command word to send to the TSC2101
(0x1000, 0x1360); these are followed by data to write to the device starting at the address specified in the
command word. The second line may wrap in the viewer used and appear as more than one line. Careful
examination shows that there is only one carriage return on the line, following the last 00.
Any text editor may be used to write these scripts; Jedit is an editor that is recommended for general
usage. For more information, go to: http://www.jedit.org.
Once the script is written, it can be used in the command window by running the program, and then
selecting Open Command File... from the File menu. Locate and open the script. The script is then
displayed in the command buffer. The user may also edit the script once it is in the buffer, but saving of
the command buffer is not possible at this time.
Once the script is in the command buffer, it may be executed by pressing the Execute Command Buffer
button. If breakpoints are placed in the script, the script executes to that point. The user is presented with
a dialog box containing a button to press to continue executing the script. When the user is ready to
proceed, push the button and the script will continue.
Here an example of a (partial) script with breakpoints:
#
#
i
#
setup DAC32 for input and output
uses I2C
interface
i2cfast
reg 07 - codec datapath
w 30 07 8A
r
d
#
w
r
b
30 07 1
1000
regs 15/16 - ADC volume, unmute and set to 0dB
30 0F 00 00
30 0F 2
This script writes the value 8A at register 7, then reads it back to verify that the write was good. A delay of
1000ms (one second) is placed after the read to pause the script operation. When the script continues, the
values 00 00 is written starting at register 0F. This output is verified by reading two bytes, and pausing the
script again, this time with a break. The script would not continue until the user allows it to by pressing OK
in the dialog box that will be displayed due to the break.
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GPIO Capability
C.3
GPIO Capability
The USB-MODEVM has seven GPIO lines. Access the lines by specifying the interface to be 0x08, and
then using the standard format for packets—but addresses are unnecessary. The GPIO lines are mapped
into one byte (see Table C-3):
Table C-3. GPIO Pin Assignments
7
6
5
4
3
2
1
0
x
P3.5
P3.4
P3.3
P1.3
P1.2
P1.1
P1.0
Example: write P3.5 to a 1, set all others to 0:
[0]
[1]
[2]
[3]
[4]
0x18→
0x00→
0x01→
0x00→
0x40→
write, GPIO
this value is ignored
length - ALWAYS a 1
this value is ignored
01000000
The user may also read back from the GPIO to see the state of the pins. If the user just wrote the previous
example to the port pins.
Example: read the GPIO
[0]
[1]
[2]
[3]
0x08→
0x00→
0x01→
0x00→
read, GPIO
this value is ignored
length - ALWAYS a 1
this value is ignored
The return packet should be:
[0]
[1]
[2]
[3]
[4]
0x28
0x00
0x01
0x00
0x40
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35
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