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TLV3401, TLV3402, TLV3404
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
TLV340x Family of Nanopower, Open-Drain Output Comparators
1 Features
3 Description
•
•
The TLV340x is TI's first family of nanopower
comparators with only 470 nA per channel supply
current, which makes this device ideal for batterypowered and wireless handset applications.
1
•
•
•
•
•
•
Low Supply Current: 470 nA Per Channel
Input Common-Mode Range Exceeds the Rails:
–0.1 V to VCC + 5 V
Supply Voltage Range: 2.5 V to 16 V
Reverse Battery Protection Up to 18 V
Open-Drain CMOS Output Stage
Specified Temperature Range:
– Commercial Grade: 0°C to +70°C
– Industrial Grade: –40°C to +125°C
Ultra-Small Packaging:
– 5-Pin SOT-23 (TLV3401)
– 8-Pin MSOP (TLV3402)
Universal Op Amp EVM (See Universal
Operational Amplifier Evaluation Module Selection
Guide For More Information)
2 Applications
•
•
•
•
•
Portable Medical Equipment
Wireless Security Systems
Remote Control Systems
Handheld Instruments
Ultra-Low Power Systems
PART NUMBER
BODY SIZE (NOM)
SOT-23 (5)
2.90 mm × 1.60 mm
TLV3401, TLV3402
SOIC (8)
4.90 mm × 3.91 mm
TLV3401, TLV3402
PDIP (8)
9.81 mm × 6.35 mm
TLV3402
VSSOP (8)
3.00 mm × 3.00 mm
SOIC (14)
8.65 mm × 3.91 mm
TSSOP (14)
5.00 mm × 4.40 mm
PDIP (14)
19.30 mm × 6.35 mm
TA = 25°C
TA = 70°C
PACKAGE
TLV3401
TLV3404
TA = 125°C
600
Supply Current (nA)
All members are available in PDIP and SOIC with the
single versions in the small SOT-23 package, dual
versions in the VSSOP package, and quad versions
in the TSSOP package.
Device Information(1)
Supply Current vs Supply Voltage
700
The TLV340x has a minimum operating supply
voltage of 2.7 V over the extended industrial
temperature range (TA = –40°C to +125°C), while
having an input common-mode range of –0.1 to
VCC + 5 V. The low supply current makes it an ideal
choice for battery-powered portable applications
where quiescent current is the primary concern.
Reverse battery protection guards the amplifier from
an overcurrent condition due to improper battery
installation. For harsh environments, the inputs can
be taken 5 V above the positive supply rail without
damage to the device.
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
500
400
High-Side Voltage Sense Circuit
TA = 0°C
TA = -40°C
300
200
100
VID = -1 V
VCC
0
0
2
4
6
8
10
12
14
16
R1
1 MW
R3
100 kW
R2
1 MW
VREF
R4
1 MW
+
TLV340x
mP
Supply Voltage (V)
0
D1
0
Copyright © 2000, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV3401, TLV3402, TLV3404
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
6
6
6
7
7
7
8
8
9
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information: TLV3401 .................................
Thermal Information: TLV3402 .................................
Thermal Information: TLV3404 .................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 12
8.1 Overview ................................................................. 12
8.2 Functional Block Diagram ....................................... 12
8.3 Feature Description................................................. 12
8.4 Device Functional Modes........................................ 12
9
Application and Implementation ........................ 13
9.1 Application Information............................................ 13
9.2 Typical Application ................................................. 13
10 Power Supply Recommendations ..................... 15
11 Layout................................................................... 15
11.1 Layout Guidelines ................................................. 15
11.2 Layout Example .................................................... 15
12 Device and Documentation Support ................. 16
12.1
12.2
12.3
12.4
12.5
12.6
12.7
12.8
Device Support......................................................
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resource............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
16
16
16
16
17
17
17
17
13 Mechanical, Packaging, and Orderable
Information ........................................................... 17
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (November 2000) to Revision B
Page
•
Added ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section; ................................................................................................ 1
•
Deleted Available Options tables; refer to Package Option Addendum at the end of this data sheet................................... 3
•
Deleted Dissipation Ratings table........................................................................................................................................... 6
2
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Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3401 TLV3402 TLV3404
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SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
5 Device Comparison Table
DEVICE (1)
VCC (V)
VIO (µV)
ICC/Ch
(µA)
IIB (pA)
tPLH (µs)
tPHL (µs)
tF (µs)
tR (µs)
RAIL-TORAIL
OUTPUT
STAGE
TLV340x
2.5 to 16
250
0.47
80
55
30
5
—
Input
OD
PP
TLV370x
2.5 to 16
250
0.47
80
25
30
5
3.5
Input
TLC3702/4
3 to 16
1200
9
5
1.1
0.65
0.5
0.125
—
PP
TLC393/339
3 to 16
1400
11
5
1.1
0.55
0.22
—
—
OD
TLC372/4
3 to 16
1000
75
5
0.65
0.65
—
—
—
OD
(1)
All specifications are typical values measured at 5 V.
Copyright © 2000–2017, Texas Instruments Incorporated
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TLV3401, TLV3402, TLV3404
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
www.ti.com
6 Pin Configuration and Functions
TLV3401: DBV Package
5-Pin SOT-23
Top View
OUT
5
1
GND
IN+
TLV3401: D and P Packages
8-Pin SOIC and VSSOP
Top View
VCC
2
3
4
NC
1
8
NC
IN-
2
7
VCC
IN+
3
6
OUT
GND
4
5
NC
IN-
Pin Functions: TLV3401
PIN
NAME
TLV3401
I/O
DESCRIPTION
SOT-23
SOIC, PDIP
GND
2
4
—
IN–
4
2
I
Negative (inverting) input
Positive (noninverting) input
Ground
IN+
3
3
I
NC
—
1, 5, 8
—
No internal connection (can be left floating)
OUT
1
6
O
Output
VCC
5
7
—
Positive power supply
TLV3402: D, DGK, and P Packages
8-PIN SOIC, PDIP, and VSSOP
Top View
1OUT
1
8
VCC
1IN-
2
7
2OUT
1IN+
3
6
2IN-
GND
4
5
2IN+
Pin Functions: TLV3402
PIN
TLV3402
NAME
I/O
DESCRIPTION
SOIC, PDIP,
VSSOP
GND
4
—
1IN–
2
I
Inverting input, channel 1
2IN–
6
I
Inverting input, channel 2
1IN+
3
I
Noninverting input, channel 1
2IN+
5
I
Noninverting input, channel 2
1OUT
1
O
Output, channel 1
2OUT
7
O
Output, channel 2
VCC
8
—
Positive power supply
4
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Ground
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3401 TLV3402 TLV3404
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SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
TLV3404: D, N, and PW Packages
14-PIN SOIC, PDIP, TSSOP
Top View
1OUT
1
14
4OUT
1IN-
2
13
4IN-
1IN+
3
12
4IN+
VCC
4
11
GND
2IN+
5
10
3IN+
2IN-
6
9
3IN-
2OUT
7
8
3OUT
Pin Functions: TLV3404
PIN
TLV3404
NAME
I/O
DESCRIPTION
SOIC, PDIP,
TSSOP
GND
11
—
Ground
1IN–
2
I
Inverting input, channel 1
2IN–
6
I
Inverting input, channel 2
3IN–
9
I
Inverting input, channel 3
4IN–
13
I
Inverting input, channel 4
1IN+
3
I
Noninverting input, channel 1
2IN+
5
I
Noninverting input, channel 2
3IN+
10
I
Noninverting input, channel 3
4IN+
12
I
Noninverting input, channel 4
1OUT
1
O
Output, channel 1
2OUT
7
O
Output, channel 2
3OUT
8
O
Output, channel 3
4OUT
14
O
Output, channel 4
VCC
4
—
Positive power supply
Copyright © 2000–2017, Texas Instruments Incorporated
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SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
Supply, VCC (2)
Voltage
Differential input, VID
–20
20
0
VCC + 5
Input, II
–10
10
Output, IO
–10
10
Input, VI (2) (3)
Current
Operating, TA
Temperature
C-suffix versions
0
70
I-suffix versions
–40
125
Junction, TJ
(2)
(3)
V
mA
°C
150
Storage, Tstg
(1)
UNIT
17
–65
150
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to GND.
Input voltage range is limited to 20 V or VCC + 5 V, whichever is smaller.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1500
Machine model (MM)
±100
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
Single supply
Supply voltage, VCC
Split supply
MIN
MAX
C-suffix versions
2.5
16
I-suffix versions
2.7
16
C-suffix versions
±1.25
±8
I-suffix versions
±1.35
±8
–0.1
VCC + 5
0
70
–40
125
Common-mode input voltage, VICR
Operating free-air
temperature, TA
6
C-suffix versions
I-suffix versions
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UNIT
V
V
°C
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SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
7.4 Thermal Information: TLV3401
TLV3401
THERMAL METRIC (1)
D (SOIC)
DBV (SOT-23)
P (PDIP)
8 PINS
5 PINS
8 PINS
UNIT
201.9
237.8
58.5
°C/W
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
92.5
108.7
48.3
°C/W
RθJB
Junction-to-board thermal resistance
123.3
64.1
35.6
°C/W
ψJT
Junction-to-top characterization parameter
23
12.1
25.9
°C/W
ψJB
Junction-to-board characterization parameter
212.6
63.3
35.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the application report, Semiconductor and IC Package Thermal
Metrics
7.5 Thermal Information: TLV3402
TLV3402
THERMAL METRIC
(1)
D (SOIC)
DGK (VSSOP)
P (PDIP)
8 PINS
8 PINS
8 PINS
UNIT
201.9
186.8
58.5
°C/W
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
92.5
77.5
48.3
°C/W
RθJB
Junction-to-board thermal resistance
123.3
107.8
35.6
°C/W
ψJT
Junction-to-top characterization parameter
23
15.7
25.9
°C/W
ψJB
Junction-to-board characterization parameter
212.6
106.2
35.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the application report, Semiconductor and IC Package Thermal
Metrics
7.6 Thermal Information: TLV3404
TLV3404
THERMAL METRIC
(1)
D (SOIC)
N (PDIP)
PW (TSSOP)
14 PINS
14 PINS
14 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
83.8
65.5
120.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
70.7
20.0
34.3
°C/W
RθJB
Junction-to-board thermal resistance
59.5
25.9
62.8
°C/W
ψJT
Junction-to-top characterization parameter
11.6
1.9
1
°C/W
ψJB
Junction-to-board characterization parameter
37.7
25.3
56.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the application report, Semiconductor and IC Package Thermal
Metrics
Copyright © 2000–2017, Texas Instruments Incorporated
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TLV3401, TLV3402, TLV3404
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
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7.7 Electrical Characteristics
At specified free-air temperature and VCC = 2.7 V, 5 V, 15 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
TA (1)
MIN
TYP
MAX
250
3600
UNIT
DC PERFORMANCE
VIO
Input offset voltage
VIC = VCC/2, RS = 50 Ω, RP = 1 MΩ
αVIO
Offset voltage drift
VIC = VCC/2, RS = 50 Ω, RP = 1 MΩ
VIC = 0 V to 2.7 V, RS = 50 Ω
CMRR
Common-mode rejection ratio
VIC = 0 V to 5 V, RS = 50 Ω
VIC = 0 V to 15 V, RS = 50 Ω
Large-signal differential voltage
amplification
AVD
RP = 1 MΩ
TA = 25°C
Full range
4400
TA = 25°C
3
TA = 25°C
55
Full range
50
TA = 25°C
60
Full range
55
TA = 25°C
65
Full range
60
µV
µV/°C
72
76
dB
88
TA = 25°C
1000
TA = 25°C
20
V/mV
INPUT/OUTPUT CHARACTERISTICS
100
IIO
Input offset current
VIC = VCC/2, RS = 50 Ω, RP = 1 MΩ
IIB
Input bias current
VIC = VCC/2, RS = 50 Ω, RP = 1 MΩ
ri(d)
Differential input resistance
TA = 25°C
300
MΩ
IOZ
High-impedance output leakage
VIC = VCC/2, VO = VCC, VID = 1 V
current
TA = 25°C
50
pA
TA = 25°C
8
TA = 25°C
80
VIC = VCC/2, IOL = 2 µA, VID = –1 V
VOL
Low-level output voltage
VIC = VCC/2, IOL = 50 µA, VID = –1 V
Full range
1000
TA = 25°C
80
Full range
250
1500
200
Full range
pA
pA
mV
300
POWER SUPPLY
Output state low
ICC
Supply current (per channel)
RP = no pullup
Output state high
PSRR
VIC = VCC/2, no
load
Power-supply rejection ratio
VCC = 2.7 V to
5V
VCC = 5 V to 15 V
(1)
TA = 25°C
470
550
Full range
750
TA = 25°C
560
640
Full range
nA
950
TA = 25°C
75
Full range
70
TA = 25°C
85
Full range
80
100
dB
105
Full range is 0°C to 70°C for the C-suffix and –40°C to 125°C for the I-suffix. If not specified, full range is –40°C to 125°C.
7.8 Switching Characteristics
At TA = 25°C, recommended operating conditions, and VCC = 2.7 V, 5 V, 15 V, unless otherwise noted.
PARAMETER
t(PLH)
t(PHL)
tF
8
Propagation delay time,
low-to-high-level output
Propagation delay time,
high-to-low-level output
Fall time
TEST CONDITIONS
f = 10 kHz, VSTEP = 1 V,
RP = 1 MΩ, CL = 10 pF
f = 10 kHz, VSTEP = 1 V,
RP = 1 MΩ, CL = 10 pF
RP = 1 MΩ, CL = 10 pF
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TA
MIN
TYP
Overdrive = 2 mV
TA = 25°C
175
Overdrive = 10
mV
TA = 25°C
80
Overdrive = 50
mV
TA = 25°C
55
Overdrive = 2 mV
TA = 25°C
300
Overdrive = 10
mV
TA = 25°C
60
Overdrive = 50
mV
TA = 25°C
30
TA = 25°C
5
MAX
UNIT
µs
µs
µs
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SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
7.9 Typical Characteristics
Table 1. Table of Graphs
DESCRIPTION
FIGURE NO.
Input bias/offset current
vs Free-air temperature
Figure 1
Open collector leakage current
vs Free-air temperature
Figure 2
VOL
Low-level output voltage
vs Low-level output current
IDD
Supply current
vs Supply voltage
Figure 6
IDD
Supply current
vs Free-air temperature
Figure 7
Low-to-high level output response for various
input overdrives
Figure 8, Figure 9,
Figure 10
High-to-low level output response for various
input overdrives
Figure 11, Figure 12,
Figure 13
Output fall time
vs Supply voltage
Open-Collector Leakage Current (pA)
1200
VCC = 15 V
Input Bias/Offset Current (pA)
Figure 3, Figure 4,
Figure 5
1000
IIB
800
600
400
200
IIO
0
-200
-40 -25 -10
5
20
35
50
65
80
95
Figure 14
2400
2200
2000
1800
1600
1400
1200
1000
800
600
200
400
0
-200
110 125
VID = 1 V
VCC = 15 V
VCC = 2.7 V, 5 V
5
-40 -25 -10
20
Figure 1. Input Bias/Offset Current vs
Free-Air Temperature
50
65
80
95
110 125
Figure 2. Open-Collector Leakage Current vs
Free-Air Temperature
2.7
5
VCC = 2.7 V
VID = -1 V
2.4
2.1
1.8
TA = 125°C
TA = 70°C
1.5
TA = 25°C
1.2
VCC = 5 V
VID = -1 V
4.5
Low-Level Output Voltage (V)
Low-Level Output Voltage (V)
35
Temperature (°C)
Temperature (°C)
TA = 0°C
0.9
TA = -40°C
0.6
0.3
4
TA = 125°C
3.5
3
TA = 70°C
2.5
TA = 25°C
2
1.5
TA = 0°C
1
TA = -40°C
0.5
0
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0
0.4
0.8
1.2
1.6
2
2.4
Low-Level Output Current (mA)
Low-Level Output Current (mA)
Figure 3. Low-Level Output Voltage vs
Low-Level Output Current
Figure 4. Low-Level Output Voltage vs
Low-Level Output Current
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9
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15
700
VCC = 15 V
VID = -1 V
12
10.5
TA = 70°C
9
7.5
TA = 25°C
6
4.5
TA = 0°C
3
TA = -40°C
1.5
TA = 125°C
600
TA = 125°C
Supply Current (nA)
400
200
100
VID = -1 V
0
1
3
2
4
5
7
6
8
9
0
4
2
Low-Level Output Current (mA)
8
10
12
14
16
Supply Voltage (V)
Figure 5. Low-Level Output Voltage vs
Low-Level Output Current
Figure 6. Supply Current vs Supply Voltage
3
VCC = 2.7 V, 5 V, 15 V
VID = -1 V
Output Voltage (V)
Supply Current (nA)
6
500
400
300
2.5
2
50 mV
1.5
10 mV
1
2 mV
0.5
0
VCC = 2.7 V, CL = 10 pF
RP = 1 MW (pull up to VCC)
TA = 25°C
200
100
0.1
0.05
0
0
-40 -25 -10
5
20
35
50
65
80
95
110 125
-50
0
50
200
250
300
Figure 8. Low-to-High Level Output Response
for Various Input Overdrives
Figure 7. Supply Current vs Free-Air Temperature
5
16
Output Voltage (V)
4
2 mV
3
10 mV
2
50 mV
1
0
VCC = 5 V
CL = 10 pF
RP = 1 MW (pull up to VCC)
TA = 25°C
-50
0
50
100
150
200
250
0.1
0.05
0
300
Differential Input
Voltage (V)
Output Voltage (V)
150
Time (ms)
Temperature (°C)
14
12
10
2 mV
8
10 mV
6
4
2
0
-50
50 mV
VCC = 15 V, CL = 10 pF
RP = 1 MW (pull up to VCC)
TA = 25°C
0
50
Time (ms)
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100
150
200
250
0.1
0.05
0
300
Time (ms)
Figure 9. Low-to-High Level Output Response
for Various Input Overdrives
10
100
Differential Input
Voltage (V)
0
600
TA = 0°C
TA = -40°C
300
0
700
TA = 25°C
TA = 70°C
500
Differential Input
Voltage (V)
Low-Level Output Voltage (V)
13.5
Figure 10. Low-to-High Level Output Response
for Various Input Overdrives
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3401 TLV3402 TLV3404
TLV3401, TLV3402, TLV3404
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
6
5
2 mV
2
1.5
10 mV
1
0.5
50 mV
0
VCC = 2.7 V, CL = 10 pF
RP = 1 MW (pull up to VCC)
TA = 25°C
0.1
0.05
0
-50
0
50
100
150
200
250
300
350
400
2 mV
4
3
2
10 mV
50 mV
1
0
VCC = 5 V
CL = 10 pF
RP = 1 MW (pull up to VCC)
TA = 25°C
-1
0
-50
50
100
150
8
2 mV
6
4
2
0
VCC = 15 V, CL = 10 pF
RP = 1 MW (pull up to VCC), TA = 25°C
100
150
200
250
300
350
0.1
0.05
0
400
Output Fall Time (ms)
10 mV
Differential Input
Voltage (V)
Output Voltage (V)
50 mV
50
300
350
400
VID = 1 V to -1 V, TA = 25°C
RP = 1 mW (pull up to VCC)
Input Fall Time = 500 ns
7
0
250
Figure 12. High-to-Low Level Output Response
for Various Input Overdrives
16
-50
200
Time (ms)
Figure 11. High-to-Low Level Output Response
for Various Input Overdrives
8
0.05
0
Time (ms)
14
12
10
0.1
Differential Input
Voltage (V)
Output Voltage (V)
3
2.5
Differential Input
Voltage (V)
Output Voltage (V)
www.ti.com
6
CL = 50 pF
5
CL = 10 pF
4
3
2
1
0
2
3
4
5
Time (ms)
Figure 13. High-to-Low Level Output Response
for Various Input Overdrives
6
7 8 9 10 11 12 13 14 15
Supply Voltage (V)
Figure 14. Output Fall Time vs Supply Voltage
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3401 TLV3402 TLV3404
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TLV3401, TLV3402, TLV3404
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
www.ti.com
8 Detailed Description
8.1 Overview
The TLV340x is a family of nanopower comparators drawing only 470 nA per channel supply current. Having a
minimum operating supply voltage of 2.7 V over the extended industrial temperature range (TA = –40°C to
+125°C), while having an input common-mode range of –0.1 to VCC + 5 V makes this device ideal for batterypowered and wireless handset applications.
8.2 Functional Block Diagram
VCC
IN+
OUT
IN±
GND
Copyright © 2016, Texas Instruments Incorporated
8.3 Feature Description
8.3.1 Operating Voltage
The TLV340x comparators are specified for use on a single supply from 2.5 V to 16 V (or a dual supply from
±1.25 V to ±16 V) over a temperature range of −40°C to +125°C.
8.3.2 Setting the Threshold
Using a low-power, stable reference is important when setting the transition point for the TLV340x devices. The
REF3312, as shown in Figure 15, provides a 1.25-V reference voltage with low drift and only 3.9 µA of quiescent
current.
Pull-up voltage
VS
Input voltage
IN+
VCC
RPULL-UP
Output voltage
OUT
VS
REF3312
IN±
GND
1.25 V threshold voltage
Copyright © 2016, Texas Instruments Incorporated
Figure 15. Setting the Threshold
8.4 Device Functional Modes
The TLV340x has a single functional mode and is operational when the power supply voltage applied ranges
from 2.5 V (±1.25 V) to 16 V (±8 V).
12
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Product Folder Links: TLV3401 TLV3402 TLV3404
TLV3401, TLV3402, TLV3404
www.ti.com
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
Many applications require the detection of a signal (voltage or current) that exceeds a particular threshold voltage
or current. Using a comparator to make that threshold detection is the easiest, lowest power and highest speed
way to make a threshold detection.
9.2 Typical Application
5V
Input voltage
IN+
1M
RPULL-UP
VCC
Output voltage
OUT
5V
REF3312
IN±
GND
1.25 V threshold voltage
Copyright © 2016, Texas Instruments Incorporated
Figure 16. 1.25-V Threshold Detector
9.2.1 Design Requirements
•
•
•
•
Detect when a signal is above or below 1.25 V
Operate from a single 5-V power supply
Rail-to-rail input voltage range from 0 to 5 V
Rail-to-rail output voltage range from 0 to 5 V
9.2.2 Detailed Design Procedure
The input voltage range in the circuit illustrated in Figure 16 is limited only by the power supply applied to the
TV3401. In this example with the selection of a 5-V, single-supply power supply, the input voltage range is limited
to 0 to VS + 5 V, or 0 to 10 V. The threshold voltage of 1.25 V can de derived in a variety of ways. As the
TLV3401 is a very low-power device, it is desirable to also use very low power to create the threshold voltage.
The REF3312 series voltage reference is selected for its stable output voltage of 1.25 V and its low power
consumption of only 3.9 µA. The TLV3401 is an open-drain output comparator, requiring a pullup resistor from
output to the power supply. Proper selection of the pullup resistor value requires maximizing the output voltage
swing while at the same time minimizing power dissipated in the resistor when the output voltage is low. Too
small of a pullup resistor can result in too much power dissipation, while too large of a pullup resistor can result
in slower response times. The TLV3401 is fully specified with a 1-MΩ pullup resistor and using a 1-MΩ pullup
resistor results in meeting the performance specifications listed in the Electrical Characteristics.
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3401 TLV3402 TLV3404
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TLV3401, TLV3402, TLV3404
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
www.ti.com
Typical Application (continued)
9.2.3 Application Curve
6
Output Voltage (V)
5
4
3
2
1
0
0
1
2
3
Voltage at IN pin (V)
4
5
Figure 17. Transfer Function for the Threshold Detector
14
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Product Folder Links: TLV3401 TLV3402 TLV3404
TLV3401, TLV3402, TLV3404
www.ti.com
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
10 Power Supply Recommendations
The TLV340x device is specified for operation from 2.5 V to 16 V (±1.25 to ±8 V); many specifications apply from
–40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or
temperature are presented in Typical Characteristics.
11 Layout
11.1 Layout Guidelines
Figure 18 shows the typical connections for the TLV340x. To minimize supply noise, power supplies must be
capacitively decoupled by a 0.01-µF ceramic capacitor in parallel with a 10-µF electrolytic capacitor.
Comparators are very sensitive to input noise. Proper grounding (the use of a ground plane) helps to maintain
the specified performance of the TLV340x family.
For best results, maintain the following layout guidelines:
1. Use a printed-circuit board (PCB) with a good, unbroken low-inductance ground plane.
2. Place a decoupling capacitor (0.1-µF ceramic, surface-mount capacitor) as close as possible to VCC.
3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from the output.
4. Solder the device directly to the PCB rather than using a socket.
5. For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some
degradation to propagation delay when the impedance is low. The top-side ground plane runs between the
output and inputs.
6. The ground pin ground trace runs under the device up to the bypass capacitor, shielding the inputs from the
outputs.
11.2 Layout Example
Power supply
0.01 µF
10 F
V+
RPULL-UP
+IN
OUT
± IN
OUT
RPULL-UP
Power supply
1
5
0.01 µF
10 F
2
±
+
3
4
Not to scale
+IN
±IN
Copyright © 2016, Texas Instruments Incorporated
Figure 18. TLV340x Layout Example
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3401 TLV3402 TLV3404
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TLV3401, TLV3402, TLV3404
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
www.ti.com
12 Device and Documentation Support
12.1 Device Support
12.1.1 Development Support
12.1.1.1 DIP Adapter EVM
The DIP Adapter EVM tool provides an easy, low-cost way to prototype small surface mount ICs. The evaluation
tool these TI packages: D or U (8-pin SOIC), PW (8-pin TSSOP), DGK (8-pin MSOP), DBV (6-pin SOT-23, 5-pin
SOT23, and 3-pin SOT-23), DCK (6-pin SC-70 and 5-pin SC-70), and DRL (6-pin SOT-563). The DIP Adapter
EVM may also be used with terminal strips or may be wired directly to existing circuits.
12.1.1.2 Universal Op Amp EVM
The Universal Op Amp EVM is a series of general-purpose, blank circuit boards that simplify prototyping circuits
for a variety of IC package types. The evaluation module board design allows many different circuits to be
constructed easily and quickly. Five models are offered, with each model intended for a specific package type.
PDIP, SOIC, MSOP, TSSOP, and SOT-23 packages are all supported.
NOTE
These boards are unpopulated, so users must provide their own ICs. TI recommends
requesting several op amp device samples when ordering the Universal Op Amp EVM.
12.2 Documentation Support
12.2.1 Related Documentation
The following documents are relevant for using the TLV340x devices and are recommended for reference. All are
available for download at www.ti.com (unless otherwise noted):
• Universal Op Amp EVM User Guide (SLOU060)
• Hardware Pace using Slope Detection (SLAU511)
• Bipolar High-voltage Differential Interface for Low-voltage Comparators (TIDU039)
• AC-Coupled Single Supply Comparator (SLAU505)
• ECG Implementation on the TMS320VC5505 DSP Medical Development Kit (SPRAB36)
• REF33xx 3.9-μA, SC70-3, SOT-23-3, and UQFN-8, 30-ppm/ °C Drift Voltage Reference (SBOS392)
12.3 Related Links
Table 2 lists quick access links. Categories include technical documents, support and community resources,
tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TLV3401
Click here
Click here
Click here
Click here
Click here
TLV3402
Click here
Click here
Click here
Click here
Click here
TLV3404
Click here
Click here
Click here
Click here
Click here
12.4 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
16
Submit Documentation Feedback
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3401 TLV3402 TLV3404
TLV3401, TLV3402, TLV3404
www.ti.com
SLCS135B – AUGUST 2000 – REVISED JANUARY 2017
12.5 Community Resource
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.6 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.7 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2000–2017, Texas Instruments Incorporated
Product Folder Links: TLV3401 TLV3402 TLV3404
Submit Documentation Feedback
17
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TLV3401CD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
3401C
Samples
TLV3401CDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
VBDC
Samples
TLV3401CDBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
VBDC
Samples
TLV3401ID
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3401I
Samples
TLV3401IDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBDI
Samples
TLV3401IDBVRG4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBDI
Samples
TLV3401IDBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBDI
Samples
TLV3401IDBVTG4
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
VBDI
Samples
TLV3401IDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3401I
Samples
TLV3401IP
ACTIVE
PDIP
P
8
50
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 125
TLV3401I
Samples
TLV3402CD
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
3402C
Samples
TLV3402CDG4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
3402C
Samples
TLV3402CDGK
ACTIVE
VSSOP
DGK
8
80
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
0 to 70
AJJ
Samples
TLV3402CDGKR
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
0 to 70
AJJ
Samples
TLV3402CDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
3402C
Samples
TLV3402ID
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3402I
Samples
TLV3402IDG4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3402I
Samples
TLV3402IDGK
ACTIVE
VSSOP
DGK
8
80
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
AJK
Samples
TLV3402IDGKG4
ACTIVE
VSSOP
DGK
8
80
RoHS & Green
Level-1-260C-UNLIM
-40 to 125
AJK
Samples
TLV3402IDGKR
ACTIVE
VSSOP
DGK
8
2500
Level-1-260C-UNLIM
-40 to 125
AJK
Samples
NIPDAU
RoHS & Green NIPDAU | NIPDAUAG
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TLV3402IDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3402I
Samples
TLV3402IDRG4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3402I
Samples
TLV3402IP
ACTIVE
PDIP
P
8
50
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 125
TLV3402I
Samples
TLV3404CD
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
3404C
Samples
TLV3404CDR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
3404C
Samples
TLV3404CPW
ACTIVE
TSSOP
PW
14
90
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
3404C
Samples
TLV3404CPWR
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
3404C
Samples
TLV3404ID
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3404I
Samples
TLV3404IDG4
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3404I
Samples
TLV3404IDR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3404I
Samples
TLV3404IN
ACTIVE
PDIP
N
14
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 125
TLV3404I
Samples
TLV3404IPW
ACTIVE
TSSOP
PW
14
90
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3404I
Samples
TLV3404IPWR
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
3404I
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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