TLV3601-Q1, TLV3602-Q1, TLV3603-Q1
SNOSDC3D – JUNE 2021 – REVISED JULY 2022
TLV360x-Q1 325 MHz High-Speed Comparators with 2.5 ns Propagation Delay
1 Features
3 Description
•
•
The TLV360x are a family of 325 MHz, high-speed
comparators with rail-to-rail inputs and a propagation
delay of 2.5 ns. The combination of fast response and
wide operating voltage range make the comparators
suitable for narrow signal pulse detection and data
and clock recovery applications in LIDAR, range
finders, and line receivers.
•
•
•
•
•
•
•
•
•
•
•
•
Qualified for automotive applications
AEC-Q100 qualified with the following results:
– Device temperature grade 1: –40°C to 125°C
ambient operating temperature range
– Device HBM ESD classification level 2
– Device CDM ESD classification level C3
Fast propagation delay: 2.5 ns
Low overdrive dispersion: 600 ps
High toggle frequency: 325 MHz
Narrow pulse width detection capability: 1.25 ns
Push-pull output
Wide supply range: 2.4 V to 5.5 V
Input common-mode range extends 200 mV
beyond both rails
Low input offset voltage: ±5 mV
Known startup condition at output
TLV3603 specific features:
– Adjustable hysteresis control pin
– Latch function
Packages: TLV3601 (SC70-5), (SOT23-5),
TLV3603 (SC70-6),
TLV3602 (VSSOP-8), (WSON-8)
Functional Safety Capable
– Documentation available to aid functional safety
system design [TLV3601/2-Q1]
– Documentation available to aid functional safety
system design [TLV3603-Q1]
2 Applications
•
•
•
•
•
•
The push-pull (single-ended ) outputs of the TLV360x
family simplify and save cost on board-to-board wiring
for I/O interfaces while reducing power consumption
when compared to alternative high-speed differential
output comparators. They can directly interface most
prevailing digital controllers and IO expanders in the
downstream circuit.
The TLV3601-Q1 is available in tiny 5-pin SC70
and SOT23 packages which makes it well suited
for space constrained equipment that benefit from
the comparators fast response time. TLV3603-Q1 is
packaged in a 6-pin SC70 package and maintains the
same speed and size as TLV3601-Q1 while offering
the additional features of adjustable hysteresis control
and output latch capability. The TLV3602-Q1 is a dual
channel version of the TLV3601-Q1 and is packaged
in 8-pin VSSOP and WSON packages.
Device Information
TLV3601-Q1
DC/DC converter
Inverter and motor control
Fuel Cell Control Unit (FCCU)
Battery Management System (BMS)
Mechanically scanning LIDAR
Audio amplifier
PACKAGE (1)
PART NUMBER
TLV3603-Q1
TLV3602-Q1
(1)
BODY SIZE (NOM)
SC70 (5)
1.25 mm × 2.00 mm
SOT-23 (5)
2.90 mm × 1.60 mm
SC70 (6)
1.25 mm × 2.00 mm
VSSOP (8)
3.00 mm × 3.00 mm
WSON (8) (Preview) 2.00 mm × 2.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
TLV3601
(TLV3602 per Channel)
VCC
TLV3603
V+
+
+
OPA858
+
OUT
OUT
TLV3603
+
TDC
–
LE/HYST
–
VEE
LE/HYST
VEE
Functional Block Diagrams
VBIAS
VREF
TLV3603 Application Circuit
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
TLV3601-Q1, TLV3602-Q1, TLV3603-Q1
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SNOSDC3D – JUNE 2021 – REVISED JULY 2022
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 ESD Ratings............................................................... 5
6.3 Recommended Operating Conditions.........................5
6.4 Thermal Information....................................................6
6.5 Electrical Characteristics.............................................7
6.6 Timing Diagrams ........................................................ 8
6.7 Typical Characteristics.............................................. 10
7 Detailed Description......................................................18
7.1 Overview................................................................... 18
7.2 Functional Block Diagram......................................... 18
7.3 Feature Description...................................................18
7.4 Device Functional Modes..........................................18
8 Application and Implementation.................................. 20
8.1 Application Information............................................. 20
8.2 Typical Application.................................................... 21
9 Power Supply Recommendations................................25
10 Layout...........................................................................26
10.1 Layout Guidelines................................................... 26
10.2 Layout Example...................................................... 26
11 Device and Documentation Support..........................27
11.1 Device Support........................................................27
11.2 Receiving Notification of Documentation Updates.. 27
11.3 Support Resources................................................. 27
11.4 Trademarks............................................................. 27
11.5 Electrostatic Discharge Caution.............................. 27
11.6 Glossary.................................................................. 27
12 Mechanical, Packaging, and Orderable
Information.................................................................... 27
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (July 2022) to Revision D (August 2022)
Page
• Removed Preview from VSSOP package for the TLV3602-Q1 ......................................................................... 1
Changes from Revision B (November 2021) to Revision C (July 2022)
Page
• Added VSSOP and WSON package options for TLV3602-Q1 in Preview ........................................................ 1
• Removed Preview from SOT-23 package from TLV3601-Q1 ............................................................................ 1
Changes from Revision A (August 2021) to Revision B (November 2021)
Page
• Remove Preview from TLV3603-Q1 .................................................................................................................. 1
• Add DBV package option for TLV3601-Q1 in Preview ...................................................................................... 1
• Added typical performance curves................................................................................................................... 10
Changes from Revision * (June 2021) to Revision A (August 2021)
Page
• Production Data Release ...................................................................................................................................1
2
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SNOSDC3D – JUNE 2021 – REVISED JULY 2022
5 Pin Configuration and Functions
1
VEE
2
IN+
3
5
VCC
4
IN-
+
OUT
Figure 5-1. DCK, DBV Package
5-Pin SC70, SOT-23
Top View
1
6
VCC
VEE
2
5
LE/HYS
IN+
3
4
IN-
+
OUT
Figure 5-2. DCK Package
6-Pin SC70
Top View
Table 5-1. Pin Functions
PIN
NAME
I/O
DESCRIPTION
TLV3601
TLV3603
IN+
3
3
I
Non-inverting input
IN–
4
4
I
Inverting input
OUT
1
1
O
Output
(Push-pull)
VEE
2
2
I
Negative power supply
VCC
5
6
I
Positive power supply
LE/HYS
-
5
I
Adjustable hysteresis control and latch
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IN1+
1
8
V+
IN1–
2
7
OUT1
IN2–
3
6
OUT2
IN2+
4
5
V-
Figure 5-3. TLV3602 DGK, DSG Packages
8-Pin VSSOP, WSON
Table 5-2. Pin Functions: TLV3602 (Dual)
PIN
NAME
NO.
DESCRIPTION
IN1+
1
I
Noninverting input, channel 1
IN1–
2
I
Inverting input, channel 1
IN2–
3
I
Inverting input, channel 2
IN2+
4
I
Noninverting input, channel 2
OUT1
7
O
Output, channel 1
OUT2
6
O
Output, channel 2
V-
5
P
Negative (lowest) supply or ground
V+
8
P
Positive (highest) supply
-
Connect directly to V- pin
Thermal PAD
4
I/O
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Input Supply Voltage: VCC – VEE
Input Voltage (IN+,
IN–)(2)
MIN
MAX
–0.3
6
UNIT
V
VEE – 0.3
VCC + 0.3
V
–(VCC – VEE + 0.3)
+ (VCC –VEE + 0.3)
V
Output Voltage (OUT)(3)
VEE – 0.3
VCC + 0.3
V
Latch and Hysteresis Control (LE/HYS)
VEE – 0.3
VCC + 0.3
Differential Input Voltage (VDI = IN+ – IN–)
V
Current into Input pins (IN+, IN–, LE/HYS)(2)
±10
mA
Current into Output pins (OUT)(3)
±50
mA
150
°C
150
°C
Junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
–65
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails must
be current-limited to 10 mA or less.
Output terminals are diode-clamped to the power-supply rails. Output signals that can swing more than 0.3 V beyond the supply rails
must be current-limited to 50 mA or less.
6.2 ESD Ratings
VALUE
UNIT
TLV3601(DCK), TLV3603
Electrostatic
discharge
V(ESD)
Human-body model (HBM), per AEC Q100-002(1)
±2000
Charged-device model (CDM), per AEC Q100-011
±1000
V
TLV3601(DBV)
V(ESD)
Electrostatic
discharge
Human-body model (HBM), per AEC Q100-002(1)
±2000
Charged-device model (CDM), per AEC Q100-011
±750
Electrostatic
discharge
Human-body model (HBM), per AEC Q100-002(1)
±2000
Charged-device model (CDM), per AEC Q100-011
±500
V
TLV3602
V(ESD)
(1)
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
Input Supply Voltage: VCC – VEE
MAX
UNIT
2.4
5.5
V
Input Voltage Range (IN+, IN–)
VEE – 0.3
VCC + 0.3
V
Latch and Hysteresis Control (LE/HYS)
VEE – 0.3
VCC + 0.3
V
–40
125
°C
Ambient temperature, TA
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6.4 Thermal Information
TLV3601
TLV3601
TLV3602
TLV3602
TLV3603
DBV (SOT-23)
DCK (SC70)
DGK (VSSOP)
DSG (WSON)
DCK (SC70)
5 PINS
5 PINS
8 PINS
8 PINS
6 PINS
Junction-to-ambient thermal resistance
176.5
187.5
170.5
64.9
165.1
°C/W
Junction-to-case (top) thermal resistance
74.7
139.2
61.7
83.9
129.1
°C/W
Junction-to-case (bottom) thermal
resistance
N/A
N/A
N/A
5.5
N/A
°C/W
RθJB
Junction-to-board thermal resistance
43.4
65.8
92.4
32.0
58.9
°C/W
ψJT
Junction-to-top characterization
parameter
16.7
43.0
8.9
2.1
39.4
°C/W
ψJB
Junction-to-board characterization
parameter
43.1
65.5
90.8
32.0
58.7
°C/W
THERMAL METRIC
RθJA
Rθ
JC(top
UNIT
)
Rθ
JC(bot
tom)
6
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6.5 Electrical Characteristics
VCC = 2.5, 3.3 and 5 V, VEE = 0 V, VCM = VEE + 300 mV, CL = 5 pF probe capacitance, typical at TA = 25°C (unless otherwise
noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
–5
±0.5
5
UNIT
DC Input Characteristics
VIO
Input offset voltage
dVIO/dT
Input offset voltage drift
TA = –40°C to +125℃
VCM
Input common mode voltage
range
TA = –40℃ to +125℃
VEE – 0.2
VHYST (TLV3601)
Input hysteresis voltage
TA = –40℃ to +125℃
1.5
CIN
Input capacitance
RDM
Input differential mode resistance
RCM
Input common mode resistance
IB
Input bias current
IOS
Input offset current
CMRR
Common-mode rejection ratio
PSRR
Power-supply rejection ratio
±3.0
VCC + 0.2
3
5(1)
V
mV
1
pF
67
kΩ
5
TA = –40℃ to +125℃
mV
μV/°C
1
MΩ
5
uA
±0.03
uA
VCM = VEE – 0.2V to VCC + 0.2V
80
dB
VCC = 2.4 to 5.5V
80
dB
DC Output Characteristics
VOH
Output high voltage from VCC
ISOURCE = 1 mA
TA = –40℃ to +125℃
60
80
mV
VOL
Output low voltage from VEE
ISINK = 1 mA
TA = –40℃ to +125℃
60
80
mV
ISC_SOURCE
Output Short-Circuit Current Source
TA = –40℃ to +125℃
10
30
mA
ISC_SINK
Output Short-Circuit Current Sink
TA = –40℃ to +125℃
10
30
mA
ICC (TLV3601)
quiescent current
Output being high
TA = –40℃ to +125℃
4.9
7
mA
ICC (TLV3602)
quiescent current per channel
Output being high
TA = –40℃ to +125℃
4.9
7
mA
ICC (TLV3603)
quiescent current
Output being high
TA = –40℃ to +125℃
5.7
7.8
mA
VPOR (postive)
Power-On Reset Voltage
Power Supply
2.1
V
AC Characteristics
tPD
ns
4.5(1)
ns
VOVERDRIVE = VUNDERDRIVE = 50mV
tPD
Propagation delay
VOVERDRIVE = VUNDERDRIVE = 50mV
TA = –40℃ to +125℃
ΔtPD (TLV3602 only)
Channel-to-channel propagation
delay skew(2)
VCM = VCC/2, VOVERDRIVE = VUNDERDRIVE =
50mV, 50 MHz Squarewave
24
ps
tCM_DISPERSION
Common dispersion
VCM varied from VEE to VCC
80
ps
tOD_DISPERSION
Overdrive dispersion
Overdrive varied from 10 mV to 125 mV
600
ps
tUD_DISPERSION
Underdrive dispersion
Underdrive varied from 10mV to 125 mV
330
ps
tR
Rise time
10% to 90%
0.75
ns
tF
Fall time
90% to 10%
0.75
ns
tJITTER
RMS Jitter
VIN = 100mVP-P,
fIN = 100MHz, Jitter BW = 10Hz – 50MHz
4
ps
fTOGGLE
Input toggle frequency
VIN = 200 mVPP Sine Wave,
When output high reaches 90% of VCC - VEE
or output low reaches 10% of VCC - VEE
325
MHz
PulseWidth
Minimum allowed input pulse
width
VOVERDRIVE = VUNDERDRIVE = 50mV
PWOUT = 90% of PWIN
1.25
ns
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2.5
3.5(1)
Propagation delay
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6.5 Electrical Characteristics (continued)
VCC = 2.5, 3.3 and 5 V, VEE = 0 V, VCM = VEE + 300 mV, CL = 5 pF probe capacitance, typical at TA = 25°C (unless otherwise
noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Latching/Adjustable Hysteresis
VHYST
Input hysteresis voltage
VHYST = Logic High
0
mV
VHYST
Input hysteresis voltage
RHYST = Floating
3
mV
VHYST
Input hysteresis voltage
RHYST = 150 kΩ
30
mV
VHYST
Input hysteresis voltage
RHYST = 56 kΩ
60
mV
VIH_LE
LE pin input high level
TA = –40℃ to +125℃
VIL_LE
LE pin input low level
TA = –40℃ to +125℃
VEE + 0.35
V
IIH_LE
LE pin input leakage current
VLE = VCC
TA = –40℃ to +125℃
15
uA
IIL_LE
LE pin input leakage current
VLE = VEE,
TA = –40℃ to +125℃
40
uA
tSETUP
Latch setup time
–1.4
ns
tHOLD
Latch hold time
7.2
ns
tPL
Latch to OUT delay
7
ns
(1)
(2)
VEE + 1.5
V
Ensured by characterization
Differential propagation delay is defined as the larger of the two:
ΔtPDLH = tPDLH(MAX) – tPDLH(MIN)
ΔtPDHL = tPDHL(MAX) – tPDHL(MIN)
where (MAX) and (MIN) denote the maximum and minimum values
of a given measurement across the different comparator channels.
6.6 Timing Diagrams
VOVERDRIVE
VUNDERDRIVE
INVUNDERDRIVE
VOVERDRIVE
IN+
tPLH
tPHL
tR
tF
90%
50%
10%
VOUT
Figure 6-1. General Timing Diagram
8
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VOD = 125mV
VOD = 10mV
ININ+
DISPERSION
VOUT
Figure 6-2. Overdrive Dispersion
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6.7 Typical Characteristics
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603-Q1 only), and input overdrive = 50 mV,
unless otherwise noted.
2
3.2
3.1
1
Hysteresis (mV)
Input Offset Voltage (mV)
1.5
0.5
0
-0.5
3
2.9
VCC = 2.5V
VCC = 3.3V
VCC = 5V
-1
-1.5
-40
For 33 units
-25
-10
5
20 35 50 65
Temperature (C)
80
95
2.8
-40
110 125
-25
-10
5
20 35 50 65
Temperature (C)
80
95
110 125
Figure 6-4. TLV3601 Hysteresis vs. Temperature
Figure 6-3. TLV3601 Offset vs. Temperature
1.8
Input Offset Voltage (mV)
1.4
1
0.6
0.2
-0.2
-0.6
-1
-0.2
For 33 units
0.1
0.4 0.7
1
1.3 1.6 1.9 2.2
Input Common-Mode Voltage (V)
2.5 2.7
Figure 6-5. TLV3601 Offset vs. Common-Mode, 2.5 V
Figure 6-6. TLV3601 Hysteresis vs. Common-Mode, 2.5 V
5
1.8
4.5
4
1
Hysteresis (mV)
Input Offset Voltage (mV)
1.4
0.6
0.2
-0.2
3
2.5
2
1.5
-40C
25C
85C
125C
1
-0.6
-1
-0.2
0.5
For 33 units
0.3
0.8
1.3
1.8
2.3
2.8
Input Common-Mode Voltage (V)
3.3
Figure 6-7. TLV3601 Offset vs. Common-Mode, 3.3 V
10
3.5
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-0.2
0.3
0.8
1.3
1.8
2.3
2.8
Input Common Mode Voltage (V)
3.3
Figure 6-8. TLV3601 Hysteresis vs. Common-Mode, 3.3 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603-Q1 only), and input overdrive = 50 mV,
unless otherwise noted.
5
1.8
4.5
4
1
Hysteresis (mV)
Input Offset Voltage (mV)
1.4
0.6
0.2
-0.2
3
2.5
2
1.5
-40C
25C
85C
125C
1
-0.6
0.5
-1
-0.2 0.3
For 33 units
0.8
1.3 1.8 2.3 2.8 3.3 3.8
Input Common-Mode Voltage (V)
4.3
0
-0.2
4.8 5.2
0.3
0.8
1.3 1.8 2.3 2.8 3.3 3.8
Input Common Mode Voltage (V)
4.3
4.8 5.2
Figure 6-10. TLV3601 Hysteresis vs. Common-Mode, 5 V
Figure 6-9. TLV3601 Offset vs. Common-Mode, 5 V
2
40
38
1.5
36
1
Hysteresis (mV)
Input Offset Voltage (mV)
3.5
0.5
0
34
32
30
28
-0.5
VCC = 2.5V
VCC = 3.3V
VCC = 5V
26
-1
-1.5
-40
24
-40
For 33 units
-25
-10
5
20 35 50 65
Temperature (C)
80
95
110 125
-25
-10
5
20
35
50
65
Temperature (C)
80
95
110 125
Figure 6-12. TLV3603 Hysteresis vs. Temperature
1.8
40
1.4
38
0.6
0.2
-0.2
34
32
30
28
-0.6
-1
-0.2
-40C
25C
85C
125C
36
1
Hysteresis (mV)
Input Offset Voltage (mV)
Figure 6-11. TLV3603 Offset vs. Temperature
For 33 units
0.1
0.4 0.7
1
1.3 1.6 1.9 2.2
Input Common-Mode Voltage (V)
2.5 2.7
Figure 6-13. TLV3603 Offset vs. Common-Mode, 2.5 V
26
24
-0.2
0.1
0.4 0.7
1
1.3 1.6 1.9 2.2
Input Common-Mode Voltage (V)
2.5 2.7
Figure 6-14. TLV3603 Hysteresis vs. Common-Mode, 2.5 V
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6.7 Typical Characteristics (continued)
1.8
40
1.4
38
0.6
0.2
-0.2
34
32
30
28
-0.6
-1
-0.2
0.3
0.8
1.3
1.8
2.3
2.8
Input Common-Mode Voltage (V)
24
-0.2
3.3
1.8
40
1.4
38
0.6
0.2
-0.2
3.3
-40C
25C
85C
125C
34
32
30
28
-0.6
26
For 33 units
0.8
1.3 1.8 2.3 2.8 3.3 3.8
Input Common-Mode Voltage (V)
4.3
24
-0.2 0.3
4.8 5.2
Figure 6-17. TLV3603 Offset vs. Common-Mode, 5 V
0.8
1.3 1.8 2.3 2.8 3.3 3.8
Input Common-Mode Voltage (V)
4.3
4.8 5.2
Figure 6-18. TLV3603 Hysteresis vs. Common-Mode, 5 V
80
80
-40C
25C
85C
125C
70
60
50
40
30
60
50
40
30
20
20
10
10
0
-40C
25C
85C
125C
70
VHYST (mV)
VHYST (mV)
0.8
1.3
1.8
2.3
2.8
Input Common-Mode Voltage (V)
36
1
-1
-0.2 0.3
0.3
Figure 6-16. TLV3603 Hysteresis vs. Common-Mode, 3.3 V
Hysteresis (mV)
Input Offset Voltage (mV)
26
For 33 units
Figure 6-15. TLV3603 Offset vs. Common-Mode, 3.3 V
0
0
200
400
600
RHYST (k)
800
1,000
Figure 6-19. TLV3603 Hysteresis vs. Resistance, 2.5 V
12
-40C
25C
85C
125C
36
1
Hysteresis (mV)
Input Offset Voltage (mV)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603-Q1 only), and input overdrive = 50 mV,
unless otherwise noted.
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200
400
600
RHYST (k)
800
1,000
Figure 6-20. TLV3603 Hysteresis vs. Resistance, 3.3 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603-Q1 only), and input overdrive = 50 mV,
unless otherwise noted.
80
-40C
25C
85C
125C
70
VHYST (mV)
60
50
40
30
20
10
0
0
200
400
600
RHYST (k)
800
1,000
Figure 6-21. TLV3603 Hysteresis vs. Resistance, 5 V
Figure 6-22. Bias Current vs. Input Voltage, 2.5 V
8
Input Bias Current (A)
6
4
2
0
-2
-4
-40C
25C
85C
125C
-6
-8
-0.2
0.3
0.8
1.3
1.8
2.3
Input Voltage (V)
2.8
3.3
Figure 6-24. Bias Current vs. Input Voltage, 5 V
Figure 6-23. Bias Current vs. Input Voltage, 3.3 V
Output Voltage to VCC (V)
10
1
100m
10m
1m
100
-40C
25C
85C
125C
1m
10m
Output Sourcing Current (A)
100m
Figure 6-25. Output Voltage vs. Output Sourcing Current, 2.5 V
Figure 6-26. Output Voltage vs. Output Sinking Current, 2.5 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603-Q1 only), and input overdrive = 50 mV,
unless otherwise noted.
Figure 6-28. Output Voltage vs. Output Sinking Current, 3.3 V
Figure 6-29. Output Voltage vs. Output Sourcing Current, 5 V
Figure 6-30. Output Voltage vs. Output Sinking Current, 5 V
5.5
5.5
5.3
5.3
5.1
4.9
-40C
25C
85C
125C
4.7
4.5
5.1
4.9
-40C
25C
85C
125C
4.7
4.5
2
2.5
3
3.5
4
4.5
Supply Voltage (V)
5
5.5
Figure 6-31. TLV3601 Supply Current vs. Voltage (Output Low)
14
Supply Current (mA)
Supply Current (mA)
Figure 6-27. Output Voltage vs. Output Sourcing Current, 3.3 V
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2.5
3
3.5
4
4.5
Supply Voltage (V)
5
5.5
Figure 6-32. TLV3601 Supply Current vs. Voltage (Output High)
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603-Q1 only), and input overdrive = 50 mV,
unless otherwise noted.
Figure 6-34. TLV3601 Supply Current vs. Temp (Output High)
6.2
6.2
6
6
5.8
5.6
-40C
25C
85C
125C
5.4
Supply Current (mA)
Supply Current (mA)
Figure 6-33. TLV3601 Supply Current vs. Temp (Output Low)
5.6
-40C
25C
85C
125C
5.4
5.2
5.2
2
2.5
3
3.5
4
Supply Voltage (V)
4.5
5
5.5
Figure 6-35. TLV3603 Supply Current vs. Voltage (Output Low)
2
6.2
6
6
5.8
5.6
5.4
5.2
-40
VCC = 2.5V
VCC = 3.3V
VCC = 5V
-25
-10
5
20
35
50
65
Temperature (C)
80
95
110 125
Figure 6-37. TLV3603 Supply Current vs. Temp (Output Low)
2.5
3
3.5
4
Supply Voltage (V)
4.5
5
5.5
Figure 6-36. TLV3603 Supply Current vs. Voltage (Output High)
6.2
Supply Current (mA)
Supply Current (mA)
5.8
5.8
5.6
5.4
5.2
-40
VCC = 2.5V
VCC = 3.3V
VCC = 5V
-25
-10
5
20
35
50
65
Temperature (C)
80
95
110 125
Figure 6-38. TLV3603 Supply Current vs. Temp (Output High)
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603-Q1 only), and input overdrive = 50 mV,
unless otherwise noted.
4.5
-40C
25C
85C
125C
4
3.5
3
2.5
2
1.5
10
20
30 40 50 70 100
200 300
Input Overdrive (mV)
Propagation Delay, High to Low (ns)
Propagation Delay, Low to High (ns)
4.5
-40C
25C
85C
125C
4
3.5
3
2.5
2
1.5
10
500 700 1000
Figure 6-39. Propagation Delay, Low to High, 2.5 V
20
30 40 50 70 100
200 300
Input Overdrive (mV)
500 700 1000
Figure 6-40. Propagation Delay, High to Low, 2.5 V
Propagation Delay, High to Low (ns)
4.5
-40C
25C
85C
125C
4
3.5
3
2.5
2
1.5
10
16
20
30 40 50 70 100
200 300
Input Overdrive (mV)
500 700 1000
Figure 6-41. Propagation Delay, Low to High, 3.3 V
Figure 6-42. Propagation Delay, High to Low, 3.3 V
Figure 6-43. Propagation Delay, Low to High, 5 V
Figure 6-44. Propagation Delay, High to Low, 5 V
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6.7 Typical Characteristics (continued)
10
10
8
8
Propagation Delay (ns)
Propagation Delay (ns)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603-Q1 only), and input overdrive = 50 mV,
unless otherwise noted.
6
4
2
6
4
2
tPHL
tPLH
0
0
10
20
30
40
50
60
70
Output Capacitive Load (pF)
80
90
100
Figure 6-45. Propagation Delay vs. Load Capacitance, 3.3 V
tPHL
tPLH
0
0
10
20
30
40
50
60
70
Output Capacitive Load (pF)
80
90
100
Figure 6-46. Propagation Delay vs. Load Capacitance, 5 V
Figure 6-47. Minimum Pulse Width vs. Temperature
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7 Detailed Description
7.1 Overview
TheTLV360x family are high-speed comparators with single-ended (push-pull) output stages. The fast response
time of these comparators make them well suited for applications that require narrow pulse width detection
or high toggle frequencies. The TLV3601-Q1 is available in a 5-pin SC70 and SOT23 package, while the
TLV3603-Q1 is packaged in a 6-pin SC70. The TLV3602-Q1 is a dual channel version of the TLV3601-Q1 and is
packaged in an 8-pin VSSOP and WSON package.
7.2 Functional Block Diagram
TLV3601
TLV3603
VCC
VCC
+
+
LE/HYST
VEE
VEE
7.3 Feature Description
The TLV3601-Q1,TLV3603-Q1, and TLV3602-Q1 are single and dual channel, high speed comparators with
a typical propagation delay of 2.5 ns and push-pull outputs. The minimum pulse width detection capability is
1.25 ns and the typical toggle rate is 325 MHz. These comparators are well-suited for distance measurement
applications that utilize a time-of-flight arechitecture as well as systems that suffer from capacitive loading and
require data and clock recovery. In addition to their high speed, the TLV360x family offers rail-to-rail input stages
capable of operating up to 200 mV beyond each power supply rail combined with a maximum 5 mV input offset.
The TLV3603-Q1 also provides adjustable hysteresis via an external resistor for noise suppression or a latching
mode to hold the output of the comparators.
7.4 Device Functional Modes
The TLV3601-Q1 has a single functional mode and is active when the power supply voltage is greater than 2.4V.
The TLV3603-Q1 has two modes of operation. The first is an active mode where the output reflects the condition
at the inputs when an external resistor is connected to ground on the LE/HYS pin. The second is a latch mode
where the output is held at its last active state when the LE/HYS pin is pulled low. The TLV3603-Q1 returns to
active mode after a short delay when the pin is pulled high.
7.4.1 Inputs
The TLV360x family features input stages capable of operating 200 mV below negative power supply (ground)
and 200 mV beyond the positive supply voltage, allowing for zero cross detection and maximizing input dynamic
range given a certain power supply. The input stages are protected from conditions where the voltage on either
pin exceeds this level by internal ESD protection diodes to VCC and VEE. To avoid damaging the inputs when
exceeding the recommended input voltage range, an external resistor should be used to limit the current.
7.4.2 Push-Pull (Single-Ended) Output
The TLV360x outputs have excellent drive capability and are designed to connect directly to CMOS logic
input devices. Likewise, the comparator output stages can drive capacitive loads. Transient performance
parameters in the Electrical Characteristics Tables and Typical Characteristics section are for a load of 5pF,
corresponding to a standard CMOS load. Device performance for larger capacitive loads can be found in the
typical performance curves titled Propagation Delay vs Capacitive Load. For optimal speed and performance,
output load capacitance should be reduced as much as possible.
18
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7.4.3 Known Startup Condition
The TLV360x have a Power-on-Reset (POR) circuit which provides system designers a known start-up condition
for the output of the comparators. When the power supply (VCC) is ramping up or ramping down, the POR circuit
will be active when VCC is below VPOR. When active, the POR circuit holds the output low at VEE. When VCC is
greater than or equal to VPOR as stated in Section 6.5 , the comparator output reflects the state of the input pins.
Figure 7-1 shows how the TLV360x outputs respond for VCC rising. The input is configured with a logic high
input to highlight the transition from the POR circuit control (logic low output) to a standard comparator operation
where the output reflects the input condition. Note how the output goes high when VCC reaches 2.1V.
Figure 7-1. TLV3601/TLV3603 Output for VCC Rising
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8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
8.1.1 Adjustable Hysteresis
As a result of a comparator’s high open loop gain, there is a small band of input differential voltage where the
output can toggle back and forth between “logic high” and “logic low” states. This can cause design challenges
for inputs with slow rise and fall times or systems with excessive noise. These challenges can be overcome by
adding hysteresis to the comparator.
Since the TLV3601-Q1 and TLV3602-Q1 only has a minimal amount of internal hysteresis, external hysteresis
can be applied in the form of a positive feedback loop that adjusts the trip point of the comparator depending on
its current output state. See the Implementing Hysteresis section for more details.
The TLV3603-Q1 on the other hand has a LE/HYS pin that can be used to increase or eliminate the internal
hysteresis of the comparator. In order to increase the internal hysteresis of the TLV3603-Q1, connect a single
resistor as shown in the adjusting hysteresis figure between the LE/HYS pin and VEE. A curve of hysteresis
versus resistance is provided below to provide guidance in setting the desired amount of hysteresis. Likewise,
for applications where no hysteresis is desired, the LE/HYS pin can be connected to VCC.
VCC
TLV3603
IN+
+
OUT
IN-
LE/HYS
VEE
Figure 8-1. Adjustable Hysteresis with an External Resistor
80
-40C
25C
85C
125C
70
VHYST (mV)
60
50
40
30
20
10
0
0
200
400
600
RHYST (k)
800
1,000
Figure 8-2. VHYST (mV) vs RHYST (kΩ), VCC = 5 V
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8.1.2 Capacitive Loads
For capacitive loads under 100 pF, the propagation delay has minimum change (see Propagation Delay vs.
Capacitive Load). However, excessive capacitive loading under high switching frequencies may increase supply
current, propagation delay, or induce decreased slew rate.
8.1.3 Latch Functionality
The latch pin for the TLV3603-Q1 holds the output state of the device when the voltage at the LE/HYS pin is
a logic low. This is particularly useful when the output state is intended to remain unchanged. An important
consideration of the latch functionality is the latch hold and setup times. Latch hold time is the minimum time
required (after the latch pin is asserted) for properly latching the comparator output. Likewise, latch setup time is
defined as the time that the input must be stable before the latch pin is asserted low. The figure below illustrates
when the input can transition for a valid latch. Note that the typical setup time in the EC table is negative; this is
due to the internal trace delays of the LE/HYS pin relative to the input pin trace delays. A small delay (tPL) in the
output response is shown below when the TLV3603-Q1 exits a latched output stage.
tSETUP
tHOLD
LE/HYS
IN
Valid Input Transition
Region
Invalid Input
Transition Region
Valid Input
Transition Region
Figure 8-3. Input Change Properly Latched
LE/HYS
IN
tPL
OUT
Figure 8-4. Latch Disable with Input Change
8.2 Typical Application
8.2.1 Implementing Hysteresis
A comparator may produce “chatter” (multiple transitions) at the output when there are noise or signal variations
around the reference threshold; this causes the output to change states in rapid random successions as the
comparator input goes above and below the threshold of the reference. This usually occurs when the input signal
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is moving very slowly across the switching threshold of the comparator. This problem can be prevented by using
the internal hysteresis feature of the comparator or by the addition of external hysteresis.
The TLV3603-Q1 has a LE/HYS pin that allows for variable internal hysteresis depending on the resistor value
connected between the pin and VEE, where increasing the resistance decreases the hysteresis to a minimum
level.
VCC
5V
TLV3603
VIN
+
VO
VO
VL
VREF 2.5 V
VH
0V
2.485 V
LE/HYS
R1
2.515 V
VIN
150 kΩ
VEE
Figure 8-5. Adjustable Hysteresis with a 150kΩ Resistor using TLV3603
Since the TLV3601-Q1 and TLV3602-Q1 only have a minimal amount of internal hysteresis, external hysteresis
can be added in the form of a positive feedback loop. A non-inverting comparator with hysteresis requires a
two-resistor network and a voltage reference (VREF) at the inverting input, as shown in Figure 8-6.
VREF 2.5 V
VO
VA
VIN
5V
–
+
VO
VL
R1
60
VH
0V
2.485 V
2.515 V
VIN
R2
10 k
Figure 8-6. Non-Inverting Configuration for Hysteresis using TLV3601
8.2.1.1 Design Requirements
For this design, follow these design requirements.
Table 8-1. Design Parameters
PARAMETER
VALUE
Supply Voltage (VCC)
5V
VREF
2.5 V
VHYS
30 mV
Lower Threshold (VL)
2.485 V
Upper Threshold (VH)
2.515 V
8.2.1.2 Detailed Design Procedure
For the TLV3603-Q1, the hysteresis vs. resistance curve (Figure 8-2) can be used as a guidance to set the
desired amount of hysteresis. Figure 8-2 shows that for a 30-mV hysteresis, a 150 kΩ resistor must be placed
from the LE/HYS pin to VEE.
For the TLV3601-Q1 and TLV3602-Q1, the following procedure can be used to add external hysteresis for
a non-inverting configuration. Note that VHYST
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