TLV3801, TLV3802, TLV3811
SNOSDD7C – DECEMBER 2021 – REVISED DECEMBER 2023
TLV3801, TLV3802, TLV3811(C) 225-ps High-Speed Comparators with LVDS Outputs
1 Features
•
•
•
•
•
•
•
•
•
•
•
•
•
The TLV380x/TLV3811(C) have a very strong input
overdrive performance of 5 ps, and narrow pulse
width capabilities of just 240 ps. This combination
of low variation in propagation delay due to input
overdrive and the ability to detect narrow pulses make
these devices excellent choices for Time-of-Flight
(ToF) applications such as in factory automation and
drone vision.
Low propagation delay: 225 ps
Low overdrive dispersion: 5 ps
Quiescent current: 17 mA
High toggle frequency: 3 GHz /6 Gbps
Narrow pulse width detection capability: 240 ps
LVDS output
Split input and output ground reference
Single supply voltage: 2.7 V to 5.25 V
Low input offset voltage: ±0.5 mV
Internal 2 mV hysteresis: TLV380x
Internal 1.1 mV hysteresis: TLV3811
Internal 0 mV hysteresis: TLV3811C
Packages: TLV3801 (8-Pin WSON), TLV3811(C)
(6-Pin DSBGA), TLV3802 (12-Pin WSON)
The Low-Voltage-Differential-Signal (LVDS) output
of the TLV380x/TLV3811(C) helps increase data
throughput and optimizes power consumption.
Likewise, the complementary outputs help to reduce
EMI by suppressing common mode noise on each
output. The LVDS output is designed to drive and
interface directly with other devices that accept a
standard LVDS input, such as most FPGAs and CPUs
downstream in an application.
2 Applications
•
•
•
•
•
Distance sensing in LIDAR
Time-of-Flight sensors
High speed trigger function in oscilloscope and
logic analyzer
High speed differential line receiver
Drone vision
The TLV3801 and TLV3802 are in an 8-pin WSON
and 12-pin WSON package, respectively, while the
TLV3811(C) is in a tiny 6-pin DSBGA package, which
makes them desirable for space sensitive applications
such as an optical sensor module.
Device Information
3 Description
PART NUMBER
The TLV380x/TLV3811(C) are 225-ps high speed
comparators with a wide power supply range and a
very high toggle frequency of 3 GHz. Along with an
operating supply voltage range of 2.7 V to 5.25 V for
single supply and 2.7 V to 5.25 V for split supply,
all of these features come in industry-standard small
packages, making these devices an excellent choice
for LIDAR, differential line receiver applications, and
test and measurement systems.
IN+
WSON (8)
2.00 mm × 2.00 mm
TLV3811(C)
DSBGA (6)
1.218 mm × 0.818 mm
TLV3802
WSON (12)
3.00 mm × 2.00 mm
1. For all orderable packages, see the orderable
addendum at the end of the data sheet.
VCC
OUT+
LVDS
IN+
OUT+
+
LVDS
IN-
–
OUT-
IN-
–
OUT-
TLV3801
TLV3802 per channel
VBIAS
TLV3811
VREF
TLV3801 Optical Receiver Circuit
100
+
+
+
VCC
100
TLV3801
BODY SIZE (NOM)
TLV3801
VCC
OPA858
PACKAGE (1)
VEE
GND
GND
Functional Block Diagram
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV3801, TLV3802, TLV3811
www.ti.com
SNOSDD7C – DECEMBER 2021 – REVISED DECEMBER 2023
Table of Contents
1 Features ...........................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 ESD Ratings............................................................... 5
6.3 Thermal Information....................................................5
6.4 Recommended Operating Conditions.........................5
6.5 Electrical Characteristics.............................................7
6.6 Timing Diagrams ........................................................ 9
6.7 Typical Characteristics.............................................. 10
7 Detailed Description......................................................14
7.1 Overview................................................................... 14
7.2 Functional Block Diagram......................................... 14
7.3 Feature Description...................................................14
7.4 Device Functional Modes..........................................14
8 Application and Implementation.................................. 16
8.1 Application Information............................................. 16
8.2 Typical Application.................................................... 16
8.3 Power Supply Recommendations.............................21
8.4 Layout....................................................................... 22
9 Device and Documentation Support............................23
9.1 Device Support......................................................... 23
9.2 Receiving Notification of Documentation Updates....23
9.3 Support Resources................................................... 23
9.4 Trademarks............................................................... 23
9.5 Electrostatic Discharge Caution................................23
9.6 Glossary....................................................................23
10 Mechanical, Packaging, and Orderable
Information.................................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (March 2023) to Revision C (November 2023)
Page
• Change preview to RTM release of TLV3802.....................................................................................................1
Changes from Revision A (October 2022) to Revision B (March 2023)
Page
• Added TLV3811(C) and TLV3802 (Preliminary) throughout the data sheet....................................................... 1
Changes from Revision * (December 2021) to Revision A (October 2022)
Page
• Change preview to RTM for TLV3811.................................................................................................................1
2
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SNOSDD7C – DECEMBER 2021 – REVISED DECEMBER 2023
5 Pin Configuration and Functions
OUTGND
VEE
IN-
1
8
7
2
Out+
VCC
Thermal
Pad
3
6
4
5
VCC
IN+
Figure 5-1. WSON Package
8-Pin DSG
Top View
Top View
+
A
IN+
VCC
OUT+
B
IN-
GND
OUT-
1
2
3
Figure 5-2. DSBGA Package
6-Pin YBG
Top View
Table 5-1. Pin Functions
PIN
NAME
I/O
DESCRIPTION
TLV3801
TLV3811(C)
IN+
5
A1
I
Non-inverting input
IN–
4
B1
I
Inverting input
OUT+
8
A3
O
Non-inverting output
OUT–
1
B3
O
Inverting output
VEE
3
-
I
Negative power supply
(If using single supply, connect to GND)
VCC
6, 7
A2
I
Positive power supply
GND
2
B2
I
Ground
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SNOSDD7C – DECEMBER 2021 – REVISED DECEMBER 2023
GND
IN1+
IN1VEE
IN2+
IN2-
1
12
2
11
3
10
TLV3802
4
9
5
8
6
7
OUT1+
OUT1VCC
OUT2+
OUT2VCC
Figure 5-3. WSON Package
12-Pin DSS
Top View
Table 5-2. Pin Functions
PIN
NAME
4
TLV3802
I/O
DESCRIPTION
GND
1
I
Ground
IN1+
2
I
Channel 1 Non-inverting input
IN1–
3
I
Channel 1 Inverting input
VEE
4
I
Negative power supply
(If using single supply, connect to GND)
IN2+
5
I
Channel 2 Non-inverting input
IN2–
6
I
Channel 2 Inverting input
VCC
7
I
Positive power supply
OUT2–
8
O
Channel 2 Inverting output
OUT2+
9
O
Channel 2 Non-inverting output
VCC
10
I
Positive power supply
OUT1–
11
O
Channel 1 Inverting output
OUT1+
12
O
Channel 1 Non-inverting output
Thermal Pad
–
–
Connect directly to VEE
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SNOSDD7C – DECEMBER 2021 – REVISED DECEMBER 2023
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Supply voltage: (VCC – VEE) and (VCC – GND) (2)
Input pins (IN+, IN–) from VEE (WSON)
(3)
Input pins (IN+, IN–) from GND (DSBGA) (4)
MIN
MAX
–0.3
5.5
V
V
VEE – 0.3
VCC + 0.3
GND – 0.3
VCC + 0.3
–10
10
GND
VCC
Current into input pins (IN+, IN–)
Output (OUT+, OUT–)
Current into output pins (OUT+, OUT–)
Junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
(4)
–65
UNIT
V
mA
V
10
mA
150
°C
150
°C
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
VEE less than or equal to GND
Input terminals are diode-clamped to VEE and VCC
Input terminals are diode-clamped to GND and VCC
6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2)
±1000
UNIT
V
JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.
6.3 Thermal Information
THERMAL METRIC
(1)
TLV3801
TLV3811(C)
TLV3802
DSG (WSON)
YBG (DSBGA)
DSS (WSON)
8 PINS
6 PINS
12 PINS
UNIT
RqJA
Junction-to-ambient thermal resistance
69.4
132.1
63.2
°C/W
RqJC(top)
Junction-to-case (top) thermal resistance
95.7
1.4
61.9
°C/W
RqJB
Junction-to-board thermal resistance
36.2
41
30.7
°C/W
yJT
Junction-to-top characterization parameter
3.5
0.3
2.4
°C/W
yJB
Junction-to-board characterization parameter
36.0
41
30.7
°C/W
RqJC(bot)
Junction-to-case (bottom) thermal resistance
9.4
n/a
8.7
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics report.
6.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
Single supply operation: VCC – VEE with VEE = GND
2.7
5.25
V
Split supply operation: VCC – VEE with VEE < GND (WSON)
2.7
5.25
V
Split supply operation: VCC – GND with VEE < GND (WSON)
2.4
5.25
V
Input voltage range (WSON)
VEE + 1.5
VCC + 0.1
V
Input voltage range (DSBGA)
GND + 1.5
VCC + 0.1
V
–1.5
+1.5
V
Differential Input voltage range
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SNOSDD7C – DECEMBER 2021 – REVISED DECEMBER 2023
6.4 Recommended Operating Conditions (continued)
over operating free-air temperature range (unless otherwise noted)
Ambient temperature, TA
6
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MIN
MAX
UNIT
–40
125
°C
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6.5 Electrical Characteristics
For VCC = 3.3 V, VEE = GND = 0, VCM = 2.5 V at TA = 25°C (Unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
–5(1)
±0.5
+5(1)
mV
DC Input Characteristics
VOS
Input offset
voltage
TA = –40°C to +125°C
VHYS
Input hysteresis
voltage
TLV3801, TLV3802
Input hysteresis
voltage
TLV3811
Input hysteresis
voltage
TLV3811C
VCM-Range
Common-mode
voltage range
Single Supply: VEE = GND
VCC – VEE = 2.7 V to 5.25 V
TA = –40 °C to +125°C
VEE + 1.5
VCC
V
VCM-Range
(WSON)
Common-mode
voltage range
Split Supply: VEE < GND
VCC – VEE = 2.7 V to 5.25 V and VCC – GND =
2.4 V to 5.25 V
TA = –40 °C to +125°C
VEE + 1.5
VCC
V
CMRR
(WSON)
Common mode
rejection ratio
VCM = VEE + 1.5V to VCC
80
dB
CMRR
(DSBGA)
Common mode
rejection ratio
VCM = GND + 1.5V to VCC
80
dB
PSRR
Power supply
rejection ratio
Single Supply: VEE = GND
VCC – VEE = 2.7 V to 5.25 V
80
dB
PSRR (WSON)
Power supply
rejection ratio
Split Supply: VEE < GND
VCC – VEE = 2.7 V to 5.25 V and VCC – GND =
2.4 V to 5.25 V
80
dB
IB
Input bias current
TA = –40 °C to +125 °C
–10
2
10
µA
IOS
Input offset
current
TA = –40 °C to +125 °C
–4
±0.1
4
µA
CIC
Input capacitance,
common mode
VHYS (DSBGA)
2
mV
1.1
mV
0
mV
1
pF
DC Output Characteristics
Output common
mode voltage
VCC - GND ≥ 2.6 V
TA = –40℃ to +125℃
1.125
1.25
1.375
V
Output common
mode voltage
VCC - GND < 2.6 V
TA = –40℃ to +125℃
0.92
1.2
1.29
V
ΔVOCM
Output common
mode voltage
mismatch
TA = –40℃ to +125℃
–30
VOCM_PP
Peak-to-Peak
output common
mode voltage
VOD
Differential output
TA = –40℃ to +125℃
voltage (WSON)
250
350
450
mV
VOD
Differential output
TA = –40℃ to +125℃
voltage (DSBGA)
240
350
450
mV
ΔVOD
Differential output
TA = –40℃ to +125℃
voltage mismatch
-30
30
mV
VOCM
30
50
mV
mVpp
Power Supply
IQ
(TLV3801)
Quiescent current
TA = –40°C to +125°C
per comparator
20
26.6
mA
IQ
(TLV3811(C))
Quiescent current
TA = –40°C to +125°C
per comparator
17
23
mA
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6.5 Electrical Characteristics (continued)
For VCC = 3.3 V, VEE = GND = 0, VCM = 2.5 V at TA = 25°C (Unless otherwise noted)
PARAMETER
IQ
(TLV3802)
TEST CONDITIONS
MIN
Quiescent current
TA = –40°C to +125°C
per comparator
TYP
MAX
UNIT
19
23.5
mA
AC Characteristics
tPD
Propagation delay
Tempco of tPD
tPD_SKEW
VOVERDRIVE = 50 mV, VUNDERDRIVE = 50 mV, 50
MHz Squarewave
225
ps
Temperature
Coefficient of
propagation delay
±0.2
ps/℃
Propagation delay VOVERDRIVE = 50mV, VUNDERDRIVE = 50 mV, 50
skew
MHz Squarewave
±2.5
ps
6
ps
Channel-toΔtPD (TLV3802 channel
VOVERDRIVE = VUNDERDRIVE = 50mV, 50 MHz
only)
propagation delay Squarewave
skew
tCM_DISPERSION
Common mode
dispersion
VCM varied from VCM (min) to VCM (max)
2
ps
tOD_DISPERSION
Overdrive
dispersion
Overdrive varied from 20 mV to 100 mV
5
ps
tOD_DISPERSION
Overdrive
dispersion
Overdrive varied from 10 mV to 1 V
15
ps
tUD_DISPERSION
Underdrive
dispersion
Underdrive varied from 20 mV to 100 mV
7
ps
tUD_DISPERSION
Underdrive
dispersion
Underdrive varied from 10 mV to 1 V
10
ps
tR
Rise time
20% to 80%
135
ps
tF
Fall time
80% to 20%
135
ps
fTOGGLE
Input toggle
frequency
VIN = 200 mVPP Sine Wave, VOD = 550 mV
2.3
GHz
fTOGGLE
Input toggle
frequency
VIN = 200 mVPP Sine Wave, 50% Output swing
3
GHz
TR
Toggle Rate
VIN = 200 mVPP Sine Wave, VOD = 550 mV
4.6
Gbps
TR
Toggle Rate
VIN = 200 mVPP Sine Wave, 50% Output swing
6
Gbps
PulseWidth
Minimum allowed
input pulse width
VOVERDRIVE = VUNDERDRIVE = 50mV
PWOUT = 90% of PWIN
(1)
8
240
ps
Ensured by charaterization
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6.6 Timing Diagrams
VOVERDRIVE
VUNDERDRIVE
INVUNDERDRIVE
VOVERDRIVE
IN+
tPLH
tPHL
tR
tF
80%
1.25V
20%
VOUT+
VOUT-
1.25V
tPHL
tPLH
tPLHD
tPHLD
0V
VOD
Figure 6-1. General Timing Diagram
VOD = 100mV
VOD = 20mV
ININ+
DISPERSION
0V
VOD
Figure 6-2. Overdrive Dispersion
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6.7 Typical Characteristics
At TA = 25°C, VCC - VEE = 3.3 V to 5 V while VEE = GND = 0, VCM = 2.5 V, and input overdrive/underdrive = 50 mV, unless
otherwise noted.
2.4
1.5
2.3
2.2
0.5
Hysteresis (mV)
Input Offset Voltage (mV)
1
0
-0.5
2.1
2
1.9
1.8
-1
1.7
-1.5
-40
For 33 units
-25
-10
5
20 35 50 65
Temperature (C)
80
95
1.6
-40
110 125
1.8
2.4
1.4
2.3
1
0.2
-0.2
-0.6
5
20 35 50 65
Temperature (C)
80
95
110 125
2.1
2
1.9
1.8
-1
-40C
25C
85C
125C
1.7
-1.8
1.5
For 33 units
1.8
2.1
2.4
2.7
Input Common-Mode Voltage (V)
3
1.6
1.5
3.3
1.8
2.4
1.4
2.3
1
2.1
2.4
2.7
Input Common-Mode Voltage (V)
3
3.3
2.2
Hysteresis (mV)
0.6
0.2
-0.2
-0.6
2.1
2
1.9
1.8
-1
-40C
25C
85C
125C
1.7
-1.4
-1.8
1.5
1.8
Figure 6-6. TLV3801 Hysteresis vs. Common-Mode, 3.3 V
Figure 6-5. Offset vs. Common-Mode, 3.3 V
Input Offset Voltage (mV)
-10
2.2
0.6
-1.4
For 33 units
2
2.5
3
3.5
4
Input Common-Mode Voltage (V)
Figure 6-7. Offset vs. Common-Mode, 5 V
10
-25
Figure 6-4. TLV3801 Hysteresis vs. Temperature
Hysteresis (mV)
Input Offset Voltage (mV)
Figure 6-3. Offset vs. Temperature
For 33 units
4.5
5
1.6
1.5
2
2.5
3
3.5
4
Input Common-Mode Voltage (V)
4.5
5
Figure 6-8. TLV3801 Hysteresis vs. Common-Mode, 5 V
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6.7 Typical Characteristics (continued)
18
17.6
21.2
17.2
Supply Current (mA)
22
21.6
20.8
20.4
20
19.6
19.2
16
15.6
15.2
14.8
14.4
-25
-10
5
20 35 50 65
Temperature (C)
80
95
14
-40
110 125
Figure 6-9. TLV3801 Supply Current vs. Temperature
Input Bias Current (A)
16.4
18.4
18
-40
5
4
4
3
3
2
1
0
-1
-2
-40C
25C
85C
125C
-4
-5
1.5
1.7
1.9
2.1
2.3
2.5
2.7
2.9
Input Common-Mode Voltage (V)
3.1
110 125
-2
-40C
25C
85C
125C
-4
-5
1.5 1.8 2.1 2.4 2.7 3 3.3 3.6 3.9 4.2 4.5 4.8 5
Input Common-Mode Voltage (V)
3.3
Figure 6-12. Bias Current vs. Common-Mode, 5 V
250
235
230
225
220
215
-40C
25C
85C
125C
3.3
Figure 6-13. Propagation Delay vs. Common-Mode, 3.3 V
Propagation Delay (ps)
240
3
95
-1
255
2.1
2.4
2.7
Input Common-Mode Voltage (V)
80
0
260
1.8
20 35 50 65
Temperature (C)
1
245
200
1.5
5
2
250
205
-10
-3
Figure 6-11. Bias Current vs. Common-Mode, 3.3 V
210
-25
Figure 6-10. TLV3811(C) Supply Current vs. Temperature
5
-3
Propagation Delay
16.8
18.8
Input Bias Current (A)
Supply Current (mA)
At TA = 25°C, VCC - VEE = 3.3 V to 5 V while VEE = GND = 0, VCM = 2.5 V, and input overdrive/underdrive = 50 mV, unless
otherwise noted.
245
240
235
230
225
-40C
25C
85C
125C
220
215
210
1.5
2
2.5
3
3.5
4
Input Common-Mode Voltage (V)
4.5
5
Figure 6-14. Propagation Delay vs. Common-Mode, 5 V
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6.7 Typical Characteristics (continued)
250
250
245
245
240
240
Propagation Delay (ps)
Propagation Delay (ps)
At TA = 25°C, VCC - VEE = 3.3 V to 5 V while VEE = GND = 0, VCM = 2.5 V, and input overdrive/underdrive = 50 mV, unless
otherwise noted.
235
230
225
220
215
210
205
200
10
-40C
25C
85C
125C
20
30 40 50 70 100
200 300
Input Overdrive (mV)
220
215
200
10
500 7001,000
20
30 40 50 70 100
200 300
Input Underdrive (mV)
500 7001,000
Figure 6-16. Propagation Delay vs. Underdrive, 3.3 V
250
245
240
235
230
225
255
250
245
240
235
230
225
220
220
215
215
20
30 40 50 70 100
200 300
Input Overdrive (mV)
-40C
25C
85C
125C
260
Propagation Delay (ps)
255
210
10
-40C
25C
85C
125C
265
-40C
25C
85C
125C
260
210
10
500 7001,000
20
30 40 50 70 100
200 300
Input Underdrive (mV)
500 7001,000
Figure 6-17. Propagation Delay vs. Overdrive, 5 V
Figure 6-18. Propagation Delay vs. Underdrive, 5 V
0
0
-5
-5
Dispersion (ps)
Propagation Delay (ps)
225
205
265
Dispersion (ps)
230
210
Figure 6-15. Propagation Delay vs. Overdrive, 3.3 V
-10
-15
-20
-25
10
-40C
25C
85C
125C Referred to 10mV VOD
20
-10
-15
-20
30 40 50 70 100
200 300
Overdrive Voltage (mV)
500 7001,000
Figure 6-19. Dispersion vs. Overdrive, 3.3 V
12
235
-25
10
-40C
25C
85C
125C Referred to 10mV VOD
20
30 40 50 70 100
200 300
Overdrive Voltage (mV)
500 7001,000
Figure 6-20. Dispersion vs. Overdrive, 5 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 3.3 V to 5 V while VEE = GND = 0, VCM = 2.5 V, and input overdrive/underdrive = 50 mV, unless
otherwise noted.
400
400
Minimum Pulse Width (ps)
350
325
300
275
250
225
200
175
150
1.5
-40C
25C
85C
125C
375
Minimum Pulse Width (ps)
-40C
25C
85C
125C
375
350
325
300
275
250
225
200
175
1.8
2.1
2.4
2.7
Input Common-Mode Voltage (V)
3
3.3
Figure 6-21. Minimum Pulse Width vs. Common-Mode, 3.3 V
150
1.5
2
2.5
3
3.5
4
Input Common-Mode Voltage (V)
4.5
5
Figure 6-22. Minimum Pulse Width vs. Common-Mode, 5 V
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7 Detailed Description
7.1 Overview
The TLV380x/TLV3811(C) are high-speed comparators with LVDS output. The fast response time of these
comparators make them well suited for applications that require narrow pulse width detection or high toggle
frequencies. The TLV3801 is available in the 8-pin WSON package and the TLV3802 is available in the 12-pin
WSON package while the TLV3811(C) is available in the 6-pin DSBGA package.
7.2 Functional Block Diagram
VCC
IN-
–
OUT+
IN+
+
IN-
–
OUT+
LVDS
100
+
VCC
100
IN+
VCC
LVDS
OUT-
OUT-
TLV3801
TLV3802 per channel
VEE
GND
TLV3811
GND
7.3 Feature Description
The TLV380x/TLV3811(C) are high-speed comparators with a typical propagation delay of 225 ps and LVDS
output. The minimum pulse width detection capability is 240 ps and the typical toggle frequency is 3 GHz (6
Gbps). These comparators are well suited for distance sensing for LIDAR and time-of-flight applications as well
as for high-speed test and measurement systems. The TLV380x has two separate power rails for the input and
the output; this allows the input to be referenced from either single or split supply (VCC and VEE) while the
output is referenced from ground (VCC and GND). On the other hand, the TLV3811(C) has one power rail for
both inputs and outputs and can only be operated at a single supply.
7.4 Device Functional Modes
The TLV380x has a single functional mode and is operational on the condition that both the input supply voltage
(VCC - VEE) is greater than or equal to 2.7 V and the output supply voltage (VCC - GND) is greater than or
equal to 2.4 V.
The TLV3811(C) has a single functional mode and is operational when the power supply voltage (VCC - GND) is
greater than or equal to 2.7 V.
7.4.1 Inputs
The TLV380x/TLV3811(C) feature an input stage, capable of operating between 1.5 V above VEE (GND for
TLV3811(C)) and 0.1 V above VCC, with an internal ESD protection circuit that includes two pairs of front-toback diodes between IN+ and IN- as well as two 50 Ω resistors, as shown in Figure 7-1. This prevents damage
to the input stage by limiting the differential input voltage to be no more than twice the diode's forward-voltage
drop 2 × VF (2 × 0.7 V).
14
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IN+
50 Ω
TO
INTERNAL
CIRCUITRY
IN-
50 Ω
Figure 7-1. Input Stage Circuitry
When the differential input voltage exceeds 2 × VF, the input bias current increases at the input pins IN+ and IN-,
as shown in Equation 1.
Input Current = [(VIN+ - VIN-) - 2 × VF] / (2 × 50)
(1)
To avoid damaging the inputs when exceeding the recommended input voltage range, an external resistor
should be used to limit the current. The current should be limited to less than 10 mA.
7.4.2 LVDS Output
The TLV380x/TLV3811(C) outputs are LVDS compliant. When the input of the downstream device is terminated
with a 100 Ω resistor, the comparators provide a ±350 mV differential swing at an output common-mode
voltage of 1.25 V above GND. Fully differential outputs enable fast digital toggling and reduce EMI compared to
single-ended output standards.
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8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
8.1.1 Capacitive Loads
Under reasonable capacitive loads, the device maintains specified propagation delay. However, excessive
capacitive loading under high switching frequencies may increase supply current, propagation delay, or induce
decreased slew rate.
8.1.2 Hysteresis
A comparator's high, open-loop gain creates a small band of input differential voltage where the comparator
may produce "chatter" which causes the output to toggle back and forth between a “logic high” and a “logic
low”. This can cause design challenges for inputs with slow rise and fall times or systems with excessive noise.
These challenges can be prevented by adding hysteresis to the comparator. However, hysteresis must be added
strategically when input signals are small since it can cuase signals to go undetected. As a result, TLV3811C
is optimized for detecting small, fast-switching inputs and has 0 mV of internal hysteresis. On the other hand,
for detecting larger input signals in the presense of noise, the TLV3811 has 1.1 mV of internal hysteresis and
TLV3801 and TLV3802 have 2 mV.
Since the TLV380x/TLV3811(C) only have a minimal amount of internal hysteresis, external hysteresis can be
applied in the form of a positive feedback loop that adjusts the trip point of the comparator depending on its
current output state. See the Non-Inverting Comparator With Hysteresis section for more details.
8.2 Typical Application
8.2.1 Optical Receiver
The TLV380x/TLV3811(C) can be used in conjunction with a high performance amplifier such as the OPA858
to create an optical receiver as shown in the Figure 8-1. The photodiode operates in photoconductive mode:
exposure to light will cause a reverse current through the photodiode. A bias voltage is applied to the op
amp's non-inverting input to prevent saturation at the negative power supply. The OPA858 takes the current
conducting through the diode and translates it into a voltage for a high speed comparator to detect. The
TLV380x/TLV3811(C) will then output the proper LVDS signal according to the threshold set (VREF).
16
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CF
RF
VCC
VCC
OPA858
+
VOUT
+
TLV3801
100
-
VBIAS
OUT+
OUT-
VREF
Figure 8-1. Optical Receiver
8.2.1.1 Design Requirements
Table 8-1. Design Parameters
PARAMETER
VALUE
VCC
+5 V
VEE
0V
VOUT, SWING
100 mV
IDIODE
100 µA
fp
159 MHz
8.2.1.2 Detailed Design Procedure
Set VBIAS to be in the recommended common-mode voltage range of the OPA858. This is also the minimum
output voltage of the op amp VOUT, MIN as the op amp will attempt to settle at the voltage applied to the
non-inverting input.
The maximum output voltage of the op amp VOUT, MAX can be calculated from the desired output voltage swing
VOUT, SWING and VOUT, MIN, as shown in Equation 2.
VOUT, MAX = VOUT, SWING + VOUT, MIN
(2)
The gain resistor RF is determined by the desired VOUT,
through the diode, as shown in Equation 2.
MAX
and VOUT,
MIN
and the maximum current IDIODE
RF = (VOUT, MAX - VOUT, MIN) / IDIODE
(3)
The feedback capacitor, in combinaton with the gain resistor, forms a pole in the frequency response of the
amplifier. The feedback capacitor can be determined by the gain resistor and the desired pole frequency fp, as
shown in Equation 2.
CF = 1 / (2 × π × RF x fp)
(4)
Set VREF to be the switching threshold voltage between VOUT, MAX and VOUT, MIN.
Select values for VBIAS and VREF. Plug in given values for VOUT, MAX, IDIODE, and f p. For the given example, VBIAS
= 1.5 V, VREF = 1.55 V, and RF, CF is solved as 1 kΩ and 1 pF, respectively.
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For more information, please refer to the op amp tutorials for stability analysis on the transimpedance amplifier
Spice Stability Analysis and Op Amp Stability. See application note SBOA268A Transimpedance Amplifier
Circuit for more detailed procedures.
8.2.1.3 Application Performance Plots
Figure 8-2. Optical Receiver Output Waveforms
8.2.2 Non-Inverting Comparator With Hysteresis
A way to implement external hysteresis is to add two resistors to the circuit: one in series between the reference
voltage and the inverting pin, and another from the inverting pin to one of the differential output pins.
VCC
+
Q
–
Q
100
VIN
R1
VREF
+
–
R2
Figure 8-3. Non-Inverting Comparator with Hysteresis Circuit
8.2.2.1 Design Requirements
Table 8-2. Design Parameters
PARAMETER
18
VALUE
VHYS
50 mV
VREF
2.5 V
VT1
2.34 V
VT2
2.29 V
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Table 8-2. Design Parameters (continued)
PARAMETER
VALUE
Q
1.375 V
Q
1.025 V
8.2.2.2 Detailed Design Procedure
First, create an equation for VT that covers both output voltages when the output is high or low.
VT1 = VREFR2 + QR1
R1+R2 R1+R2
(5)
VT2 = VREFR2 + QR1
R1+R2 R1+R2
(6)
The hysteresis voltage in this network is equal to the difference in the two threshold voltage equations.
VHYS = VT1-VT2
(7)
VHYS = VREFR2 + QR1 - VREFR2 - QR1
R1+R2 R1+R2 R1+R2 R1+R2
(8)
VHYS = (Q-Q)R1
R1+R2
(9)
VHYS = VODR1
R1+R2
(10)
Note that these equations do not take into account the effects of the internal hysteresis and offset voltage of the
comparator. Design parameters will need to be adjusted accordingly.
Select a value for R2. Plug in given values for VREF, VT1, VT2, Q, and Q, and solve for R1. For the given
example, R2 = 50 kΩ, and R1 is solved as = 8.3 kΩ.
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8.2.2.3 Application Performance Plots
Figure 8-4. Hysteresis Curve for LVDS Comparator
8.2.3 Logic Clock Source to LVDS Transceiver
The Figure 8-5 shows a logic clock source being terminated and driven with the TLV3802/TLV3811(C) across a
CAT6 Cable to receive an equivalent LVDS clock signal at the receiver end.
CLOCK SOURCE
CAT6 CABLE
RJ45
+
TLV3801
100
50
RJ45
100
+
TLV3801
OUT+
-
-
OUT-
VREF
Figure 8-5. LVDS Clock Transceiver
8.2.4 External Trigger Function for Oscilloscopes
Figure 8-6 is a typical configuration for creating an external trigger on oscilliscopes. The user adjusts the trigger
level, and a DAC converts this trigger level to a voltage the TLV380x/TLV3811(C) can use as a reference. The
input voltage from an oscilloscope channel is then compared to the trigger reference voltage, and the TLV380x/
TLV3811(C) sends an LVDS signal to a downstream FPGA to begin a capture. It is common to see bipolar
inputs in test and measurement systems such as oscilloscopes; therefore, the TLV380x can be configured in
split supply so that the inputs are in the allowable input voltage range.
20
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VCC = +2.5V
External
Trigger
Amplifier/
Attenuation
GND
+
Trigger Input
TLV3801
FPGA
VEE = -2.5V
DAC
Figure 8-6. External Trigger Function
8.3 Power Supply Recommendations
The TLV380x has two seperate power rails: VCC - VEE for the input stage and VCC - GND for the output stage.
This allows for both single and split supply capabilities for the input stage with a seperate ground reference for
the LVDS output stage. Split supply operation allows users to apply both positive and negative (bipolar) voltages
to the input pins.
When operating from a single supply, the supply voltage range for both the input and output stage is 2.7 V to
5.25 V. When operating from split supply rails, the supply voltage range for the input stage (VCC - VEE) is 2.7
V to 5.25 V, and the supply voltage range for the output stage (VCC - GND) is 2.4 V to 5.25 V. The output logic
level is independent of the VCC and VEE levels. The TLV3811(C) is specified for operation from 2.4 V to 5.25 V
and can only be operated from a single supply with both inputs and outputs referenced to GND.
Regardless of single supply or split supply operation, proper decoupling capacitors are required. It is
recommended to use a scheme of multiple, low-ESR ceramic capacitors from the supply pins to the ground
plane for optimum performance. A good combination would be 100 pF, 10 nF, and 1 uF with the lowest value
capacitor closest to the comparator.
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8.4 Layout
8.4.1 Layout Guidelines
Comparators are very sensitive to input noise. For best results, adhere to the following layout guidelines.
1. Use a printed-circuit-board (PCB) with a good, unbroken, low-inductance ground plane. Proper grounding
(use of a ground plane) helps maintain specified device performance.
2. To minimize supply noise for single and split supply, place decoupling capacitor arrays as close as possible
to VCC.
3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from the output.
4. Solder the device directly to the PCB rather than using a socket.
5. For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes
some degradation to propagation delay when impedance is low. The topside ground plane runs between the
output and inputs.
6. Use a 100 Ω termination resistor across the device's LVDS output.
7. Use higher performance substrate materials such as Rogers.
8.4.2 Layout Example
VEE GND
IN-
OUT-
IN+
OUT+
VCC
C1
Figure 8-7. TLV3801EVM Layout Example
22
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9 Device and Documentation Support
9.1 Device Support
9.1.1 Development Support
LIDAR Pulsed Time of Flight Reference Design
9.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Notifications to register and receive a weekly digest of any product information that has changed. For change
details, review the revision history included in any revised document.
9.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
9.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
9.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
9.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
10 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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7-Dec-2023
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TLV3801DSGR
ACTIVE
WSON
DSG
8
3000
RoHS & Green
SN
Level-2-260C-1 YEAR
-40 to 125
3801
Samples
TLV3801DSGT
ACTIVE
WSON
DSG
8
250
RoHS & Green
SN
Level-2-260C-1 YEAR
-40 to 125
3801
Samples
TLV3802DSSR
ACTIVE
WSON
DSS
12
3000
RoHS & Green
SN
Level-2-260C-1 YEAR
-40 to 125
3802
Samples
TLV3811CYBGR
ACTIVE
DSBGA
YBG
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
02
Samples
TLV3811CYBGT
ACTIVE
DSBGA
YBG
6
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
O2
Samples
TLV3811YBGR
ACTIVE
DSBGA
YBG
6
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LQ
Samples
TLV3811YBGT
ACTIVE
DSBGA
YBG
6
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LQ
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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