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TLV431, TLV431A, TLV431B
SLVS139X – JULY 1996 – REVISED MAY 2018
TLV431x Low-Voltage Adjustable Precision Shunt Regulator
1 Features
3 Description
•
•
•
The TLV431 device is a low-voltage 3-terminal
adjustable voltage reference with specified thermal
stability over applicable industrial and commercial
temperature ranges. Output voltage can be set to any
value between VREF (1.24 V) and 6 V with two
external resistors (see the Parameter Measurement
Information section). These devices operate from a
lower voltage (1.24 V) than the widely used TL431
and TL1431 shunt-regulator references.
1
•
•
•
•
•
•
Low-Voltage Operation, VREF = 1.24 V
Adjustable Output Voltage, VO = VREF to 6 V
Reference Voltage Tolerances at 25°C
– 0.5% for TLV431B
– 1% for TLV431A
– 1.5% for TLV431
Typical Temperature Drift
– 4 mV (0°C to 70°C)
– 6 mV (–40°C to 85°C)
– 11 mV (–40°C to 125°C)
Low Operational Cathode Current, 80 µA Typical
0.25-Ω Typical Output Impedance
Ultra-Small SC-70 Package Offers 40% Smaller
Footprint Than SOT-23-3
See TLVH431 and TLVH432 for:
– Wider VKA (1.24 V to 18 V) and IK (80 mA)
– Additional SOT-89 Package
– Multiple Pinouts for SOT-23-3 and SOT-89
Packages
On Products Compliant to MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise
Noted. On All Other Products, Production
Processing Does Not Necessarily Include Testing
of All Parameters.
2 Applications
•
•
•
•
•
Adjustable Voltage and Current Referencing
Secondary Side Regulation in Flyback SMPSs
Zener Replacement
Voltage Monitoring
Comparator With Integrated Reference
When used with an optocoupler, the TLV431 device
is an ideal voltage reference in isolated feedback
circuits for 3-V to 3.3-V switching-mode power
supplies. These devices have a typical output
impedance of 0.25 Ω. Active output circuitry provides
a very sharp turnon characteristic, making them
excellent replacements for low-voltage Zener diodes
in many applications, including on-board regulation
and adjustable power supplies.
Device Information(1)
PART NUMBER
TLV431x
PACKAGE (PIN)
BODY SIZE (NOM)
SOT-23 (3)
2.90 mm × 1.30 mm
SOT-23 (5)
2.90 mm × 1.60 mm
SC70 (6)
2.00 mm × 1.25 mm
TO-92 (3)
4.30 mm × 4.30 mm
SOIC (8)
4.90 mm × 3.90 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
VO
Input
IK
VREF
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV431, TLV431A, TLV431B
SLVS139X – JULY 1996 – REVISED MAY 2018
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
4
4
4
4
5
6
7
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics for TLV431........................
Electrical Characteristics for TLV431A .....................
Electrical Characteristics for TLV431B .....................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 16
Detailed Description ............................................ 17
8.1 Overview ................................................................. 17
8.2 Functional Block Diagram ....................................... 17
8.3 Feature Description................................................. 17
8.4 Device Functional Modes........................................ 18
9
Applications and Implementation ...................... 19
9.1 Application Information............................................ 19
9.2 Typical Applications ................................................ 20
10 Power Supply Recommendations ..................... 24
11 Layout................................................................... 24
11.1 Layout Guidelines ................................................. 24
11.2 Layout Example .................................................... 24
12 Device and Documentation Support ................. 25
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
25
25
25
25
25
25
25
13 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
Changes from Revision W (March 2018) to Revision X
•
Page
Changed figure 18 ............................................................................................................................................................... 14
Changes from Revision V (January 2015) to Revision W
Page
•
Changed crossreference link in the Description section ....................................................................................................... 1
•
Changed the Stability Boundary Conditions graph .............................................................................................................. 13
•
Added the Phase Margin vs Capacitive Load VKA = VREF (1.25 V), TA= 25°C graph ........................................................... 14
•
Added the Phase Margin vs Capacitive Load VKA = 2.50 V, TA= 25°C graph...................................................................... 14
•
Added the Phase Margin vs Capacitive Load VKA = 5.00 V, TA= 25°C graph...................................................................... 15
•
Added Documentation Support section ............................................................................................................................... 25
•
Added Receiving Notification of Documentation Updates section ...................................................................................... 25
•
Added Community Resources section ................................................................................................................................ 25
Changes from Revision U (January 2014) to Revision V
•
Page
Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section. ..................................................................................................................... 1
Changes from Revision T (June 2007) to Revision U
Page
•
Updated document to new TI data sheet format. ................................................................................................................... 1
•
Deleted Ordering Information table. ....................................................................................................................................... 1
•
Updated Features. .................................................................................................................................................................. 1
2
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Copyright © 1996–2018, Texas Instruments Incorporated
Product Folder Links: TLV431 TLV431A TLV431B
TLV431, TLV431A, TLV431B
www.ti.com
SLVS139X – JULY 1996 – REVISED MAY 2018
5 Pin Configuration and Functions
DBV (SOT-23-5) PACKAGE
(TOP VIEW)
D (SOIC) PACKAGE
(TOP VIEW)
CATHODE
ANODE
ANODE
NC
1
8
2
7
3
6
4
5
REF
ANODE
ANODE
NC
NC 1
∗ 2
CATHODE 3
ANODE
ANODE
4
REF
REF
1
CATHODE
2
3
DCK (SC-70) PACKAGE
(TOP VIEW)
CATHODE
CATHODE
NC
REF
ANODE
2
5
1
6
2
5
3
4
LP (TO-92/TO-226) PACKAGE
(TOP VIEW)
ANODE
NC
NC
CATHODE
ANODE
REF
REF
1
ANODE
NC − No internal connection
∗ For TLV431, TLV431A: NC − No internal connection
∗ For TLV431B: Pin 2 is attached to Substrate and
must be connected to ANODE or left open.
PK (SOT-89) PACKAGE
(TOP VIEW)
3
DBZ (SOT-23-3) PACKAGE
(TOP VIEW)
NC − No internal connection
Pin Functions
PIN
NAME
TYPE
DESCRIPTION
DBZ
DBV
PK
D
LP
DCK
CATHODE
2
3
3
1
1
1
I/O
REF
1
4
1
8
3
3
I
Threshold relative to common anode
ANODE
3
5
2
2, 3, 6, 7
2
6
O
Common pin, normally connected to ground
NC
—
1
—
4, 5
—
2, 4, 5
I
No Internal Connection
*
—
2
—
—
—
—
I
Substrate Connection
Shunt Current/Voltage input
Copyright © 1996–2018, Texas Instruments Incorporated
Product Folder Links: TLV431 TLV431A TLV431B
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TLV431, TLV431A, TLV431B
SLVS139X – JULY 1996 – REVISED MAY 2018
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
VKA
Cathode voltage (2)
IK
Continuous cathode current
Iref
Reference current
MAX
UNIT
7
V
–20
20
mA
–0.05
3
mA
150
°C
150
°C
Operating virtual junction temperature
Tstg
(1)
(2)
Storage temperature
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Voltage values are with respect to the anode terminal, unless otherwise noted.
6.2 ESD Ratings
PARAMETER
Electrostatic
discharge
V(ESD)
(1)
(2)
DEFINITION
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VKA
Cathode voltage
VREF
6
V
IK
Cathode current
0.1
15
mA
TA
Operating free-air temperature
TLV431_C
0
70
TLV431_I
–40
85
TLV431_Q
–40
125
°C
6.4 Thermal Information
TLV431x
THERMAL METRIC (1)
DCK
D
PK
DBV
DBZ
LP
6 PINS
8 PINS
3 PINS
5 PINS
3 PINS
3 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
87
97
52
206
206
140
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
259
39
9
131
76
55
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
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Copyright © 1996–2018, Texas Instruments Incorporated
Product Folder Links: TLV431 TLV431A TLV431B
TLV431, TLV431A, TLV431B
www.ti.com
SLVS139X – JULY 1996 – REVISED MAY 2018
6.5 Electrical Characteristics for TLV431
at 25°C free-air temperature (unless otherwise noted)
PARAMETER
TLV431
TEST CONDITIONS
TA = 25°C
VREF
VKA = VREF,
IK = 10 mA
Reference voltage
VREF(dev)
DVREF
VREF deviation over full temperature
range (2)
TA = full range (1)
(see Figure 22)
VKA = VREF, IK = 10 mA (1)
(see Figure 22)
MIN
TYP
MAX
1.222
1.24
1.258
TLV431C
1.21
1.27
TLV431I
1.202
1.278
TLV431Q
1.194
UNIT
V
1.286
TLV431C
4
12
TLV431I
6
20
TLV431Q
11
31
mV
Ratio of VREF change in cathode
voltage change
VKA = VREF to 6 V, IK = 10 mA
(see Figure 23)
–1.5
–2.7
mV/V
Iref
Reference terminal current
IK = 10 mA, R1 = 10 kΩ,
R2 = open
(see Figure 23)
0.15
0.5
µA
0.05
0.3
Iref deviation over full temperature
range (2)
IK = 10 mA, R1 = 10 kΩ,
R2 = open (1)
(see Figure 23)
TLV431C
Iref(dev)
TLV431I
0.1
0.4
TLV431Q
0.15
0.5
DVKA
TLV431C/I
55
80
TLV431Q
55
100
0.001
0.1
µA
0.25
0.4
Ω
IK(min)
Minimum cathode current for
regulation
VKA = VREF (see Figure 22)
IK(off)
Off-state cathode current
VREF = 0, VKA = 6 V (see Figure 24)
|zKA|
Dynamic impedance (3)
VKA = VREF, f ≤ 1 kHz, IK = 0.1 mA to 15 mA
(see Figure 22)
(1)
(2)
µA
µA
Full temperature ranges are –40°C to 125°C for TLV431Q, –40°C to 85°C for TLV431I, and 0°C to 70°C for TLV431C.
The deviation parameters VREF(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage, αVREF, is defined as:
VREF(dev )
æ
ö
6
ç
÷ ´ 10
ppm ö è VREF (TA = 25°C ) ø
æ
aVREF ç
÷=
DTA
è °C ø
where ΔTA is the rated operating free-air temperature range of the device.
αVREF can be positive or negative, depending on whether minimum VREF or maximum VREF, respectively, occurs at the lower
temperature.
(3)
DVKA
The dynamic impedance is defined as zka =
DIK
spacer
When the device is operating with two external resistors (see Figure 23), the total dynamic impedance of the circuit is defined as:
z ka
¢=
DV
DI
»
z ka
æ
è
´ ç1 +
R1 ö
÷
R2 ø
Copyright © 1996–2018, Texas Instruments Incorporated
Product Folder Links: TLV431 TLV431A TLV431B
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6.6 Electrical Characteristics for TLV431A
at 25°C free-air temperature (unless otherwise noted)
PARAMETER
TLV431A
TEST CONDITIONS
TA = 25°C
VREF
VKA = VREF,
IK = 10 mA
Reference voltage
VREF(dev)
DVREF
TA = full range (1)
(see Figure 22)
VKA = VREF, IK = 10 mA (1)
(see Figure 22)
VREF deviation over full
temperature range (2)
MIN
TYP
MAX
1.228
1.24
1.252
TLV431AC
1.221
1.259
TLV431AI
1.215
1.265
TLV431AQ
1.209
UNIT
V
1.271
TLV431AC
4
12
TLV431AI
6
20
TLV431AQ
11
31
mV
Ratio of VREF change in cathode
voltage change
VKA = VREF to 6 V, IK = 10 mA
(see Figure 23)
–1.5
–2.7
mV/V
Iref
Reference terminal current
IK = 10 mA, R1 = 10 kΩ,
R2 = open
(see Figure 23)
0.15
0.5
µA
TLV431AC
0.05
0.3
Iref(dev)
Iref deviation over full temperature IK = 10 mA, R1 = 10 kΩ,
range (2)
R2 = open (1) (see Figure 23)
TLV431AI
0.1
0.4
TLV431AQ
0.15
0.5
DVKA
TLV431AC/AI
55
80
TLV431AQ
55
100
0.001
0.1
µA
0.25
0.4
Ω
IK(min)
Minimum cathode current for
regulation
VKA = VREF (see Figure 22)
IK(off)
Off-state cathode current
VREF = 0, VKA = 6 V (see Figure 24)
|zKA|
Dynamic impedance (3)
VKA = VREF, f ≤ 1 kHz, IK = 0.1 mA to 15 mA
(see Figure 22)
(1)
(2)
µA
µA
Full temperature ranges are –40°C to 125°C for TLV431Q, –40°C to 85°C for TLV431I, and 0°C to 70°C for TLV431C.
The deviation parameters VREF(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage, αVREF, is defined as:
VREF(dev )
æ
ö
6
ç
÷ ´ 10
ppm ö è VREF (TA = 25°C ) ø
æ
aVREF ç
÷=
DTA
è °C ø
where ΔTA is the rated operating free-air temperature range of the device.
αVREF can be positive or negative, depending on whether minimum VREF or maximum VREF, respectively, occurs at the lower
temperature.
(3)
DVKA
The dynamic impedance is defined as zka =
DIK
spacer
When the device is operating with two external resistors (see Figure 23), the total dynamic impedance of the circuit is defined as:
z ka
6
¢=
DV
DI
»
z ka
æ
è
´ ç1 +
R1 ö
÷
R2 ø
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Product Folder Links: TLV431 TLV431A TLV431B
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SLVS139X – JULY 1996 – REVISED MAY 2018
6.7 Electrical Characteristics for TLV431B
at 25°C free-air temperature (unless otherwise noted)
PARAMETER
TLV431B
TEST CONDITIONS
TA = 25°C
VREF
VKA = VREF,
IK = 10 mA
Reference voltage
VREF(dev)
DVREF
VREF deviation over full temperature
range (2)
TA = full range (1)
(see Figure 22)
VKA = VREF , IK = 10 mA (1)
(see Figure 22)
Ratio of VREF change in cathode
voltage change
VKA = VREF to 6 V, IK = 10 mA
(see Figure 23)
Iref
Reference terminal current
IK = 10 mA, R1 = 10 kΩ,
R2 = open
(see Figure 23)
Iref(dev)
Iref deviation over full temperature
range (2)
IK = 10 mA, R1 = 10 kΩ,
R2 = open (3)
(see Figure 23)
DVKA
1.234
1.24
1.246
1.253
TLV431BI
1.224
1.259
TLV431BQ
1.221
UNIT
V
1.265
TLV431BC
4
12
TLV431BI
6
20
TLV431BQ
11
31
–1.5
–2.7
mV/V
0.1
0.5
µA
TLV431BC
0.05
0.3
TLV431BI
0.1
0.4
TLV431BQ
0.15
0.5
55
100
µA
0.001
0.1
µA
0.25
0.4
Ω
VKA = VREF (see Figure 22)
IK(off)
Off-state cathode current
VREF = 0, VKA = 6 V (see Figure 24)
|zKA|
Dynamic impedance (4)
VKA = VREF, f ≤ 1 kHz, IK = 0.1 mA to 15 mA
(see Figure 22)
(4)
MAX
1.227
Minimum cathode current for
regulation
(3)
TYP
TLV431BC
IK(min)
(1)
(2)
MIN
mV
µA
Full temperature ranges are –40°C to 125°C for TLV431Q, –40°C to 85°C for TLV431I, and 0°C to 70°C for TLV431C.
The deviation parameters VREF(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over
the rated temperature range. The average full-range temperature coefficient of the reference input voltage, αVREF, is defined as:
VREF(dev )
æ
ö
6
ç
÷ ´ 10
ppm ö è VREF (TA = 25°C ) ø
æ
aVREF ç
÷=
DTA
è °C ø
where ΔTA is the rated operating free-air temperature range of the device.
αVREF can be positive or negative, depending on whether minimum VREF or maximum VREF, respectively, occurs at the lower
temperature.
Full temperature ranges are –40°C to 125°C for TLV431Q, –40°C to 85°C for TLV431I, and 0°C to 70°C for TLV431C.
DVKA
The dynamic impedance is defined as zka =
DIK
spacer
When the device is operating with two external resistors (see Figure 23), the total dynamic impedance of the circuit is defined as:
z ka
¢=
DV
DI
»
z ka
æ
è
´ ç1 +
R1 ö
÷
R2 ø
Copyright © 1996–2018, Texas Instruments Incorporated
Product Folder Links: TLV431 TLV431A TLV431B
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6.8 Typical Characteristics
Operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions
table are not implied.
250
1.254
IK = 10 mA
R1 = 10 kΩ
R2 = Open
IK = 10 mA
I ref − Reference Input Current − nA
V ref − Reference Voltage − V
1.252
1.250
1.248
1.246
1.244
1.242
1.240
1.238
− 50
− 25
0
25
50
75
100
125
200
150
100
50
− 50
150
− 25
TJ − Junction Temperature − °C
150
Figure 2. Reference Input Current vs
Junction Temperature (for TLV431 and TLV431A)
Figure 1. Reference Voltage vs
Junction Temperature
15
250
VKA = VREF
TA = 25°C
IK = 10 mA
R1 = 10 kΩ
R2 = Open
230
210
10
I K − Cathode Current − mA
I ref − Reference Input Current − nA
0
25
50
75 100 125
TJ − Junction Temperature − °C
190
170
150
130
110
90
5
0
−5
−10
70
50
−50
−25
0
25
50
75
100
125
−15
−1
150
TJ − Junction Temperature − °C
200
1.5
VKA = VREF
TA = 25°C
150
I K − Cathode Current − µ A
Ik(min)
250
100
50
0
−50
− 100
− 150
− 200
-20
0
20
40
60
80
Temperature (qC)
100
120
140
Figure 5. Minimum Cathode Current vs Temperature
8
0
0.5
1
VKA − Cathode Voltage − V
Figure 4. Cathode Current vs
Cathode Voltage
Figure 3. Reference Input Current vs
Junction Temperature (for TLV431B)
120
115
110
105
100
95
90
85
80
75
70
65
60
55
-40
−0.5
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− 250
−1
− 0.5
0
0.5
1
VKA − Cathode Voltage − V
1.5
Figure 6. Cathode Current vs
Cathode Voltage
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Product Folder Links: TLV431 TLV431A TLV431B
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SLVS139X – JULY 1996 – REVISED MAY 2018
Typical Characteristics (continued)
Operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions
table are not implied.
3000
VKA = 5 V
VREF = 0
I K(off) − Off-State Cathode Current − nA
I K(off) − Off-State Cathode Current − nA
40
30
20
10
0
− 50
−25
0
25
50
75
100
125
VKA = 6 V
VREF = 0
2500
2000
1500
1000
500
0
−50
150
−25
Figure 7. Off-State Cathode Current vs
Junction Temperature (for TLV431 and TLV431A)
∆V ref/ ∆V KA − Ratio of Delta Reference Voltage
to Delta Cathode Voltage − mV/V
∆V ref/ ∆V KA − Ratio of Delta Reference Voltage
to Delta Cathode Voltage − mV/V
50
75
100
125
150
0.0
0
− 0.1
− 0.2
− 0.3
− 0.4
− 0.5
− 0.6
− 0.8
− 50
25
Figure 8. Off-State Cathode Current vs
Junction Temperature (for TLV431B)
0
− 0.7
0
TJ − Junction Temperature − °C
TJ − Junction Temperature − °C
IK = 10 mA
∆VKA = VREF to 6 V
− 25
0
25
50
75
100
125
150
−0.1
IK = 10 mA
∆VKA = VREF to 6 V
−0.2
−0.3
−0.4
−0.5
−0.6
−0.7
−0.8
−0.9
−1
−1.0
−50
−25
TJ − Junction Temperature − °C
Figure 9. Ratio of Delta Reference Voltage to
Delta Cathode Voltage vs
Junction Temperature (for TLV431 and TLV431A)
0
25
50
75
100
125
150
TJ − Junction Temperature − °C
Figure 10. Ratio of Delta Reference Voltage to
Delta Cathode Voltage vs
Junction Temperature (for TLV431B)
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Typical Characteristics (continued)
Operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions
table are not implied.
0.025
V ref − %
Percentage Change in Vref
IK = 1 mA
% Change (avg)
−0.025
% Change (3δ )
−0.05
−0.075
−0.1
% Change (−3δ)
−0.125
0
10
20
30
40
50
60
Operating Life at 55°C − kh‡
‡
Extrapolated from life-test data taken at 125°C; the activation energy assumed
is 0.7 eV.
Figure 11. Percentage Change in VREF vs
Operating Life at 55°C
Vn − Equivalent Input Noise Voltage − nV/ Hz
3V
VKA = VREF
IK = 1 mA
TA = 25°C
1 kΩ
300
+
750 Ω
470 µF
2200 µF
+
250
TLV431
or
TLV431A
or
TLV431B
200
TLE2027
+
_
TP
820 Ω
160 kΩ
160 Ω
TEST CIRCUIT FOR EQUIVALENT INPUT NOISE VOLTAGE
150
10
100
1k
10k
100k
f − Frequency − Hz
Figure 12. Equivalent Input Noise Voltage
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Typical Characteristics (continued)
Operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions
table are not implied.
EQUIVALENT INPUT NOISE VOLTAGE
OVER A 10-s PERIOD
Vn − Equivalent Input Noise Voltage − µ V
10
f = 0.1 Hz to 10 Hz
IK = 1 mA
TA = 25°C
8
6
4
2
0
−2
−4
−6
−8
−10
0
2
4
6
8
10
t − Time − s
3V
1 kΩ
+
470 µF
750 Ω
0.47 µF
2200 µF
+
820 Ω
TLV431
or
TLV431A
or
TLV431B
TLE2027
10 kΩ
+
_
160 kΩ
10 kΩ
TLE2027
+
_
2.2 µF
+
1 µF
TP
CRO 1 MΩ
33 kΩ
16 Ω
0.1 µF
33 kΩ
TEST CIRCUIT FOR 0.1-Hz TO 10-Hz EQUIVALENT NOISE VOLTAGE
Figure 13. Equivalent Noise Voltage
over a 10-s Period
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Typical Characteristics (continued)
80
0°
IK = 10 mA
TA = 25°C
70
36°
60
72°
50
108°
40
144°
30
180°
Phase Shift
A V − Small-Signal Voltage Gain/Phase Margin − dB
Operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions
table are not implied.
SMALL-SIGNAL VOLTAGE GAIN/PHASE MARGIN
vs
FREQUENCY µF
Output
IK
6.8 kΩ
180 Ω
10
5V
4.3 kΩ
20
10
GND
0
−10
−20
100
TEST CIRCUIT FOR VOLTAGE GAIN
AND PHASE MARGIN
1k
10k
100k
1M
f − Frequency − Hz
Figure 14. Voltage Gain and Phase Margin
REFERENCE IMPEDANCE
vs
FREQUENCY
100
|z ka | − Reference Impedance − Ω
IK = 0.1 mA to 15 mA
TA = 25°C
100 Ω
Output
10
IK
100 Ω
1
−
+
GND
0.1
TEST CIRCUIT FOR REFERENCE IMPEDANCE
0.01
1k
10k
100k
1M
10M
f − Frequency − Hz
Figure 15. Reference Impedance vs Frequency
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Typical Characteristics (continued)
Operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions
table are not implied.
PULSE RESPONSE 1
3.5
3
Input and Output Voltage − V
R = 18 kΩ
TA = 25°C
Input
18 kΩ
Output
2.5
Ik
2
1.5
Pulse
Generator
f = 100 kHz
Output
50 Ω
1
GND
0.5
0
TEST CIRCUIT FOR PULSE RESPONSE 1
− 0.5
0
1
2
3
4
5
6
7
8
t − Time − µs
Figure 16. Pulse Response 1
PULSE RESPONSE 2
3.5
3
Input and Output Voltage − V
R = 1.8 kΩ
TA = 25°C
Input
1.8 kΩ
Output
2.5
IK
2
1.5
Pulse
Generator
f = 100 kHz
Output
50 Ω
1
GND
0.5
0
TEST CIRCUIT FOR PULSE RESPONSE 2
−0.5
0
1
2
3
4
5
6
7
8
t − Time − µs
Figure 17. Pulse Response 2
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Typical Characteristics (continued)
Operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions
table are not implied.
STABILITY BOUNDARY CONDITION Á
150 Ÿ
(for TLV431A)
IK
15
TA = 25°C
+
IK = 15 mA Max
CL
IK í Cathode Current í mA
9
Stable
Vbat
í
VKA = VREF
12
Stable
TEST CIRCUIT FOR VKA = VREF
150 Ÿ
VKA = 2 V
IK
6
R1 = 10 kŸ
CL
R2
3
+
í
Vbat
VKA = 3 V
0
0.001
0.01
0.1
1
10
TEST CIRCUIT FOR VKA = 2 V, 3 V
CL í Load Capacitance í µF
‡
The areas under the curves represent conditions that may cause the device to oscillate. For VKA = 2-V and 3-V curves, R2 and Vbat were
adjusted to establish the initial VKA and IK conditions with CL = 0. Vbat and CL then were adjusted to determine the ranges of stability.
Figure 18. Stability Boundary Conditions
IK
Figure 19. Phase Margin vs Capacitive Load
VKA = VREF (1.25 V), TA= 25°C
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Typical Characteristics (continued)
Operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions
table are not implied.
IK
Figure 20. Phase Margin vs Capacitive Load
VKA = 2.50 V, TA= 25°C
IK
Figure 21. Phase Margin vs Capacitive Load
VKA = 5.00 V, TA= 25°C
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7 Parameter Measurement Information
VO
Input
IK
VREF
Figure 22. Test Circuit for VKA = VREF, VO = VKA = VREF
xxx
xxx
xxx
Input
VO
IK
R1
R2
Iref
VREF
Figure 23. Test Circuit for VKA > VREF, VO = VKA = VREF × (1 + R1/R2) + Iref × R1
xxx
xxx
xxx
Input
VO
IK(off)
Figure 24. Test Circuit for IK(off)
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8 Detailed Description
8.1 Overview
TLV431 is a low power counterpart to TL431, having lower reference voltage (1.24 V vs 2.5 V) for lower voltage
adjustability and lower minimum cathode current (Ik(min)= 100 µA vs 1 mA). Like TL431, TLV431 is used in
conjunction with it's key components to behave as a single voltage reference, error amplifier, voltage clamp, or
comparator with integrated reference.
TLV431 can be operated and adjusted to cathode voltages from 1.24 V to 6 V, making this part optimum for a
wide range of end equipments in industrial, auto, telecom, and computing. For this device to behave as a shunt
regulator or error amplifier, > 100 µA (Imin(max)) must be supplied in to the cathode pin. Under this condition,
feedback can be applied from the Cathode and Ref pins to create a replica of the internal reference voltage.
Various reference voltage options can be purchased with initial tolerances (at 25°C) of 0.5%, 1%, and 1.5%.
These reference options are denoted by B (0.5%), A (1.0%), and blank (1.5%) after the TLV431.
The TLV431xC devices are characterized for operation from 0°C to 70°C, the TLV431xI devices are
characterized for operation from –40°C to 85°C, and the TLV431xQ devices are characterized for operation from
–40°C to 125°C.
8.2 Functional Block Diagram
CATHODE
+
REF
_
Vref
ANODE
8.3 Feature Description
TLV431 consists of an internal reference and amplifier that outputs a sink current base on the difference between
the reference pin and the virtual internal pin. The sink current is produced by an internal darlington pair.
When operated with enough voltage headroom (≥ 1.24 V) and cathode current (Ika), TLV431 forces the
reference pin to 1.24 V. However, the reference pin can not be left floating, as it requires Iref ≥ 0.5 µA (see the
Functional Block Diagram). This is because the reference pin is driven into an npn, which requires a base current
to operate properly.
When feedback is applied from the Cathode and Reference pins, TLV431 behaves as a Zener diode, regulating
to a constant voltage dependent on current being supplied into the cathode. This is due to the internal amplifier
and reference entering the proper operating regions. The same amount of current required in the above feedback
situation must be applied to this device in open-loop, servo, or error-amplifying implementations for it to be in the
proper linear region giving TLV431 enough gain.
Unlike many linear regulators, TLV431 is internally compensated to be stable without an output capacitor
between the cathode and anode. However, if it is desired to use an output capacitor Figure 18 can be used as a
guide to assist in choosing the correct capacitor to maintain stability.
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8.4 Device Functional Modes
8.4.1 Open Loop (Comparator)
When the cathode/output voltage or current of TLV431 is not being fed back to the reference/input pin in any
form, this device is operating in open loop. With proper cathode current (Ika) applied to this device, TLV431 will
have the characteristics shown in Figure 6. With such high gain in this configuration, TLV431 is typically used as
a comparator. With the reference integrated makes TLV431 the preferred choice when users are trying to
monitor a certain level of a single signal.
8.4.2 Closed Loop
When the cathode/output voltage or current of TLV431 is being fed back to the reference/input pin in any form,
this device is operating in closed loop. The majority of applications involving TLV431 use it in this manner to
regulate a fixed voltage or current. The feedback enables this device to behave as an error amplifier, computing
a portion of the output voltage and adjusting it to maintain the desired regulation. This is done by relating the
output voltage back to the reference pin in a manner to make it equal to the internal reference voltage, which can
be accomplished through resistive or direct feedback.
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9 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
Figure 25 shows the TLV431, TLV431A, or TLV431B used in a 3.3-V isolated flyback supply. Output voltage VO
can be as low as reference voltage VREF (1.24 V ± 1%). The output of the regulator, plus the forward voltage
drop of the optocoupler LED (1.24 + 1.4 = 2.64 V), determine the minimum voltage that can be regulated in an
isolated supply configuration. Regulated voltage as low as 2.7 Vdc is possible in the topology shown in
Figure 25.
The 431 family of devices are prevalent in these applications, being designers go to choice for secondary side
regulation. Due to this prevalence, this section will further go on to explain operation and design in both states of
TLV431 that this application will see, open loop (Comparator + Vref) and closed loop (Shunt Regulator).
Further information about system stability and using a TLV431 device for compensation can be found in the
application note Compensation Design With TL431 for UCC28600 (SLUA671).
~
VI
120 V
−
+
P
~
VO
3.3 V
P
P
Gate Drive
VCC
Controller
VFB
TLV431
or
TLV431A
or
TLV431B
Current
Sense
GND
P
P
P
P
Figure 25. Flyback With Isolation Using TLV431, TLV431A, or TLV431B
as Voltage Reference and Error Amplifier
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9.2 Typical Applications
9.2.1 Comparator With Integrated Reference (Open Loop)
Vsup
Rsup
Vout
CATHODE
R1
RIN
VIN
REF
VL
+
R2
1.24 V
ANODE
Figure 26. Comparator Application Schematic
9.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input Voltage Range
0 V to 5 V
Input Resistance
10 kΩ
Supply Voltage
5V
Cathode Current (Ik)
500 µA
Output Voltage Level
~1 V - Vsup
Logic Input Thresholds VIH/VIL
VL
9.2.1.2 Detailed Design Procedure
When using TLV431 as a comparator with reference, determine the following:
• Input voltage range
• Reference voltage accuracy
• Output logic input high and low level thresholds
• Current source resistance
9.2.1.2.1 Basic Operation
In the configuration shown in Figure 26 TLV431 will behave as a comparator, comparing the Vref pin voltage to
the internal virtual reference voltage. When provided a proper cathode current (Ik), TLV431 will have enough
open-loop gain to provide a quick response. With the TLV431's maximum operating current (Imin(max)) being 100
µA and up to 150 µA over temperature, operation below that could result in low gain, leading to a slow response.
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9.2.1.2.2 Overdrive
Slow or inaccurate responses can also occur when the reference pin is not provided enough overdrive voltage.
This is the amount of voltage that is higher than the internal virtual reference. The internal virtual reference
voltage will be within the range of 1.24 V ±(0.5%, 1.0%, or 1.5%) depending on which version is being used.
The more overdrive voltage provided, the faster the TLV431 will respond. This can be seen in Figure 27 and
Figure 28 where it displays the output responses to various input voltages.
For applications where TLV431 is being used as a comparator, it is best to set the trip point to greater than the
positive expected error (that is, +1.0% for the A version). For fast response, setting the trip point to > 10% of the
internal Vref should suffice.
For minimal voltage drop or difference from Vin to the ref pin, TI recommends using an input resistor < 10 kΩ to
provide Iref.
9.2.1.2.3 Output Voltage and Logic Input Level
In order for TLV431 to properly be used as a comparator, the logic output must be readable by the receiving
logic device. This is accomplished by knowing the input high and low level threshold voltage levels, typically
denoted by VIH and VIL.
As seen in Figure 27, TLV431's output low level voltage in open-loop/comparator mode is approximately 1 V,
which is sufficient for some 3.3-V supplied logic. However, this would not work for 2.5-V or 1.8-V supplied logic.
To accommodate this a resistive divider can be tied to the output to attenuate the output voltage to a voltage
legible to the receiving low voltage logic device.
TLV431's output high voltage is approximately Vsup due to TLV431 being open-collector. If Vsup is much higher
than the receiving logic's maximum input voltage tolerance, the output must be attenuated to accommodate the
outgoing logic's reliability.
When using a resistive divider on the output, be sure to make the sum of the resistive divider (R1 and R2 in
Figure 26) is much greater than Rsup in order to not interfere with TLV431's ability to pull close to Vsup when
turning off.
9.2.1.2.3.1 Input Resistance
TLV431 requires an input resistance in this application to source the reference current (Iref) needed from this
device to be in the proper operating regions while turning on. The actual voltage seen at the ref pin will be Vref =
Vin – Iref × Rin. Because the Iref can be as high as 0.5 µA, TI recommends using a resistance small enough that
will mitigate the error that Iref creates from Vin.
12
11
10
9
8
7
6
5
4
3
2
1
0
-1
-2
-0.4
10
Vin~1.24V (+/-5%)
Vo(Vin=1.18V)
Vo(Vin=1.24V)
Vo(Vin=1.30V)
9
Vo(Vin=5.0V)
Vin=5.0V
8
7
6
Voltage (V)
Voltage (V)
9.2.1.3 Application Curves
5
4
3
2
1
0
-1
-0.2
0
0.2
0.4
Time (ms)
0.6
-2
-0.4
0.8
-0.2
D001
Figure 27. Output Response With Small Overdrive
Voltages
0
0.2
0.4
Time (ms)
0.6
0.8
D001
Figure 28. Output Response With Large Overdrive Voltage
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9.2.2 Shunt Regulator/Reference
VSUP
RSUP
VO = ( 1 +
R1
0.1%
CATHODE
REF
Vr ef
R1
) Vref
R2
R2
0.1%
TL431
ANODE
CL
Figure 29. Shunt Regulator Schematic
9.2.2.1 Design Requirements
For this design example, use the parameters listed in Table 2 as the input parameters.
Table 2. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Reference Initial Accuracy
1.0%
Supply Voltage
6V
Cathode Current (Ik)
1 mA
Output Voltage Level
1.24 V - 6 V
Load Capacitance
100 nF
Feedback Resistor Values and Accuracy (R1 and R2)
10 kΩ
9.2.2.2 Detailed Design Procedure
When using TLV431 as a Shunt Regulator, determine the following:
• Input voltage range
• Temperature range
• Total accuracy
• Cathode current
• Reference initial accuracy
• Output capacitance
9.2.2.2.1
Programming Output/Cathode Voltage
To program the cathode voltage to a regulated voltage a resistive bridge must be shunted between the cathode
and anode pins with the mid point tied to the reference pin. This can be seen in Figure 29, with R1 and R2 being
the resistive bridge. The cathode/output voltage in the shunt regulator configuration can be approximated by the
equation shown in Figure 29. The cathode voltage can be more accurately determined by taking the cathode
current in to account
VO = ( 1 + R1 / R2) × Vref – Iref × R1
(1)
For Equation 1 to be valid, TLV431 must be fully biased so that it has enough open-loop gain to mitigate any
gain error. This can be done by meeting the Imin spec denoted in Recommended Operating Conditions table.
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9.2.2.2.2 Total Accuracy
When programming the output above unity gain (Vka = Vref), TLV431 is susceptible to other errors that may
effect the overall accuracy beyond Vref. These errors include:
•
•
•
•
R1 and R2 accuracies
VI(dev) – Change in reference voltage over temperature
ΔVref / ΔVKA – Change in reference voltage to the change in cathode voltage
|zKA| – Dynamic impedance, causing a change in cathode voltage with cathode current
Worst-case cathode voltage can be determined taking all of the variables in to account. Application note Setting
the Shunt Voltage on an Adjustable Shunt Regulator (SLVA445) assists designers in setting the shunt voltage to
achieve optimum accuracy for this device.
9.2.2.2.3 Stability
Though TLV431 is stable with no capacitive load, the device that receives the shunt regulator's output voltage
could present a capacitive load that is within the TLV431 region of stability, shown in Figure 18. Also, designers
may use capacitive loads to improve the transient response or for power supply decoupling.
Voltage (V)
9.2.2.3 Application Curve
6.5
6
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-0.5
-1
Vsup
Vka=Vref
R1=10k: & R2=10k:
0
1
2
3
4
5
Time (Ps)
6
7
8
9
D001
Figure 30. TLV431 Start-Up Response
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10 Power Supply Recommendations
When using TLV431 as a Linear Regulator to supply a load, designers will typically use a bypass capacitor on
the output/cathode pin. When doing this, be sure that the capacitance is within the stability criteria shown in
Figure 18.
To not exceed the maximum cathode current, be sure that the supply voltage is current limited. Also, be sure to
limit the current being driven into the Ref pin, as not to exceed the absolute maximum rating.
For applications shunting high currents, pay attention to the cathode and anode trace lengths, adjusting the width
of the traces to have the proper current density.
11 Layout
11.1 Layout Guidelines
Place decoupling capacitors as close to the device as possible. Use appropriate widths for traces when shunting
high currents to avoid excessive voltage drops.
11.2 Layout Example
DBZ
(TOP VIEW)
Rref
Vin
REF
1
Rsup
Vsup
ANODE
3
CATHODE
GND
2
CL
GND
Figure 31. DBZ Layout Example
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
• Compensation Design With TL431 for UCC28600 (SLUA671)
• Setting the Shunt Voltage on an Adjustable Shunt Regulator (SLVA445)
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 3. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TLV431
Click here
Click here
Click here
Click here
Click here
TLV431A
Click here
Click here
Click here
Click here
Click here
TLV431B
Click here
Click here
Click here
Click here
Click here
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
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PACKAGE OPTION ADDENDUM
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14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TLV431ACDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
(YAC6, YACC, YACI,
YACN)
(YACG, YACL, YACS)
TLV431ACDBVRE4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
YACI
Samples
TLV431ACDBVRG4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
YACI
Samples
TLV431ACDBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
(YAC6, YACC, YACI)
Samples
Samples
(YACG, YACL, YACS)
TLV431ACDBVTG4
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
TLV431ACDBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
0 to 70
YACI
Samples
Level-1-260C-UNLIM
0 to 70
(YAC6, YAC8, YACB)
Samples
(YAC3, YACS, YACU)
TLV431ACDBZRG4
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
0 to 70
YAC6
YACS
Samples
TLV431ACLP
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
0 to 70
V431AC
Samples
TLV431ACLPE3
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
0 to 70
V431AC
Samples
TLV431ACLPR
ACTIVE
TO-92
LP
3
2000
RoHS & Green
SN
N / A for Pkg Type
0 to 70
V431AC
Samples
TLV431AID
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TY431A
Samples
TLV431AIDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
(YAI6, YAIC, YAII,
YAIN)
(YAIG, YAIL, YAIS)
TLV431AIDBVRE4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
YAII
Samples
TLV431AIDBVRG4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
YAII
Samples
TLV431AIDBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
(YAI6, YAIC, YAII)
Samples
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
(YAIG, YAIL, YAIS)
TLV431AIDBVTG4
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
TLV431AIDBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
YAII
Samples
Level-1-260C-UNLIM
-40 to 85
(YAI6, YAI8, YAIB)
Samples
(YAI3, YAIS, YAIU)
TLV431AIDBZRG4
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
YAI6
YAIS
Samples
TLV431AIDE4
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TY431A
Samples
TLV431AIDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TY431A
Samples
TLV431AIDRE4
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TY431A
Samples
TLV431AILP
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
V431AI
Samples
TLV431AILPE3
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
V431AI
Samples
TLV431AILPM
ACTIVE
TO-92
LP
3
2000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
V431AI
Samples
TLV431AILPR
ACTIVE
TO-92
LP
3
2000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
V431AI
Samples
TLV431AILPRE3
ACTIVE
TO-92
LP
3
2000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
V431AI
Samples
TLV431AQPK
ACTIVE
SOT-89
PK
3
1000
RoHS & Green
SN
Level-2-260C-1 YEAR
-40 to 125
VA
Samples
TLV431AQPKG3
ACTIVE
SOT-89
PK
3
1000
RoHS & Green
SN
Level-2-260C-1 YEAR
-40 to 125
VA
Samples
TLV431BCDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
0 to 70
(Y3GG, Y3GJ, Y3GU)
Samples
TLV431BCDBVRG4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
Y3GG
Samples
TLV431BCDBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
0 to 70
(Y3GG, Y3GJ, Y3GU)
Samples
TLV431BCDBVTG4
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
Y3GG
Samples
TLV431BCDBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
0 to 70
(Y3G3, Y3GS, Y3GU)
Samples
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
NIPDAUAG
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TLV431BCDBZRG4
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
Level-1-260C-UNLIM
0 to 70
(Y3G3, Y3GS, Y3GU)
Samples
TLV431BCDBZT
ACTIVE
SOT-23
DBZ
3
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
0 to 70
(Y3GS, Y3GU)
Samples
TLV431BCDCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
YEU
Samples
TLV431BCDCKT
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
YEU
Samples
TLV431BCLP
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
0 to 70
TV431B
Samples
TLV431BCLPR
ACTIVE
TO-92
LP
3
2000
RoHS & Green
SN
N / A for Pkg Type
0 to 70
TV431B
Samples
TLV431BCPK
ACTIVE
SOT-89
PK
3
1000
RoHS & Green
SN
Level-2-260C-1 YEAR
0 to 70
VE
Samples
TLV431BIDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
(Y3FJ, Y3FU)
Samples
TLV431BIDBVRG4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(Y3FJ, Y3FU)
Samples
TLV431BIDBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
(Y3FJ, Y3FU)
Samples
TLV431BIDBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
(Y3F3, Y3FS, Y3FU)
Samples
TLV431BIDBZRG4
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
(Y3F3, Y3FS)
Samples
TLV431BIDBZT
ACTIVE
SOT-23
DBZ
3
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
(Y3FS, Y3FU)
Samples
TLV431BIDCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
YFU
Samples
TLV431BIDCKT
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
YFU
Samples
TLV431BILP
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
TY431B
Samples
TLV431BILPR
ACTIVE
TO-92
LP
3
2000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
TY431B
Samples
TLV431BILPRE3
ACTIVE
TO-92
LP
3
2000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
TY431B
Samples
TLV431BIPK
ACTIVE
SOT-89
PK
3
1000
RoHS & Green
SN
Level-2-260C-1 YEAR
-40 to 85
VF
Samples
TLV431BQDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
(Y3HJ, Y3HU)
Samples
TLV431BQDBVRE4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
(Y3HJ, Y3HU)
Samples
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
NIPDAU | SN
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TLV431BQDBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
Level-1-260C-UNLIM
-40 to 125
(Y3HJ, Y3HU)
Samples
TLV431BQDBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(Y3H3, Y3HS, Y3HU)
Samples
TLV431BQDBZRG4
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
Level-1-260C-UNLIM
-40 to 125
Y3HS
Samples
TLV431BQDBZT
ACTIVE
SOT-23
DBZ
3
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(Y3HS, Y3HU)
Samples
TLV431BQDCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
YGU
Samples
TLV431BQDCKT
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
YGU
Samples
TLV431BQLP
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
-40 to 125
TQ431B
Samples
TLV431BQLPR
ACTIVE
TO-92
LP
3
2000
RoHS & Green
SN
N / A for Pkg Type
-40 to 125
TQ431B
Samples
TLV431BQPK
ACTIVE
SOT-89
PK
3
1000
RoHS & Green
SN
Level-2-260C-1 YEAR
-40 to 125
V6
Samples
TLV431CDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
0 to 70
(Y3C6, Y3CI)
(Y3CG, Y3CS)
Samples
TLV431CDBVRG4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
Y3CI
Samples
TLV431CDBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
0 to 70
(Y3C6, Y3CI)
(Y3CG, Y3CS)
Samples
TLV431CDBVTG4
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
Y3CI
Samples
TLV431CDBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
0 to 70
(Y3C6, Y3C8, Y3CB)
Samples
NIPDAUAG
(Y3C3, Y3CS, Y3CU)
TLV431CDBZRG4
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
0 to 70
(Y3C6, Y3C8, Y3CB)
Samples
(Y3C3, Y3CS, Y3CU)
TLV431CLP
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
0 to 70
V431C
Samples
TLV431CLPE3
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
0 to 70
V431C
Samples
TLV431CLPR
ACTIVE
TO-92
LP
3
2000
RoHS & Green
SN
N / A for Pkg Type
0 to 70
V431C
Samples
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TLV431IDBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
(Y3I6, Y3II)
(Y3IG, Y3IS)
Samples
TLV431IDBVRG4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
Y3II
Samples
TLV431IDBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
(Y3I6, Y3II)
(Y3IG, Y3IS)
Samples
TLV431IDBVTG4
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
Y3II
Samples
TLV431IDBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
(Y3I6, Y3IB)
(Y3IS, Y3IU)
Samples
TLV431IDBZRG4
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
Y3I6
Y3IS
Samples
TLV431ILP
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
V431I
Samples
TLV431ILPE3
ACTIVE
TO-92
LP
3
1000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
V431I
Samples
TLV431ILPR
ACTIVE
TO-92
LP
3
2000
RoHS & Green
SN
N / A for Pkg Type
-40 to 85
V431I
Samples
TLV431QPK
ACTIVE
SOT-89
PK
3
1000
RoHS & Green
SN
Level-2-260C-1 YEAR
-40 to 125
VB
Samples
TLV431QPKG3
ACTIVE
SOT-89
PK
3
1000
RoHS & Green
SN
Level-2-260C-1 YEAR
-40 to 125
VB
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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