TLV701xx
SBVS161 – NOVEMBER 2011
www.ti.com
24-V Input Voltage, 150-mA, Ultralow IQ Low-Dropout Regulators
FEATURES
DESCRIPTION
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The TLV701xx series of low-dropout (LDO) regulators
are ultralow quiescent current devices designed for
extremely power-sensitive applications. Quiescent
current is virtually constant over the complete load
current and ambient temperature range. These
devices are an ideal power management attachment
to low-power microcontrollers, such as the MSP430.
23
Wide Input Voltage Range: 2.5 V to 24 V
Low 3.2-μA Quiescent Current
Ground Pin Current: 3.4 μA at 100-mA IOUT
Stable with Any Capacitor (> 0.47 μF)
Available in SOT23-5 Package
Operating Junction Temperature:
–40°C to +125°C
APPLICATIONS
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Ultralow Power Microcontrollers
E-Meters
Fire Alarms/Smoke Detector Systems
Handset Peripherals
Industrial/Automotive Applications
Remote Controllers
Zigbee™ Networks
PDAs
Portable, Battery-Powered Equipment
The TLV701xx operates over a wide operating input
voltage of 2.5 V to 24 V. Thus, it is an excellent
choice for both battery-powered systems as well as
industrial applications that see large line transients.
The TLV701xx is available in a 3-mm × 3-mm
SOT23-5 package that is ideal for cost-effective
board manufacturing.
DBV PACKAGE
SOT23
(TOP VIEW)
TLV70133
VIN
OUT
1
GND
2
IN
3
5
NC
4
NC
OUT
IN
MSP430
GND
1 mF
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Zigbee is a trademark of ZigBee Alliance.
All other trademarks are the property of their respective owners.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2011, Texas Instruments Incorporated
PRODUCT PREVIEW
1
TLV701xx
SBVS161 – NOVEMBER 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
AVAILABLE OPTIONS (1)
PRODUCT
VOUT
TLV701xxyyyz
(1)
XX is nominal output voltage (for example, 30 = 3.0 V)
YYY is Package Designator
Z is Package Quantity
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range, unless otherwise noted.
VALUE
Voltage (2)
IN
Current source
OUT
PRODUCT PREVIEW
Temperature
Electrostatic Discharge Rating (3)
(1)
(2)
(3)
UNIT
MIN
MAX
–0.3
24
V
Internally limited
Operating junction, TJ
–40
+150
°C
Storage, Tstg
–65
+150
°C
2
kV
500
V
Human body model (HBM)
QSS 009-105 (JESD22-A114A)
Charged device model (CDM)
QSS 009-147 (JESD22-C101B.01)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
All voltages are with respect to network ground terminal.
ESD testing is performed according to the respective JESD22 JEDEC standard.
THERMAL INFORMATION
TLV701XX
THERMAL METRIC (1)
DBV
UNITS
5 PINS
θJA
Junction-to-ambient thermal resistance
213.1
θJCtop
Junction-to-case (top) thermal resistance
110.9
θJB
Junction-to-board thermal resistance
97.4
ψJT
Junction-to-top characterization parameter
22.0
ψJB
Junction-to-board characterization parameter
78.4
θJCbot
Junction-to-case (bottom) thermal resistance
n/a
(1)
2
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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Copyright © 2011, Texas Instruments Incorporated
TLV701xx
SBVS161 – NOVEMBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS: TA = +25°C
All values are at TA = +25°C, VIN = VOUT(nom) + 1 V, IOUT = 1 mA, and COUT = 1 µF, unless otherwise noted.
TLV701xx
PARAMETER
TEST CONDITIONS
MIN
TYP
Input voltage range
VO
MAX
UNIT
24
V
Output voltage range
1.2
5
V
VOUT
DC output accuracy
–2
2
%
ΔVO for ΔVIN
Line regulation
50
mV
ΔVO for ΔIOUT
Load regulation
VDO
Dropout voltage (1)
ICL
Output current limit
IGND
Ground pin current
PSRR
Power-supply rejection ratio
20
1 mA < IOUT < 10 mA
6
mV
1 mA < IOUT < 50 mA
19
mV
1 mA < IOUT < 100 mA
29
IOUT = 10 mA
75
mV
IOUT = 50 mA
400
mV
VOUT = 0 V
160
50
mV
1000
mA
IOUT = 0 mA
3.2
4.5
µA
IOUT = 100 mA
3.4
5.5
µA
f = 100 kHz, COUT = 10 µF
60
dB
VIN = VOUT(NOM) – 0.1 V.
PRODUCT PREVIEW
(1)
VOUT(NOM) + 1 V < VIN < 24 V
FUNCTIONAL BLOCK DIAGRAM
VOUT
VIN
Current
Sense
ILIM
_
GND
VREF = 1.205 V
Bandgap
Reference
Copyright © 2011, Texas Instruments Incorporated
+
R1
R2
R2 = 840 kW
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TLV701xx
SBVS161 – NOVEMBER 2011
www.ti.com
PIN CONFIGURATIONS
DBV PACKAGE
SOT23-5
(TOP VIEW)
OUT
1
GND
2
IN
3
5
NC
4
NC
Table 1. Pin Descriptions
TLV701xx
NAME
DBV
DESCRIPTION
GND
2
Ground
IN
3
Unregulated input voltage.
OUT
1
Regulated output voltage.
Any capacitor 1 µF or greater between this pin and ground is needed for stability.
NC
4, 5
No connection. This pin can be left open or tied to ground for improved thermal performance.
PRODUCT PREVIEW
4
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Copyright © 2011, Texas Instruments Incorporated
TLV701xx
SBVS161 – NOVEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS
LOAD REGULATION
(VOUT = 3.0 V)
LINE REGULATION
3.3
3.1
VOUT = 3.0 V
IOUT = 5 mA
3.08
3.2
Output Voltage (V)
3.04
3.02
3.0
2.98
2.96
-40°C
+25°C
+85°C
2.94
2.92
3.1
3
2.9
-40°C
+25°C
+85°C
2.8
2.7
2.9
4
8
12
16
20
0
24
30
60
Input Voltage (V)
Figure 1.
Dropout Voltage (mV)
Output Voltage (V)
IOUT = 10 mA
VNOM = 3 V
100
3.099
3.066
3.033
IOUT = 10 mA
3.0
2.967
2.934
IOUT = 80 mA
2.901
80
60
40
-40°C
+25°C
+85°C
20
2.868
2.835
0
-40 -25 -10
5
20
35
50
65
80
95
110 125
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3
Input Voltage (V)
Junction Temperature (°C)
Figure 3.
Figure 4.
DROPOUT VOLTAGE vs OUTPUT CURRENT
GROUND CURRENT vs JUNCTION TEMPERATURE
4.5
2100
1800
Ground Current (mA)
4
Dropout Voltage (mV)
150
DROPOUT VOLTAGE vs INPUT VOLTAGE
120
VIN = 4.0 V
3.132
120
Figure 2.
OUTPUT VOLTAGE vs
JUNCTION TEMPERATURE
3.165
90
Output Current (mA)
PRODUCT PREVIEW
Output Voltage (V)
3.06
1500
1200
900
600
-40°C
+25°C
+85°C
300
0
0
30
60
90
Output Current (mA)
Figure 5.
Copyright © 2011, Texas Instruments Incorporated
120
150
VIN = 4.0 V
VOUT = 3.0 V
COUT = 1 mF
3.5
3
2.5
2
-40 -25 -10
5
20
35
50
65
80
95
110 125
Junction Temperature (°C)
Figure 6.
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TLV701xx
SBVS161 – NOVEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
CURRENT LIMIT vs
JUNCTION TEMPERATURE
GROUND PIN CURRENT vs OUTPUT CURRENT
4.5
VOUT = 3.0 V, VIN = 4.5 V
-40°C
200
3.5
Current Limit (mA)
Ground Pin Current (mA)
250
VOUT = 3.0 V
4
3
2.5
2
1.5
1
+85°C
150
100
50
-40°C
+25°C
+85°C
0.5
+25°C
0
0
0
30
60
90
120
150
Temperature (°C)
Output Current (mA)
Figure 7.
Figure 8.
OUTPUT SPECTRAL NOISE DENSITY vs
FREQUENCY
7
VIN = 4.0 V
VOUT = 3.0 V
COUT = 1 mF
IOUT = 1 mA
6
IOUT = 50 mA
5
4
3
2
1
Power-Supply Rejection Ratio (dB)
PRODUCT PREVIEW
Output Spectral Noise Density (mV/?Hz)
PSRR vs FREQUENCY
100
8
VIN = 4.0 V
VOUT = 3.0 V
COUT = 10 mF
TJ = +25°C
90
80
70
IOUT = 1 mA
60
50
40
30
IOUT = 50 mA
20
10
0
0
100
1k
10 k
10
100 k
100
1k
1M
Figure 10.
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
VIN = 3.0 V
IOUT = 50 mA
COUT = 10 mF
100
50
0
-50
5.3
4.3
Time (50 ms/div)
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Output Current (mA) Output Voltage (mV)
Output Voltage (mV)
Input Voltage (V)
100 k
Figure 9.
Figure 11.
6
10 k
10 M
Frequency (Hz)
Frequency (Hz)
200
VIN = 4.0 V
VOUT = 3.0 V
COUT = 10 mF
0
-200
100
50
0
Time (0.5 ms/div)
Figure 12.
Copyright © 2011, Texas Instruments Incorporated
TLV701xx
SBVS161 – NOVEMBER 2011
www.ti.com
APPLICATION INFORMATION
The TLV701xx series of devices belong to a family of ultralow, IQ, low-dropout (LDO) regulators. IQ remains fairly
constant over the complete output load current and temperature range. The devices are ensured to operate over
a temperature range of –40°C to +125°C.
INPUT AND OUTPUT CAPACITOR REQUIREMENTS
The TLV701 requires a 1-µF or larger capacitor connected between OUT and GND for stability. Ceramic or
tantalum capacitors can be used. Larger value capacitors result in better transient and noise performance.
Although an input capacitor is not required for stability, when a 0.1-µF or larger capacitor is placed between IN
and GND, it counteracts reactive input sources and improves transient and noise performance. Higher value
capacitors are necessary if large, fast rise time load transients are anticipated.
BOARD LAYOUT RECOMMENDATIONS
Input and output capacitors should be placed as close to the device pins as possible. To avoid interference of
noise and ripple on the board, it is recommended that the board be designed with separate ground planes for VIN
and VOUT, with the ground plane connected only at the device GND pin. In addition, the ground connection for
the output capacitor should be connected directly to the device GND pin.
To ensure reliable operation, worst-case junction temperature should not exceed +125°C. This restriction limits
the power dissipation the regulator can handle in any given application. To ensure the junction temperature is
within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD,
which must be less than or equal to PD(max).
The maximum power dissipation limit is determined using Equation 1:
T max * T A
P D(max) + J
R qJA
(1)
where:
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package.
TA is the ambient temperature.
The regulator dissipation is calculated using Equation 2:
P D + ǒVIN * VOUTǓ
I OUT
(2)
Power dissipation that results from quiescent current is negligible.
REGULATOR PROTECTION
The TLV701xx series of LDO regulators use a PMOS-pass transistor that has a built-in back diode that conducts
reverse current when the input voltage drops below the output voltage (for example, during power-down). Current
is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is
anticipated, external limiting might be appropriate.
The TLV701xx features internal current limiting. During normal operation, the TLV701xx limits output current to
approximately 250 mA. When current limiting engages, the output voltage scales back linearly until the
overcurrent condition ends. Take care not to exceed the rated maximum operating junction temperature of
+125°C. Continuously running the device under conditions where the junction temperature exceeds +125°C
degrades device reliability.
The ability to remove heat from the die is different for each package type, presenting different considerations in
the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves
the heat from the device to the ambient air. Using heavier copper increases the effectiveness in removing heat
from the device. The addition of plated through-holes to heat-dissipating layers also improves heatsink
effectiveness. Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to
the product of the output current and the voltage drop across the output pass element, as shown in Equation 2.
Copyright © 2011, Texas Instruments Incorporated
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PRODUCT PREVIEW
POWER DISSIPATION AND JUNCTION TEMPERATURE
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLV70130DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
YBVA
TLV70130DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
YBVA
TLV70133DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
YBWA
TLV70133DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
YBWA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of