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TLV717P
SBVS176B – OCTOBER 2011 – REVISED APRIL 2016
TLV717P 150-mA, Low-Dropout Regulator With Foldback Current Limit for Portable
Devices
1 Features
3 Description
•
•
•
•
The TLV717P series of low-dropout (LDO) linear
regulators are low quiescent current LDOs with
excellent line and load transient performance and are
designed for power-sensitive applications. These
devices provide a typical accuracy of 0.5%.
1
•
•
•
•
Very Low Dropout: 215 mV at 150 mA
Accuracy: 0.5% (typical)
Low IQ: 35 µA
Available in Fixed-Output Voltages:
1.2 V to 5 V
High PSRR:
– 70 dB at 1 kHz
– 50 dB at 1 MHz
Stable With Effective Output Capacitance:
0.1 µF
Foldback Current Limit
Package: 1-mm × 1-mm DQN
The TLV717P series offer current foldback that
throttles down the output current with a decrease in
load resistance. The typical value at which current
foldback initiates is 350 mA; the typical value of the
output short current limit value is 40 mA.
(1)
See the Package Option Addendum at the end of this
document for a complete list of available voltage options.
(2)
See Input and Output Capacitor Requirements for more
details.
Furthermore, these devices are stable with an
effective output capacitance of only 0.1 µF. This
feature enables the use of cost-effective capacitors
that have higher bias voltages and temperature
derating. The devices regulate to specified accuracy
with no output load.
The TLV717P series is available in a 1-mm × 1-mm
DQN package that makes them ideal for hand-held
applications. The TLV717P provides an active
pulldown circuit to quickly discharge output loads.
2 Applications
•
•
•
•
PCs and Notebooks
Smart Phones
Portable Electronics and Battery-Powered Devices
Electronic Point of Sale
Device Information(1)
PART NUMBER
TLV717P
PACKAGE
X2SON (4)
BODY SIZE (NOM)
1.00 mm × 1.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Circuit
VIN
OUT
IN
CIN
COUT
VOUT
1 mF
Ceramic
TLV717xx Series
On
Off
EN
GND
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV717P
SBVS176B – OCTOBER 2011 – REVISED APRIL 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1
7.2
7.3
7.4
Overview ................................................................... 9
Functional Block Diagram ......................................... 9
Feature Description................................................... 9
Device Functional Modes........................................ 10
8
Application and Implementation ........................ 11
8.1 Application Information............................................ 11
8.2 Typical Application .................................................. 11
9 Power Supply Recommendations...................... 13
10 Layout................................................................... 13
10.1 Layout Guidelines ................................................. 13
10.2 Layout Example .................................................... 13
10.3 Power Dissipation ................................................. 13
11 Device and Documentation Support ................. 14
11.1
11.2
11.3
11.4
11.5
11.6
Device Support......................................................
Documentation Support ........................................
Community Resource............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
14
14
14
14
14
14
12 Mechanical, Packaging, and Orderable
Information ........................................................... 15
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (February 2012) to Revision B
Page
•
Deleted all instances of TLV717xx; Replaced with generic part number, TLV717P.............................................................. 1
•
Updated Applications. ............................................................................................................................................................ 1
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
•
Changed TJ = –25°C to TJ = 25°C in the conditions statement in Absolute Maximum Ratings............................................. 4
•
Changed TA to TJ throughout Electrical Characteristics ......................................................................................................... 5
•
Changed TA to TJ in the conditions statement in Typical Characterisitcs ............................................................................. 6
•
Changed TA to TJ in the conditions statement in Typical Characterisitcs ............................................................................. 7
•
Changed TA to TJ in the conditions statement in Typical Characterisitcs ............................................................................. 8
•
Changed junction temperature range from –40°C to 125°C to –40°C to 85°C in Overview .................................................. 9
•
Deleted TLV717xx functional block diagram .......................................................................................................................... 9
Changes from Original (October 2011) to Revision A
•
2
Page
Changed document status from Product Preview to Production Data ................................................................................... 1
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5 Pin Configuration and Functions
DQN Package
4-Pin X2SON
Top View
IN
EN
4
3
1
2
OUT
GND
DQN Package
4-Pin X2SON
Bottom View
EN
IN
3
4
2
1
GND
OUT
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
Enable pin. Driving EN over 1.2 V turns on the regulator. Driving EN below 0.4 V puts the regulator
into shutdown mode.
EN
3
I
GND
2
—
IN
4
I
Input pin. A small capacitor is recommended from this pin to ground to assure stability. See the
Input and Output Capacitor Requirements section in the Application and Implementation for more
details.
OUT
1
O
Regulated output voltage pin. A small 1-μF ceramic capacitor is recommended from this pin to
ground to assure stability. See the Input and Output Capacitor Requirements section in the
Application and Implementation for more details.
Thermal
pad
—
—
Connect to GND for improved thermal performance.
Ground pin
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6 Specifications
6.1 Absolute Maximum Ratings
At TJ = 25°C, unless otherwise noted. All voltages are with respect to GND. (1)
Voltage
Current
MIN
MAX
Input range, VIN
–0.3
6
Enable range, VEN
–0.3
VIN + 0.3
Output range, VOUT
–0.3
6
Maximum output, IOUT
Indefinite
Continuous total power dissipation, PDISS
(1)
V
Internally limited
Output short-circuit duration
Temperature
UNIT
See Thermal Information
Junction, TJ
–55
150
Storage junction, Tstg
–55
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN
MAX
VIN
Input voltage
1.7
5.5
UNIT
VOUT
Output voltage
1.2
5
IOUT
Output current
0
150
VEN
Enable pin voltage
0
VIN
V
TJ
Junction temperature
–40
85
°C
V
V
mA
6.4 Thermal Information
TLV717P
THERMAL METRIC
DQN (X2SON)
UNIT
4 PINS
RθJA
Junction-to-ambient thermal resistance
393.3
°C/W
RθJC(top)
Junction-to-case(top) thermal resistance
140.3
°C/W
RθJB
Junction-to-board thermal resistance
330
°C/W
ψJT
Junction-to-top characterization parameter
6.5
°C/W
ψJB
Junction-to-board characterization parameter
329
°C/W
RθJC(bot)
Junction-to-case(bottom) thermal resistance
147.5
°C/W
4
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6.5 Electrical Characteristics
At operating temperature range (TJ = –40°C to 85°C), TJ = 25°C, VIN = VOUT(NOM) + 0.5 V or 1.7 V (whichever is greater), IOUT = 10 mA, VEN
= VIN, and COUT = 1 µF, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
VIN
Input voltage range
1.7
5.5
VOUT
Output voltage range
1.2
5
IOUT
Output current
150
TJ = +25°C
DC output accuracy
UNIT
V
V
mA
0.5%
VOUT ≥ 1.2 V, –40°C ≤ TJ ≤ +85°C
–1.5%
1.5%
VOUT ≤ 1.2 V
ΔVO/VIN
Line regulation
VOUT(NOM) + 0.5 V ≤ VIN ≤ 5.5 V
ΔVO/IOUT
Load regulation
0 mA ≤ IOUT ≤ 150 mA
25
mV
1
5
mV
10
20
mV
1.2 V ≤ VOUT < 1.5 V
330
500
1.5 V ≤ VOUT < 1.8 V
330
450
1.8 V ≤ VOUT ≤ 5 V
215
350
VDO
Dropout voltage
VIN = 0.98 × VOUT(NOM),
IOUT = 150 mA
IGND
Ground pin current
IOUT = 0 mA
35
55
µA
ISHDN
Shutdown current
VEN ≤ 0.4 V, 2 V ≤ VIN ≤ 4.5 V
0.1
0.5
µA
PSRR
Power-supply
rejection ratio
VIN = 3.3 V, VOUT = 2.8 V,
IOUT = 30 mA
f = 10 Hz
70
f = 100 Hz
70
f = 1 kHz
65
f = 10 kHz
60
f = 100 kHz
43
VNOISE
Output noise voltage
BW = 100 Hz to 100 kHz, VIN = 2.3 V, VOUT = 1.8 V,
IOUT = 10 mA
tSTR
Start-up time
COUT = 1 μF, IOUT = 150 mA
ISC
Short current limit
VIN = min (VOUT(NOM) + 1 V, 5.5 V), VOUT = 0 V
VHI
Enable high (enabled)
VLO
Enable low (disabled)
IEN
EN pin current
RPULLDOWN
Pulldown resistor
UVLO
Undervoltage lockout
µVRMS
100
µs
40
mA
VIN
0
VIN rising
dB
55
0.9
EN = 5.5 V
mV
0.4
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V
0.01
µA
120
Ω
1.6
V
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6.6 Typical Characteristics
At operating temperature range (TJ = –40°C to 85°C), TJ = 25°C, VIN = VOUT(NOM) + 0.5 V or 1.7 V (whichever is greater), IOUT
= 10 mA, VEN = VIN, and COUT = 1 µF, unless otherwise noted.
2.9
2.88
2.86
2.86
Output Voltage (V)
2.9
2.88
VOUT (V)
2.84
2.82
2.8
2.78
2.76
+85°C
+25°C
-40°C
2.74
2.72
IOUT = 10 mA
2.84
2.82
2.8
2.78
2.76
+85°C
+25°C
-40°C
2.74
2.72
2.7
2.7
20
0
40
60
80
100 120 140 160 180 200
IOUT (mA)
3.5
3
Figure 1. Load Regulation
2.9
Dropout Voltage (V)
Output Voltage (V)
2.84
2.82
2.8
2.78
2.76
+85°C
+25°C
-40°C
2.74
2.72
5.5
G002
0.25
0.2
0.15
+85°C
+25°C
-40°C
0.1
2.7
3.5
3
4
4.5
5
5.5
Input Voltage (V)
1.5
2
2.5
3
3.5
4
Figure 3. Line Regulation
5
4.5
Fixed Output Voltage Versions (V)
G003
G004
Figure 4. Dropout Voltage vs Fixed Output Voltage Versions
0.3
2.838
2.828
Output Voltage (V)
0.25
Dropout Voltage (V)
5
Figure 2. Line Regulation
2.86
0.2
0.15
0.1
0
2.818
2.808
2.798
2.788
2.778
+85°C
+25°C
-40°C
0.05
10 mA
150 mA
2.768
2.758
50
60
70
80
90
100 110 120 130 140 150
Output Current (mA)
-40 -27.5 -15 -2.5
G005
Figure 5. Dropout Voltage vs Output Current
6
4.5
0.3
IOUT = 150 mA
2.88
4
Input Voltage (V)
G001
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10
22.5
35
47.5
60
72.5
Temperature (°C)
85
G006
Figure 6. Output Voltage vs Temperature
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Typical Characteristics (continued)
At operating temperature range (TJ = –40°C to 85°C), TJ = 25°C, VIN = VOUT(NOM) + 0.5 V or 1.7 V (whichever is greater), IOUT
= 10 mA, VEN = VIN, and COUT = 1 µF, unless otherwise noted.
45
Ground Pin Current (mA)
40
Ground Pin Current (mA)
3000
IOUT = 0 mA
35
30
25
20
15
10
+85°C
+25°C
-40°C
5
2500
2000
1500
1000
0
0
3
3.5
4
4.5
5.5
5
Input Voltage (V)
50
75
100
125
G008
Figure 8. Ground Pin Current vs Output Current
3
2.5
Output Voltage (V)
35
30
25
20
15
10
2
1.5
1
+85°C
+25°C
-40°C
0.5
5
0
0
-40 -27.5 -15 -2.5
10
22.5
35
47.5
60
85
72.5
Temperature (°C)
50
0
100
150
200
250
300
350
Output Current (mA)
G009
Figure 9. Ground Pin Current vs Temperature
G010
Figure 10. Output Voltage vs Output Current
80
80
Power-Supply Rejection Ratio (dB)
Power-Supply Rejection Ratio (dB)
150
Output Current (mA)
IOUT = 0 mA
40
25
0
G007
Figure 7. Ground Pin Current vs Input Voltage
45
Ground Pin Current (mA)
+85°C
+25°C
-40°C
500
70
60
50
40
30
20
IOUT = 30 mA
IOUT = 150 mA
10
VIN - VOUT = 0.5 V
0
70
60
50
40
30
20
IOUT = 30 mA
IOUT = 150 mA
10
VIN - VOUT = 1 V
0
10
100
1k
10k
100k
1M
Frequency (Hz)
10M
10
G011
Figure 11. TLV71728PSRR vs Frequency
100
1k
10k
100k
1M
10M
Frequency (Hz)
Figure 12. TLV71728PSRR vs Frequency
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Typical Characteristics (continued)
At operating temperature range (TJ = –40°C to 85°C), TJ = 25°C, VIN = VOUT(NOM) + 0.5 V or 1.7 V (whichever is greater), IOUT
= 10 mA, VEN = VIN, and COUT = 1 µF, unless otherwise noted.
10
80
Noise Spectral Density (mV/ÖHz)
Power-Supply Rejection Ratio (dB)
90
70
60
50
40
30
1 kHz
10 kHz
100 kHz
20
10
0.1
0.01
1.2
2.8
5
0
0
3.6
3.7
3.8
3.9
4
4.1
4.2
Input Voltage (V)
4.3
10
100
1k
10k
100k
Frequency (Hz)
G013
Figure 13. PSRR vs Input Voltage
8
1
1M
10M
G014
Figure 14. Output Spectral Noise Density vs Frequency
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7 Detailed Description
7.1 Overview
The TLV717P belongs to a new family of next-generation value low-dropout (LDO) regulators. These devices
consume low quiescent current and deliver excellent line and load transient performance. These characteristics,
combined with low noise, very good PSRR with little (VIN – VOUT) headroom, make this family of devices ideal for
RF portable applications.
This family of regulators offers current foldback. Device operating junction temperature is –40°C to 85°C.
7.2 Functional Block Diagram
IN
OUT
Foldback Current
Limit
UVLO
EN
120 W
Bandgap
LOGIC
GND
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7.3 Feature Description
7.3.1 Internal Current Limit
The TLV717P has an internal foldback current limit that helps to protect the regulator during fault conditions. The
current supplied by the device is gradually throttled down as the output voltage decreases. When the output is
shorted, the LDO supplies a typical current of 40 mA. Output voltage is not regulated when the device is in
current limit, and is VOUT = ILIMIT × RLOAD. The advantage of foldback current limit is that the ILIMIT value is less
than the fixed current limit. Therefore, the power that the PMOS pass transistor dissipates [(VIN – VOUT) × ILIMIT] is
much less.
The TLV717P PMOS pass element has a built-in body diode that conducts current when the voltage at OUT
exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated,
external limiting to 5% of the rated output current is recommended.
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Feature Description (continued)
7.3.2 Shutdown
The enable pin (EN) is active high. The device is enabled when the voltage at the EN pin goes above 0.9 V. This
relatively lower voltage value required to turn the LDO on can be exploited to power the LDO with a GPIO of
recent processors whose GPIO logic 1 voltage level is lower than traditional microcontrollers. The device is
turned off when the EN pin is held at less than 0.4 V. When shutdown capability is not required, EN can be
connected to the IN pin.
7.3.3 Undervoltage Lockout (UVLO)
The TLV717P uses an undervoltage lockout circuit (UVLO = 1.6 V) to keep the output shut off until the internal
circuitry operates properly.
7.4 Device Functional Modes
7.4.1 Normal Operation
The device regulates to the nominal output voltage under the following conditions:
•
•
•
•
The input voltage has previously exceeded the UVLO rising voltage and has not decreased below the UVLO
falling threshold.
The input voltage is greater than the nominal output voltage added to the dropout voltage.
The enable voltage has previously exceeded the enable rising threshold voltage and not decreased below the
enable falling threshold.
The output current is less than the current limit.
7.4.2 Dropout Operation
If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other
conditions are met for normal operation, the device operates in dropout mode. In this condition, the output
voltage is the same the input voltage minus the dropout voltage. The transient performance of the device is
significantly degraded because the pass device is in a triode state and no longer controls the current through the
LDO. Line or load transients in dropout may result in large output voltage deviations.
7.4.3 Disabled
The device is disabled under the following conditions:
• The input voltage is less than the UVLO falling voltage, or has not yet exceeded the UVLO rising threshold.
• The enable voltage is less than the enable falling threshold voltage or has not yet exceeded the enable rising
threshold.
When the device is disabled, the active pulldown resistor discharges the output.
Table 1 lists the conditions that lead to the different modes of operation.
Table 1. Device Functional Mode Comparison
PARAMETER
OPERATING MODE
VIN
VEN
IOUT
Normal mode
VIN > VOUT(nom) + VDO
and VIN > UVLORISE
VEN > VEN(HI)
IOUT < ILIM
Dropout mode
UVLORISE < VIN < VOUT(nom) + VDO
VEN > VEN(HI)
IOUT < ILIM
VIN < UVLOFALL
VEN < VEN(LO)
—
Disabled mode
(any true condition disables
the device)
10
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TLV717P is a low-dropout regulator (LDO) with low quiescent current that delivers excellent line and load
transient performance. This LDO regulator offers a foldback current limit. The operating junction temperature of
this device series is –40°C to 85°C.
8.2 Typical Application
VIN
OUT
IN
CIN
COUT
VOUT
1 mF
Ceramic
TLV717xx Series
On
Off
EN
GND
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Figure 15. Typical Application Circuit
8.2.1 Design Requirements
Table 2 lists the parameters for this application.
Table 2. Design Parameters
PARAMETER
DESIGN REQUIREMENT
Input voltage
3.8 V
Output voltage
2.8 V ±1%
Output current
30 to 150 mA
8.2.2 Detailed Design Procedure
8.2.2.1 Input and Output Capacitor Requirements
TI recommends X5R- and X7R-type ceramic capacitors because they have minimal variation in value and
equivalent series resistance (ESR) over temperature. The TLV717P is designed to be stable with an effective
capacitance of 0.1 µF or larger at the output, though TI recommends a 1-µF ceramic capacitor for typical
applications. Thus, the device is stable with capacitors of other dielectric types as well, as long as the effective
capacitance under operating bias voltage and temperature is greater than 0.1 µF. This effective capacitance
refers to the capacitance that the LDO detects under operating bias voltage and temperature conditions; that is,
the capacitance after taking both bias voltage and temperature derating into consideration. In addition to allowing
the use of cheaper dielectrics, this capability of being stable with 0.1-µF effective capacitance also enables the
use of smaller footprint capacitors that have higher derating in size- and space-constrained applications. Using a
0.1-µF rated capacitor at the LDO output does not ensure stability because the effective capacitance under the
specified operating conditions would be less than 0.1 µF. Maximum ESR should be less than 200 mΩ.
Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1-µF to 1µF, low ESR capacitor across the IN and GND pins of the regulator. This capacitor counteracts reactive input
sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be
necessary if large, fast, rise-time load transients are anticipated, or if the device is not located close to the power
source. If source impedance is more than 2 Ω, a 0.1-µF input capacitor may be necessary to ensure stability.
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8.2.2.2 Dropout Voltage
The TLV717P uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the dropout
voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the
RDS(ON) of the PMOS pass element. VDO scales approximately with output current because the PMOS device
behaves like a resistor in dropout. As with any linear regulator, PSRR and transient response are degraded as
(VIN – VOUT) approaches dropout.
8.2.2.3 Transient Response
As with any regulator, increasing the size of the output capacitor reduces over- and undershoot magnitude but
increases the duration of the transient response.
8.2.3 Application Curves
10
Noise Spectral Density (mV/ÖHz)
Ground Pin Current (mA)
3000
2500
2000
1500
1000
+85°C
+25°C
-40°C
500
0.1
0.01
1.2
2.8
5
0
0
0
25
50
75
100
Output Current (mA)
125
150
10
100
1k
10k
100k
Frequency (Hz)
G008
Figure 16. Ground Pin Current vs Output Current
12
1
1M
10M
G014
Figure 17. Output Spectral Noise Density vs Frequency
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Copyright © 2011–2016, Texas Instruments Incorporated
Product Folder Links: TLV717P
TLV717P
www.ti.com
SBVS176B – OCTOBER 2011 – REVISED APRIL 2016
9 Power Supply Recommendations
Connect a low-output impedance power supply directly to the IN pin of the TLV717P. Inductive impedances
between the input supply and the IN pin can create significant voltage excursions at the IN pin during start-up or
load transient events. If inductive impedances are unavoidable, use an input capacitor.
10 Layout
10.1 Layout Guidelines
Input and output capacitors should be placed as close to the device pins as possible. To improve AC
performance (such as PSRR, output noise, and transient response), TI recommends designing the board with
separate ground planes for VIN and VOUT, with the ground plane connected only at the device GND pin. In
addition, the output capacitor ground connection should be connected directly to the device GND pin. High ESR
capacitors may degrade PSRR performance.
10.2 Layout Example
VOUT
VIN
1
4
COUT
CIN
2
3
GND PLANE
Represents via used for
application specific connections
Copyright © 2016, Texas Instruments Incorporated
Figure 18. Recommended Layout Example
10.3 Power Dissipation
The ability to remove heat from the die is different for each package type, presenting different considerations in
the printed-circuit board (PCB) layout. The PCB area around the device that is free of other components moves
the heat from the device to ambient air. Performance data for JEDEC-low and high-K boards are given in
Thermal Information. Using heavier copper increases the effectiveness in removing heat from the device. The
addition, plated through-holes to heat-dissipating layers also improves heatsink effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of
the output current and the voltage drop across the output pass element, as shown in Equation 1.
PD = (VIN – VOUT) × IOUT
(1)
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Product Folder Links: TLV717P
13
TLV717P
SBVS176B – OCTOBER 2011 – REVISED APRIL 2016
www.ti.com
11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 Evaluation Modules
An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TLV717P.
SLVU553 details the design kits and evaluation modules for TLV71733PEVM-072.
The EVM can be requested at the Texas Instruments website through the TLV717P product folder, or purchased
directly from the TI eStore.
11.1.2 Device Nomenclature
Table 3. Device Nomenclature (1)
PRODUCT
TLV717xx(x)Pyyyz
(1)
VOUT
XX(X) is the nominal output voltage. For output voltages with a resolution of 100 mV, two
digits are used in the ordering number; otherwise, three digits are used (for example, 28 =
2.8 V; 475 = 4.75 V).
P indicates an active output discharge feature. All members of TLV717P family will actively
discharge the output when the device is disabled.
YYY is the package designator.
Z is the package quantity. R is for 3000 pieces, T is for 250 pieces.
For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder on www.ti.com.
11.2 Documentation Support
11.2.1 Related Documentation
TLV71733PEVM-072 Evaluation Module user guide, SLVU553
11.3 Community Resource
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14
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Copyright © 2011–2016, Texas Instruments Incorporated
Product Folder Links: TLV717P
TLV717P
www.ti.com
SBVS176B – OCTOBER 2011 – REVISED APRIL 2016
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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Copyright © 2011–2016, Texas Instruments Incorporated
Product Folder Links: TLV717P
15
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLV71712PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
UX
TLV71712PDQNR3
ACTIVE
X2SON
DQN
4
3000
RoHS & Green
Level-1-260C-UNLIM
-40 to 85
UX
TLV71712PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
UX
TLV71713PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VC
TLV71713PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VC
TLV71715PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
UY
TLV71715PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
UY
TLV717185PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VN
TLV717185PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VN
TLV71718PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
UZ
TLV71718PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
UZ
TLV71721PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
AR
TLV71721PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
AR
TLV71725PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VA
TLV71725PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VA
TLV71727PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
AS
TLV71727PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
AS
TLV717285PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
TLV717285PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VE
TLV71728PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VD
Addendum-Page 1
NIPDAU
VE
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
10-Dec-2020
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
NIPDAU
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLV71728PDQNR3
ACTIVE
X2SON
DQN
4
3000
RoHS & Green
Level-1-260C-UNLIM
-40 to 85
VD
TLV71728PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VD
TLV71729PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VI
TLV71729PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VI
TLV71730PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VF
TLV71730PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VF
TLV71733PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VG
TLV71733PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VG
TLV71736PDQNR
ACTIVE
X2SON
DQN
4
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VH
TLV71736PDQNT
ACTIVE
X2SON
DQN
4
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
VH
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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