TLV809
TLV809
ZHCSMJ5E – JUNE 2010 – REVISED NOVEMBER
2020
ZHCSMJ5E – JUNE 2010 – REVISED NOVEMBER 2020
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TLV809
3 引脚电源电压监控器
1 特性
3 说明
• 高精度电源电压监控器：
2.5V、3V、3.3V、5V
• 具有 200ms 固定延时时间的
上电复位发生器
• 电源电流：9µA（典型值）
• 温度范围：–40°C 至 +85°C
• 3 引脚 SOT-23 封装
• 与 MAX809 引脚对引脚兼容
TLV809 系列监控电路主要为数字信号处理器 (DSP) 以
及基于处理器的系统提供电路初始化和时序监控。较新
的 TLV809E 是引脚对引脚兼容的备选器件。
在启动期间，置位为 RESET ，前提是电源电压 (VDD)
超 过 1.1V 。 之 后 ， 监 控 电 路 就 会 监 测 VDD ， 并 使
RESET 保持有效状态，前提是 VDD 保持在阈值电压
VIT 以下。内部计时器将会延迟输出恢复至无效状态
（高电平）的时间，以确保系统正常复位。延时时间
(td(typ) = 200ms) 从 VDD 上升到高于阈值电压 VIT 后开
始。当电源电压降至 VIT 阈值电压以下时，输出再次变
为有效状态（低电平）。无需外部组件。该系列中的所
有器件均具有一个通过内部分压器设定的固定感应阈值
电压 (VIT)。
2 应用
•
•
•
•
•
•
•
工厂自动化
便携式和电池供电类设备
机顶盒
服务器
电器
电表
楼宇自动化
该产品系列专为 2.5V、3V、3.3V 以及 5V 电源电压而
设计。电路采用 3 引脚 SOT-23 封装。TLV809 器件的
额定工作温度范围为 -40°C 至 +85°C。
器件信息
封装 (1)
器件型号
TLV809
(1)
封装尺寸（标称值）
SOT-23 (3)、DBV
2.90mm × 1.60mm
SOT-23 (3)、DBZ
2.92mm × 1.30mm
如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
3.3-V LDO
3.3 V
5V
OUT
IN
GND
VDD
VDD
DSP, FPGA, ASIC
TLV809K33
RESET
RESET
GND
GND
典型应用
本文档旨在为方便起见，提供有关
TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
Copyright
© 2020 Texas Instruments Incorporated
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www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
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English Data Sheet: SLVSA03
1
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ZHCSMJ5E – JUNE 2010 – REVISED NOVEMBER 2020
Table of Contents
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Comparison......................................................... 4
6 Pin Configuration and Functions...................................4
Pin Functions.................................................................... 4
7 Specifications.................................................................. 5
7.1 Absolute Maximum Ratings........................................ 5
7.2 ESD Ratings............................................................... 5
7.3 Recommended Operating Conditions.........................5
7.4 Thermal Information....................................................5
7.5 Electrical Characteristics.............................................6
7.6 Timing Requirements.................................................. 6
7.7 Switching Characteristics............................................6
7.8 Timing Diagrams ........................................................ 7
7.9 Typical Characteristics................................................ 8
8 Detailed Description........................................................9
8.1 Overview..................................................................... 9
8.2 Functional Block Diagram........................................... 9
8.3 Feature Description.....................................................9
8.4 Device Functional Modes............................................9
9 Application and Implementation.................................. 10
9.1 Application Information............................................. 10
9.2 Typical Application.................................................... 11
10 Power Supply Recommendations..............................12
11 Layout........................................................................... 12
11.1 Layout Guidelines................................................... 12
11.2 Layout Example...................................................... 12
12 Device and Documentation Support..........................13
12.1 Documentation Support.......................................... 13
12.2 Support Resources................................................. 13
12.3 Trademarks............................................................. 13
12.4 Electrostatic Discharge Caution..............................13
12.5 Glossary..................................................................13
13 Mechanical, Packaging, and Orderable
Information.................................................................... 13
4 Revision History
Changes from Revision D (March 2016) to Revision E (November 2020)
•
•
•
•
•
•
•
•
•
Page
更新了整个文档的表、图和交叉参考的编号格式................................................................................................ 1
更新了描述 部分..................................................................................................................................................1
Updated Device Comparison .............................................................................................................................4
Changed VDD from 7 to 6.5 in Absolute Maximum Ratings ..............................................................................5
Changed VOL @ 500μA from 0.2 to 0.3 in Electrical Characteristics ............................................................... 6
Changed tw pulse duration from 3 to 10μs in Timing Requirements ................................................................ 6
Changed tPHL from 1 to 10μs in Switching Characteristics .............................................................................. 6
Deleted figure for Minimum Pulse Duration At VDD in Typical Characteristics....................................................8
Changed figure from Pulse Duration to VOL, IOL in the Typical Application Section......................................... 11
Changes from Revision C (February 2012) to Revision D (March 2016)
Page
• 添加了器件信息 表、引脚配置和功能 部分、ESD 等级 表、概述 部分、特性描述 部分、器件功能模式 部分、
应用和实施 部分、电源相关建议 部分、布局 部分、器件和文档支持 部分以及机械、封装和可订购信息 部分. 1
• 删除了第 1 页中的引脚排列图.............................................................................................................................1
• 更改了描述 部分：添加了第三段，更改了这部分的措辞，使之更加清晰........................................................... 1
• Deleted soldering temperature parameter from Absolute Maximum Ratings table ........................................... 5
• Changed IDD parameter test conditions in Electrical Characteristics table ........................................................ 6
Changes from Revision B (September 2010) to Revision C (February 2012)
Page
• Updated ordering information ............................................................................................................................ 4
Changes from Revision A (July 2010) to Revision B (September 2010)
Page
• 已按照最新标准更新了文档格式......................................................................................................................... 1
• 在引脚排列图上增加了 DBZ 封装....................................................................................................................... 1
• Added Thermal Information table....................................................................................................................... 5
2
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• Changed 图 7-3 ................................................................................................................................................. 8
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5 Device Comparison
表 5-1. Device Threshold Options
PRODUCT
THRESHOLD VOLTAGE
TLV809J25
2.25 V
TLV809L30
2.64 V
TLV809K33
2.93 V
TLV809I50
4.55 V
表 5-2. Device Family Comparison
DEVICE
FUNCTION
TLV803
Open-Drain, RESET Output
TLV809
Push-Pull, RESET Output
TLV810
Push-Pull, RESET Output
6 Pin Configuration and Functions
GND
1
3
RESET
VDD
2
图 6-1. DBV, DBZ Packages
3-Pin SOT-23
Top View
Pin Functions
PIN
NO.
4
NAME
I/O
DESCRIPTION
1
GND
—
Ground pin. This pin must be connected to ground with a low-impedance connection.
2
RESET
O
RESET pin. RESET is an active low signal, asserting when VDD is below the threshold
voltage. When VDD rises above VIT, there is a delay time (td) until RESET deasserts.
RESET is a push-pull output stage.
3
VDD
I
Supply voltage pin. A 0.1-µF ceramic capacitor from this pin to ground is recommended to
improve stability of the threshold voltage.
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
Supply voltage(2)
VDD
All other pins(2)
IOL
UNIT
6.5
V
7
–0.3
Maximum low output current
5
mA
IOH
Maximum high output current
–5
mA
IIK
Input clamp current (VI < 0 or VI > VDD)
±20
mA
IOK
Output clamp current (VO < 0 or VO > VDD)
±20
mA
TA
Operating free-air temperature
–40
85
°C
Tstg
Storage temperature
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
All voltage values are with respect to GND. For reliable operation, do not operate the device at 7 V for more than t = 1000h
continuously.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC
JS-001(1)
UNIT
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V
±500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
at specified temperature range (unless otherwise noted)
MIN
VDD
Supply voltage
NOM
MAX
2
CIN
VDD bypass capacitor
TA
Operating free-air temperature range
6
0.1
UNIT
V
µF
85
–40
°C
7.4 Thermal Information
TLV809
THERMAL METRIC(1)
DBV (SOT-23)
DBZ (SOT-23)
UNIT
3 PINS
3 PINS
RθJA
Junction-to-ambient thermal resistance
242.1
286.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
213.0
105.6
°C/W
RθJB
Junction-to-board thermal resistance
123.4
124.4
°C/W
ψJT
Junction-to-top characterization parameter
45.7
25.8
°C/W
ψJB
Junction-to-board characterization parameter
130.9
107.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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7.5 Electrical Characteristics
at TA = –40°C to +85°C (unless otherwise noted); typical values are at TA = 25°C
PARAMETER
TEST CONDITIONS
VDD = 2.5 V to 6 V, IOH = –500 µA
VOH
VOL
VIT–
High-level output voltage
MIN
VDD = 3.3 V, IOH = –2 mA
VDD – 0.4
VDD = 6 V, IOH = –4 mA
VDD – 0.4
VDD = 2 V to 6 V, IOH = 500 µA
0.3
VDD = 3.3 V, IOH = 2 mA
0.4
VDD = 6 V, IOH = 4 mA
0.4
Power-up reset voltage(1)
VDD ≥ 1.1 V, IOL = 50 µA
0.2
Negative-going input
threshold voltage(2)
TLV809J25
2.20
2.25
2.30
TLV809L30
2.58
2.64
2.70
2.87
2.93
2.99
4.45
4.55
4.65
TLV809K33
Hysteresis
Supply current
CI
Input capacitance
UNIT
V
Low-level output voltage
IDD
(1)
(2)
MAX
VDD – 0.2
TA = –40°C to +85°C
TLV809I50
Vhys
TYP
TLV809J25
30
TLV809L30
35
TLV809K33
40
TLV809I50
60
V
V
mV
VDD = 2 V, RESET is unconnected
9
12
VDD = 6 V, RESET is unconnected
20
25
VI = 0 V to VDD
V
5
µA
pF
The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 ms/V.
To ensure best stability of the threshold voltage, place a bypass capacitor ( 0.1-µF ceramic) near the supply pins.
7.6 Timing Requirements
at TA = 25°C, RL = 1 MΩ, and CL = 50 pF
MIN
tw
Pulse duration at VDD
VDD = VIT– + 0.2 V, VDD = VIT– – 0.2 V
NOM
MAX
10
UNIT
µs
7.7 Switching Characteristics
at TA = 25°C, RL = 1 MΩ, and CL = 50 pF
PARAMETER
6
td
Delay time
tPHL
Propagation (delay) time,
high-to-low-level output
VDD to RESET delay
TEST CONDITIONS
MIN
TYP MAX
VDD ≥ VIT– + 0.2 V; see 图 7-1
120
200
VIL = VIT– – 0.2 V, VIH = VIT– + 0.2 V
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10
280
UNIT
ms
µs
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7.8 Timing Diagrams
VDD
V(NOM)
VIT
1.1 V
t
RESET
1
0
t
td
td
For VDD < 1.1 V Undefined
Behavior of RESET Output
图 7-1. Timing Diagram
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7.9 Typical Characteristics
2.75
20
VDD = 2.5 V
+85°C
2.25
2.00
TA = 25°C
1.75
1.50
TA = 85°C
1.25
TA = 0°C
1.00
15
ICC - Supply Current - mA
VOL − Low-Level Output Voltage − V
2.50
0.75
+25°C
10
0°C
5
TA =−40°C
0.50
+40°C
0.25
0.00
0.0
2.5
5.0
7.5
10.0
0
12.5
1
0
2
3
4
VCC - Supply Voltage - V
IOL − Low-Level Output Current − mA
5.5
5.0
4.5
TA =−40°C
4.0
3.5
TA = 0°C
3.0
2.5
TA = 85°C
2.0
1.5
1.0
VDD = 2.5 V
2.75
2.50
VOH − High-Level Output Voltage − V
VOH − High-Level Output Voltage − V
3.00
VDD = 6 V
6.0
6
图 7-3. Supply Current vs Supply Voltage
图 7-2. Low-Level Output Voltage vs Low-Level
Output Current
6.5
5
TA = 25°C
2.25
2.00
TA =−40°C
1.75
1.50
TA = 0°C
1.25
1.00
TA = 85°C
0.75
0.50
TA = 25°C
0.25
0.5
0.0
0.00
0
−10
−20
−30
−40
−50
0
−2
IOH − High-Level Output Current − mA
V IT (T A ), V IT (25 ° C)
图 7-4. High-Level Output Voltage vs High-Level
Output Current
Normalized Threshold Voltage
−4
−6
−8
−10
IOH − High-Level Output Current − mA
图 7-5. High-Level Output Voltage vs High-Level
Output Current
1.001
VDD = 2.3 V
1.000
0.999
0.998
0.997
0.996
0.995
−40
−20
0
20
40
60
85
TA − Free-Air Temperature − °C
图 7-6. Normalized Input Threshold Voltage vs Free-Air Temperature at VDD
8
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8 Detailed Description
8.1 Overview
The TLV809 is a 3-pin voltage detector with fixed detection thresholds, an active-low push-pull RESET output,
and an internal timer to delay the RESET signal when VDD rises above the threshold voltage.
8.2 Functional Block Diagram
TLV809
R1
_
VDD
Reset
Logic
+
Timer
RESET
+
R2
GND
Oscillator
Reference
Voltage
of 1.137 V
8.3 Feature Description
8.3.1 Supply Voltage Monitoring
The device actively monitors its supply voltage to ensure that the power supply is above a certain voltage
threshold.
The device offers various fixed threshold options that are approximately 10% below several standard supply
voltages (2.5 V, 3.0 V, 3.3 V, 5.0 V).
8.3.2 RESET Output
The device has a RESET output to indicate the status of the input power supply.
RESET is an active low signal, asserting when VDD is below the threshold voltage. When VDD rises above VIT,
there is a delay time (td) until RESET deasserts.
RESET is a push-pull output stage.
8.4 Device Functional Modes
When the input supply voltage is in its recommended operating range (2 V to 6 V), the device is in a normal
operational mode. In normal operational mode the device monitors VDD for undervoltage detection.
When the input supply is below its recommended operating range, the device is in shutdown mode and therefore
tries to assert RESET.
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
9.1.1 VDD Transient Rejection
The device has built-in rejection of fast transients on the VDD pin. The rejection of transients depends on both the
duration and the amplitude of the transient. The amplitude of the transient is measured from the bottom of the
transient to the negative threshold voltage of the device, as shown in 图 9-1.
VDD
VITTransient
Amplitude
tw
Duration
图 9-1. Voltage Transient Measurement
The device does not respond to transients that are fast duration and low amplitude or long duration and small
amplitude. Transients meeting or longer than the tw specified in the 节 7.6 section triggers a reset.
9.1.2 Reset During Power-Up and Power-Down
The device output is valid when VDD is greater than 1.1 V. When VDD is less than 1.1 V, the output transistor
turns off and becomes high impedance. The voltage on the RESET pin rises to the voltage level connected to
the pullup resistor. 图 9-2 shows a typical waveform for power-up.
VIT- + VHYS
VDD
1.1 V
td
RESET
Valid Output
图 9-2. Power-Up Response
10
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9.2 Typical Application
3.3-V LDO
3.3 V
5V
OUT
IN
GND
VDD
VDD
DSP, FPGA, ASIC
TLV809K33
RESET
RESET
GND
GND
图 9-3. Monitoring a 3.3-V Supply
9.2.1 Design Requirements
The device must ensure that the supply voltage does not drop more than 15% below 3.3 V. If the supply voltage
falls below 3.3 V – 15%, then the load must be disabled.
9.2.2 Detailed Design Procedure
The TLV809K33 is selected to ensure that VDD is greater than 2.87 V when the load is enabled.
9.2.3 Application Curve
2.75
VDD = 2.5 V
VOL − Low-Level Output Voltage − V
2.50
2.25
2.00
TA = 25°C
1.75
1.50
TA = 85°C
1.25
TA = 0°C
1.00
0.75
TA =−40°C
0.50
0.25
0.00
0.0
2.5
5.0
7.5
10.0
12.5
IOL − Low-Level Output Current − mA
图 9-4. Low-Level Output Voltage vs Low-Level Output Current
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10 Power Supply Recommendations
Power the device with a low-impedance supply. A 0.1-µF bypass capacitor from VDD to ground is recommended.
11 Layout
11.1 Layout Guidelines
Place the device near the load for the input power supply, with a low-impedance connection to the power supply
pins of the load to sense the supply voltage.
11.2 Layout Example
VDD
CIN
RESET
TLV809
GND Plane
图 11-1. Example Layout
12
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
TLV803 Data Sheet, SBVS157
TLV810 Data Sheet, SBVS158
12.2 Support Resources
TI E2E ™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLV809I50DBVR
ACTIVE
SOT-23
DBV
3
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VTBI
TLV809I50DBVT
ACTIVE
SOT-23
DBV
3
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VTBI
TLV809I50DBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
NIPDAUAG | SN
Level-1-260C-UNLIM
-40 to 85
BCMV
TLV809I50DBZT
ACTIVE
SOT-23
DBZ
3
250
RoHS & Green
NIPDAUAG | SN
Level-1-260C-UNLIM
-40 to 85
BCMV
TLV809J25DBVR
ACTIVE
SOT-23
DBV
3
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VTCI
TLV809J25DBVT
ACTIVE
SOT-23
DBV
3
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VTCI
TLV809J25DBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
NIPDAUAG | SN
Level-1-260C-UNLIM
-40 to 85
BCMT
TLV809J25DBZT
ACTIVE
SOT-23
DBZ
3
250
RoHS & Green
NIPDAUAG | SN
Level-1-260C-UNLIM
-40 to 85
BCMT
TLV809K33DBVR
ACTIVE
SOT-23
DBV
3
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VTRI
TLV809K33DBVT
ACTIVE
SOT-23
DBV
3
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VTRI
TLV809K33DBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
NIPDAUAG | SN
Level-1-260C-UNLIM
-40 to 85
BCMX
TLV809K33DBZT
ACTIVE
SOT-23
DBZ
3
250
RoHS & Green
NIPDAUAG | SN
Level-1-260C-UNLIM
-40 to 85
BCMX
TLV809L30DBVR
ACTIVE
SOT-23
DBV
3
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VTXI
TLV809L30DBVT
ACTIVE
SOT-23
DBV
3
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
VTXI
TLV809L30DBZR
ACTIVE
SOT-23
DBZ
3
3000
RoHS & Green
NIPDAUAG | SN
Level-1-260C-UNLIM
-40 to 85
BCMZ
TLV809L30DBZT
ACTIVE
SOT-23
DBZ
3
250
RoHS & Green
NIPDAUAG | SN
Level-1-260C-UNLIM
-40 to 85
BCMZ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
13-Jul-2021
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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