TMCS1101A4UQDR

TMCS1101 SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 TMCS1101 1.5% Precision, Basic Isolation Hall-Effect Current Sensor With ±600-V Working Voltage 1 Features 3 Description • The TMCS1101 is a galvanically isolated Hall-effect current sensor capable of DC or AC current measurement with high accuracy, excellent linearity, and temperature stability. A low-drift, temperaturecompensated signal chain provides < 1.5% full-scale error across the device temperature range. • • • • • • • • • Total error: ±0.51% typical, ±1.15% maximum, –40°C to 85°C – Sensitivity error: ±0.5% – Offset error: 9 mA – Offset drift: 0.04 mA/°C – Linearity error: 0.05% Lifetime and environmental drift: 400 V Material group II Rated mains voltage ≤ 150 VRMS Overvoltage category I-IV Rated mains voltage ≤ 300 VRMS I-III VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 600 VPK VIOWM Maximum working isolation voltage AC voltage (sine wave); Time Dependent Dielectric Breakdown test, see Insulation Lifetime. 424 VRMS DC voltage 600 VDC VIOTM Maximum transient isolation voltage VTEST = VIOTM = 4242VPK, t = 60 s (qualification); VTEST = 1.2 × VIOTM = 5090VPK, t = 1 s (100% production) 4242 VPK VIOSM Maximum surge isolation voltage(2) Test method per IEC 62368-1, 1.2/50 µs waveform, VTEST = 1.3 × VIOSM = 7800VPK (qualification) 6000 VPK Method a: After I/O safety test subgroup 2/3, Vini = VIOTM = 4242VPK, tini = 60 s; Vpd(m) = 1.2 × VIORM = 700VPK, tm = 10 s ≤5 Method a: After environmental tests subgroup 1, Vini = VIOTM = 4242VPK, tini = 60 s; Vpd(m) = 1.2 × VIORM = 700VPK, tm = 10 s ≤5 Method b3: At routine test (100% production) and preconditioning (type test) Vini = 1.2 × VIOTM = 5090VPK, tini = 1 s; Vpd(m) = 1.2 × VIOTM = 5090VPK, tm = 1 s ≤5 Apparent charge(3) qpd Barrier capacitance, input to output(4) CIO RIO Isolation resistance, input to output(4) VIO = 0.4 sin (2πft), f = 1 MHz pC 0.6 pF VIO = 500 V, TA = 25°C >1012 Ω VIO = 500 V, 100°C ≤ TA ≤ 125°C >1011 Ω VIO = 500 V at TS = 150°C >109 Ω Pollution degree 2 UL 1577 VISO (1) (2) Withstand isolation voltage VTEST = VISO, t = 60 s (qualification); VTEST = 1.2 × VISO, t = 1 s (100% production) 3000 VRMS Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Take care to maintain the creepage and clearance distance of the board design to make sure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these specifications. Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 5 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 (3) (4) Apparent charge is electrical discharge caused by a partial discharge (pd). All pins on each side of the barrier tied together creating a two-terminal device 7.7 Safety-Related Certifications UL UL 1577 Component Recognition Program Certified according to IEC 62368-1 CB File number: E181974 Certificate number: US-36733-UL 7.8 Safety Limiting Values Safety limiting intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry. PARAMETER MIN IS Safety input current (side 1)(1) IS Safety input, output, or supply current (side 2)(1) RθJA = 36.6°C/W, VI = 5 V, TJ = 150°C, TA = 25°C, see Thermal Derating Curve, Side 2. PS Safety input, output, or total power(1) RθJA = 36.6°C/W, TJ = 150°C, TA = 25°C, see Thermal Derating Curve, Both Sides. TS Safety temperature(1) (1) 6 TEST CONDITIONS RθJA = 36.6°C/W, TJ = 150°C, TA = 25°C, see Thermal Derating Curve, Side 1. TYP MAX UNIT 30 A 0.68 3.4 W 150 ℃ The maximum safety temperature, TS, has the same value as the maximum junction temperature, TJ, specified for the device. The IS and PS parameters represent the safety current and safety power respectively. The maximum limits of IS and PS should not be exceeded. These limits vary with the ambient temperature, TA. The junction-to-air thermal resistance, RθJA, in the Thermal Information table is that of a device installed on the TMCS1101EVM. Use these equations to calculate the value for each parameter: TJ = TA + RθJA × P, where P is the power dissipated in the device. TJ(max) = TS = TA + RθJA × PS, where TJ(max) is the maximum allowed junction temperature. PS = IS × VI, where VI is the maximum input voltage. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 7.9 Electrical Characteristics at TA = 25°C, VS = 5 V (unless otherwise noted) PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT OUTPUT Sensitivity(7) Sensitivity error Sensitivity error, including lifetime and environmental drift (5) Sensitivity error Nonlinearity error VOE Output voltage offset error(1) Output voltage offset drift TMCS1101A1B 50 mV/A TMCS1101A2B 100 mV/A TMCS1101A3B 200 mV/A TMCS1101A4B 400 mV/A TMCS1101A1U 50 mV/A TMCS1101A2U 100 mV/A TMCS1101A3U 200 mV/A TMCS1101A4U 400 mV/A 0.05 V ≤ VOUT ≤ VS – 0.2 V, TA= 25ºC ±0.3% ±0.8% TMCS1101A1U, 0.05 V ≤ VOUT ≤ 3 V, TA= 25ºC ±0.3% ±0.8% -0.47% ±1.02% 0.05 V ≤ VOUT ≤ VS – 0.2 V, TA= –40ºC to +85ºC ±0.5% ±1% TMCS1101A1U, 0.05 V ≤ VOUT ≤ 3 V, TA= –40ºC to +85ºC ±0.5% ±1% 0.05 V ≤ VOUT ≤ VS – 0.2 V, TA= –40ºC to +125ºC ±0.6% ±1.25% TMCS1101A1U, 0.05 V ≤ VOUT ≤ 3 V, TA= –40ºC to +125ºC ±0.6% ±1.25% 0.05 V ≤ VOUT ≤ VS – 0.2 V, TA= 25ºC VOUT = 0.5 V to VS – 0.5 V ±0.05% TMCS1101A1U, VOUT = 0.5 V to 3 V ±0.05% TMCS1101A1B ±1 ±4.5 mV TMCS1101A2B ±1 ±6 mV TMCS1101A3B ±1.3 ±9 mV TMCS1101A4B ±2.4 ±21 mV TMCS1101A1U ±1.2 ±5 mV TMCS1101A2U ±1 ±8 mV TMCS1101A3U ±2.3 ±10 mV TMCS1101A4U ±12.4 ±28 mV TMCS1101A1B, TA= –40ºC to +125ºC ±5.4 ±14 µV/℃ TMCS1101A2B, TA= –40ºC to +125ºC ±3.5 ±21 µV/℃ TMCS1101A3B, TA= –40ºC to +125ºC ±7.4 ±37 µV/℃ TMCS1101A4B, TA= –40ºC to +125ºC ±27.6 ±140 µV/℃ TMCS1101A1U, TA= –40ºC to +125ºC ±7 ±16 µV/℃ TMCS1101A2U, TA= –40ºC to +125ºC ±9 ±22 µV/℃ TMCS1101A3U, TA= –40ºC to +125ºC ±14 ±41 µV/℃ TMCS1101A4U, TA= –40ºC to +125ºC ±36 ±144 µV/℃ Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 7 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 at TA = 25°C, VS = 5 V (unless otherwise noted) PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT ±20 ±90 mA TMCS1101A2B ±10 ±60 mA TMCS1101A3B ±6.5 ±45 mA TMCS1101A4B ±6 ±52.5 mA TMCS1101A1U ±24 ±100 mA TMCS1101A2U ±10 ±80 mA TMCS1101A3U ±11.5 ±50 mA TMCS1101A4U ±31 ±70 mA TMCS1101A1B, TA= –40ºC to +125ºC ±108 ±280 µA/°C TMCS1101A2B, TA= –40ºC to +125ºC ±35 ±210 µA/°C TMCS1101A3B, TA= –40ºC to +125ºC ±37 ±185 µA/°C TMCS1101A4B, TA= –40ºC to +125ºC ±69 ±350 µA/°C TMCS1101A1U, TA= –40ºC to +125ºC ±140 ±320 µA/°C TMCS1101A2U, TA= –40ºC to +125ºC ±90 ±220 µA/°C TMCS1101A3U, TA= –40ºC to +125ºC ±70 ±205 µA/°C TMCS1101A4U, TA= –40ºC to +125ºC ±90 ±360 µA/°C VS = 3 V to 5.5 V, TMCS1101A1B/UA3B/U, TA= –40ºC to +125ºC ±1 ±3 mV/V VS = 4.5 V to 5.5 V, TMCS1101A4B/U, TA= –40ºC to +125ºC ±1 ±6.5 mV/V TMCS1101A1B Offset error, RTI(1) (3) IOS Offset error temperature drift, RTI(3) PSRR Power-supply rejection ratio CMTI Common mode transient immunity CMRR Common mode rejection ratio, RTI(3) DC to 60Hz 50 kV/µs 5 uA/V (1) TMCS1101AU 0.1*VS V/V Zero current VOUT (1) TMCS1101AB 0.5*VS V/V Zero current VOUT TMCS1101A1B 380 μA/√Hz TMCS1101A2B 330 μA/√Hz TMCS1101A3B 300 μA/√Hz TMCS1101A4B 225 μA/√Hz TMCS1101A1U 380 μA/√Hz TMCS1101A2U 330 μA/√Hz TMCS1101A3U 300 μA/√Hz TMCS1101A4U 225 μA/√Hz Input conductor resistance IN+ to IN– 1.8 mΩ Input conductor resistance temperature drift TA= –40ºC to +125ºC 4.4 μΩ/°C Magnetic coupling factor TA= 25ºC 1.1 mT/A TA= 25ºC 30 A TA= 85ºC 25 A TA= 105ºC 22.5 A TA= 125ºC 16 A Noise density, RTI(3) INPUT RIN G IIN,max Allowable continuous RMS current (4) NC (Pin 6) input impedance Over allowable range, GND < VNC < VS 1 MΩ VOLTAGE OUTPUT ZOUT Closed loop output impedance Maximum capacitive load 8 f = 1 Hz to 1 kHz 0.2 Ω f = 10 kHz 2 Ω No sustained oscillation 1 nF Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 at TA = 25°C, VS = 5 V (unless otherwise noted) PARAMETERS TEST CONDITIONS Short circuit output current VOUT short to ground, short to VS Swing to VS power-supply rail RL = 10 kΩ to GND, TA= –40ºC to +125ºC Swing to GND RL = 10 kΩ to GND, TA= –40ºC to +125ºC MIN TYP MAX 90 UNIT mA VS – 0.02 VS – 0.1 V VGND + 5 VGND + 10 mV FREQUENCY RESPONSE BW Bandwidth(6) –3-dB Bandwidth 80 kHz SR Slew rate(6) Slew rate of output amplifier during single transient step. 1.5 V/µs tr Response time(6) Time between the input current step reaching 90% of final value to the sensor output reaching 90% of its final value, for a 1V output transition. 6.5 µs delay(6) Time between the input current step reaching 10% of final value to the sensor output reaching 10% of its final value, for a 1V output transition. 4 µs Current overload response time(6) Time between the input current step reaching 90% of final value to the sensor output reaching 90% of its final value. Input current step amplitude is twice full scale output range. 5 µs Current overload propagation delay(6) Time between the input current step reaching 10% of final value to the sensor output reaching 10% of its final value. Input current step amplitude is twice full scale output range. 3 µs Current overload recovery time Time from end of current causing output saturation condition to valid output 15 µs TA = 25ºC 4.5 tp tr,SC tp,SC Propagation POWER SUPPLY IQ Quiescent current Power on time (1) (2) (3) (4) (5) (6) (7) TA = –40ºC to +125ºC Time from VS > 3 V to valid output 25 5.5 mA 6 mA ms Excludes effect of external magnetic fields. See the Accuracy Parameters section for details to calculate error due to external magnetic fields. Excluding magnetic coupling from layout deviation from recommended layout. See the Layout section for more information. RTI = referred-to-input. Output voltage is divided by device sensitivity to refer signal to input current. See the Parameter Measurement Information section. Thermally limited by junction temperature. Applies when device mounted on TMCS1101EVM. For more details, see the Safe Operating Area section. Lifetime and environmental drift specifications based on three lot AEC-Q100 qualification stress test results. Typical values are population mean+1σ from worst case stress test condition. Min/max are tested device population mean±6σ; devices tested in AECQ100 qualification stayed within min/max limits for all stress conditions. See Lifetime and Environmental Stability section for more details. Refer to the Transient Response section for details of frequency and transient response of the device. Centered parameter based on TMCS1101EVM PCB layout. See Layout section. Device must be operated below maximum junction temperature. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 9 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 7.10 Typical Characteristics 0.8 0.6 A1B A2B A3B A4B 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -50 -25 0 25 50 75 Temperature (°C) 100 125 -0.2 -0.4 -0.6 -1 -50 25 50 75 Temperature (°C) 100 125 150 100 Input Current Offset (mA) 75 A1U A2U A3U A4U 125 50 25 0 -25 -50 -75 -100 75 50 25 0 -25 -50 -75 -100 -125 -125 -150 -50 -150 -50 -25 0 25 50 75 Temperature (°C) 100 125 150 Figure 7-3. TMCS1101AxB Input Offset Current vs Temperature -25 0 25 50 75 Temperature (°C) 100 125 150 Figure 7-4. TMCS1101AxU Input Offset Current vs Temperature 0.3 0.25 A1B A2B A3B A4B Non-linearity (%) 0.2 0.18 0.12 0.06 A1U A2U A3U A4U 0.15 0.1 0.05 -25 0 25 50 75 Temperature (°C) 100 125 150 0 -50 -25 TMCS1101AxB 0 25 50 75 Temperature (°C) 100 125 150 TMCS1101AxU Figure 7-5. Non-Linearity vs. Temperature 10 0 150 100 0 -50 -25 Figure 7-2. TMCS1101AxU Sensitivity Error vs Temperature A1B A2B A3B A4B 125 Input Current Offset (mA) 0 150 150 Non-linearity (%) 0.2 -0.8 Figure 7-1. TMCS1101AxB Sensitivity Error vs Temperature 0.24 A1U A2U A3U A4U 0.4 Sensitivity Error (%) Sensitivity Error (%) 0.6 Figure 7-6. Non-Linearity vs. Temperature Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com D028 Sensitivity Error (%) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0 0.1 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 Population -0.8 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0 0.1 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 Population SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 Sensitivity Error (%) D033 Figure 7-8. Sensitivity Error Production Distribution -90 -82 -74 -66 -58 -50 -42 -34 -26 -18 -10 -2 6 14 22 30 38 46 54 62 70 78 86 -100 -92 -84 -76 -68 -60 -52 -44 -36 -28 -20 -12 -4 4 12 20 28 36 44 52 60 68 76 84 92 100 Figure 7-7. Sensitivity Error Production Distribution Population TMCS1101AxU Population TMCS1101AxB D029 IOS (mA) IOS (mA) TMCS1101A1B D034 TMCS1101A1U Population Figure 7-10. Input Offset Current Production Distribution IOS (mA) -80 -72 -64 -56 -48 -40 -32 -24 -16 -8 0 8 16 24 32 40 48 56 64 72 80 -60 -54 -48 -42 -36 -30 -24 -18 -12 -6 0 6 12 18 24 30 36 42 48 54 60 Population Figure 7-9. Input Offset Current Production Distribution D030 IOS (mA) TMCS1101A2B D035 TMCS1101A2U Figure 7-11. Input Offset Current Production Distribution Figure 7-12. Input Offset Current Production Distribution Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 11 TMCS1101 www.ti.com Population -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 45 50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 45 Population SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 D031 IOS (mA) D036 IOS (mA) TMCS1101A3B TMCS1101A3U IOS (mA) -70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 -52.5 -47.5 -42.5 -37.5 -32.5 -27.5 -22.5 -17.5 -12.5 -7.5 -2.5 2.5 7.5 12.5 17.5 22.5 27.5 32.5 37.5 42.5 47.5 52.5 Population Figure 7-14. Input Offset Current Production Distribution Population Figure 7-13. Input Offset Current Production Distribution D032 D037 IOS (mA) TMCS1101A4B TMCS1101A4U Figure 7-15. Input Offset Current Production Distribution Figure 7-16. Input Offset Current Production Distribution 4 30 3 0 2 -30 0 Phase (°) Gain (dB) 1 -1 -2 -3 -4 All gains 80kHz -3dB -150 100 1k 10k Frequency (Hz) 100k 1M Figure 7-17. Sensitivity vs. Frequency, All Gains Normalized to 1 Hz 12 -90 -120 -5 -6 10 -60 -180 10 100 1k Frequency (Hz) 10k 100k Figure 7-18. Phase vs. Frequency, All Gains Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 100 GND + 3 GND + 2.5 GND + 2 GND + 1.5 GND + 1 GND + 0.5 GND 0 20 40 60 80 100 120 140 160 Output Current (mA) 5 4.8 4.6 4.4 0 25 50 75 Temperature (°C) 100 125 1k 10k Frequency (Hz) 100k 1M 400 350 300 250 200 A1 A2 150 10 150 Figure 7-21. Quiescent Current vs. Temperature A3 A4 100 1k Frequency (Hz) 10k 100k Figure 7-22. Input-Referred Noise vs. Frequency 90 4 90 75 3.5 75 60 3 60 3 45 2.5 45 2.5 30 2 30 2 15 1.5 15 1.5 IIN V1 1 V2 0.5 0 -15 Output Voltage (V) Input Current (A) Referred-to-Input Current Noise (uA/—Hz) A1B/U A2B/U A3B/U A4B/U 100 Figure 7-20. Output Impedance vs. Frequency Input Current (A) Quiescent Current (mA) 5.2 -25 1 0.1 10 Figure 7-19. Output Swing vs. Output Current 4.2 -50 10 4 IIN V1 3.5 V2 0 Output Voltage (V) VS (VS) – 0.5 (VS) – 1 (VS) – 1.5 (VS) – 2 (VS) – 2.5 (VS) – 3 Closed-loop Output Impedance (:) Output Voltage Swing (V) www.ti.com 1 -15 0.5 Time (4Ps/div) Time (4Ps/div) Figure 7-23. Voltage Output Step, Rising Figure 7-24. Voltage Output Step, Falling Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 13 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 50 4 40 3 30 2 20 1 10 0 0 -1 7.5 7.5 TMCS1101AxB VSUPPLY TMCS1101AxU Supply Voltage (V) 5 6 2.5 4.5 0 3 -2.5 1.5 -5 -10 0 -7.5 -2 Output Voltage (V) 60 6 IIN VOUT 5 Output Voltage (V) Input Current (A) 70 -1.5 Time (5Ps/div) Time (4Ps/div) Figure 7-26. Startup Transient Response Figure 7-25. Current Overload Response 2.4 2.3 2.2 RIN (m:) 2.1 2 1.9 1.8 1.7 1.6 1.5 1.4 -50 -25 0 25 50 75 Temperature (°C) 100 125 150 Figure 7-27. Input Conductor Resistance vs. Temperature 35 0.8 30 0.7 Safety Limiting Current (A) Safety Limiting Current (A) 7.10.1 Insulation Characteristics Curves 25 20 15 10 5 0.5 0.4 0.3 0.2 0.1 0 0 0 20 40 60 80 100 120 Ambient Temperature (°C) 140 160 Figure 7-28. Thermal Derating Curve for SafetyLimiting Current, Side 1 14 0.6 0 20 40 60 80 100 120 Ambient Temperature (°C) 140 160 Figure 7-29. Thermal Derating Curve for SafetyLimiting Current, Side 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 4 Saftey Limiting Power (W) 3.5 3 2.5 2 1.5 1 0.5 0 0 20 40 60 80 100 120 Ambient Temperature (°C) 140 160 Figure 7-30. Thermal Derating Curve for Safety-Limiting Power Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 15 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 8 Parameter Measurement Information 8.1 Accuracy Parameters The ideal first-order transfer function of the TMCS1101 is given by Equation 1, where the output voltage is a linear function of input current. The accuracy of the device is quantified both by the error terms in the transfer function parameters, as well as by nonidealities that introduce additional error terms not in the simplified linear model. See Total Error Calculation Examples for example calculations of total error, including all device error terms. where • • • • VOUT is the analog output voltage. S is the ideal sensitivity of the device. IIN is the isolated input current. VREF is the voltage applied to the reference voltage input. VOUT = S × IIN + VOUT,0A (1) where • • • • VOUT is the analog output voltage. S is the ideal sensitivity of the device. IIN is the isolated input current. VOUT,0A is the zero current output voltage for the device variant. 8.1.1 Sensitivity Error Sensitivity is the proportional change in the sensor output voltage due to a change in the input conductor current. This sensitivity is the slope of the first-order transfer function of the sensor, as shown in Figure 8-1. The sensitivity of the TMCS1101 is tested and calibrated at the factory for high accuracy. VOUT (V) VOUT, 0 A + VFS+ VNL S = Slope (V/A) best fit linear VOUT, 0 A VOUT, 0 A VOE 0.1xVS (AxU) 0.5xVS (AxB) VOUT, 0 A ± VFS± IFS± IIN (A) IFS+ Figure 8-1. Sensitivity, Offset, and Nonlinearity Error 16 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 Deviation from ideal sensitivity is quantified by sensitivity error, defined as the percent variation of the best-fit measured sensitivity from the ideal sensitivity. When specified over a temperature range, this is the worst-case sensitivity error at any temperature within the range. eS = [(Sfit – Sideal) / Sideal] × 100% (2) where • • • eS is the sensitivity error. Sfit is the best fit sensitivity. SIdeal is the ideal sensitivity. 8.1.2 Offset Error and Offset Error Drift Offset error is the deviation from the ideal output voltage with zero input current through the device. Offset error can be referred to the output as a voltage error VOE or referred to the input as a current offset error IOS. Offset error is a single error source, however, and must only be included once in error calculations. The output voltage offset error of the TMCS1101 is the deviation of the measured VOUT with zero input current from the ideal value of the zero current output voltage. This ideal voltage is either 10% of VS for unidirectional devices (AxU) or 50% of VS for bidirectional devices (AxB), as shown in Equation 3 and Equation 4, respectively. VOE VOUT,0A VS * 0.1 (3) VOE VOUT,0A VS * 0.5 (4) where • VOUT,0A is the device output voltage with zero input current. The offset error includes errors in the internal reference, the magnetic offset of the Hall sensor and any offset voltage errors of the signal chain. The input referred (RTI) offset error is the output voltage offset error divided by the sensitivity of the device, shown in Equation 5. Refer the offset error to the input of the device to allow for easier total error calculations and direct comparison to input current levels. No matter how the calculations are done, the error sources quantified by VOE and IOS are the same, and should only be included once for error calculations. IOS VOE / S (5) Offset error drift is the change in the input-referred offset error per degree Celsius change in ambient temperature. This parameter is reported in µA/°C. To convert offset drift to an absolute offset for a given change in temperature, multiply the drift by the change in temperature and convert to percentage, as in Equation 6. IOS,25qC eIOS ,'T % § PA · IOS,drift ¨ ¸ u 'T © qC ¹ IIN (6) where • • IOS,drift is the specified input-referred device offset drift. ΔT is the temperature range from 25°C. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 17 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 8.1.3 Nonlinearity Error Nonlinearity is the deviation of the output voltage from a linear relationship to the input current. Nonlinearity voltage, as shown in Figure 8-1, is the maximum voltage deviation from the best-fit line based on measured parameters, calculated by Equation 7. VNL = VOUT,MEAS – (IMEAS × Sfit + VOUT,0A) (7) where • • • • VOUT,MEAS is the voltage output at maximum deviation from best fit. IMEAS is the input current at maximum deviation from best fit. Sfit is the best-fit sensitivity of the device. VOUT,0A is the device zero current output voltage. Nonlinearity error (eNL) for the TMCS1101 is the nonlinearity voltage specified as a percentage of the full-scale output range (VFS), as shown in Equation 8. eNL 100% * VNL VFS (8) 8.1.4 Power Supply Rejection Ratio Power supply rejection ratio (PSRR) is the change in device offset due to variation of supply voltage from the nominal 5 V. The error contribution at the input current of interest can be calculated by Equation 9. ePSRR (%) PSRR * (VS S IIN 5) (9) where • • VS is the operational supply voltage. S is the device sensitivity. 8.1.5 Common-Mode Rejection Ratio Common-mode rejection ratio (CMRR) quantifies the effective input current error due to a varying voltage on the isolated input of the device. Due to magnetic coupling and galvanic isolation of the current signal, the TMCS1101 has very high rejection of input common-mode voltage. Percent error contribution from input common-mode variation can be calculated by Equation 10. eCMRR (%) CMRR * VCM IIN (10) where • VCM is the maximum operational AC or DC voltage on the input of the device. 8.1.6 External Magnetic Field Errors The TMCS1101 does not have stray field-rejection capabilities, so external magnetic fields from adjacent highcurrent traces or nearby magnets can impact the output measurement. The total sensitivity (S) of the device is comprised of the initial transformation of input current to magnetic field quantified as the magnetic coupling factor (G), as well as the sensitivity of the Hall element and the analog circuitry that is factory calibrated to provide a final sensitivity. The output voltage is proportional to the input current by the device sensitivity, as defined in Equation 11. 18 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com S SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 G * SHall * A V (11) where • • • • S is the TMCS1101 sensitivity in mV/A. G is the magnetic coupling factor in mT/A. SHall is the sensitivity of the Hall plate in mV/mT. AV is the calibrated analog circuitry gain in V/V. An external field, BEXT, is measured by the Hall sensor and signal chain, in addition to the field generated by the leadframe current, and is added as an extra input term in the total output voltage function: VOUT BEXT * SHall * A V IIN * G * SHall * A V VOUT,0A (12) Observable from Equation 12 is that the impact of an external field is an additional equivalent input current signal, IBEXT, shown in Equation 13. This effective additional input current has no dependence on Hall or analog circuitry sensitivity, so all gain variants have equivalent input-referred current error due to external magnetic fields. IBEXT BEXT G (13) This additional current error generates a percentage error defined by Equation 14. eBEXT (%) BEXT G IIN (14) 8.2 Transient Response Parameters 90 4 75 3.5 60 3 45 2.5 30 2 15 1.5 Output Voltage (V) Input Current (A) The transient response of the TMCS1101 is impacted by the 250 kHz sampling rate as defined in Transient Response. Figure 8-2 shows the TMCS1101 response to an input current step sufficient to generate a 1V output change. The typical 4us sampling window can be observed as a periodic step. This sampling window dominates the response of the device, and the response will have some probabilistic nature due to alignment of the input step and the sampling window interval. IIN V1 1 V2 0.5 0 -15 Time (4Ps/div) Figure 8-2. Transient Step Response 8.2.1 Slew Rate Slew rate (SR) is defined as the VOUT rate of change for a single integration step’s output transition, as shown in Figure 8-3. Because the device often requires two sampling windows to reach a full 90% settling of its final value, this slew rate is not equal to the 10%-90% transition time for the full output swing. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 19 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 Input Current Input Current Input Current tr 90% 4 s Sample Window 1V SR tr 90% 4 s Sample Window tr 90% SR 4 s Sample Window 1V VOUT response 1V VOUT response SR VOUT response 10% tp 10% tp 10% tp Figure 8-3. Small Current Input Step Transient Response 8.2.2 Propagation Delay and Response Time Propagation delay is the time period between the input current waveform reaching 10% of its final value and VOUT reaching 10% of its final value. This propagation delay is heavily dependent upon the alignment of the input current step and the sampling period of the TMCS1101, as shown for several different sampling window cases in Figure 8-3. Response time is the time period between the input current reaching 90% of its final value and the output reaching 90% of its final value, for an input current step sufficient to cause a 1-V transition on the output. Figure 8-3 shows the response time of the TMCS1101 under three different time cases. Unless a step input occurs directly during the beginning of one sampling window the response time will include two sampling intervals. 8.2.3 Current Overload Parameters Current overload response parameters are the transient behavior of the TMCS1101 to an input current step consistent with a short circuit or fault event. Tested amplitude is twice the full scale range of the device, or 10V / Sensitivity in V/A. Under these conditions, the TMCS1101 output will respond faster than in the case of a small input current step due to the higher input amplitude signal. Response time and propagation delay are measured in a similar manner to the case of a small input current step, as shown in Figure 8-4. Input Current tr 90% û IIN = 10 V / S VOUT response SR 10% tp Figure 8-4. Current Overload Transient Response Current overload recovery time is the required time for the device output to exit a saturated condition and return to normal operation. The transient response of the device during this recovery period from a current overload is shown in Figure 7-25. 8.2.4 CMTI, Common-Mode Transient Immunity CMTI is the capability of the device to tolerate a rising/falling voltage step on the input without disturbance on the output signal. The device is specified for the maximum common-mode transition rate under which the output signal will not experience a greater than 200-mV disturbance that lasts longer than 1 µs. Higher edge rates than the specified CMTI can be supported with sufficient filtering or blanking time after common-mode transitions. 20 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 8.3 Safe Operating Area The isolated input current safe operating area (SOA) of the TMCS1101 is constrained by self-heating due to power dissipation in the input conductor. Depending upon the use case, the SOA is constrained by multiple conditions, including exceeding maximum junction temperature, Joule heating in the leadframe, or leadframe fusing under extremely high currents. These mechanisms depend on pulse duration, amplitude, and device thermal states. Current SOA strongly depends on the thermal environment and design of the system-level board. Multiple thermal variables control the transfer of heat from the device to the surrounding environment, including air flow, ambient temperature, and printed-circuit board (PCB) construction and design. All ratings are for a single TMCS1101 device on the TMCS1101EVM, with no air flow in the specified ambient temperature conditions. Device use profiles must satisfy both continuous conduction and short-duration transient SOA capabilities for the thermal environment under which the system will be operated. 8.3.1 Continuous DC or Sinusoidal AC Current The longest thermal time constants of device packaging and PCBs are in the order of seconds; therefore, any continuous DC or sinusoidal AC periodic waveform with a frequency higher than 1 Hz can be evaluated based on the RMS continuous-current level. The continuous-current capability has a strong dependence upon the operating ambient temperature range expected in operation. Figure 8-5 shows the maximum continuous current-handling capability of the device on the TMCS1101EVM. Current capability falls off at higher ambient temperatures because of the reduced thermal transfer from junction-to-ambient and increased power dissipation in the leadframe. By improving the thermal design of an application, the SOA can be extended to higher currents at elevated temperatures. Using larger and heavier copper power planes, providing air flow over the board, or adding heat sinking structures to the area of the device can all improve thermal performance. Maximum Continuous RMS Current (A) 35 30 25 20 15 10 -55 -35 -15 5 25 45 65 Ambient Temperature (qC) 85 105 125 D012 Figure 8-5. Maximum Continuous RMS Current vs. Ambient Temperature Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 21 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 8.3.2 Repetitive Pulsed Current SOA For applications where current is pulsed between a high current and no current, the allowable capabilities are limited by short-duration heating in the leadframe. The TMCS1101 can tolerate higher current ranges under some conditions, however, for repetitive pulsed events, the current levels must satisfy both the pulsed current SOA and the RMS continuous current constraint. Pulse duration, duty cycle, and ambient temperate all impact the SOA for repetitive pulsed events. Figure 8-6, Figure 8-7, Figure 8-8, and Figure 8-9 illustrate repetitive stress levels based on test results from the TMCS1101EVM under which parametric performance and isolation integrity was not impacted post-stress for multiple ambient temperatures. At high duty cycles or long pulse durations, this limit approaches the continuous current SOA for a RMS value defined by Equation 15. IIN,RMS IIN,P * D (15) where • • • IIN,RMS is the RMS input current level IIN,P is the pulse peak input current D is the pulse duty cycle 160 250 1% 5% 10% 25% 50% 75% 150 Allowable Current (A) Allowable Current (A) 200 1% 5% 10% 25% 50% 75% 140 100 120 100 80 60 40 50 20 0 0.001 0.01 0.1 1 Current Pulse Duration (s) 0 0.001 10 0.01 D016 TA = 25°C 0.1 1 Current Pulse Duration (s) 10 D017 TA = 85°C Figure 8-6. Maximum Repetitive Pulsed Current vs. Figure 8-7. Maximum Repetitive Pulsed Current vs. Pulse Duration Pulse Duration 140 120 1% 5% 10% 25% 50% 75% 100 80 60 40 80 60 40 20 20 0 0.001 1% 5% 10% 25% 50% 75% 100 Allowable Current (A) Allowable Current (A) 120 0.01 0.1 1 Current Pulse Duration (s) 10 0 0.001 D018 TA = 105°C 0.01 0.1 1 Current Pulse Duration (s) 10 D019 TA = 125°C Figure 8-8. Maximum Repetitive Pulsed Current vs. Figure 8-9. Maximum Repetitive Pulsed Current vs. Pulse Duration Pulse Duration 22 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 8.3.3 Single Event Current Capability Single higher-current events that are shorter duration can be tolerated by the TMCS1101, because the junction temperature does not reach thermal equilibrium within the pulse duration. Figure 8-10 shows the short-circuit duration curve for the device for single current-pulse events, where the leadframe resistance changes after stress. This level is reached before a leadframe fusing event, but should be considered an upper limit for short duration SOA. For long-duration pulses, the current capability approaches the continuous RMS limit at the given ambient temperature. Fuse Current (A) 1000 100 TA = 25°C TA = 125°C 10 0.001 0.01 0.1 Pulse Duration (s) 1 10 D004 Figure 8-10. Single-Pulse Leadframe Capability Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 23 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 9 Detailed Description 9.1 Overview The TMCS1101 is a precision Hall-effect current sensor, featuring a 600-V basic isolation working voltage, < 1.5% full-scale error across temperature, and device options providing both unidirectional and bidirectional current sensing. Input current flows through a conductor between the isolated input current pins. The conductor has a 1.8-mΩ resistance at room temperature for low power dissipation and a 20-A RMS continuous current handling capability up to 105°C ambient temperature on the TMCS1101EVM. The low-ohmic leadframe path reduces power dissipation compared to alternative current measurement methodologies, and does not require any external passive components, isolated supplies, or control signals on the high-voltage side. The magnetic field generated by the input current is sensed by a Hall sensor and amplified by a precision signal chain. The device can be used for both AC and DC current measurements and has a bandwidth of 80 kHz. There are multiple fixed-sensitivity device variants for a wide option of linear sensing ranges, and the TMCS1101 can operate with a low voltage supply from 3 V to 5.5 V. The TMCS1101 is optimized for high accuracy and temperature stability, with both offset and sensitivity compensated across the entire operating temperature range. 9.2 Functional Block Diagram Isolation Barrier VS Hall Element Bias Temperature Compensation ---------------------Offset Cancellation IN+ Precision Amplifier Output Amplifier VOUT VS IN± Reference Sampling GND GND 9.3 Feature Description 9.3.1 Current Input Input current to the TMCS1101 passes through the isolated side of the package leadframe through the IN+ and IN– pins. The current flow through the package generates a magnetic field that is proportional to the input current, and measured by a galvanically isolated, precision, Hall sensor IC. As a result of the electrostatic shielding on the Hall sensor die, only the magnetic field generated by the input current is measured, thus limiting input voltage switching pass-through to the circuitry. This configuration allows for direct measurement of currents with high-voltage transients without signal distortion on the current-sensor output. The leadframe conductor has a nominal resistance of 1.8 mΩ at 25°C, and has a typical positive temperature coefficient as defined in the Electrical Characteristics table. 9.3.2 Input Isolation The separation between the input conductor and the Hall sensor die due to the TMCS1101 construction provides inherent galvanic isolation between package pins 1-4 and pins 5-8. Insulation capability is defined according to certification agency definitions and using industry-standard test methods as defined in the Insulation Specifications table. Assessment of device lifetime working voltages follow the VDE 0884-11 standard for basic insulation, requiring time-dependent dielectric breakdown (TDDB) data-projection failure rates of less than 1000 part per million (ppm), and a minimum insulation lifetime of 20 years. The VDE standard also requires an additional safety margin of 20% for working voltage, and a 30% margin for insulation lifetime, translating into a minimum required lifetime of 26 years at 509 VRMS for the TMCS1101. 24 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 Figure 9-1 shows the intrinsic capability of the isolation barrier to withstand high-voltage stress over the lifetime of the device. Based on the TDDB data, the intrinsic capability of these devices is 424 VRMS with a lifetime of > 100 years. Other factors such as operating environment and pollution degree can further limit the working voltage of the component in an end system. Figure 9-1. Insulation Lifetime 9.3.3 High-Precision Signal Chain The TMCS1101 uses a precision, low-drift signal chain with proprietary sensor linearization techniques to provide a highly accurate and stable current measurement across the full temperature range of the device. The device is fully tested and calibrated at the factory to account for any variations in either silicon or packaging process variations. The full signal chain provides a fixed sensitivity voltage output that is proportional to the current through the leadframe of the isolated input. 9.3.3.1 Temperature Stability The TMCS1101 includes a proprietary temperature compensation technique which results in significantly improved parametric drift across the full temperature range. This compensation technique accounts for changes in ambient temperature, self-heating, and package stress. A zero-drift signal chain architecture and Hall sensor temperature stabilization methods enable stable sensitivity and minimize offset errors across temperature, and drastically improves system-level performance across the required operating conditions. Figure 9-2 and Figure 9-3 show the offset error across the full device ambient temperature range. Figure 9-4 and Figure 9-5 show the typical sensitivity. There are no other external components introducing errors sources; therefore, the high intrinsic accuracy and stability over temperature directly translates to system-level performance. As a result of this high precision, even a system with no calibration can reach < 1.5% of total error current-sensing capability. 150 150 Input Current Offset (mA) 100 75 50 25 0 -25 -50 -75 -100 A1U A2U A3U A4U 125 100 Input Current Offset (mA) A1B A2B A3B A4B 125 75 50 25 0 -25 -50 -75 -100 -125 -125 -150 -50 -150 -50 -25 0 25 50 75 Temperature (°C) 100 125 150 Figure 9-2. Offset Error Drift Across Temperature (B Variants) -25 0 25 50 75 Temperature (°C) 100 125 150 Figure 9-3. Offset Error Drift Across Temperature (U Variants) Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 25 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 0.8 0.6 A1B A2B A3B A4B 0.4 0.2 0 -0.2 -0.4 -0.6 A1U A2U A3U A4U 0.4 Sensitivity Error (%) Sensitivity Error (%) 0.6 0.2 0 -0.2 -0.4 -0.6 -0.8 -0.8 -50 -25 0 25 50 75 Temperature (°C) 100 125 150 -1 -50 -25 0 25 50 75 Temperature (°C) 100 125 150 Figure 9-4. Sensitivity Drift Across Temperature (B Figure 9-5. Sensitivity Drift Across Temperature (U Variants) Variants) 9.3.3.2 Lifetime and Environmental Stability The same compensation techniques used in the TMCS1101 to reduce temperature drift also greatly reduce lifetime drift due to aging, stress, and environmental conditions. Typical magnetic sensors suffer from up to 2% to 3% of sensitivity drift due to aging at high operating temperatures. The TMCS1101 has greatly improved lifetime drift, as defined in the Electrical Characteristics for total sensitivity error measured after the worst case stress test during a three lot AEC-Q100 qualification. All other stress tests prescribed by an AEC-Q100 qualification caused lower than the specified sensitivity error, and were within the bounds specified within the Electrical Characteristics table. Figure 9-6 shows the total sensitivity error after the worst-case stress test, a Highly Accelerated Stress Test (HAST) at 130°C and 85% relative humidity (RH), while Figure 9-7 and Figure 9-8 show the sensitivity and offset error drift after a 1000 hour, 125°C high temperature operating life stress test as specified by AEC-Q100. This test mimics typical device lifetime operation, and shows the likely device performance variation due to aging is vastly improved compared to typical magnetic sensors. 160 200 140 180 160 120 Unit Count Unit Count 140 100 80 60 120 100 80 60 40 40 20 20 0 -1% -.8% -.6% -.4% -.2% 0% .2% Sensitivity Drift (%) .4% .6% .8% 1% .2% Sensitivity Drift (%) D020 Figure 9-6. Sensitivity Error After 130°C, 85% RH HAST 26 0 -1% -.8% -.6% -.4% -.2% 0% .4% .6% .8% 1% D021 Figure 9-7. Sensitivity Error Drift After AEC-Q100 High Temperature Operating Life Stress Test Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 120 100 Unit Count 80 60 40 20 0 -50 -40 -30 -20 -10 0 10 20 30 IOS Drift (mA) 40 50 D022 Figure 9-8. Input-Referred Offset Drift After AEC-Q100 High Temperature Operating Life Stress Test 9.3.3.3 Frequency Response The TMCS1101 signal chain has a spectral response atypical of a linear analog system due to its discrete time sampling. The 250-kHz sampling interval implies an effective Nyquist frequency of 125 kHz, which limits spectral response to below this frequency. Higher frequency content than this frequency will be aliased down to lower spectrums. The TMCS1101 bandwidth is defined by the –3-dB spectral response of the entire signal chain which is constrained by the sampling frequency. Normalized gain and phase plots across frequency are shown below in Figure 9-9 and Figure 9-10, all variants have the same bandwidth and phase response. Signal content beyond the 3-dB bandwidth level will still have significant fundamental frequency transmission through the signal chain, but at increasing distortion levels 4 30 3 0 2 -30 0 Phase (°) Gain (dB) 1 -1 -2 -3 -4 -90 -120 All gains 80kHz -3dB -150 -5 -6 10 -60 100 1k 10k Frequency (Hz) 100k Figure 9-9. Normalized Gain, All Variants 1M -180 10 100 1k Frequency (Hz) 10k 100k Figure 9-10. Normalized Phase, All Variants 9.3.3.4 Transient Response The TMCS1101 signal chain includes a precision analog front end followed by a sampled integrator. At the end of each integration cycle, the signal propagates to the output. Depending on the alignment of a change in input current relative to the sampling window, the output might not settle to the final signal until the second integration cycle. Figure 9-11 shows a typical output waveform response to a 10-kHz sine wave input current. For a slowly varying input current signal, the output is a discrete time representation with a phase delay of the integration sampling window. Adding a first order filter of 100 kHz effectively smooths the output waveform with minimal impact to phase response. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 27 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 5.5 6 VOUT Input Current 5 VOUT, 100 kHz Filter 5 4 4 3 3.5 2 3 1 2.5 0 2 -1 1.5 -2 1 -3 0.5 -4 0 0 .00005 .0001 .00015 Time (s) .0002 Input Current (A) Output Voltage (V) 4.5 -5 .00025 D015 Figure 9-11. Response Behavior to 10-kHz Sine Wave Input Current 90 4 75 3.5 60 3 45 2.5 30 2 15 1.5 Output Voltage (V) Input Current (A) Figure 9-12 shows two transient waveforms to an input-current step event, but occurring at different times during the sampling interval. In both cases, the full transition of the output takes two sampling intervals to reach the final output value. The timing of the current event relative to the sampling window determines the proportional amplitude of the first and second sampling intervals. IIN V1 1 V2 0.5 0 -15 Time (4Ps/div) Figure 9-12. Transient Response to Input-Current Step Sufficient for 1-V Output Swing 70 6 60 5 50 4 40 3 30 2 20 1 10 Output Voltage (V) Input Current (A) The output value is effectively an average over the sampling window; therefore, a large-enough current transient can drive the output voltage to near the full scale range in the first sample response. This condition is likely to be true in the case of a short-circuit or fault event. Figure 9-13 shows an input-current step twice the full scale measurable range with two output voltage responses illustrating the effect of the sampling window. The relative timing and size of the input current transition determines both the time and amplitude of the first output transition. In either case, the total response time is slightly longer than one integration period. 0 IIN V1 -1 V2 -2 0 -10 Time (4Ps/div) Figure 9-13. Transient Response to a Large Input Current Step 28 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 9.3.4 Internal Reference Voltage The device has an internal resistor divider from the analog supply VS that determines the zero-current output voltage, VOUT,0A. This zero-current output level along with sensitivity determine the measurable input current range of the device, and allows for unidirectional or bidirectional sensing, as described in the Absolute Maximum Ratings table. The TMCS1101AxB variants have a zero-current output set by Equation 16, while the TMCS1101AxU devices have a zero-current output voltage set by Equation 17. VOUT,0A = VS × 0.5 (16) VOUT,0A = VS × 0.1 (17) These respective reference voltages enable a bidirectional measurable current range for the TMCS1101A2B devices and a unidirectional measurement range for the TMCS1101A2U devices, as shown in Figure 9-14. 5 4.5 Output Voltage (V) 4 3.5 3 2.5 2 1.5 1 TMCS1101A2U TMCS1101A2B 0.5 0 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 45 Input Current (A) D003 Figure 9-14. Output Voltage Relationship to Input Current for TMCS1101A2B and TMCS1101A2U 9.3.5 Current-Sensing Measurable Ranges The TMCS1101 measurable input current range depends on the device variant, as well as the analog supply VS. The output voltage is limited by VOUT swing to either supply or ground. The linear output swing range to both VS and GND is calculated by equations Equation 18 and Equation 19. VOUT,max = VS – SwingVS (18) VOUT,min = SwingGND (19) Rearranging the transfer function of the device to solve for input current and substituting VOUT,max and VOUT,min yields maximum and minimum measurable input current ranges described by Equation 20 and Equation 21. IIN,MAX+ = (VOUT,max – VOUT,0A) / S (20) IIN,MAX- = (VOUT,0A – VOUT,min) / S (21) where • IIN,MAX+ is the maximum linear measurable positive input current. • IIN,MAX- is the maximum linear measurable negative input current. • S is the sensitivity of the device variant. • VOUT,0A is the appropriate zero current output voltage. TMCS1101AxB variants accommodate bidirectional current sensing by creating zero-current output voltage equal to half of the supply (VS) potential, while TMCS1101AxU variants provide most of the measurable range for positive currents. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 29 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 9.4 Device Functional Modes 9.4.1 Power-Down Behavior As a result of the inherent galvanic isolation of the device, very little consideration must be paid to powering down the device, as long as the limits in the Absolute Maximum Ratings table are not exceeded on any pins. The isolated current input and the low-voltage signal chain can be decoupled in operational behavior, as either can be energized with the other shut down, as long as the isolation barrier capabilities are not exceeded. The low-voltage power supply can be powered down while the isolated input is still connected to an active high-voltage signal or system. 30 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 10 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 10.1 Application Information The key feature sets of the TMCS1101 provide significant advantages in any application where an isolated current measurement is required. • Galvanic isolation provides a high isolated working voltage and excellent immunity to input voltage transients. • Hall based measurement simplifies system level solution without the need for a power supply on the high voltage (HV) side. • An input current path through the low impedance conductor minimizes power dissipation. • Excellent accuracy and low temperature drift eliminate the need for multipoint calibrations without sacrificing system performance. • A wide operating supply range enables a single device to function across a wide range of voltage levels. These advantages increase system-level performance while minimizing complexity for any application where precision current measurements must be made on isolated currents. Specific examples and design requirements are detailed in the following section. 10.1.1 Total Error Calculation Examples Total error can be calculated for any arbitrary device condition and current level. Error sources considered should include input-referred offset current, power-supply rejection, input common-mode rejection, sensitivity error, nonlinearity, and the error caused by any external fields. Compare each of these error sources in percentage terms, as some are significant drivers of error and some have inconsequential impact to current error. Offset (Equation 22), CMRR (Equation 24), PSRR (Equation 23), and external field error (Equation 25) are all referred to the input, and so, are divided by the actual input current IIN to calculate percentage errors. For calculations of sensitivity error and nonlinearity error, the percentage limits explicitly specified in the Electrical Characteristics table can be used. eIOS (%) IOS IIN ePSRR (%) (22) PSRR * (VS S IIN 5) (23) eCMRR (%) eBEXT (%) CMRR * VCM IIN (24) BEXT G IIN (25) When calculating error contributions across temperature, only the input offset current and sensitivity error contributions vary significantly. For determining offset error over a given temperature range (ΔT), use Equation 26 to calculate total offset error current. Sensitivity error is specified for both –40°C to 85°C and –40°C to 125°C. The appropriate specification should be used based on application operating ambient temperature range. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 31 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 IOS,25qC eIOS ,'T % § PA · IOS,drift ¨ ¸ u 'T © qC ¹ IIN (26) To accurately calculate the total expected error of the device, the contributions from each of the individual components above must be understood in reference to operating conditions. To account for the individual error sources that are statistically uncorrelated, a root sum square (RSS) error calculation should be used to calculate total error. For the TMCS1101, only the input referred offset current (IOS), CMRR, and PSRR are statistically correlated. These error terms are lumped in an RSS calculation to reflect this nature, as shown in Equation 27 for room temperature and Equation 28 for across a given temperature range. The same methodology can be applied for calculating typical total error by using the appropriate error term specification. eRSS (%) eRSS,'T (%) eIOS ePSRR eIOS,'T eCMRR ePSRR 2 eBEXT 2 eCMRR 2 eS2 eBEXT 2 eNL 2 eS,'T 2 (27) eNL 2 (28) The total error calculation has a strong dependence on the actual input current; therefore, always calculate total error across the dynamic range that is required. These curves asymptotically approach the sensitivity and nonlinearity error at high current levels, and approach infinity at low current levels due to offset error terms with input current in the denominator. Key figures of merit for any current-measurement system include the total error percentage at full-scale current, as well as the dynamic range of input current over which the error remains below some key level. Figure 10-1 illustrates the RSS maximum total error as a function of input current for a TMCS1101A2B at room temperature and across the full temperature range with VS of 5 V. 10 RSS Max Error, 25°C 566 0D[ (UURU ± ƒ& WR 566 0D[ (UURU ± ƒ& WR RSS Max Total Error (%) 9 8 ƒ& ƒ& 7 6 5 4 3 2 1 0 0 5 10 15 Input Current (A) 20 25 D008 Figure 10-1. RSS Error vs. Input Current 10.1.1.1 Room Temperature Error Calculations For room-temperature total-error calculations, specifications across temperature and drift are ignored. As an example, consider a TMCS1101 A1B with a supply voltage (VS) of 3.3 V and a worst-case common-mode excursion of 600 V to calculate operating-point-specific parameters. Consider a measurement error due to an external magnetic field of 30 µT, roughly the Earth's magnetic field strength. The full-scale current range of the device in specified conditions is slightly greater than 33 A; therefore, calculate error at both 25 A and 12.5 A to highlight error dependence on the input-current level. Table 10-1 shows the individual error components and RSS maximum total error calculations at room temperature under the conditions specified. Relative to other errors, the additional error from CMRR is negligible, and can typically be ignored for total error calculations. 32 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 Table 10-1. Total Error Calculation: Room Temperature Example ERROR COMPONENT SYMBOL Input offset error eIos PSRR error ePSRR CMRR error eCMRR External Field error EQUATION eIOS (%) PSRR * (VS S IIN ePSRR (%) eBEXT (%) % TOTAL ERROR AT IIN = 12.5 A 0.36% 0.72% 0.41% 0.82% 0.01% 0.02% 0.11% 0.22% 5) CMRR * VCM IIN eCMRR (%) eBext IOS IIN % TOTAL ERROR AT IIN = 25 A BEXT G IIN Sensitivity error eS Specified in Electrical Characteristics 0.8% 0.8% Nonlinearity error eNL Specified in Electrical Characteristics 0.05% 0.05% RSS total error eRSS 1.12% 1.77% eRSS (%) eIOS ePSRR eCMRR 2 eBEXT 2 eS2 eNL 2 10.1.1.2 Full Temperature Range Error Calculations To calculate total error across any specific temperature range, Equation 27 and Equation 28 should be used for RSS maximum total errors, similar to the example for room temperatures. Conditions from the example in Room Temperature Error Calculations have been replaced with their respective equations and error components for a –40°C to 85°C temperature range below in Table 10-2. Table 10-2. Total Error Calculation: –40°C to 85°C Example ERROR COMPONENT SYMBOL Input offset error eIos,ΔT PSRR error ePSRR CMRR error eCMRR External Field error eBext EQUATION IOS,25qC eIOS ,'T % ePSRR (%) § PA · IOS,drift ¨ ¸ u 'T © qC ¹ IIN PSRR * (VS S IIN eCMRR (%) % MAX TOTAL ERROR AT IIN = 12.5 A 0.4% 0.81% 0.41% 0.82% 0.01% 0.02% 0.11% 0.22% 5) CMRR * VCM IIN eBEXT (%) % MAX TOTAL ERROR AT IIN = 25 A BEXT G IIN Sensitivity error eS,ΔT Specified in Electrical Characteristics 1% 1% Nonlinearity error eNL Specified in Electrical Characteristics 0.05% 0.05% RSS total error eRSS,ΔT 1.3% 1.94% eRSS,'T (%) eIOS,'T ePSRR eCMRR 2 eBEXT 2 eS,'T 2 eNL 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 33 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 10.2 Typical Application Inline sensing of inductive load currents, such as motor phases, provides significant benefits to the performance of a control systems, allowing advanced control algorithms and diagnostics with minimal postprocessing. A primary challenge to inline sensing is that the current sensor is subjected to full HV supply-level PWM transients driving the load. The inherent isolation of an in-package Hall-effect current sensor topology helps overcome this challenge, providing high common-mode immunity, as well as isolation between the high-voltage motor drive levels and the low-voltage control circuitry. Figure 10-2 illustrates the use of the TMCS1101 in such an application, driving the inductive load presented by a three phase motor. Figure 10-2. Inline Motor Phase Current Sensing 10.2.1 Design Requirements For current sensing of a three-phase motor application, make sure to provide linear sensing across the expected current range, and make sure that the device remains within working thermal constraints. A single TMCS1101 for each phase can be used, or two phases can be measured, and the third phase calculated on the motorcontroller host processor. For this example, consider a nominal supply of 5 V but a minimum of 4.9 V to include for some supply variation. Maximum output swings are defined according to TMCS1101 specifications, and a full-scale current measurement of ±20 A is required. Table 10-3. Example Application Design Requirements DESIGN PARAMETER EXAMPLE VALUE VS,nom 5V VS,min 4.9 V IIN,FS ±20 A 10.2.2 Detailed Design Procedure The primary design parameter for using the TMCS1101 is selecting the correct sensitivity variant, and because positive and negative current must be measured a bidirectional variant should be selected (A1B-A4B). Further consideration of noise and integration with an ADC can be explored, but is beyond the scope of this application design example. The TMCS1101AxB transfer function is effectively a transimpedance with a variable offset set by VOUT,0A, which is internally set to half of the analog supply as defined by Equation 29. VOUT = IIN × S + VOUT,0A = IIN × S + VS × .05 (29) Design of the sensing solution focuses on maximizing the sensitivity of the device while maintaining linear measurement over the expected current input range. The TMCS1101 has a slightly smaller linear output range to the supply than to ground; therefore, the measurable current range is always constrained by the positive swing to supply, SwingVS. To account for the operating margin, consider the minimum possible supply voltage VS,min. 34 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 With the previous parameters, the maximum linear output voltage range is the range between VOUT,max and VOUT,0A, as defined by Equation 30. VOUT,max – VOUT,0A = VS,min – SwingVS – 0.5 × VS,min (30) Design parameters for this example application are shown in Table 10-4 along with the calculated output range. Table 10-4. Example Application Design Parameters DESIGN PARAMETER EXAMPLE VALUE SwingVS 0.2 V VOUT,max 4.7 V VOUT,0A at VS,min 2.45 V VOUT,max – VOUT,0A 2.25 V These design parameters result in a maximum positive linear output voltage swing of 2.25 V. To determine which sensitivity variant of the TMCS1101 most fully uses this linear range, calculate the maximum current range by Equation 31 for a bidirectional current (IB,MAX). IB,max = (VOUT,max – VOUT,0A) / SA (31) where • SA is the sensitivity of the relevant A1-A4 variant. Table 10-5 shows such calculation for each gain variant of the TMCS1101 with the appropriate sensitivities. Table 10-5. Maximum Full-Scale Current Ranges With 2.25-V Positive Output Swing SENSITIVITY VARIANT SENSITIVITY TMCS1101A1B 50 mV/A IB,MAX ±45 A TMCS1101A2B 100 mV/A ±22.5 A TMCS1101A3B 200 mV/A ±11.25 A TMCS1101A4B 400 mV/A ±5.6 A In general, the highest sensitivity variant that provides for the desired full-scale current range is selected. For the design parameters in this example, the TMCS1101A2B with a sensitivity of 0.1 V/A is the proper selection because the maximum calculated ±22.5-A linear measurable range is sufficient for the desired ±20-A full-scale current. 11 Power Supply Recommendations The TMCS1101 only requires a power supply (VS) on the low-voltage isolated side, which powers the analog circuitry independent of the isolated current input. VS determines the full-scale output range of the analog output VOUT, and can be supplied with any voltage between 3 V and 5.5 V. The TMCS1101 zero-current output voltage is derived from verses using a resistor divider; therefore, take care to optimize the power supply path for both noise and stability across temperature to provide the highest precision measurement. To filter noise in the power-supply path, place a low-ESR decoupling capacitor of 0.1 µF between VS and GND pins as close as possible to the supply and ground pins of the device. To compensate for noisy or high-impedance power supplies, add more decoupling capacitance. The TMCS1101 power supply VS can be sequenced independently of current flowing through the input. However, there is a typical 25-ms delay between VS reaching the recommended operating voltage and the analog output being valid. Within this delay VOUT transfers from a high impedance state to the active drive state, during which time the output voltage could transition between GND and VS. If this behavior must be avoided, a stable supply voltage to VS should be provided for longer than 25 ms prior to applying input current. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 35 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 12 Layout 12.1 Layout Guidelines The TMCS1101 is specified for a continuous current handling capability on the TMCS1101EVM, which uses 3-oz copper pour planes. This current capability is fundamentally limited by the maximum device junction temperature and the thermal environment, primarily the PCB layout and design. To maximize current-handling capability and thermal stability of the device, take care with PCB layout and construction to optimize the thermal capability. Efforts to improve the thermal performance beyond the design and construction of the TMCS1101EVM can result in increased continuous-current capability due to higher heat transfer to the ambient environment. Keys to improving thermal performance of the PCB include: • • • • Use large copper planes for both input current path and isolated power planes and signals. Use heavier copper PCB construction. Place thermal via farms around the isolated current input. Provide airflow across the surface of the PCB. The TMCS1101 senses external magnetic fields, so make sure to minimize adjacent high-current traces in close proximity to the device. The input current trace can contribute additional magnetic field to the sensor if the input current traces are routed parallel to the vertical axis of the package. Figure 12-1 illustrates the most optimal input current routing into the TMCS1101. As the angle that the current approaches the device deviates from 0° to the horizontal axis, the current trace contributes some additional magnetic field to the sensor, increasing the effective sensitivity of the device. If current must be routed parallel to the package vertical axis, move the routing away from the package to minimize the impact to the sensitivity of the device. Terminate the input current path directly underneath the package lead footprint, and use a merged copper input trace for both the IN+ and IN– inputs. IIN,} IIN,0 IIN,0 } } IN+ 1 8 VS IN+ 2 7 VOUT IN± 3 6 NC IN± 4 5 GND IIN,} Figure 12-1. Magnetic Field Generated by Input Current Trace In addition to thermal and magnetic optimization, make sure to consider the PCB design required creepage and clearance for system-level isolation requirements. Maintain required creepage between solder stencils, as shown in Figure 12-2, if possible. If not possible to maintain required PCB creepage between the two isolated sides at board level, add additional slots or grooves to the board. If more creepage and clearance is required for system isolation levels than is provided by the package, the entire device and solder mask can be encapsulated with an overmold compound to meet system-level requirements. 36 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 Cu Plane Solder Mask Creepage VS Cu Plane IN+ VOUT NC Cu Plane IN± GND Cu Plane Figure 12-2. Layout for System Creepage Requirements 12.2 Layout Example An example layout, shown in Figure 12-3, is from the TMCS1101EVM. Device performance is targeted for thermal and magnetic characteristics of this layout, which provides optimal current flow from the terminal connectors to the device input pins while large copper planes enhance thermal performance. Figure 12-3. Recommended Board Top (Left) and Bottom (Right) Plane Layout Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 37 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 13 Device and Documentation Support 13.1 Device Support 13.1.1 Development Support For development tool support see the following: • TMCS1101EVM • TMCS1101 TI-TINA Model • TMCS1101 TINA-TI Reference Design 13.2 Documentation Support 13.2.1 Related Documentation For related documentation see the following: • Texas Instruments, TMCS1101EVM User's Guide • Texas Instruments, Enabling Precision Current Sensing Designs with Nonratiometric Magnetic Current Sensors • Texas Instruments, Low-Drift, Precision, In-Line Isolated Magnetic Motor Current Measurements • Texas Instruments, Isolation Glossary 13.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 13.4 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 13.5 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 13.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 13.7 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 38 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 PACKAGE OUTLINE D0008B SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] A .004 [0.1] C PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .150 [3.81] .189-.197 [4.81-5.00] NOTE 3 4X (0 -15 ) 4 5 B 8X .012-.020 [0.31-0.51] .150-.157 [3.81-3.98] NOTE 4 .010 [0.25] C A B .069 MAX [1.75] .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 [0.11-0.25] 0 -8 .016-.050 [0.41-1.27] DETAIL A .041 [1.04] TYPICAL 4221445/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15], per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 39 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 EXAMPLE BOARD LAYOUT D0008B SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] 8X (.055) [1.4] SEE DETAILS SYMM SEE DETAILS SYMM 1 1 8 8X (.024) [0.6] 8 SYMM 5 4 6X (.050 ) [1.27] 8X (.024) [0.6] (R.002 ) TYP [0.05] SYMM 5 4 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) [0.05] TYP (.217) [5.5] HV / ISOLATION OPTION .162 [4.1] CLEARANCE / CREEPAGE IPC-7351 NOMINAL .150 [3.85] CLEARANCE / CREEPAGE LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:6X METAL SOLDER MASK OPENING EXPOSDE METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL .0028 MIN [0.07] ALL AROUND .0028 MAX [0.07] ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4221445/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com 40 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 TMCS1101 www.ti.com SBOS825D – SEPTEMBER 2019 – REVISED JULY 2021 EXAMPLE STENCIL DESIGN D0008B SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] 8X (.055) [1.4] SYMM SYMM 1 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] 8 SYMM 5 4 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (R.002 ) [0.05] TYP (.217) [5.5] (.213) [5.4] HV / ISOLATION OPTION .162 [4.1] CLEARANCE / CREEPAGE IPC-7351 NOMINAL .150 [3.85] CLEARANCE / CREEPAGE SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.127 MM] THICK STENCIL SCALE:6X 4221445/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMCS1101 41 PACKAGE OPTION ADDENDUM www.ti.com 13-Nov-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TMCS1101A1BQDR ACTIVE SOIC D 8 2500 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A1B Samples TMCS1101A1BQDT ACTIVE SOIC D 8 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A1B Samples TMCS1101A1UQDR ACTIVE SOIC D 8 2500 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A1U Samples TMCS1101A1UQDT ACTIVE SOIC D 8 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A1U Samples TMCS1101A2BQDR ACTIVE SOIC D 8 2500 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A2B Samples TMCS1101A2BQDT LIFEBUY SOIC D 8 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A2B TMCS1101A2UQDR ACTIVE SOIC D 8 2500 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A2U Samples TMCS1101A2UQDT ACTIVE SOIC D 8 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A2U Samples TMCS1101A3BQDR ACTIVE SOIC D 8 2500 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A3B Samples TMCS1101A3BQDT ACTIVE SOIC D 8 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A3B Samples TMCS1101A3UQDR ACTIVE SOIC D 8 2500 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A3U Samples TMCS1101A3UQDT ACTIVE SOIC D 8 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A3U Samples TMCS1101A4BQDR ACTIVE SOIC D 8 2500 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A4B Samples TMCS1101A4BQDT ACTIVE SOIC D 8 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A4B Samples TMCS1101A4UQDR ACTIVE SOIC D 8 2500 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A4U Samples TMCS1101A4UQDT ACTIVE SOIC D 8 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 M01A4U Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 13-Nov-2023 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of