TMDSICE3359

5 REV 4 3 1 DATE BY Description 10/28/11 A 2 CCO Alpha release D D Beta release 12/20/11 CCO A2 C C B B Texas Instruments, Inc. ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 A A AM335X 15X15 ICE BOARD Title Size B Document Number Modified By: Rev AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 5 4 3 2 Sheet: 1 1 of 14 5 4 Main Power Input J1 2 1 VBAT V24_IN V24_0HVS V24_0HVS VBAT L7 RAPC712 U28 D22 MBRX140-TP 1 7 5 D23 SMCJ26CA 2 3 3 C193 0.1uF C194 0.1uF C196 10uF,50V 2 3 C197 10uF,50V VIN C1 BOOT PH DGND TP D33 B340A-13-F 8 C2 47uF + NC1 NC2 R12 10K V24_IN C3 0.1uF C5 1uF VSNS D 4 DGND GND DGND D3 Green LED TPS5410D DGND R1 150 TP3 DGND D 6 68uH 1 0.01uF ENA V5_0D R13 3.24K DGND DGND J14 1 DGND VBAT VRTC VRTC 2 DGND U2 1 OSTTC022162, DNI IN 3 DGND OUT 5 EN VAUX2 4 C28 1uF NR GND 2 C29 1uF TPS71718 Only J1 or J14 will be installed. Need dual foot print. R2 4.7K R3 4.7K DGND DGND DGND Power Management IC U1 VBAT 28 29 VPMIC_VRTC C7 4.7uF 20 C8 2.2uF VCC7 VRTC SW3 VFB3 OSC32KIN VCC1 C 21 38 DGND R6 0 R7 0 4,12,13 I2C0_SCL 4,12,13 I2C0_SDA 9 8 PMIC_I2C_SCL PMIC_I2C_SDA 39 R10 10K 11 10 TP4 TP1mm PMICSR_I2C_SCL TP5 TP1mm PMICSR_I2C_SDA TP20 TP21 TP22 4 PMIC_PWR_EN R15 0 TP1mm TP1mm TP1mm PMIC_INTn PMIC_SLEEP PWRON PMIC_PWR_EN PMIC_RESETOUTn 3 PMIC_RESETOUTn 18 R17 10K DGND 25 17 C15 0.01uF 23 22 24 DGND R20 0 PWR_VDAC R21 0 VPLL C16 4.7uF PWR_VPLL C18 2.2uF DGND C19 2.2uF DGND VBCKUPBAT 27 DGND R25 0 PWR_VAUX1 R27 VAUX2 C26 2.2uF 0 PWR_VAUX2 C27 2.2uF V3_3D DGND PWR_VDD3_SMPS VCC2 SCLSR_EN1 SDASR_EN2 SW2 VFB2 GND2 INT1 SLEEP PWRON BOOT1 BOOT0 PWRHOLD nRESPWRON L2 1 SWIO VFBIO GNDIO VDDIO VCC5 VDAC VPLL VCC6 VDIG1 VDIG2 46 48 2 R5 PWR_VDD1_SMPS 0 VDD1_SMPS C10 10uF DGND L3 1 2 PWR_VDD2_SMPS R9 0 VDD2_SMPS 2.2uH C12 10uF DGND 6 7 5 PWR_SWIO DGND VBAT 1 2 R16 0 VIO_SMPS 2.2uH C14 10uF DGND PWR_VDDIO PWR_VDIG1 PWR_VDIG2 DGND R19 0 DGND R22 R23 0 0 VBAT VDIG1 VDIG2 C21 2.2uF TP1 TP1mm VCC3 VAUX33 VMMC 3 4 2 PWR_VAUX33 PWR_VMMC C24 2.2uF C13 10uF PWR_VAUX33 C20 2.2uF VCC4 C11 10uF L4 12 C DGND 13 14 16 15 DGND C9 10uF VBAT 42 44 43 VBACKUP VAUX1 VAUX2 VDD3_SMPS 41 VREF TESTV REFGND 0 2.2uH DGND VCCIO R4 VBAT 35 32 34 DGND GPIO_CKSYNC TPS65910 VAUX2 2 4.7uH DGND 47 VAUX1 1 36 DGND VBAT C22 4.7uF L1 C6 10uF SCL_SCK SDA_SDI PPAD VDAC SW1 VFB1 GND1 49 DGND VBAT B 45 37 33 19 26 1 40 OSC32KOUT CLK32KOUT 31 30 C17 4.7uF DGND DGND R24 R26 0 VMMC C25 2.2uF 0 VBAT B VAUX33 C23 4.7uF DGND DGND DGND VDD_3V3 DGND R28 0 DGND A A Texas Instruments, Inc. ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 AM335X 15X15 ICE BOARD Power Management Size 5 4 3 2 Document Number Modified By: Rev C AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 Sheet: 2 1 of 14 5 4 3 2 1 D D 2 PMIC_RESETOUTn VRTC VRTC R264 10K C31 C30 VRTC DGND 8 DGND 5 3 Y1 25pF,50V 1 OSC1_OUT1 C34 U4A 1 VRTC_DETB 2 7 SN74AUP2G08 PORZ 2 7 R265 12.1K R31 R30 SN74AUP2G08 C33 0.01uf,16V 100K,1% 4 6 25pF,50V R29 4 C32 VRTC_DET 1K SN74AUP2G08 U3A 1 4 8 U3B 8 0.01uf,16V 0.01uf,16V 2 C35 0.01uf,16V DGND 100K,1% DGND DGND DGND DGND 32.768KHz MC-306 DGND RTC_PORZ DGND DGND 3 Y2 4 C VDD_3V3 24MHz R32 1M, DNI 2 R33 0 C 1 C36 18pF,50V OSC0_OUT1 C37 18pF,50V R35 0 GND_OSC0 7 DDR_BA[2..0] 7 DDR_D[15..0] OSC0_IN V10 OSC0_OUT GND_OSC0 U11 V11 OSC1_IN A6 OSC1_OUT GND_OSC1 A4 A5 R37 R38 R39 R40 R41 R42 R43 R44 R45 R46 R47 R48 R49 R50 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 PDDR_A0 PDDR_A1 PDDR_A2 PDDR_A3 PDDR_A4 PDDR_A5 PDDR_A6 PDDR_A7 PDDR_A8 PDDR_A9 PDDR_A10 PDDR_A11 PDDR_A12 PDDR_A13 DDR_BA0 DDR_BA1 DDR_BA2 R51 R52 R53 33,0402 33,0402 33,0402 PDDR_BA0 PDDR_BA1 PDDR_BA2 F3 H1 E4 C3 C2 B1 D5 E2 D4 C1 F4 F2 E3 H3 H4 D3 C4 E1 B3 DDR_D0 DDR_D1 DDR_D2 DDR_D3 DDR_D4 DDR_D5 DDR_D6 DDR_D7 DDR_D8 DDR_D9 DDR_D10 DDR_D11 DDR_D12 DDR_D13 DDR_D14 DDR_D15 R54 R55 R56 R57 R58 R59 R60 R61 R62 R63 R64 R65 R66 R67 R68 R69 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 PDDR_D0 PDDR_D1 PDDR_D2 PDDR_D3 PDDR_D4 PDDR_D5 PDDR_D6 PDDR_D7 PDDR_D8 PDDR_D9 PDDR_D10 PDDR_D11 PDDR_D12 PDDR_D13 PDDR_D14 PDDR_D15 M3 M4 N1 N2 N3 N4 P3 P4 J1 K1 K2 K3 K4 L3 L4 M1 R70 R71 R72 R73 R74 R75 R76 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 33,0402 PDDR_CLK PDDR_CLKn PDDR_CKE PDDR_CSn PDDR_CASn PDDR_RASn PDDR_WEn D2 D1 G3 H2 F1 G4 B2 R77 R78 R79 R80 R81 R82 33,0402 22,0402 22,0402 33,0402 33,0402 33,0402 PDDR_DQM0 PDDR_DQS0 PDDR_DQSN0 PDDR_DQM1 PDDR_DQS1 PDDR_DQSN1 M2 P1 P2 J2 L1 L2 R83 33,0402 PDDR_ODT DDR_RESETN G1 G2 J3 DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 DDR_BA[2..0] DDR_D[15..0] B 7 DDR_CLK 7 DDR_CLKn 7 DDR_CKE 7 DDR_CSn 7 DDR_CASn 7 DDR_RASn 7 DDR_WEn 7 DDR_DQM0 7 DDR_DQS0 7 DDR_DQSN0 7 DDR_DQM1 7 DDR_DQS1 7 DDR_DQSN1 7 DDR_ODT TP7 VDDS_DDR R84 TESTPT1 PORZ NRESET_INOUT RTC_PORZ OSC0_OUT VSS_OSC0 NNMI EVENT_INTR0/TIMER4/CLKOUT1/SPI1_CS1/PR1PRU1R31_16/EMU2/GPIO0_19 EVENT_INTR1/TCLKIN/CLKOUT2/TIMER7/PR1PRU0_PRUR31_16/EMU3/GPIO0_20 OSC1_IN OSC1_OUT VSS_RTC DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 DDR_A14 DDR_A15 DDR_BA0 DDR_BA1 DDR_BA2 DDR_D0 DDR_D1 DDR_D2 DDR_D3 DDR_D4 DDR_D5 DDR_D6 DDR_D7 DDR_D8 DDR_D9 DDR_D10 DDR_D11 DDR_D12 DDR_D13 DDR_D14 DDR_D15 DDR_CK DDR_NCK DDR_CKE DDR_CSN0 DDR_CASN DDR_RASN DDR_WEn DDR_DQM0 DDR_DQS0 DDR_DQSN0 DDR_DQM1 DDR_DQS1 DDR_DQSN1 DDR_ODT DDR_RESETN DDR_VTP J4 2.2K,1% 7 DDR_VREF A OSC0_IN NTRST TMS TDI TCK TDO EMU0/GPIO3_7 EMU1/GPIO3_8 DDR_A[13..0] DDR_VTP 7 DDR_A[13..0] R34 10K,1% U5A GPMC_CLK/LCD_MEM_CLK/GPMC_WAIT1/MMC2_CLK/PRT1_MII1_TXEN/MCASP0_FSR/GPIO2_1 GPMC_CSN0/GPIO1_29 GPMC_CSN1/GPMC_CLK/MMC1_CLK/PRT1EDIO_DATA_IN6/PRT1_EDIO_DATA_OUT6/PR1_PRU1_PRU_R30_12/PR1_PRU1_PRU_R31_12/GPIO1_30 GPMC_CSN2/GPMC_BE1N/MMC1_CMD/PR1_EDIO_DATA_IN7/PR1_EDIO_DATA_OUT7/PR1_PRU1_PRU_R30_13/PR1_PRU1_PRU_R31_13/GPIO1_31 GPMC_CSN3/MMC2_CMD/PR1_MDIO_DATA/GPIO2_0 GPMC_WEN/TIMER6/GPIO2_4 GPMC_OEN_REN/TIMER7/EMU4/GPIO2_3 GPMC_ADVN_ALE/TIMER4/GPIO2_2 GPMC_BE0N_CLE/TIMER5/GPIO2_5 GPMC_BE1N/GMII2_COL/GPMC_CSN6/MMC2_DAT3/GPMC_DIR/PR1_MII1_RXLINK/MCASP0_ACLKR/GPIO1_28 GPMC_WAIT0/GM112_CRS/GPMC_CSN4/RMII2_CRS_DV/MMC1_SDCD/PR1_MII1_RXDV/UART4_RXD/GPIO0_30 GPMC_WPN/GMII2_RXERR/GPMC_CSN5/RMII2_RXERR/MMC2_SDCD/PR1_MDIO_MDCLK/UART4_TXD/GPIO0_31 GPMC_AD0/MMC1_DAT0//////GPIO1_0 GPMC_AD1/MMC1_DAT1//////GPIO1_1 GPMC_AD2/MMC1_DAT2//////GPIO1_2 GPMC_AD3/MMC1_DAT3//////GPIO1_3 GPMC_AD4/MMC1_DAT4//////GPIO1_4 GPMC_AD5/MMC1_DAT5//////GPIO1_5 GPMC_AD6/MMC1_DAT6//////GPIO1_6 GPMC_AD7/MMC1_DAT7//////GPIO1_7 GPMC_AD8/LCD_DATA23/MMC1_DAT0/MMC2_DAT4/EHRPWM2A/PR1_MII_MT0_CLK//GPIO0_22 GPMC_AD9/LCD_DATA22/MMC1_DAT1/MMC2_DAT5/EHRPWM2B/PR1_MII0_CRS//GPIO0_23 GPMC_AD10/LCD_DATA21/MMC1_DAT2/MMC2_DAT6/EHRPWM2_TRIPZONE_INPUT/PR1_MII0_TXEN//GPIO0_26 GPMC_AD11/LCD_DATA20/MMC1_DAT3/MMC2_DAT7/EHRPWM2_SYNCI_O/PR1_MII0_TXD3//GPIO0_27 GPMC_AD12/LCD_DATA19/MMC1_DAT4/MMC2_DAT0/EQEP2A_IN/PR1_MII0_TXD2/PR1_PRU0_PRU_R30_14/GPIO1_12 GPMC_AD13/LCD_DATA18/MMC1_DAT5/MMC2_DAT1/EQEP2B_IN/PR1_MII0_TXD1/PR1_PRU0_PRU_R30_15/GPIO1_13 GPMC_AD14/LCD_DATA17/MMC1_DAT6/MMC2_DAT2/EQEP2_INDEX/PR1_MII0_TXD0/PR1_PRU0_PRU_R31_14/GPIO1_14 GPMC_AD15/LCD_DATA16/MMC1_DAT7/MMC2_DAT3/EQEP2_STROBE/PR1_ECAP0_ECAP_CAPIN_APWM_O/PR1_PRU0_PRU_R31_15/GPIO1_15 GPMC_A0/GMII2_TXEN/RGMII2_TCTL/RMII2_TXEN/GPMC_A16/PR1_MII_MT1_CLK/EHRPWM1_TRIPZONE_INPUT/GPIO1_16 GPMC_A1/GMII2_RXDV/RGMII2_RCTL/MMC2_DAT0/GPMC_A17/PR1_MII1_TXD3/EHRPWM1_SYNCI_O/GPIO1_17 GPMC_A2/GMII2_TXD3/RGMII2_TD3/MMC2_DAT1/GPMC_A18/PR1_MII1_TXD2/EHRPWM1A/GPIO1_18 GPMC_A3/GMII2_TXD2/RGMII2_TD2/MMC2_DAT2/GPMC_A19/PR1_MII1_TXD1/EHRPWM1B/GPIO1_19 GPMC_A4/GMII2_TXD1/RGMII2_TD1/RMII2_TXD1/GPMC_A20/PR1_MII1_TXD0/EQEP1A_IN/GPIO1_20 GPMC_A5/GMII2_TXD0/RGMII2_TD0/RMII2_TXD0/GPMC_A21/PR1_MII1_RXD3/EQEP1B_IN/GPIO1_21 GPMC_A6/GMII2_TXCLK/RGMII2_TCLK/MMC2_DAT4/GPMC_A22/PR1_MII1_RXD2/EQEP1_INDEX/GPIO1_22 GPMC_A7/GMII2_RXCLK/RGMII2_RCLK/MMC2_DAT5/GPMC_A23/PR1_MII1_RXD1/EQEP1_STROBE/GPIO1_23 GPMC_A8/GMII2_RXD3/RGMII2_RD3/MMC2_DAT6/GPMC_A24/PR1_MII1_RXD0/MCASP0_ACLKX/GPIO1_24 GPMC_A9/GMII2_RXD2/RGMII2_RD2/MMC2_DAT7/GPMC_A25/PR1_MII_MR1_CLK/MCASP0_FSX/GPIO1_25 GPMC_A10/GMII2_RXD1/RGMII2_RD1/RMII2_RXD1/GPMC_A26/PR1_MII1_CRS/MCASP0_AXR0/GPIO1_26 GPMC_A11/GMII2_RXD0/RGMII2_RD0/RMII2_RXD0/GPMC_A27/PR1_MII1_RXER/MCASP0_AXR1/GPIO1_27 B15 A10 B5 SYS_RESETn P_SYS_RESETn R36 EMU2 EMU3 B10 C11 B11 A12 A11 C14 B14 JTAG_TRSTn 11 JTAG_TMS 11 JTAG_TDI 11 JTAG_TCK 11 JTAG_TDO 11 JTAG_EMU0 11 JTAG_EMU1 11 V12 V6 U9 V9 T13 U6 T7 R7 T6 U18 T17 U17 PRUETH_MDC 9 GPMC_CSn0 8 GPMC_CSn1 8 GPIO1-31 8 PRUETH_MDIO 9 GPMC_WEn 8 GPMC_OEn_REn 8 GPMC_ADVn_ALE 8 GPIO2-5 8 PRUETH1_LINKLED 9 GPMC_WAIT0 8 PRUETH1_TXEN 9 U7 V7 R8 T8 U8 V8 R9 T9 U10 T10 T11 U12 T12 R12 V13 U13 GPMC_AD[0..15] 8 GPMC_AD0 GPMC_AD1 GPMC_AD2 GPMC_AD3 GPMC_AD4 GPMC_AD5 GPMC_AD6 GPMC_AD7 GPMC_AD8 GPMC_AD9 GPMC_AD10 GPMC_AD11 GPMC_AD12 GPMC_AD13 GPMC_AD14 GPMC_AD15 R13 V14 U14 T14 R14 V15 U15 T15 V16 U16 T16 V17 G17 G18 G16 G15 F18 F17 6 11 11 B PRUETH1_TXCLK 9 PRUETH1_TXD3 9 PRUETH1_TXD2 9 PRUETH1_TXD1 9 PRUETH1_TXD0 9 PRUETH1_RXD3 9 PRUETH1_RXD2 9 PRUETH1_RXD1 9 PRUETH1_RXD0 9 PRUETH1_RXCLK 9 PRUETH1_RXDV 9 PRUETH1_RXERR 9 GPMC_A[20..23] MMC0_CLK/GPMC_A24/UART3_CTSN/UART2_RXD/DCAN1_TX/PR1_PRU0_PRU_R30_12/PR1_PRU0_PRU_R31_12/GPIO2_30 MMC0_CMD/GPMC_A25/UART3_RTSN/UART2_TXD/DCAN1_RX/PR1_PRU0_PRU_R30_13/PR1_PRU0_PRU_R31_13/GPIO2_31 MMC0_DAT0/GPMC_A23/UART5_RTSN/UART3_TXD/UART1_RIN/PR1_PRU0_PRU_R30_11/PR1_PRU0_PRU_R31_11/GPIO2_29 MMC0_DAT1/GPMC_A22/UART5_CTSN/UART3_RXD/UART1_DTRN/PR1_PRU0_PRU_R30_10/PR1_PRU0_PRU_R31_10/GPIO2_28 MMC0_DAT2/GPMC_A21/UART4_RTSN/TIMER6/UART1_DSRN/PR1_PRU0_PRU_R30_9/PR1_PRU0_PRU_R31_9/GPIO2_27 MMC0_DAT3/GPMC_A20/UART4_CTSN/TIMER5/UART1_DCDN/PR1_PRU0_PRU_R30_8/PR1_PRU0_PRU_R31_8/GPIO2_26 SYS_WARMRESETn 0 B18 A15 D14 9,11 8 GPMC_A23 GPMC_A22 GPMC_A21 GPMC_A20 VREFSSTL R257 1K AM335X_ZCZ R258 1K R259 1K R260 1K A R85 2.2K,1% R86 49.9,1% DGND Texas Instruments, Inc. ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 DGND DGND AM335X 15X15 ICE BOARD 1) LOCATE THESE RESISTORS AS CLOSE TO EACH OTHER AS POSSIBLE. 2) KEEP CONNECTIONS ON THE RESISTORS TO GND AND VDDS_DDR AS SHORT AS POSSIBLE. 3) PLACE THE RESISTOR PAIR EQUAL DISTANCE BETWEEN PROCESSOR AND THE TWO DDR MEMORY DEVICES. 4) ISOLATE THIS TRACE FROM OTHER SIGNALS. 5 4 AM335X 1 OF 3 Size 3 2 Document Number Modified By: Rev C AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 Sheet: 3 1 of 14 5 4 3 2 1 1) AIN signals need to be routed over a plane connected to GNDA_ADC. 2) Signal should be as short as possible. 3) All signals need to be isolated from other signals on the board. U5B VDDA_ADC C6 C5 2 PMIC_PWR_EN TP23 D GMII1_TXCLK/UART2_RXD/RGMII1_TCLK/MMC0_DAT7/MMC1_DAT0/UART1_DCDN/MCASP0_ACLKX/GPIO3_9 GMII1_TXD0/RMII1_TXD0/RGMII1_TD0/MCASP1_AXR2/MCASP1_ACLKR/EQEP0B_IN/MMC1_CLK/GPIO0_28 GMII1_TXD1/RMII1_TXD1/RGMII1_TD1/MCASP1_FSR/MCASP1_AXR1/EQEP0A_IN/MMC1_CMD/GPIO0_21 GMII1_TXD2/DCAN0_RX/RGMII1_TD2/UART4_TXD/MCASP1_AXR0/MMC2_DAT2/MCASP0_AHCLKX/GPIO0_17 GMII1_TXD3/DCAN0_TX/RGMII1_TD3/UART4_RXD/MCASP1_FSX/MMC2_DAT1/MCASP0_FSR/GPIO0_16 GMII1_TXEN/RMII1_TXEN/RGMII1_TCTL/TIMER4/MCASP1_AXR0/EQEP0_INDEX/MMC2_CMD/GPIO3_3 GMII1_CRS/RMII1_CRS_DV/SPI1_D0/I2C1_SDA/MCASP1_ACLKX/UART5_CTSN/UART2_RXD/GPIO3_1 GMII1_COL/RMII2_REFCLK/SPI1_SCLK/UART5_RXD/MCASP1_AXR2/MMC2_DAT3/MCASP0_AXR2/GPIO3_0 PMIC_POWER_EN EXT_WAKEUP TP1mm TEMP_SENSE R88 0 12 12 12 12 C38 0.01uf,16V C39 B9 A9 VREFP_ADC VREFN_ADC SPI0_SCLK SPI0_D0 SPI0_D1 SPI0_CS0 13 SPI0_SCLK 13 SPI0_D0 13 SPI0_D1 C40 0.01uf,16V AIN1 AIN2 AIN3 AIN4 0.001uf,50V 13 SPI0_CS1 10 10 13 13 GNDA_ADC GNDA_ADC B6 C7 B7 A7 C8 B8 A8 C9 A17 B17 B16 A16 C15 E16 E15 E18 E17 UART0_TXD UART0_RXD UART4_RXD UART4_TXD VDD_3V3 D15 D16 D18 D17 10 UART1_TXD 10 UART1_RXD 6 FET_nOE 6 ECAT_LED_6c C223 0.01uf,16V 1 GS0 GS1 OUT 3 R17 R18 P18 P17 F15 T18 TEMP_SENSE LM94022 GMII1_RXCLK/UART2_TXD/RGMII1_RCLK/MMC0_DAT6/MMC1_DAT1/UART1_DSRN/MCASP0_FSX/GPIO3_10 GMII1_RXD0/RMII1_RXD0/RGMII1_RD0/MCASP1_AHCLKX/MCASP1_AHCLKR/MCASP1_ACLKR/MCASP0_AXR3/GPIO2_21 GMII1_RXD1/RMII1_RXD1/RGMII1_RD1/MCASP1_AXR3/MCASP1_FSR/EQEP0_STROBE/MMC2_CLK/GPIO2_20 GMII1_RXD2/UART3_TXD/RGMII1_RD2/MMC0_DAT4/MMC1_DAT3/UART1_RIN/MCASP0_AXR1/GPIO2_19 GMII1_RXD3/UART3_RXD/RGMII1_RD3/MMC0_DAT5/MMC1_DAT2/UART1_DTRN/MCASP0_AXR0/GPIO2_18 GMII1_RXERR/RMII1_RXERR/SPI1_D1/I2C1_SCL/MCASP1_FSX/UART5_RTSN/UART2_TXD/GPIO3_2 GMII1_RXDV/LCD_MEMORY_CLK/RGMII1_RCTL/UART5_TXD/MCASP1_ACLKX/MMC2_DAT0/MCASP0_ACLKR/GPIO3_4 VREFP VREFN SPI0_SCLK/UART2_RXD/I2C2_SDA/EHRPWM0A/PR1_UART0_CTS_N/PR1_EDIO_SOF/EMU2/GPIO0_2 RMII1_REFCLK/XDMA_EVENT_INTR2/SPI1_CS0/UART5_TXD/MCASP1_AXR3/MMC0_POW/MCASP1_AHCLKX/GPIO0_29 SPI0_D0/UART2_TXD/I2C2_SCL/EHRPWM0B/PR1_UART0_RTS_N/PR1_EDIO_LATCH_IN/EMU3/GPIO0_3 MDIO_CLK/TIMER5/UART5_TXD/UART3_RTSN/MMC0_SDWP/MMC1_CLK/MMC2_CLK/GPIO0_1 SPI0_D1/MMC1_SDWP/I2C1_SDA/EHRPWM0_TRIPZONE_INPUT/PR1_UART0_RXD/PR1_EDIO_DATA_IN0/PR1_EDIO_DATA_OUT0/GPIO0_4 MDIO_DATA/TIMER6/UART5_RXD/UART3_CTSN/MMC0_SDCD/MMC1_CMD/MMC2_CMD/GPIO0_0 SPI0_CS0/MMC2_SDWP/I2C1_SCL/EHRPWM0_SYNCI_O/PR1_UART0_TXD/PR1_EDIO_DATA_IN1/PR1_EDIO_DATA_OUT1/GPIO0_5 SPI0_CS1/UART3_RXD/ECAP1_IN_PWM1_OUT/MMC0_POW/XDMA_EVENT_INTR2/MMC0_SDCD/EMU4/GPIO0_6 LCD_DATA0/GPMC_A0//EHRPWM2A//PR1_PRU1_PRU_R30_0/PR1_PRU1_PRU_R31_0/GPIO2_6 UART0_TXD/SPI1_CS1/DCAN0_RX/I2C2_SCL/ECAP1_IN_PWM1_OUT/PR1_PRU1_PRU_R30_15/PR1_PRU1_PRU_R31_15/GPIO1_11 LCD_DATA1/GPMC_A1//EHRPWM2B//PR1_PRU1_PRU_R30_1/PR1_PRU1_PRU_R31_1/GPIO2_7 UART0_RXD/SPI1_CS0/DCAN0_TX/I2C2_SDA/ECAP2_IN_PWM2_OUT/PR1_PRU1_PRU_R30_14/PR1_PRU1_PRU_R31_14/GPIO1_10 LCD_DATA2/GPMC_A2//EHRPWM2_TRIPZONE_INPUT//PR1_PRU1_PRU_R30_2/PR1_PRU1_PRU_R31_2/GPIO2_8 UART0_CTSN/UART4_RXD/DCAN1_TX/I2C1_SDA/SPI1_D0/TIMER7/PR1_EDC_SYNC0_OUT/GPIO1_8 LCD_DATA3/GPMC_A3//EHRPWM2_SYNCI_O//PR1_PRU1_PRU_R30_3/PR1_PRU1_PRU_R31_3/GPIO2_9 UART0_RTSN/UART4_TXD/DCAN1_RX/I2C1_SCL/SPI1_D1/SPI1_CS0/PR1_EDC_SYNC1_OUT/GPIO1_9 LCD_DATA4/GPMC_A4//EQEP2A_IN//PR1_PRU1_PRU_R30_4/PR1_PRU1_PRU_R31_4/GPIO2_10 LCD_DATA5/GPMC_A5//EQEP2B_IN//PR1_PRU1_PRU_R30_5/PR1_PRU1_PRU_R31_5/GPIO2_11 LCD_DATA6/GPMC_A6/PR1_EDIO_DATA_IN6/EQEP2_INDEX/PR1_EDIO_DATA_OUT6/PR1_PRU1_PRU_R30_6/PR1_PRU1_PRU_R31_6/GPIO2_12 LCD_DATA7/GPMC_A7/PR1_EDIO_DATA_IN7/EQEP2_STROBE/PR1_EDIO_DATA_OUT7/PR1_PRU1_PRU_R30_7/PR1_PRU1_PRU_R31_7/GPIO2_13 LCD_DATA8/GPMC_A12/EHRPWM1_TRIPZONE_INPUT/MCASP0_ACLKX/UART5_TXD/PR1_MII0_RXD3/UART2_CTSN/GPIO2_14 UART1_TXD/MMC2_SDWP/DCAN1_RX/I2C1_SCL//PR1_UART0_TXD/PR1_PRU0_PRU_R31_16/GPIO0_15 LCD_DATA9/GPMC_A13/EHRPWM1_SYNCI_O/MCASP0_FSX/UART5_RXD/PR1_MII0_RXD2/UART2_RTSN/GPIO2_15 UART1_RXD/MMC1_SDWP/DCAN1_TX/I2C1_SDA//PR1_UART0_RXD/PR1_PRU1_PRU_R31_16/GPIO0_14 LCD_DATA10/GPMC_A14/EHRPWM1A/MCASP0_AXR0//PR1_MII0_RXD1/UART3_CTSN/GPIO2_16 UART1_CTSN/TIMER6/DCAN0_TX/I2C2_SDA/SPI1_CS0/PR1_UART0_CTS_N/PR1_EDC_LATCH0_IN/GPIO0_12 LCD_DATA11/GPMC_A15/EHRPWM1B/MCASP0_AHCLKR/MCASP0_AXR2/PR1_MII0_RXD0/UART3_RTSN/GPIO2_17 UART1_RTSN/TIMER5/DCAN0_RX/I2C2_SCL/SPI1_CS1/PR1_UART0_RTS_N/PR1_EDC_LATCH1_IN/GPIO0_13 LCD_DATA12/GPMC_A16/EQEP1A_IN/MCASP0_ACLKR/MCASP0_AXR2/PR1_MII0_RXLINK/UART4_CTSN/GPIO0_8 LCD_DATA13/GPMC_A17/EQEP1B_IN/MCASP0_FSR/MCASP0_AXR3/PR1_MII0_RXER/UART4_RTSN/GPIO0_9 I2C0_SCL/TIMER7/UART2_RTSN/ECAP1_IN_PWM1_OUT////GPIO3_6 LCD_DATA14/GPMC_A18/EQEP1_INDEX/MCASP0_AXR1/UART5_RXD/PR1_MII_MR0_CLK/UART5_CTSN/GPIO0_10 I2C0_SDA/TIMER4/UART2_CTSN/ECAP2_IN_PWM2_OUT////GPIO3_5 LCD_DATA15/GPMC_A19/EQEP1_STROBE/MCASP0_AHCLKX/MCASP0_AXR3/PR1_MII0_RXDV/UART5_RTSN/GPIO0_11 USB0_DP USB0_DM USB0_CE USB0_ID USB0_DRVVBUS/GPIO0_18 USB0_VBUS USB1_DP USB1_DM USB1_CE USB1_ID USB1_DRVVBUS/GPIO3_13 USB1_VBUS LCD_PCLK/GPMC_A10//PR1_EDIO_DATA_IN4/PR1_EDIO_DATA_OUT4/PR1_PRU1_PRU_R30_10/PR1_PRU1_PRU_R31_10/GPIO2_24 LCD_VSYNC/GPMC_A8//PR1_EDIO_DATA_IN2/PR1_EDIO_DATA_OUT2/PR1_PRU1_PRU_R30_8/PR1_PRU1_PRU_R31_8/GPIO2_22 LCD_HSYNC/GPMC_A9//PR1_EDIO_DATA_IN3/PR1_EDIO_DATA_OUT3/PR1_PRU1_PRU_R30_9/PR1_PRU1_PRU_R31_9/GPIO2_23 LCD_AC_BIAS_EN/GPMC_A11//PR1_EDIO_DATA_IN5/PR1_EDIO_DATA_OUT5/PR1_PRU1_PRU_R30_11/PR1_PRU1_PRU_R31_11/GPIO2_25 MCASP0_AHCLKX/EQEP0_STROBE/MCASP0_AXR3/MCASP1_AXR1/EMU4/PR1_PRU0_PRU_R30_7/PR1_PRU0_PRU_R31_7/GPIO3_21 MCASP0_ACLKX/EHRPWM0A//SPI1_SCLK/MMC0_SDCD/PR1_PRU0_PRU_R30_0/PR1_PRU0_PRU_R31_0/GPIO3_14 MCASP0_FSX/EHRPWM0B//SPI1_D0/MMC1_SDCD/PR1_PRU0_PRU_R30_1/PR1_PRU0_PRU_R31_1/GPIO3_15 MCASP0_AXR0/EHRPWM0_TRIPZONE_INPUT//SPI1_D1/MMC2_SDCD/PR1_PRU0_PRU_R30_2/PR1_PRU0_PRU_R31_2/GPIO3_16 MCASP0_AHCLKR/EHRPWM0_SYNCI_O/MCASP0_AXR2/SPI1_CS0/ECAP2_IN_PWM2_OUT/PR1_PRU0_PRU_R30_3/PR1_PRU0_PRU_R31_3/GPIO3_17 MCASP0_ACLKR/EQEP0A_IN/MCASP0_AXR2/MCASP1_ACLKX/MMC0_SDWP/PR1_PRU0_PRU_R30_4/PR1_PRU0_PRU_R31_4/GPIO3_18 MCASP0_FSR/EQEP0B_IN/MCASP0_AXR3/MCASP1_FSX/EMU2/PR1_PRU0_PRU_R30_5/PR1_PRU0_PRU_R31_5/GPIO3_19 MCASP0_AXR1/EQEP0_INDEX//MCASP1_AXR0/EMU3/PR1_PRU0_PRU_R30_6/PR1_PRU0_PRU_R31_6/GPIO3_20 MMC1_DAT0 13 MMC1_CLK 13 MMC1_CMD 13 ECAT_LED_5b 6 ECAT_LED_5a 6 ECAT_LED_4 6 ECAT_LED_2 6 ECAT_LED_1 6 L18 M16 L15 L16 L17 J15 J17 D MMC1_DAT1 13 MMC1_CD 13 MMC1_DAT3 13 MMC1_DAT2 13 ECAT_LED_3 6 H18 M18 M17 ECAT_LED_5c 6 ECAT_LED_6b 6 ECAT_LED_6a 6 R1 R2 R3 R4 T1 T2 T3 T4 U1 U2 U3 U4 V2 V3 V4 T5 PRUETH0_TXCLK 6,9 PRUETH0_TXEN 6,9 PRUETH0_TXD3 6,9 PRUETH0_TXD2 6,9 PRUETH0_TXD1 6,9 PRUETH0_TXD0 6,9 GPIO2_12 6 GPIO2_13 6 GPIO2_14/UART5_TXD 6,13 GPIO2_15/UART5_RXD 6,13 GPIO2_16 6 GPIO2_17 6,12 PRUETH0_LINKLED 6,9 PRUETH0_RXERR 6,9 PRUETH0_RXCLK 6,9 PRUETH0_RXDV 6,9 V5 U5 R5 R6 PRUETH0_RXD1 PRUETH0_RXD3 PRUETH0_RXD2 PRUETH0_RXD0 A14 A13 B13 D12 C12 B12 C13 D13 9 9 9 9 C EMU4 8 SPI1_SCLK 12 SPI1_D1 SPI1_CS0 GPIO3_18 GPIO3_19 GPIO3_20 12 12 10 8 2 GND 5 N17 N18 M15 P16 F16 P15 DGND 4 U6 VDD C C16 C17 2,12,13 I2C0_SCL 2,12,13 I2C0_SDA AIN0 AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 AIN7 K18 K17 K16 K15 J18 J16 H17 H16 C18 2,12,13 GPIO0_7 ECAP0_IN_PWM0_OUT/UART3_TXD/SPI1_CS1/PR1_ECAP0_ECAP_CAPIN_APWM_O/SPI1_SCLK/MMC0_SDWP/XDMA_EVENT_INTR2/GPIO0_7 AM335X_ZCZ DGND VDD_3V3 VDD_3V3 VDD_3V3 C224 0.01uf,16V U19 B R254 10K SPI0_SCLK SPI0_D1 SPI0_D0 SPI0_CS0 6 5 2 1 3 CLK DI DO VCC R255 10K 8 B DGND HOLD 7 CS WP GND 4 W25Q64 DGND A A Texas Instruments, Inc. ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 AM335X 15X15 ICE BOARD AM335X 2 OF 3 Size 5 4 3 2 Document Number Modified By: Rev C AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 Sheet: 4 1 of 14 5 4 3 2 1 D D One capacitor per group. Group is one or more pins tied together before they are connected to the VDD_CORE rail. VDD2_SMPS VAUX2 C50 C51 C56 C57 C58 C59 C67 C68 0.01uf,16V C66 0.01uf,16V 0.01uf,16V 0.01uf,16V 0.01uf,16V VDD1_SMPS F10 F11 F12 F13 G13 H13 J13 A2 DGND VDIG2 TP8 VDD_MPUON TESTPT1 CAP_VDD_SRAM_CORE C81 CAP_VDD_SRAM_MPU CAP_VBB_MPU C82 0.01uf,16V 0.01uf,16V D9 H15 D10 D11 C10 E9 VAUX33 VAUX1 N15 N16 C90 C93 C89 C92 DGND C91 DGND M14 R15 R16 1uF,10V 1uF,10V 1uF,10V 0.01uf,16V 0.01uf,16V 0.01uf,16V C94 B N14 VDIG2 VDDSHV1 VDDSHV1 VDDSHV3 VDDSHV3 E5 F5 G5 H5 J5 K5 L5 C95 0.01uf,16V VIO_SMPS DGND C98 10uF,10V C99 0.01uf,16V C100 0.01uf,16V C101 C102 0.01uf,16V 0.01uf,16V C54 0.01uf,16V C55 0.01uf,16V C103 C104 0.01uf,16V 0.01uf,16V P10 P11 VDDSHV4 VDDSHV4 VDDSHV5 VDDSHV5 VDD_MPU1 VDD_MPU2 VDD_MPU3 VDD_MPU4 VDD_MPU5 VDD_MPU6 VDD_MPU7 VDD_MPU_MON VDDSHV6 VDDSHV6 VDDSHV6 VDDSHV6 VDDSHV6 VDDSHV6 VDDSHV6 VDDSHV6 VDDSHV6 CAP_VDD_SRAM_CORE VDDS_PLL_MPU VDDS_SRAM_MPU_BB CAP_VDD_SRAM_MPU CAP_VBB_MPU VDDS_SRAM_CORE_BG VDDS VDDS VDDS VDDS VDDS VDDS VDDS VDDA3P3V_USB0 VDDA1P8V_USB0 P12 P13 DGND VDDA_ADC VSSA_USB VSSA_ADC VPP VDDS_PLL_CORE_LCD VDDS_PLL_DDR VDDS_DDR VDDS_DDR VDDS_DDR VDDS_DDR VDDS_DDR VDDS_DDR VDDS_DDR VDDS_RTC CAP_VDD_RTC ENZ_KALDO_1P8V C63 0.01uf,16V K14 L14 E10 E11 E12 E13 F14 G14 N5 P5 P6 VAUX2 C69 C70 0.01uf,16V 0.01uf,16V DGND C71 C72 C73 C74 C75 TESTOUT C78 C79 0.01uf,16V 0.01uf,16V 0.01uf,16V0.01uf,16V0.01uf,16V 0.01uf,16V 0.01uf,16V 10uF,10V VAUX2 VDAC C83 C84 0.01uf,16V C85 0.01uf,16V C86 0.01uf,16V C87 0.01uf,16V C88 0.01uf,16V 0.01uf,16V DGND D8 FB1 2 1 E8 VPLL 1 150OHM800mA M5 R10 VDIG2 VRTC VDD_RTC ENZ_KALDO_1P8V C96 0.01uf,16V GNDA_ADC B DGND C97 0.01uf,16V DGND VDIG2 TP9 TESTOUT TESTPT1 FB2 2 150OHM800mA VDD2_SMPS R11 A3 C77 0.01uf,16V E6 E14 F9 K13 N6 P9 P14 D7 D6 B4 C76 C80 0.01uf,16V GNDA_ADC VDDS_OSC C 0.01uf,16V VMMC VDDA_ADC VDDA3P3V_USB1 VDDA1P8V_USB1 AM335X_ZCZ 0.01uf,16V C61 0.01uf,16V 0.01uf,16V H14 J14 VSSA_USB C105 VAUX2 C60 C62 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS E7 DGND P7 P8 VMMC VDDSHV2 VDDSHV2 DGND VDDS_DDR C53 0.01uf,16V DGND VDD_CORE1 VDD_CORE2 VDD_CORE3 VDD_CORE4 VDD_CORE5 VDD_CORE6 VDD_CORE7 VDD_CORE8 VDD_CORE9 VDD_CORE10 VDD_CORE11 VDD_CORE12 VDD_CORE13 VDD_CORE14 VDD_CORE15 VDD_CORE16 VDD_CORE17 VDD_CORE18 VDD_CORE19 VDD_CORE20 R90 A1 A18 F8 G8 G9 G11 G12 H6 H7 H8 H9 H10 H12 J6 J7 J8 J9 J10 J11 K7 K9 K10 K11 L10 L11 L12 L13 M6 M7 M8 M9 M10 M12 N7 N10 N11 V1 V18 10uF,10V C65 0.01uf,16V C64 DGND 0.01uf,16V VDD1_SMPS C52 0.01uf,16V U5C F6 F7 G6 G7 G10 H11 J12 K6 K8 K12 L6 L7 L8 L9 M11 M13 N8 N9 N12 N13 DGND 0.01uf,16V VDD2_SMPS C VDD2_SMPS 0.01uf,16V C49 0.01uf,16V C48 0.01uf,16V C47 0.01uf,16V C46 0.01uf,16V C45 0.01uf,16V C44 0.01uf,16V 10uF,10V 10uF,10V C43 0.01uf,16V C42 0.01uf,16V C41 C106 1uF,10V C107 C108 0.01uf,16V 0.01uf,16V 10K,1% DGND GND_OSC0 DGND DGND A A Texas Instruments, Inc. ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 AM335X 15X15 ICE BOARD AM335X 3 OF 3 Size 5 4 3 2 Document Number Modified By: Rev C AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 Sheet: 5 1 of 14 5 4 3 2 VDD_3V3 1 R101 R102 R103 R104 R105 R106 100K,1%,DNI 100K,1% 100K,1%,DNI 100K,1%,DNI 100K,1% 100K,1%,DNI VDD_LED 4 1 R100 100K,1%.DNI R111 R112 R113 R114 R115 R116 R117 R118 R119 R120 R121 R122 100K,1%,DNI 100K,1% 100K,1% 100K,1% 100K,1%,DNI 100K,1% 100K,1% 100K,1%,DNI 100K,1% 100K,1% 100K,1%,DNI 100K,1% 4 A 3 150 R229 A 6 R224 1K B_PRUETH0_RXERR4,9 5 DGND GND R236 1K SN74CBQ3306APW VDD_LED DGND R123 150 R124 150 R125 150 1 D7 Red LED Err Link/Act 0 D8 Green LED Link/Act 1 3 150 R222 B R 2 SYS_WARMRESETn 3 5 Q3B DMC56404 2 Q4A DMC56404 DGND 1 47k 47k 4 DGND 6 3 DMC56404 47k 47k R127 1K 47k DMC56404 Q3A 1 3 Q1B 2 4 DMC56404 10k Q4B 10k 5 10k ECAT_LED_1 10k 4 6 3 1 1uF,10V,DNI 6 4 Texas Instruments, Inc. DGND DGND 4 ECAT_LED_3 DGND 4 ECAT_LED_2 DMC56404 ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 DGND 4 ECAT_LED_4 R128 1K 47k R237 1K DGND Q2A R129 1K R130 1K A AM335X 15X15 ICE BOARD BOOT SETTINGS & ETHER CAT LEDS 1 2 DGND 4 ECAT_LED_5c 10k A EtherCAT LED's Size DGND DGND DGND B DGND Document Number Modified By: Rev AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 DGND 5 2 D9 Green LED 3 D6 Green LED Run C110 10k R226 1K 150 R221 B R126 150 47k 5 DGND DGND S1 B3U-1100 Q1A DGND DGND 1 DGND DMC56404 R225 1K 4 ECAT_LED_5b Q5B DMC56404 4 ECAT_LED_6c 6 4 ECAT_LED_5a 10k 2 150 R18 3 B_PRUETH0_LINKLED4,9 DGND B R 2 150 R228 G 2B DMC56404 3 R110 100K,1%,DNI 1 2A DGND 3 Q5A 47k 150R227 1B 2 4 ECAT_LED_6b 10k 5 1A 8 47k 2 nOE1 VCC nOE2 DGND 4 R109 100K,1% DGND C238 0.1uF 6 R108 100K,1% C 1 R107 100K,1%,DNI R223 1K U29 4 B DMC56404 10K,1% 1 7 Q2B 10k 598-8610-307F 5 4 ECAT_LED_6a VDD_3V3 R188 PRUETH0_RXERR 4,9 D5 DGND Boot Configuration 10 FET_nOE PRUETH0_LINKLED 4,9 DGND C109 4.7uF 47k VDD_LED PRUETH0_TXCLK 4,9 PRUETH0_TXEN 4,9 PRUETH0_TXD3 4,9 PRUETH0_TXD2 4,9 PRUETH0_TXD1 4,9 PRUETH0_TXD0 4,9 GPIO2_12 4 GPIO2_13 4 GPIO2_14/UART5_TXD 4,13 GPIO2_15/UART5_RXD 4,13 GPIO2_16 4 GPIO2_17 4,12 PRUETH0_LINKLED 4,9 PRUETH0_RXERR 4,9 PRUETH0_RXCLK 4,9 PRUETH0_RXDV 4,9 G 598-8610-307F SYS_BOOT0 SYS_BOOT1 SYS_BOOT2 SYS_BOOT3 SYS_BOOT4 SYS_BOOT5 SYS_BOOT6 SYS_BOOT7 SYS_BOOT8 SYS_BOOT9 SYS_BOOT10 SYS_BOOT11 SYS_BOOT12 SYS_BOOT13 SYS_BOOT14 SYS_BOOT15 CONN PCB 3 D D4 4 R99 100K,1% R98 100K,1%,DNI 1 2 3 SYS_BOOT00=1 SYS_BOOT01=1 SYS_BOOT02= 0 SYS_BOOT03=1 SYS_BOOT04=1 SYS_BOOT05=0 SYS_BOOT06=0 SYS_BOOT07=0 SYS_BOOT08=1 SYS_BOOT09=0 SYS_BOOT10=0 SYS_BOOT11=1 SYS_BOOT12=0 SYS_BOOT13=0 SYS_BOOT14=1 SYS_BOOT15=0 VDD_LED FB3 150OHM800mA 10k C R97 100K,1%,DNI J10 100K,1%,DNI R96 R95 9.1K,1% R94 9.1K,1% R92 R93 9.1K,1%,DNI D 9.1K,1% 100K,1% R91 2 VBAT 4 3 2 Sheet: 6 1 of 14 5 4 3 2 DDR_A[13..0] U7 J8 K8 K2 L8 K7 L7 K3 3 DDR_CLK 3 DDR_CLKn 3 DDR_CKE 3 DDR_CSn 3 DDR_RASn 3 DDR_CASn 3 DDR_WEn 3 DDR_D[15..0] D DDR_D0 DDR_D1 DDR_D2 DDR_D3 DDR_D4 DDR_D5 DDR_D6 DDR_D7 DDR_D8 DDR_D9 DDR_D10 DDR_D11 DDR_D12 DDR_D13 DDR_D14 DDR_D15 C123 C124 UDQS UDQSn UDM LDQSn LDQS LDM VDD VDD VDD VDD VDD E3 P9 J3 N1 A3 R7 R3 E2 A2 VDDS_DDR C122 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 A1 E1 M9 R1 J9 VDDS_DDR C121 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B7 A8 B3 E8 F7 F3 3 DDR_DQS1 3 DDR_DQSN1 3 DDR_DQM1 3 DDR_DQSN0 3 DDR_DQS0 3 DDR_DQM0 C CK CKn CKE CSn RASn CASn WEn C125 C126 0.01uf,16V 0.01uf,16V 0.01uf,16V0.01uf,16V0.01uf,16V VSS VSS VSS VSS VSS RFU2 RFU1 NC1 NC2 22uF,6.3V M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 (RFU)A13 DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13R 0 L2 L3 L1 DDR_A13 DDR_BA[2..0] DDR_BA0 DDR_BA1 DDR_BA2 K9 ODT VDDS_DDR VDDS_DDR H8 B2 D2 F2 H2 A7 E7 B8 D8 F8 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ C112 C113 0.01uf,16V 0.01uf,16V C114 C115 0.01uf,16V 0.01uf,16V C C116 0.01uf,16V C117 0.01uf,16V C118 0.01uf,16V C119 C120 0.01uf,16V 0.01uf,16V DGND J1 VDDL 3 DDR_ODT 3 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ 3 D R131 BA0 BA1 BA2 1 VDDS_DDR J7 VSSDL J2 VREF DDR_VREF 3 MT47H128M16RT-25E:C C127 0.01uf,16V DDR2 SDRAM B DGND DGND DGND B DGND Variable & MAC Memory VDD_3V3 U21 6 5 4,12,13 I2C0_SCL 4,12,13 I2C0_SDA 1 2 3 SCL SDA 8 VCC 4 VSS A0 A1 A2 C173 0.1uF 7 WP Texas Instruments, Inc. DGND CAT24C256W ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 A DGND 256KX8 A AM335X 15X15 ICE BOARD DDR2 INTERFACE Size B Document Number Modified By: Rev AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 5 4 3 2 Sheet: 7 1 of 14 5 4 3 2 1 EXT_D0 EXT_D1 EXT_D2 EXT_D3 EXT_D4 EXT_D5 EXT_D6 EXT_D7 EXT_D8 EXT_D9 EXT_D10 EXT_D11 EXT_D12 EXT_D13 EXT_D14 EXT_D15 GPMC_A[0..15] C128 0.1uF EXT_D[0..15] 13 R136 10K R137 10K 3 GPMC_CSn1 SEM_L 3 GPMC_WEn 3 GPMC_OEn_REn M/Sn 64 65 83 84 85 86 87 89 62 M/S C 92 9 13 34 38 63 SEM_R 61 60 42 41 40 39 37 36 10K R203 BUSYR INTR LBR UBR CER SEMR R/WR OER VDD_3V3 10K R87 BUSYL INTL LBL UBL CEL SEML R/WL OEL DGND 3 GPMC_A[20..23] 10K R14 R_IO0 R_IO1 R_IO2 R_IO3 R_IO4 R_IO5 R_IO6 R_IO7 R_IO8 R_IO9 R_IO10 R_IO11 R_IO12 R_IO13 R_IO14 R_IO15 C130 0.1uF B3 C4 D3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15_A-1 W E G RP BYTE RB NC0 NC1 NC2 GPMC_AD0 GPMC_AD1 GPMC_AD2 GPMC_AD3 GPMC_AD4 GPMC_AD5 GPMC_AD6 GPMC_AD7 GPMC_AD8 GPMC_AD9 GPMC_AD10 GPMC_AD11 GPMC_AD12 GPMC_AD13 GPMC_AD14 GPMC_AD15 E2 H2 E3 H3 H4 E4 H5 E5 F2 G2 F3 G3 F4 G5 F5 G6 A4 F1 G1 B4 F6 A3 VDD_3V3 R132 10K VDD_3V3 NOR_CSn D GPMC_CSn0 3 VDD_3V3 R133 10K GPMC_WEn 3 NOR_CSn GPMC_OEn_REn 3 NOR_RP R134 10K NOR_READY NOR_READY GPMC_WAIT0 3 G4 C131 1uF,10V EXT_WEn 13 EXT_OEn 13 3 VDD_3V3 VCC EXT_BUSYn 13 EXT_INTn 13 EXT_LBn 13 EXT_UBn 13 EXT_CSn 13 SEM_R E1 D1 C1 A1 B1 D2 C2 A2 B5 A5 C5 D5 B6 A6 C6 D6 E6 B2 C3 D4 C132 0.1uF R263 NOR_RP VSS1 VSS2 SYS_RESETn H1 H6 9,11 0,1% M29W160EB70ZA6E DGND DGND NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 R135 10K 4 GPIO0_7 4 GPIO3_20 L_IO0 L_IO1 L_IO2 L_IO3 L_IO4 L_IO5 L_IO6 L_IO7 L_IO8 L_IO9 L_IO10 L_IO11 L_IO12 L_IO13 L_IO14 L_IO15 C129 0.1uF GPMC_A0 GPMC_A1 GPMC_A2 GPMC_A3 GPMC_A4 GPMC_A5 GPMC_A6 GPMC_A7 GPMC_A8 GPMC_A9 GPMC_A10 GPMC_A11 GPMC_A12 GPMC_A13 GPMC_A14 GPMC_A15 GPMC_A20 GPMC_A21 GPMC_A22 GPMC_A23 1 2 3 4 22 23 24 25 VDD_3V3 90 91 93 94 95 96 97 98 99 100 5 6 7 8 10 11 GND1 GND2 GND3 GND4 GND5 GND6 GPMC_AD0 GPMC_AD1 GPMC_AD2 GPMC_AD3 GPMC_AD4 GPMC_AD5 GPMC_AD6 GPMC_AD7 GPMC_AD8 GPMC_AD9 GPMC_AD10 GPMC_AD11 GPMC_AD12 GPMC_AD13 GPMC_AD14 GPMC_AD15 GPMC_AD[0..15] U10 VDD_3V3 10K R235 14 15 16 18 19 20 21 26 27 28 29 30 31 32 33 35 EXT_A[0..12] 10K R234 51 52 53 54 72 73 74 75 R_A0 R_A1 R_A2 R_A3 R_A4 R_A5 R_A6 R_A7 R_A8 R_A9 R_A10 R_A11 R_A12 EXT_A0 EXT_A1 EXT_A2 EXT_A3 EXT_A4 EXT_A5 EXT_A6 EXT_A7 EXT_A8 EXT_A9 EXT_A10 EXT_A11 EXT_A12 10K R233 3 GPMC_AD[0..15] L_A0 L_A1 L_A2 L_A3 L_A4 L_A5 L_A6 L_A7 L_A8 L_A9 L_A10 L_A11 L_A12 13 59 58 57 56 55 50 49 48 47 46 45 44 43 10K R205 D 66 67 68 69 70 71 76 77 78 79 80 81 82 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 U9 GPMC_A0 GPMC_A1 GPMC_A2 GPMC_A3 GPMC_A4 GPMC_A5 GPMC_A6 GPMC_A7 GPMC_A8 GPMC_A9 GPMC_A10 GPMC_A11 GPMC_A12 VCC1 VCC2 VCC3 GPMC_A[0..15] 88 12 17 VDD_3V3 C SEM_L CY7C024AV/025AV/026AV DGND DGND VDD_3V3 C133 0.1uF C134 0.1uF C135 0.1uF C136 0.1uF 3 GPMC_AD[0..15] GPMC_AD0 GPMC_AD1 GPMC_AD2 GPMC_AD3 GPMC_AD4 GPMC_AD5 GPMC_AD6 GPMC_AD7 GPMC_AD8 GPMC_AD9 GPMC_AD10 GPMC_AD11 GPMC_AD12 GPMC_AD13 GPMC_AD14 GPMC_AD15 B SN74ALVCH16374DGV VCC1 VCC2 VCC3 VCC4 U11 7 18 31 42 DGND 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 48 25 1 24 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 1Q8 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 2Q8 GPMC_A0 GPMC_A1 GPMC_A2 GPMC_A3 GPMC_A4 GPMC_A5 GPMC_A6 GPMC_A7 GPMC_A8 GPMC_A9 GPMC_A10 GPMC_A11 GPMC_A12 GPMC_A13 GPMC_A14 GPMC_A15 B 1CLK 2CLK 1OE 2OE DGND 4 10 15 21 28 34 39 45 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 3 GPMC_ADVn_ALE 1D1 1D2 1D3 1D4 1D5 1D6 1D7 1D8 2D1 2D2 2D3 2D4 2D5 2D6 2D7 2D8 GPMC_A[0..15] 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 DGND A A Texas Instruments, Inc. ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 AM335X 15X15 ICE BOARD NOR FLASH & DPRAM INTERFACE Size 5 4 3 2 Document Number Modified By: Rev C AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 Sheet: 8 1 of 14 4 3 2 1 V3_3D R138 330 R139 2.2K R140 2.2K V3_3D V3_3D R141 2.2K 600OHM500mA 1 D10 Green LED U12 PRUETH0_INT PRUETH0_RESETn 8 12 9 10 11 7 29 34 AGND AGND JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRSTn VDD33_IO VDD33_IO PWRDNn/INTn RESET_N IOGND1 IOGND2 DGND RBIAS 33 1 Y4 25MHz XI TLK110 CLKOUT R143 15 19 R144 2.2K VADD33_PRUETH0 C143 0.01uF 1 FB5 2 150OHM800mA DGND C148 0.01uF DGND DGND FB6 1 2 150OHM800mA V3_3D C147 0.01uF R148R149 49.9 49.9 C145 0.1uF C146 0.1uF V3_3D AGND_PRUETH0 DNI DNI DNI DNI V3_3D DGND R156 2.2K DNI DGND V3_3D PRUETH0_SWSTRAP 25 R151 DGND DGND V3_3D R158 10K TLK_CLKOUT R159 4.99K DGND DGND U13 1 4 0 R157 2.2K DGND AGNDFRAME_PRUETH0 PRUETH0_RXD3 PRUETH0_RXD2 PRUETH0_RXD1 PRUETH0_RXD0 PRUETH0_COL PRUETH0_SWSTRAP C150 0.01uF 3 GPIO2-5 DGND RJ-45 10_100Mb DGND V3_3D AGND_PRUETH0 DGND 21 C DGND PRUETH0_RESETn 2 3,11 SYS_RESETn SN74LVC1G08 3 DGND R146R147 49.9 49.9 V3_3D 15pF C D3 D4 C138 0.1uF DGND C144 0.01uF 32 48 35 47 36 24 C140 0.1uF V3_3D D1 D2 330 C142 0.1uF 20 22 C137 10uF C139 0.1uF 5 C151 XO SW_STRAPN B_PRUETH0_LINKLED4,6 23 18 37 49 15pF B_PRUETH0_LINKLED PRUETH0_SPEEDLED PRUETH0_ACTLED C141 0.1uF RSV AVDD33 MDC MDIO 2 C149 PFBOUT PFBIN1 PFBIN2 28 27 26 D 2.2K PRUETH0_JTCK PRUETH0_JTDI PRUETH0_JTDO PRUETH0_JTMS PRUETH0_JTRSTn V3_3D LED_LINK LED_SPEED LED_ACT 2.2K 31 30 8 7 6 5 4 3 2 1 R155 PRUETH0_MDC PRUETH0_MDIO MII_CRS MII_COL J2 PRUETHER0_RDP PRUETHER0_RDN 2.2K PRUETH0_COL 40 42 MII_RXD_0 MII_RXD_1 MII_RXD_2 MII_RXD_3 14 13 R154 TP1mm TP1mm TP1mm TP1mm TP1mm 43 44 45 46 PRUETHER0_TDP PRUETHER0_TDN 2.2K 3 PRUETH_MDC 3 PRUETH_MDIO V3_3D TP10 TP11 R150 TP12 10K TP13 TP14 PRUETH0_RXD0 PRUETH0_RXD1 PRUETH0_RXD2 PRUETH0_RXD3 MII_RX_CLK MII_RX_DV MII_RX_ERR RD+ RD- 17 16 R153 PRUETH0_RXD0 PRUETH0_RXD1 PRUETH0_RXD2 PRUETH0_RXD3 MII_TXD_0 MII_TXD_1 MII_TXD_2 MII_TXD_3 R142 330 R152 4 4 4 4 DGND 38 39 41 4,6 PRUETH0_RXCLK 4,6 PRUETH0_RXDV B_PRUETH0_RXERR 4,6 R145 2.2K, DNI 3 4 5 6 PRUETH0_TXD0 PRUETH0_TXD1 PRUETH0_TXD2 PRUETH0_TXD3 TD+ TD- TLK110 4,6 4,6 4,6 4,6 D MII_TX_CLK MII_TX_EN GNDPAD 1 2 4,6 PRUETH0_TXCLK 4,6 PRUETH0_TXEN FB4 2 V3_3D_PRUETH0JCK SHLD1 SHLD2 V3_3D M1 M2 5 V3_3D V3_3D DGND R160 330 V3_3D V3_3D R163 2.2K 600OHM500mA 1 D11 Green LED U14 PRUETH1_RXD0 PRUETH1_RXD1 PRUETH1_RXD2 PRUETH1_RXD3 3 PRUETH_MDC 3 PRUETH_MDIO V3_3D TP15 TP16 R172 TP17 10K TP18 TP19 R167 2.2K DGND TP1mm TP1mm TP1mm TP1mm TP1mm PRUETH1_RXCLK PRUETH1_RXDV PRUETH1_RXERR 38 39 41 PRUETH1_RXD0 PRUETH1_RXD1 PRUETH1_RXD2 PRUETH1_RXD3 43 44 45 46 PRUETH1_COL 40 42 PRUETH1_MDC PRUETH1_MDIO 31 30 PRUETH1_JTCK PRUETH1_JTDI PRUETH1_JTDO PRUETH1_JTMS PRUETH1_JTRSTn PRUETH1_INTn PRUETH1_RESETn TLK_CLKOUT 8 12 9 10 11 7 29 34 33 MII_TXD_0 MII_TXD_1 MII_TXD_2 MII_TXD_3 RD+ RD- MII_RX_CLK MII_RX_DV MII_RX_ERR MII_RXD_0 MII_RXD_1 MII_RXD_2 MII_RXD_3 MII_CRS MII_COL PFBOUT PFBIN1 PFBIN2 RSV AVDD33 AGND AGND JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRSTn VDD33_IO VDD33_IO PWRDNn/INTn RESET_N IOGND1 IOGND2 DGND RBIAS XI TLK110 PRUETHER1_TDP PRUETHER1_TDN 14 13 J3 8 7 6 5 4 3 2 1 PRUETHER1_RDP PRUETHER1_RDN V3_3D LED_LINK LED_SPEED LED_ACT MDC MDIO XO 17 16 SW_STRAPN CLKOUT 28 27 26 PRUETH1_LINKLED PRUETH1_SPEEDLED PRUETH1_ACTLED PRUETH1_LINKLED R165 23 18 37 20 22 15 19 R166 2.2K VADD33_PRUETH1 C158 0.01uF FB8 2 150OHM800mA C159 0.01uF 32 48 35 47 36 24 1 C162 0.01uF C163 0.01uF C154 0.1uF C155 0.1uF V3_3D C152 10uF D1 D2 330 DGND FB9 1 2 150OHM800mA B D3 D4 C153 0.1uF DGND DGND V3_3D 3 R168R169 49.9 49.9 R170R171 49.9 49.9 C160 0.1uF C161 0.1uF V3_3D DGND C157 0.1uF 3 3 3 3 B 3 4 5 6 TD+ TD- R164 330 C156 0.1uF 3 PRUETH1_RXCLK 3 PRUETH1_RXDV 3 PRUETH1_RXERR PRUETH1_TXD0 PRUETH1_TXD1 PRUETH1_TXD2 PRUETH1_TXD3 MII_TX_CLK MII_TX_EN TLK110 PRUETH1_TXD0 PRUETH1_TXD1 PRUETH1_TXD2 PRUETH1_TXD3 1 2 GNDPAD 3 3 3 3 PRUETH1_TXCLK PRUETH1_TXEN 49 3 PRUETH1_TXCLK 3 PRUETH1_TXEN FB7 2 V3_3D_PRUETH1JCK RJ-45 10_100Mb SHLD1 SHLD2 R162 2.2K M1 M2 R161 2.2K DGND V3_3D R173 0 AGND_PRUETH1 AGND_PRUETH1 DGND DGND DGND AGNDFRAME_PRUETH1 DGND DGND 21 PRUETH1_SWSTRAP 25 R174 4.99K DGND DGND DGND V3_3D V3_3D V3_3D V3_3D R175 10K C166 0.01uF 5 2.2K 2.2K R179 R181 2.2K 3 GPIO1-31 3,11 SYS_RESETn R180 DNI PRUETH1_RXD3 PRUETH1_RXD2 PRUETH1_RXD1 PRUETH1_RXD0 PRUETH1_COL PRUETH1_SWSTRAP A U15 1 4 DGND PRUETH1_RESETn 2 SN74LVC1G08 3 2.2K 2.2K DNI 2.2K R177 R176 DNI R178 DNI A Texas Instruments, Inc. ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 AM335X 15X15 ICE BOARD DGND ICSS Ethernet Size 5 4 3 2 Document Number Modified By: Rev C AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 Sheet: 9 1 of 14 5 4 3 2 1 VPROFI R182 100K VDD_3V3 VPROFI U16 D 8 5 4 UART1_TXD 4 UART1_RXD 7 6 4 GPIO3_19 1 2 4 R184 2.2K 3 C169 0.01uF D R A DE RE B ISODE D1 D2 VCC2 VCC1 GND2 GND2 GND2 GND2 GND1 12 PROFIBUS_A 13 10 PROFIBUS_B 16 D R183 100K 9 11 14 15 C167 0.01uF C168 10uF GNDPROFI ISO1176T DGND VPROFI VDD_3V3 VCAN0 GNDPROFI DGND 4 L5 V3_3D_PROFIA C 8 D12 MBR0520LT1 VPROFI_TRANSA U18 5 6 VPROFI_SRC 4 DA2304 3 7 2 6 C171 10uF C172 0.1uF 3 IN IN EN OUT OUT NC/FB PG 7 8 C 1 C170 4.7uF 2 GND TPS76650 GNDPROFI GNDPROFI GNDPROFI GNDPROFI D13 1 V3_3D_PROFIB 5 GNDPROFI VPROFI_TRANSB MBR0520LT1 VPROFI 2 1 VCAN0 J5 CONN PCB 2 VCAN0 2 1 J4 CONN PCB 2 VCAN VPROFI_DB B B J6 CONN PCB 3 C174 4.7uF VDD_3V3 3 2 1 VCAN0 C175 0.01uF 2 1 GNDPROFI VDD_3V3 C176 0.1uF Conn_DB9F DGND PROFI_GND U20 1 R185 4 UART0_TXD R186 4 UART0_RXD 33 33 2 CAN0_RXDF 3 CAN0_TXDF 4 C177 100pF A C178 100pF VCC1 GNDPROFI VCC2 RXD CANH CANL VCAN 8 PROFIBUS_B CAN_GND/PROFIBUS_A 7 6 CAN0_H CAN0_L VPROFI_DB TXD GND1 GND2 5 9 4 8 3 7 2 6 1 PROFIBUS_A 11 CAN_GND/PROFIBUS_A PROFI_GND GNDPROFI GNDPROFI 10 5 Texas Instruments, Inc. ISO1050 ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 J8 AGND_CAN DGND DGND J7 CONN PCB 2 GNDPROFI A DGND 0 AM335X 15X15 ICE BOARD R187 CAN & PROFFI BUS Size B GNDPROFI 5 4 3 AGND_CAN Document Number Modified By: Rev AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 2 Sheet: 10 1 of 14 4 3 2 FB12 C228 0.1uf,16V VDD_FTREGIN C218 0.1uf,16V C219 0.1uf,16V USBDP USBDM DGND 50 DGND VDD_1V8FT DGND R253 12.1K,1% FT_REF DGND 6 7 8 USBDM USBDP C 49 C221 18pF,50V XTIN 2 U8 VREGIN VREGOUT ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 REF USBDM USBDP ACBUS0 ACBUS1 ACBUS2 ACBUS3 ACBUS4 ACBUS5 ACBUS6 ACBUS7 OSCIN Y6 12.000MHz 50ppm VDD_3V3 DGND C222 18pF,50V R250 C111 6 2 0.1uf,16V R251 10K,1% R252 10K,1% U17 5 VCC CS 4 SK 3 DIN 1 GND DOUT FT_RESETn 2.2K,1% F_EEDOUT DGND 3 14 63 62 61 F_EECS F_EESK F_EEDATA 93C46B_SOT23-6 B XTOUT 13 VCCIOA VCCIOB VCCIOB VCCIOD DGND VCOREC VCOREB VCOREA 4.7uF BDBUS0 BDBUS1 BDBUS2 BDBUS3 BDBUS4 BDBUS5 BDBUS6 BDBUS7 OSC0 RESET BCBUS0 BCBUS1 BCBUS2 BCBUS3 BCBUS4 BCBUS5 BCBUS6 BCBUS7 EECS EECLK EEDATA 10 DGND GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1 2.2K,1% AGND 10K,1% 5 FT_SRESET 2 NC A DGND Y R256 4 SYS_RESETn 9,11 D 0,1% SN74LVC1G06DCK mini USB-B VDD_3V3 DGND DGND 16 17 18 19 21 22 23 24 F_ADBUS0 F_ADBUS1 F_ADBUS2 F_ADBUS3 F_ADBUS4 26 27 28 29 30 32 33 34 F_ADBUS5 38 39 40 41 43 44 45 46 48 52 53 54 55 57 58 59 F_ADBUS6 R239 R240 R241 R242 R243 0,1% 0,1% 0,1% 0,1% 0,1% R244 0,1% R245 0,1% JTAG_TCK 3 JTAG_TDI 3 JTAG_TDO 3 JTAG_TMS 3 JTAG_TRSTn 3 JTAG_EMU0 3 VDD_3V3 FT_SRESET JTAG_EMU1 3 R246 F_ADBUS7 0,1% C185 0.01uf,16V DGND 1 3 5 7 0,DNI RTCK 9 0,DNI TCK 11 13 15 EMU_RSTn 17 EMU2R 19 EMU4R DGND R189 4.7K USB_DC R191 R192 R247 100K C VDD_3V3 VDD_3V3 GPIO2_15/UART5_RXD 4,13 GPIO2_14/UART5_TXD 4,13 R197 4.7K SYS_RESETn 9,11 EMU2 EMU4 R193 R194 R196 100,5%,DNI 0,DNI 0,DNI P2 TMS TDI TVDD TDO TCKRTN TCK EMU0 SRST EMU2 EMU4 TRSTn TDIS NC GND1 GND2 GND3 EMU1 GND4 EMU3 GND5 2 4 6 8 10 12 14 16 18 20 TDIS R190 0,DNI DGND EMU3R R195 EMU3 0,DNI 3 CTI JTAG,DNI C186 1 5 11 15 25 35 47 51 R249 P4 1 TEST PWREN R248 G1 ID D+ DVB 20 31 42 56 DGND 4 9 C225 0.1uf,16V VPHY VPLL C226 0.1uf,16V 12 37 64 C220 C227 0.1uf,16V 8 9 5 4 3 2 1 0.1uf,16V G5 C217 U22 3 1 150OHM800mA C229 0.1uf,16V VDD_FTVPHY 0.1uf,16V R11 10K,1% G3 2 FB11 6 1 150OHM800mA USB_DC C216 0.1uf,16V VDD_FTVPLL G4 2 FB10 C4 VDD_3V3 G2 1 150OHM800mA D 1 VDD_3V3 7 VDD_3V3 2 GND VCC 5 60 R8 100K R238 4.7K B 0.1uf,16V DGND SUSPEND 36 DGND FT2232LQFN64 DGND DGND DGND Texas Instruments, Inc. ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 A A AM335X 15X15 ICE BOARD JTAG & DEBUG UART Size B Document Number Modified By: Rev AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 5 4 3 2 Sheet: 11 1 of 14 5 4 3 2 1 V5_0VOP V3_3D C164 0.1uf,16V U25 SIP SOP 1 2 R268 DB0 DB1 13 14 V24_0HVS DGND C205 10uF,50V VCC 15 V5_0VOP C190 2.2uF R198 0 DNI C191 0.01uF R199 0 DNI R200 25K RE0 RE1 RE2 RE3 RE4 RE5 RE6 RE7 RLIM 49.9, MELF 5VOP 28 GND TOK R269 R270 R271 R272 R273 R274 R275 R276 4 6 8 10 12 17 19 21 1.2K, MELF 1.2K, MELF 1.2K, MELF 1.2K, MELF 1.2K, MELF 1.2K, MELF 1.2K, MELF 1.2K, MELF INDUS_INPUT0 INDUS_INPUT1 INDUS_INPUT2 INDUS_INPUT3 INDUS_INPUT4 INDUS_INPUT5 INDUS_INPUT6 INDUS_INPUT7 D C237 0.022uF 27 23 3 5 7 9 11 18 20 22 C236 0.022uF INDUS_INPUTSO IP0 IP1 IP2 IP3 IP4 IP5 IP6 IP7 C235 0.022uF 2 3 A CLK CE LD C234 0.022uF NC 25 24 26 C233 0.022uF Y SN74LVC1G07DCK 1 INDUS_INPUTCLK INDUS_INPUTCSn INDUS_INPUTLDn C232 0.022uF 4 4 SPI1_D1 GND VCC 5 4 SPI1_SCLK 4,6 SPI1_CS0 4 GPIO3_18 C231 0.022uF DGND U23 C230 0.022uF R261 10K,1% D 16 SN65HVS882 DGND DGND DGND DGND DGND V24_0HVS DGND DGND C192 0.001uF DGND V24_0HVS J9 INDUS_INPUT0 INDUS_INPUT1 INDUS_INPUT2 INDUS_INPUT3 INDUS_INPUT4 INDUS_INPUT5 INDUS_INPUT6 INDUS_INPUT7 C DRAIN0 DRAIN2 DRAIN4 DRAIN6 V5_0D DGND DGND 4 4 AIN1 AIN2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 C DRAIN1 DRAIN3 DRAIN5 DRAIN7 V5_0D DGND AIN3 AIN4 4 4 DGND CONN PCB 20x2 GNDA_ADC GNDA_ADC V3_3D R201 2.2K R202 2.2K V3_3D V5_0D B B U26 15 2 2,4,13 I2C0_SCL 2,4,13 I2C0_SDA 9 10 7 1 C200 C199 1uF 16 0.01uF SCL SDA A0 A1 A2 VCC DRAIN0 DRAIN1 DRAIN2 DRAIN3 DRAIN4 DRAIN5 DRAIN6 DRAIN7 G 3 4 5 6 11 12 13 14 DRAIN0 DRAIN1 DRAIN2 DRAIN3 DRAIN4 DRAIN5 DRAIN6 DRAIN7 D24 D25 D26 D27 D28 D29 D30 D31 Green LED Green LED Green LED Green LED Green LED Green LED Green LED Green LED 8 R204 R206 R207 R208 R209 R210 R211 R212 150 150 150 150 150 150 150 150 V5_0D C198 2.2uF DGND GND TPIC2810 DGND DGND DGND A A Texas Instruments, Inc. ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 AM335X 15X15 ICE BOARD Industrial Inputs/Outputs Size 5 4 3 2 Document Number Modified By: Rev C AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 Sheet: 12 1 of 14 5 4 3 2 HOST INTERFACE VDD_3V3 1 V5_0D V13 L6 VDD_3V3 D32 J12 D 8 EXT_BUSYn 8 EXT_INTn 8 EXT_CSn 8 EXT_WEn 8 EXT_OEn 4 UART4_RXD 4 SPI0_D0 4 SPI0_D1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 EXT_D[0..15] 8 EXT_D0 EXT_D1 EXT_D2 EXT_D3 EXT_D4 EXT_D5 EXT_D6 EXT_D7 EXT_D8 EXT_D9 EXT_D10 EXT_D11 EXT_D12 EXT_D13 EXT_D14 EXT_D15 VLF3010AT-2R2M1R0 C203 2.2uF, 25V R266 GPIO2_17 4,12 MBR0520LT1 U27 5 4 VIN SW FB EN GND 0,1% C207 1uF/16V R230 1.6M,1% 1 D C206 10pF C204 2.2uF, 25V 3 2 TPS61041DBV R231 180K,1% DGND DGND DGND DGND DGND EXT_LBn 8 EXT_UBn 8 UART4_TXD 4 SPI0_CS1 4 SPI0_SCLK C2P CONN PCB 25x2 C1P C208 1uF/16V C2N V24_IN C209 1uF/16V C1N 10051922-1410ELF 4 C DGND R267 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 EXT_A0 EXT_A1 EXT_A2 EXT_A3 EXT_A4 EXT_A5 EXT_A6 EXT_A7 EXT_A8 EXT_A9 EXT_A10 EXT_A11 EXT_A12 0, DNI 8 EXT_A[0..12] VBAT_LCD VBREF C211 0.1uF C215 0.022uF C2P C2N C1P C1N VBAT_LCD VBREF VDD_3V3 DGND DGND DGND RESn V13 C210 1uF/16V 2,4,12 I2C0_SCL 2,4,12 I2C0_SDA C212 0.1uF VMMC IREF VCOMH 14 13 12 11 10 9 8 7 6 5 4 3 2 1 C R232 IREF 392K,1% DGND RESn R262 SYS_RESETn 9,11 0,1% J13 DGND C213 2.2uF C214 2.2uF R218 R217 R216 R215 R214 R213 C201 C202 0.1uf,16V 10uF,10V DGND DGND DGND 10K,1% 10K,1% 10K,1% 10K,1% 10K,1% 10K,1% DGND B 4 MMC1_DAT2 4 MMC1_DAT3 4 MMC1_CMD 4 MMC1_CLK 4 MMC1_DAT0 4 MMC1_DAT1 B P3 1 2 3 4 5 6 7 8 DAT2 GND CD/DAT3 CD CMD GND3 VDD GND4 CLOCK GND5 VSS GND6 DAT0 GND7 DAT1 microSDGND8 9 10 11 12 13 14 15 16 DGND SD_CD R219 10K,1% VDD_3V3 R220 0 SCHA5B0200 DGND uSD Connector 4 MMC1_CD Texas Instruments, Inc. Signals below the orange dot are to be matched to each other @ +/- 10mils. Run over ground and keep isolated from other signals as much as possible. A ARM MPU Business Unit 12500 TI Blvd Dallas, TX 75243 A AM335X 15X15 ICE BOARD EXPANSION Size B Document Number Modified By: Rev AM335X_15X15_ICE.dsn CCO A2 Date: Tuesday, December 20, 2011 5 4 3 2 Sheet: 13 1 of 14