TMP451-Q1
TMP451-Q1
SLOS877C – OCTOBER 2014 – REVISED
APRIL 2021
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
www.ti.com
TMP451-Q1 ±1°C Remote and Local Temperature Sensor With η-Factor and Offset
Correction, Series-Resistance Cancellation, and Programmable Digital Filter
1 Features
3 Description
•
•
The TMP451-Q1 device is a high-accuracy, low-power
remote temperature sensor monitor with a built-in
local temperature sensor. The remote temperature
sensors are typically low-cost discrete NPN or
PNP transistors, or substrate thermal transistors or
diodes that are integral parts of microprocessors,
microcontrollers, or FPGAs. The temperature is
represented as a 12-bit digital code for both the
local and the remote sensors, giving a resolution
of 0.0625°C. The temperature accuracy is ±1°C
(maximum) in the typical operating range for the local
and the remote temperature sensors. The two-wire
serial interface accepts the SMBus communication
protocol.
•
•
•
•
•
•
•
•
•
•
Qualified for automotive applications
AEC-Q100 qualified with the following results:
– Device temperature grade 1: –40°C to 125°C
ambient operating temperature range
±1°C accuracy for local and remote diode sensors
0.0625°C resolution for local and remote channels
1.7-V to 3.6-V supply and logic voltage range
27-µA operating current, 3-µA shutdown current
Series resistance cancellation
η-factor and offset correction
Programmable digital filter
Diode fault detection
Two-wire and SMBus™ serial interface
8-pin WSON (WDFN) packages
– 2.50-mm × 2.50-mm with Wettable Flanks
(DQW)
– 2.00-mm × 2.00-mm (DQF)
Advanced features such as series resistance
cancellation,
programmable
nonideality
factor
(η-factor), programmable offset, programmable
temperature limits, and a programmable digital filter
are combined to provide a robust thermal monitoring
solution with improved accuracy and noise immunity.
2 Applications
•
•
•
•
•
Automotive infotainment systems
ECU processor temperature monitoring
TCM processor temperature monitoring
BCM processor temperature monitoring
LED headlight thermal control
The TMP451-Q1 device is ideal for multi-location,
high-accuracy temperature measurements in a variety
of automotive sub-systems. The TMP451-Q1 is
available in a Wettable Flanks WSON package that
provides a visual indicator of solderability to lower
automatic visual inspection (AVI) time. The device is
specified for operation over a supply voltage range of
1.7 V to 3.6 V and a temperature range of –40°C to
125°C.
Device Information(1)
PART NUMBER
TMP451-Q1
(1)
PACKAGE
BODY SIZE (NOM)
WSON (8)
2.00 mm × 2.00 mm
WSON (8)
2.50 mm × 2.50 mm
For all available packages, see the orderable addendum at
the end of the datasheet.
1.7V to 3.6V
1.7V to 3.6V
1
Processor
or ASIC
Built-in
Thermal
Transistor/
Diode
V+
2
3
DXP
SCL
DXN
SDA
8
7
TMP451-Q1
4
5
SMBus
Controller
THERM
GND
ALERT / THERM2
6
Overtemperature
Shutdown
Typical Application
An©IMPORTANT
NOTICEIncorporated
at the end of this data sheet addresses availability, warranty, changes, use in
safety-critical
applications,
Copyright
2021 Texas Instruments
Submit
Document
Feedback
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Product Folder Links: TMP451-Q1
1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Timing Characteristics for Figure 6-1 ......................... 6
6.7 Typical Characteristics................................................ 7
7 Detailed Description........................................................9
7.1 Overview..................................................................... 9
7.2 Functional Block Diagram........................................... 9
7.3 Feature Description.....................................................9
7.4 Device Functional Modes..........................................14
7.5 Programming............................................................ 14
7.6 Register Map.............................................................17
8 Application and Implementation.................................. 23
8.1 Application Information............................................. 23
8.2 Typical Application.................................................... 23
9 Power Supply Recommendations................................26
10 Layout...........................................................................27
10.1 Layout Guidelines................................................... 27
10.2 Layout Example...................................................... 28
11 Device and Documentation Support..........................29
11.1 Receiving Notification of Documentation Updates.. 29
11.2 Support Resources................................................. 29
11.3 Trademarks............................................................. 29
11.4 Electrostatic Discharge Caution.............................. 29
11.5 Glossary.................................................................. 29
12 Mechanical, Packaging, and Orderable
Information.................................................................... 29
4 Revision History
Changes from Revision B (June 2019) to Revision C (April 2021)
Page
• Separated DQF package and DQW wettable flanks package ...........................................................................1
• Added description of wettable flank package..................................................................................................... 1
• Added separate Pinout for DQW wettable flanks package ................................................................................3
Changes from Revision A (January 2019) to Revision B (June 2019)
Page
• Added DQW package......................................................................................................................................... 1
• Added DQW (WSON) package information to the Thermal Information table ...................................................4
Changes from Revision * (October 2014) to Revision A (January 2019)
Page
• Changed preview DQF orderables to active.......................................................................................................1
• Moved storage temperature to the Absolute Maximum Ratings table................................................................ 4
• Moved the AEC-Q100 ESD classification levels to the ESD Ratings table........................................................ 4
• Changed TMP451-Q1 SMBus Addresses table .............................................................................................. 16
• Added Receiving Notification of Documentation Updates section....................................................................29
• Added Community Resources section..............................................................................................................29
2
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
5 Pin Configuration and Functions
V+
1
8
SCL
D+
2
7
SDA
D-
3
6
ALERT/THERM2
THERM
4
5
GND
Figure 5-1. DQF Package 8-Pin WSON Top View
V+
1
8
SCL
D+
2
7
SDA
D-
3
6
ALERT/THERM
THERM
4
5
GND
Figure 5-2. DQW with Wettable Flanks Packages 8-Pin WSON Top View
Table 5-1. Pin Functions
PIN
NAME
NO.
TYPE
DESCRIPTION
ALERT/ THERM2
6
Digital output
Interrupt or SMBus alert output. Can be configured as a second THERM output. Open-drain; requires
pullup resistor to voltage between 1.7 V and 3.6 V.
D–
3
Analog input
Negative connection to remote temperature sensor.
D+
2
Analog input
Positive connection to remote temperature sensor.
GND
5
Ground
SCL
8
Digital input
SDA
7
THERM
4
Digital output
Thermal shutdown or fan-control pin. Open-drain; requires pullup resistor to voltage between 1.7 V and
3.6 V.
V+
1
Power supply
Positive supply voltage, 1.7 V to 3.6 V.
Supply ground connection.
Serial clock line for SMBus. Input; requires pullup resistor to voltage between 1.7 V and 3.6 V if driven
by open-drain output.
Bidirectional digital
Serial data line for SMBus. Open-drain; requires pullup resistor to voltage between 1.7 V and 3.6 V.
input-output
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
3
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range, unless otherwise noted.(1)
MIN
MAX
UNIT
Power supply
V+
–0.3
3.6
V
THERM, ALERT/ THERM2, SDA and SCL only
–0.3
3.6
V
Input voltage
D+ only
–0.3
(V+) + 0.3
V
D– only
–0.3
0.3
V
10
mA
Input current
Operating temperature
–55
Junction temperature (TJmax)
Storage temperature, Tstg
(1)
–60
127
°C
150
°C
150
°C
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
6.2 ESD Ratings
VALUE
Human body model (HBM), per AEC Q100-002(1)
HBM ESD Classification Level 2
V(ESD)
(1)
Electrostatic discharge
Charged device model (CDM), per AEC Q100-011
CDM ESD Classification Level C4B
UNIT
±2000
Corner pins (1, 4, 5,
and 8)
±750
Other pins
±500
V
AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
TA
MIN
NOM
MAX
Supply voltage
1.7
3.3
3.6
UNIT
V
Operating free-air temperature
–40
125
°C
6.4 Thermal Information
TMP451-Q1
THERMAL METRIC(1)
DQW
(WSON)
8 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
171.3
128.5
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
81.4
67.9
°C/W
RθJB
Junction-to-board thermal resistance
137.9
56.9
°C/W
ψJT
Junction-to-top characterization parameter
3.9
4.4
°C/W
ψJB
Junction-to-board characterization parameter
140
56.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
°C/W
(1)
4
DQF (WSON)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
6.5 Electrical Characteristics
At TA = –40°C to 125°C and V+ = 3.3 V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
TEMPERATURE ERROR
TELOCAL
Local temperature sensor
TEREMOTE
Remote temperature sensor(1)
TA = 0°C to 70°C
TA = –40°C to 125°C
TA = 0°C to 70°C, TD = –55°C to 150°C
Remote temperature sensor versus supply
(local or remote)
±0.25
±1
°C
±1
±2
°C
±0.25
±1
°C
TA = –40°C to 100°C, TD = –55°C to 150°C
±1
±2
°C
TA = –40°C to 125°C, TD = –55°C to 150°C
±2
±4
°C
±0.1
±0.25
31
34
V+ = 1.7 V to 3.6 V
°C/V
TEMPERATURE MEASUREMENT
Conversion time
One-Shot mode, local and remote total
Local temperature sensor resolution
Remote temperature sensor resolution
Remote sensor source current, high
Series resistance 1 kΩ max
Remote sensor source current, medium
Remote sensor source current, low
η
Remote transistor ideality factor
TMP451-Q1 optimized ideality factor
ms
12
Bits
12
Bits
120
μA
45
μA
7.5
μA
1.008
SMBus INTERFACE
VIH
High-level input voltage
VIL
Low-level input voltage
1.4
Hysteresis
200
SMBus output low sink current
VOL
V
0.45
mV
6
Low-level output voltage
IO = 6 mA
Logic input current
0 V ≤ VI ≤ 3.6 V
mA
0.15
–1
SMBus input capacitance
0.4
V
1
μA
3
SMBus clock frequency
0.01
SMBus timeout
20
SCL falling edge to SDA valid time
V
25
pF
2.5
MHz
30
ms
1
μs
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
5
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
At TA = –40°C to 125°C and V+ = 3.3 V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
0.15
0.4
V
1
μA
DIGITAL OUTPUTS (THERM, ALERT/ THERM2)
VOL
Low-level output voltage
IO = 6 mA
IOH
High-level output leakage current
VO = V+
POWER SUPPLY
V(V+)
Specified voltage range
1.7
3.6
V
27
40
μA
16 conversions per second
165
250
μA
32 conversions per second
300
450
μA
3
8
μA
0.0625 conversions per second
IQ
Quiescent current
POR
(1)
Serial bus inactive, shutdown mode
Serial bus active, ƒS = 400 kHz, shutdown mode
90
μA
Serial bus active, ƒS = 2.5 MHz, shutdown mode
350
μA
Power-on reset threshold
1.2
1.55
V
Tested with less than 5-Ω effective series resistance and 100-pF differential input capacitance.
6.6 Timing Characteristics for Figure 6-1
FAST MODE
PARAMETER
HIGH-SPEED MODE
MIN
MAX
MIN
MAX
UNIT
ƒ(SCL)
SCL operating frequency
0.001
0.4
0.001
2.5
MHz
t(BUF)
Bus free time between STOP and START Condition
1300
260
ns
t(HDSTA)
Hold time after repeated START condition. After this period, the first clock
is generated.
600
160
ns
t(SUSTA)
Repeated START condition setup time
600
160
ns
600
t(SUSTO)
STOP condition setup time
t(HDDAT)
Data hold time
t(SUDAT)
Data setup time
t(LOW)
0
160
900
ns
0
150
ns
100
30
ns
SCL clock LOW period
1300
260
ns
t(HIGH)
SCL clock HIGH period
600
tF, tR – SDA
Data fall and rise time
tF, tR – SCL
Clock fall and rise time
tR
Rise time for SCL ≤ 100 kHz
t(LOW)
60
ns
300
80
300
40
1000
tF
tR
ns
ns
ns
t(HDSTA)
SCL
t(HDSTA)
t(HIGH)
t(HDDAT)
t(SUSTO)
t(SUSTA)
t(SUDAT)
SDA
t(BUF)
P
S
S
P
Figure 6-1. Two-Wire Timing Diagram
6
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
6.7 Typical Characteristics
At TA = 25°C and V+ = 3.3 V, unless otherwise noted.
2
Mean
Mean - 4σ
Mean + 4σ
1.5
1
Remote Temperature Error (°C)
Local Temperature Error (°C)
2
0.5
0
-0.5
-1
-1.5
Mean - 4σ
Mean + 4σ
1
0.5
0
-0.5
-1
-1.5
-2
-2
-50
0
50
100
150
Ambient Temperature (°C)
-50
0
50
100
150
Ambient Temperature (°C)
C001
Figure 6-2. Local Temperature Error vs. Temperature
C002
Figure 6-3. Remote Temperature Error vs. Temperature
20
2
10
1.5
5HPRWH 7HPSHUDWXUH (UURU Û&
5HPRWH 7HPSHUDWXUH (UURU Û&
Mean
1.5
0
-10
-20
-30
-40
D+ to GND
-50
1
0.5
0
-0.5
-1
-1.5
D+ to V+
-60
-2
1
10
100
Leakage Resistance (M )
0
Figure 6-4. Remote Temperature Error vs. Leakage Resistance
1000
1500
2000
Remote Temperature Error (°C)
-10
-15
-20
-25
0
5
10
15
20
Differential Capacitance (nF)
C004
20 mV p-p
50 mV p-p
100 mV p-p
80
70
60
50
40
30
20
10
0
-10
0
C005
Figure 6-6. Remote Temperature Error vs. Differential
Capacitance
3000
Figure 6-5. Remote Temperature Error vs. Series Resistance
90
-5
2500
Series Resistance ( )
0
5HPRWH 7HPSHUDWXUH (UURU Û&
500
C003
200
400
600
Noise Frequency (MHz)
800
1000
C006
Figure 6-7. Remote Temperature Error vs. Remote Channel
Noise Frequency
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
7
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
6.7 Typical Characteristics (continued)
At TA = 25°C and V+ = 3.3 V, unless otherwise noted.
180
350
160
300
140
120
ISD ( A)
IQ ( A)
250
200
150
100
80
60
100
40
50
20
0
0
0.01
0.1
1
10
1
100
Conversion Rate (Hz)
10
100
1000
Clock Frequency (kHz)
C007
10000
C008
Figure 6-9. Shutdown Quiescent Current vs. SCL Clock
Frequency
Figure 6-8. Quiescent Current vs. Conversion Rate
170
3
2.5
165
ISD ( A)
IQ ( A)
2
160
155
1.5
1
150
0.5
145
0
1.5
2
2.5
3
Supply Voltage (V)
3.5
4
Figure 6-10. Quiescent Current vs. Supply Voltage (At Default
Conversion Rate of 16 Conversions per Second)
8
1.5
2
2.5
3
Supply Voltage (V)
C009
3.5
4
C010
Figure 6-11. Shutdown Quiescent Current vs. Supply Voltage
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
7 Detailed Description
7.1 Overview
The TMP451-Q1 device is a digital temperature sensor that combines a local temperature measurement channel
and a remote-junction temperature measurement channel in a single DFN-8 package. The device is two-wireand SMBus-interface compatible, and is specified over a temperature range of –40°C to 125°C. The TMP451-Q1
device also contains multiple registers for programming and holding configuration settings, temperature limits,
and temperature measurement results.
7.2 Functional Block Diagram
V+
TMP451-Q1
Voltage Regulator
Register Bank
Oscillator
SCL
Serial Interface
Control Logic
SDA
16 x I
6xI
I
ALERT/THERM2
D+
ADC
DTHERM
Internal
BJT
GND
7.3 Feature Description
7.3.1 Temperature Measurement Data
The local and remote temperature sensors have a resolution of 12 bits (0.0625°C). Temperature data that
result from conversions within the default measurement range are represented in binary form, as shown in
the Standard Binary column of Table 7-1. Any temperature below 0°C results in a data value of 0 (00h).
Likewise, temperatures above 127°C result in a value of 127 (7Fh). The device can be set to measure over an
extended temperature range by changing bit 2 (RANGE) of configuration register from low to high. The change
in measurement range and data format from standard binary to extended binary occurs at the next temperature
conversion. For data captured in the extended temperature range configuration, an offset of 64 (40h) is added to
the standard binary value, as shown in the EXTENDED BINARY column of Table 7-1. This configuration allows
measurement of temperatures as low as –64°C, and as high as 191°C; however, most temperature-sensing
diodes only measure with the range of –55°C to 150°C. Additionally, the TMP451-Q1 is specified only for
ambient temperatures ranging from –40°C to 125°C; parameters in the Absolute Maximum Ratings table must
be observed.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
9
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
Table 7-1. Temperature Data Format (Local and Remote Temperature High Bytes)
LOCAL AND REMOTE TEMPERATURE REGISTER
HIGH BYTE VALUE (1°C RESOLUTION)
TEMPERATURE
(°C)
(1)
(2)
STANDARD BINARY(1)
EXTENDED BINARY(2)
BINARY
HEX
BINARY
–64
0000 0000
00
0000 0000
HEX
00
–50
0000 0000
00
0000 1110
0E
–25
0000 0000
00
0010 0111
27
0
0000 0000
00
0100 0000
40
1
0000 0001
01
0100 0001
41
5
0000 0101
05
0100 0101
45
10
0000 1010
0A
0100 1010
4A
25
0001 1001
19
0101 1001
59
50
0011 0010
32
0111 0010
72
75
0100 1011
4B
1000 1011
8B
100
0110 0100
64
1010 0100
A4
125
0111 1101
7D
1011 1101
BD
127
0111 1111
7F
1011 1111
BF
150
0111 1111
7F
1101 0110
D6
175
0111 1111
7F
1110 1111
EF
191
0111 1111
7F
1111 1111
FF
Resolution is 1°C/count. Negative values produce a read of 0°C.
Resolution is 1°C/count. All values are unsigned with a –64°C offset.
Both local and remote temperature data use two bytes for data storage. The high byte stores the temperature
with 1°C resolution. The second or low byte stores the decimal fraction value of the temperature and allows a
higher measurement resolution, as shown in Table 7-2. The measurement resolution for both the local and the
remote channels is 0.0625°C.
Table 7-2. Decimal Fraction Temperature Data Format (Local and Remote Temperature Low Bytes)
TEMP
(°C)
(1)
10
TEMPERATURE REGISTER LOW BYTE VALUE
(0.0625°C RESOLUTION)(1)
STANDARD AND EXTENDED BINARY
HEX
0
0000 0000
00
0.0625
0001 0000
10
0.1250
0010 0000
20
0.1875
0011 0000
30
0.2500
0100 0000
40
0.3125
0101 0000
50
0.3750
0110 0000
60
0.4375
0111 0000
70
0.5000
1000 0000
80
0.5625
1001 0000
90
0.6250
1010 0000
A0
0.6875
1011 0000
B0
0.7500
1100 0000
C0
0.8125
1101 0000
D0
0.8750
1110 0000
E0
0.9385
1111 0000
F0
Resolution is 0.0625°C/count. All possible values are shown.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
7.3.1.1 Standard Binary to Decimal Temperature Data Calculation Example
High-byte conversion (for example, 0111 0011):
Convert the right-justified binary high byte to hexadecimal.
From hexadecimal, multiply the first number by 160 = 1 and the second number by 161 = 16.
The sum equals the decimal equivalent.
0111 0011b → 73h → (3 × 160) + (7 × 161) = 115
Low-byte conversion (for example, 0111 0000):
To convert the left-justified binary low-byte to decimal, use bits 7 through 4 and ignore bits 3 through 0 because
they do not affect the value of the number.
0111b → (0 × 1/2)1 + (1 × 1/2)2 + (1 × 1/2)3 + (1 × 1/2)4 = 0.4375
7.3.1.2 Standard Decimal to Binary Temperature Data Calculation Example
For positive temperatures (for example, 20°C):
(20°C) / (1°C/count) = 20 → 14h → 0001 0100
Convert the number to binary code with 8-bit, right-justified format, and MSB = 0 to denote a positive sign.
20°C is stored as 0001 0100 → 14h.
For negative temperatures (for example, –20°C):
(|–20|) / (1°C/count) = 20 → 14h → 0001 0100
Generate the two's complement of a negative number by complementing the absolute value binary number and
adding 1.
–20°C is stored as 1110 1100 → ECh.
7.3.2 Series Resistance Cancellation
Series resistance cancellation automatically eliminates the temperature error caused by the resistance of the
routing to the remote transistor or by the resistors of the optional external low-pass filter. A total of up to
1 kΩ of series resistance can be cancelled by the TMP451-Q1 device, eliminating the need for additional
characterization and temperature offset correction. See Figure 6-5, Remote Temperature Error vs. Series
Resistance, for details on the effects of series resistance on sensed remote temperature error.
7.3.3 Differential Input Capacitance
The TMP451-Q1 device tolerates differential input capacitance of up to 1000 pF with minimal change in
temperature error. The effect of capacitance on sensed remote temperature error is shown in Figure 6-6,
Remote Temperature Error vs. Differential Capacitance.
7.3.4 Filtering
Remote junction temperature sensors are usually implemented in a noisy environment. Noise is most often
created by fast digital signals, and it can corrupt measurements. The TMP451-Q1 device has a built-in, 65kHz filter on the inputs of D+ and D– to minimize the effects of noise. However, a bypass capacitor placed
differentially across the inputs of the remote temperature sensor is recommended to make the application
more robust against unwanted coupled signals. For this capacitor, select a value of between 100 pF and 1
nF. Some applications attain better overall accuracy with additional series resistance; however, this increased
accuracy is application-specific. When series resistance is added, the total value should not be greater than 1
kΩ. If filtering is required, suggested component values are 100 pF and 50 Ω on each input; exact values are
application-specific.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
11
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
Additionally, a digital filter is available for the remote temperature measurements to further reduce the effect of
noise. This filter is programmable and has two levels when enabled. Level 1 performs a moving average of four
consecutive samples. Level 2 performs a moving average of eight consecutive samples. The value stored in
the remote temperature result register is the output of the digital filter, and the ALERT and THERM limits are
compared to it. This provides additional immunity to noise and spikes on the ALERT and THERM outputs. The
filter responses are shown in Figure 7-1. The filter can be enabled or disabled by programming the desired levels
in the digital filter register. The digital filter is disabled by default and on POR.
Step response
100
90
90
80
80
70
Temperature (°C)
Temperature (°C)
Impulse Response
100
Disabled
60
50
40
Level1
Level2
30
70
Disabled
60
Level1
Level2
50
40
30
20
20
10
10
0
0
0
1
2
3
4
5
6
7 8
9
Samples
10
11 12
13
14
15
0
1
2
3
4
5
6
7 8
9
Samples
10
11 12
13
14
15
Figure 7-1. Filter Response to Impulse and Step Inputs
7.3.5 Sensor Fault
The TMP451-Q1 device can sense a fault at the D+ input resulting from incorrect diode connection. The
TMP451-Q1 device can also sense an open circuit. Short-circuit conditions return a value of –64°C. The
detection circuitry consists of a voltage comparator that trips when the voltage at D+ exceeds (V+) – 0.3 V
(typical). The comparator output is continuously checked during a conversion. If a fault is detected, then OPEN
(bit 2) in the status register is set to 1.
When not using the remote sensor with the TMP451-Q1 device, the D+ and D– inputs must be connected
together to prevent meaningless fault warnings.
12
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
7.3.6 ALERT and THERM Functions
The operation of the ALERT (pin 6) and THERM (pin 4) interrupts is shown in Figure 7-2. The operation of the
THERM (pin 4) and THERM2 (pin 6) interrupts is shown in Figure 7-3.
Temperature Conversion Complete
150
140
Temperature (°C)
130
120
110
THERM Limit
100
THERM Limit - Hysteresis
90
High Temperature Limit
80
70
Measured
Temperature
60
50
Time
ALERT output
serviced by master
ALERT
THERM
Figure 7-2. ALERT and THERM Interrupt Operation
Temperature Conversion Complete
150
140
Temperature (°C)
130
120
110
THERM Limit
100
THERM Limit - Hysteresis
90
THERM2 Limit
80
THERM2 Limit - Hysteresis
70
Measured
Temperature
60
50
Time
THERM2
THERM
Figure 7-3. THERM and THERM2 Interrupt Operation
The hysteresis value is stored in the THERM hysteresis register. The value of the CONAL[2:0] bits in the
consecutive ALERT register determines the number of limit violations before the ALERT pin is tripped. The
default value is 000b and corresponds to one violation, 001b programs two consecutive violations, 011b
programs three consecutive violations, and 111b programs four consecutive violations. This provides additional
filtering for the ALERT pin state.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
13
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
7.4 Device Functional Modes
7.4.1 Shutdown Mode (SD)
The TMP451-Q1 shutdown mode enables the user to save maximum power by shutting down all device circuitry
other than the serial interface, reducing current consumption to typically less than 3 μA; see Figure 6-11,
Shutdown Quiescent Current vs. Supply Voltage. Shutdown mode is enabled when the SD bit (bit 6) of the
configuration register is high; the device shuts down after the current conversion is finished. When the SD bit is
low, the device maintains a continuous-conversion state.
7.5 Programming
7.5.1 Serial Interface
The TMP451-Q1 device operates only as a slave device on either the two-wire bus or the SMBus. Connections
to either bus are made using the open-drain I/O lines, SDA and SCL. The SDA and SCL pins feature integrated
spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The
TMP451-Q1 device supports the transmission protocol for fast (1 kHz to 400 kHz) and high-speed (1 kHz to
2.5 MHz) modes. All data bytes are transmitted MSB first.
7.5.1.1 Bus Overview
The TMP451-Q1 device is SMBus interface compatible. In SMBus protocol, the device that initiates the transfer
is called a master, and the devices controlled by the master are slaves. The bus must be controlled by a
master device that generates the serial clock (SCL), controls the bus access, and generates the start and stop
conditions.
To address a specific device, a start condition is initiated. A start condition is indicated by pulling the data line
(SDA) from a high-to-low logic level while SCL is high. All slaves on the bus shift in the slave address byte, with
the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the slave being
addressed responds to the master by generating an acknowledge bit and pulling SDA low.
Data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During data
transfer SDA must remain stable while SCL is high, because any change in SDA while SCL is high is interpreted
as a control signal.
After all data have been transferred, the master generates a stop condition. A stop condition is indicated by
pulling SDA from low to high, while SCL is high.
7.5.1.2 Bus Definitions
The TMP451-Q1 device is two-wire and SMBus-compatible. Figure 7-4 and Figure 7-5 show the timing for
various operations on the TMP451-Q1 device. The bus definitions are as follows:
Bus Idle:
Both SDA and SCL lines remain high.
Start Data
Transfer:
A change in the state of the SDA line, from high to low, while the SCL line is high, defines
a start condition. Each data transfer initiates with a start condition.
Stop Data
Transfer:
A change in the state of the SDA line from low to high while the SCL line is high defines a
stop condition. Each data transfer terminates with a repeated start or stop condition.
Data Transfer:
The number of data bytes transferred between a start and a stop condition is not limited
and is determined by the master device. The receiver acknowledges data transfer.
Acknowledge:
Each receiving device, when addressed, is obliged to generate an acknowledge bit. A
device that acknowledges must pull down the SDA line during the acknowledge clock
pulse in such a way that the SDA line is stable low during the high period of the
acknowledge clock pulse. Take setup and hold times into account. On a master receive,
data transfer termination can be signaled by the master generating a not-acknowledge on
the last byte that has been transmitted by the slave.
14
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
1
9
9
1
SCL
¼
SDA
0
1
0
1
1
0(1)
0
R/W
Start By
Master
P7
P6
P5
P4
P3
P2
P1
P0
ACK By
Device
¼
ACK By
Device
Frame 2 Pointer Register Byte
Frame 1 Two-Wire Slave Address Byte
9
1
SCL
(Continued)
SDA
(Continued)
D7
D6
D5
D4
D3
D2
D1
D0
ACK By
Device
Stop By
Master
Frame 3 Data Byte 1
A.
Slave address 1001100 shown.
Figure 7-4. Two-Wire Timing Diagram for Write Word Format
1
9
1
9
SCL
¼
SDA
1
0
0
1
1
0
0(1)
P7
R/W
Start By
Master
P6
P5
P4
P3
P2
P1
P0
ACK By
Device
ACK By
Device
Frame 1 Two-Wire Slave Address Byte
1
Frame 2 Pointer Register Byte
9
1
9
SCL
(Continued)
¼
SDA
(Continued)
1
0
0
1
1
0
0(1)
R/W
Start By
Master
D7
D6
ACK By
Device
Frame 3 Two-Wire Slave Address Byte
A.
B.
¼
D5
D4
D3
D2
D1
D0
From
Device
¼
NACK By
Master(2)
Frame 4 Data Byte 1 Read Register
Slave address 1001100 shown.
Master should leave SDA high to terminate a single-byte read operation.
Figure 7-5. Two-Wire Timing Diagram for Single-Byte Read Format
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
15
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
7.5.1.3 Serial Bus Address
To communicate with the TMP451-Q1 device, the master must first address slave devices using a slave
address byte. The slave address byte consists of seven address bits, and a direction bit indicating the intent
of executing a read or write operation. The TMP451-Q1 SMBus addresses are shown in Table 7-3. Additional
factory-programmed device addresses are available upon request.
Table 7-3. TMP451-Q1 SMBus Addresses
Orderable Part Number (DQF Package)
SMBus Address (7-bit)
TMP451HQDQFRQ1
49
TMP451AQDQFRQ1
4C
TMP451JQDQFRQ1
4E
7.5.1.4 Read and Write Operations
Accessing a particular register on the TMP451-Q1 device is accomplished by writing the appropriate value to the
pointer register. The value for the pointer register is the first byte transferred after the slave address byte with the
R/ W bit low. Every write operation to the TMP451-Q1 device requires a value for the pointer register (see Figure
7-4).
When reading from the TMP451-Q1 device the last value stored in the pointer register by a write operation
is used to determine which register is read by a read operation. To change which register is read for a read
operation, a new value must be written to the pointer register. This transaction is accomplished by issuing a
slave address byte with the R/ W bit low, followed by the pointer register byte; no additional data are required.
The master can then generate a start condition and send the slave address byte with the R/ W bit high to initiate
the read command; see Figure 7-5 for details of this sequence.
If repeated reads from the same register are desired, it is not necessary to continually send the pointer register
bytes, because the TMP451-Q1 retains the pointer register value until it is changed by the next write operation.
The register bytes are sent MSB first, followed by the LSB.
Read operations should be terminated by issuing a not-acknowledge command at the end of the last byte to be
read. For single-byte operation, the master must leave the SDA line high during the acknowledge time of the first
byte that is read from the slave.
7.5.1.5 Timeout Function
If the SMBus timeout function is enabled, the TMP451-Q1 device resets the serial interface if either SCL or SDA
are held low for 25 ms (typical) between a start and stop condition. If the TMP451-Q1 device is holding the
bus low, the device releases the bus and waits for a start condition. To avoid activating the timeout function,
maintaining a communication speed of at least 1 kHz for the SCL operating frequency is necessary. The SMBTO
bit (bit 7) of the consecutive ALERT register controls the timeout enable. Setting the SMBTO bit to a value of 0
(default) disables the timeout. Setting the SMBTO bit to a value of 1 enables the function.
7.5.1.6 High-Speed Mode
For the two-wire bus to operate at frequencies above 1 MHz, the master device must issue a high-speed mode
(Hs-mode) master code (0000 1xxx) as the first byte after a start condition to switch the bus to high-speed
operation. The TMP451-Q1 device does not acknowledge this byte, but switches the input filters on SDA and
SCL and the output filter on SDA to operate in Hs-mode, allowing transfers at up to 2.5 MHz. After the Hs-mode
master code has been issued, the master transmits a two-wire slave address to initiate a data transfer operation.
The bus continues to operate in Hs-mode until a stop condition occurs on the bus. Upon receiving the stop
condition, the TMP451-Q1 device switches the input and output filters back to fast mode operation.
16
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
7.6 Register Map
Table 7-4. Register Map
BIT DESCRIPTION
POINTER READ
(HEX)
POINTER WRITE
(HEX)
POR (HEX)
7
6
5
4
3
2
1
0
00
N/A
00
LT11
LT10
LT9
LT8
LT7
LT6
LT5
LT4
Local temperature (high byte)
01
N/A
00
RT11
RT10
RT9
RT8
RT7
RT6
RT5
RT4
Remote temperature (high byte)
02
N/A
N/A
BUSY
LHIGH
LLOW
RHIGH
RLOW
OPEN
RTHRM
LTHRM
03
09
00
MASK1
SD
ALERT/
THERM2
0
0
RANGE
0
0
04
0A
08
0
0
0
0
CR3
CR2
CR1
CR0
05
0B
55
LTHL11
LTHL10
LTHL9
LTHL8
LTHL7
LTHL6
LTHL5
LTHL4
Local temperature high limit
06
0C
00
LTLL11
LTLL10
LTLL9
LTLL8
LTLL7
LTLL6
LTLL5
LTLL4
Local temperature low limit
07
0D
55
RTHL11
RTHL10
RTHL9
RTHL8
RTHL7
RTHL6
RTHL5
RTHL4
Remote temperature high limit (high byte)
08
0E
00
RTLL11
RTLL10
RTLL9
RTLL8
RTLL7
RTLL6
RTLL5
RTLL4
Remote temperature low limit (high byte)
N/A
0F
N/A
X
X
X
X
X
X
X
X
One-shot start(1)
10
N/A
00
RT3
RT2
RT1
RT0
0
0
0
0
Remote temperature (low byte)
(1)
REGISTER DESCRIPTION
Status register
Configuration register
Conversion rate register
11
11
00
RTOS11
RTOS10
RTOS9
RTOS8
RTOS7
RTOS6
RTOS5
RTOS4
Remote temperature offset (high byte)
12
12
00
RTOS3
RTOS2
RTOS1
RTOS0
0
0
0
0
Remote temperature offset (low byte)
13
13
00
RTHL3
RTHL2
RTHL1
RTHL0
0
0
0
0
Remote temperature high limit (low byte)
14
14
00
RTLL3
RTLL2
RTLL1
RTLL0
0
0
0
0
Remote temperature low limit (low byte)
15
N/A
00
LT3
LT2
LT1
LT0
0
0
0
0
Local temperature (low byte)
19
19
6E
RTH11
RTH10
RTH9
RTH8
RTH7
RTH6
RTH5
RTH4
20
20
6E
LTH11
LTH10
LTH9
LTH8
LTH7
LTH6
LTH5
LTH4
Local temperature THERM limit
21
21
0A
HYS11
HYS10
HYS9
HYS8
HYS7
HYS6
HYS5
HYS4
THERM hysteresis
22
22
01
SMBTO
0
0
0
CONAL2
CONAL1
CONAL0
1
23
23
00
NC7
NC6
NC5
NC4
NC3
NC2
NC1
NC0
η-factor correction
24
24
00
0
0
0
0
0
0
DF1
DF0
Digital filter control
FE
N/A
55
0
1
0
1
0
1
0
1
Remote temperature THERM limit
Consecutive ALERT
Manufacturer ID
X = undefined. Writing any value to this register initiates a one-shot start; see the One-Shot Conversion section.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
17
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
7.6.1 Register Information
The TMP451-Q1 device contains multiple registers for holding configuration information, temperature
measurement results, and status information. These registers are described in Figure 7-6 and Table 7-4.
7.6.1.1 Pointer Register
Figure 7-6 shows the internal register structure of the TMP451-Q1 device. The 8-bit pointer register is used to
address a given data register. The pointer register identifies which of the data registers should respond to a read
or write command on the two-wire bus. This register is set with every write command. A write command must be
issued to set the proper value in the pointer register before executing a read command. Table 7-4 describes the
pointer register and the internal structure of the TMP451-Q1 registers. The power-on reset (POR) value of the
pointer register is 00h (0000 0000b).
Pointer Register
Local and Remote Temperature Registers
Status Register
Configuration Register
SDA
Conversion Rate Register
Local and Remote Temperature Limit Registers
One-Shot Start Register
Remote Temperature Offset Registers
I/O
Control
Interface
Local and Remote THERM Limit Registers
THERM Hysteresis Register
Consecutive ALERT Register
N-factor Correction Register
SCL
Digital Filter Register
Manufacturer ID Register
Figure 7-6. Internal Register Structure
7.6.1.2 Temperature Registers
The TMP451-Q1 device has multiple 8-bit registers that hold temperature measurement results. The eight most
significant bits (MSBs) of the local temperature sensor result are stored in register 00h, while the four least
significant bits (LSBs) are stored in register 15h (the four MSBs of register 15h). The eight MSBs of the remote
temperature sensor result are stored in register 01h, and the four LSBs are stored in register 10h (the four MSBs
of register 10h). The four LSBs of both the local sensor and the remote sensor indicate the temperature value
after the decimal point (for example, if the temperature result is 10.0625°C, the high byte is 0000 1010 and the
low byte is 0001 0000). These registers are read-only and are updated by the ADC each time a temperature
measurement is completed.
When the full temperature value is needed, reading the MSB value first causes the LSB value to be locked (the
ADC does not write to it) until it is read. The same thing happens upon reading the LSB value first (the MSB
value is locked until it is read). This mechanism assures that both bytes of the read operation are from the same
ADC conversion. This assurance remains valid only until another register is read. For proper operation, read the
18
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
high byte of the temperature result first. Read the low byte register in the next read command; if the LSBs are
not needed, the register may be left unread. The power-on reset value of all temperature registers is 00h.
7.6.1.3 Status Register
The status register reports the state of the temperature ADC, the temperature limit comparators, and the
connection to the remote sensor. Table 7-5 lists the status register bits. The status register is read-only, and is
read by accessing pointer address 02h.
Table 7-5. Status Register Format
STATUS REGISTER (READ = 02h, WRITE = N/A)
(1)
BIT NUMBER
BIT NAME
7
BUSY
FUNCTION
6
LHIGH(1)
= 1 when the local high temperature limit is tripped
5
LLOW(1)
= 1 when the local low temperature limit is tripped
4
RHIGH(1)
= 1 when the remote high temperature limit is tripped
3
RLOW(1)
= 1 when the remote low temperature limit is tripped
2
OPEN(1)
= 1 when the remote sensor is an open circuit
1
RTHRM
= 1 when the remote THERM limit is tripped
0
LTHRM
= 1 when the local THERM limit is tripped
= 1 when the ADC is converting
These flags stay high until the status register is read or they are reset by a POR when pin 6 is
configured as ALERT. Only bit 2 (OPEN) stays high until the status register is read or it is reset by a
POR when pin 6 is configured as THERM2.
The BUSY bit = 1 if the ADC is making a conversion. This bit is set to 0 if the ADC is not converting.
The LHIGH and LLOW bits indicate a local sensor overtemperature or undertemperature event, respectively.
The RHIGH and RLOW bits indicate a remote sensor overtemperature or undertemperature event, respectively.
The OPEN bit indicates an open circuit condition on the remote sensor. When pin 6 is configured as the ALERT
output, the five flags are NORed together. If any of the five flags are high, the ALERT interrupt latch is set and
the ALERT output goes low. Reading the status register clears the five flags, provided that the condition that
caused the setting of the flags is not present anymore (that is, the value of the corresponding result register is
within the limits, or the remote sensor is connected properly and functional). The ALERT interrupt latch (and the
ALERT pin correspondingly) is not reset by reading the status register. The reset is done by the master reading
the temperature sensor device address to service the interrupt, and only if the flags have been reset and the
condition that caused them to be set is not present.
The RTHRM and LTHRM flags are set when the corresponding temperature exceeds the programmed THERM
limit. They are reset automatically when the temperature returns to within the limits. The THERM output goes
low in the case of overtemperature on either the local or the remote channel, and goes high as soon as the
measurements are within the limits again. The THERM hysteresis register (21h) allows hysteresis to be added
so that the flag resets and the output goes high when the temperature returns to or goes below the limit value
minus the hysteresis value.
When pin 6 is configured as THERM2, only the high limits matter. The LHIGH and RHIGH flags are set if the
respective temperatures exceed the limit values, and the pin goes low to indicate the event. The LLOW and
RLOW flags have no effect on THERM2, and the output behaves the same way when configured as THERM.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
19
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
7.6.1.4 Configuration Register
The configuration register sets the temperature range, the ALERT/ THERM modes, and controls the shutdown
mode. The configuration register is set by writing to pointer address 09h, and read by reading from pointer
address 03h. Table 7-6 summarizes the bits of configuration register.
Table 7-6. Configuration Register Bit Descriptions
CONFIGURATION REGISTER (READ = 03h, WRITE = 09h, POR = 00h)
BIT NUMBER
NAME
FUNCTION
POWER-ON RESET VALUE
7
MASK1
0 = ALERT Enabled
1 = ALERT Masked
0
6
SD
0 = Run
1 = Shut down
0
5
ALERT/ THERM2
0 = ALERT
1 = THERM2
0
4:3
Reserved
—
0
2
RANGE
0 = 0°C to +127°C
1 = –64°C to +191°C
0
1:0
Reserved
—
0
MASK1 (bit 7) of the configuration register masks the ALERT output. If MASK1 is 0 (default), the ALERT output
is enabled. If MASK1 is set to 1, the ALERT output is disabled. This configuration applies only if the value of
ALERT/ THERM2 (bit 5) is 0 (that is, pin 6 is configured as the ALERT output). If pin 6 is configured as the
THERM2 output, the value of the MASK1 bit has no effect.
The shutdown bit (SD, bit 6) enables or disables the temperature-measurement circuitry. If SD = 0 (default), the
TMP451-Q1 device converts continuously at the rate set in the conversion rate register. When SD is set to 1, the
TMP451-Q1 device stops converting when the current conversion sequence is complete and enters a shutdown
mode. When SD is set to 0 again, the TMP451-Q1 resumes continuous conversions. When SD = 1, a single
conversion can be started by writing to the one-shot start register. See the One-Shot Start Register section for
more information.
ALERT/ THERM2 (bit 5) sets the configuration of pin 6. If the ALERT/ THERM2 bit is 0 (default), then pin 6 is
configured as the ALERT output; if it is set to 1, then pin 6 is configured as the THERM2 output.
The temperature range is set by configuring RANGE (bit 2) of the configuration register. Setting this bit low
(default) configures the TMP451-Q1 device for the standard measurement range (0°C to 127°C); temperature
conversions are stored in the standard binary format. Setting bit 2 high configures the TMP451-Q1 device for
the extended measurement range (–64°C to 191°C); temperature conversions are stored in the extended binary
format (see Table 7-1).
The remaining bits of the configuration register are reserved and must always be set to 0. The power-on reset
value for this register is 00h.
20
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
7.6.1.5 Conversion Rate Register
The conversion rate register (read address 04h, write address 0Ah) controls the rate at which temperature
conversions are performed. This register adjusts the idle time between conversions but not the conversion time
itself, thereby allowing the TMP451-Q1 power dissipation to be balanced with the temperature register update
rate. Table 7-7 lists the conversion rate options and corresponding time between conversions. The default value
of the register is 08h, which gives a default rate of 16 conversions per second.
Table 7-7. Conversion Rate
VALUE
CONVERSIONS PER SECOND
TIME (SECONDS)
16
00h
0.0625
01h
0.125
8
02h
0.25
4
03h
0.5
2
04h
1
1
05h
2
0.5
06h
4
0.25
07h
8
0.125
08h
16 (default)
0.0625 (default)
09h
32
0.03125
7.6.1.6 One-Shot Start Register
When the TMP451-Q1 device is in shutdown mode (SD = 1 in the configuration register), a single conversion is
started by writing any value to the one-shot start register, pointer address 0Fh. This write operation starts one
conversion and comparison cycle on both the local and the remote sensors. The TMP451-Q1 device returns to
shutdown mode when the cycle completes. The value of the data sent in the write command is irrelevant and is
not stored by the TMP451-Q1 device.
7.6.1.7 η-Factor Correction Register
The TMP451-Q1 device allows for a different η-factor value to be used for converting remote channel
measurements to temperature. The remote channel uses sequential current excitation to extract a differential
VBE voltage measurement to determine the temperature of the remote transistor. Equation 1 shows this voltage
and temperature.
VBE2 - VBE1 =
hkT
I
ln 2
q
I1
(1)
The value η in Equation 1 is a characteristic of the particular transistor used for the remote channel. The
power-on reset value for the TMP451-Q1 device is η = 1.008. The value in the η-factor correction register may
be used to adjust the effective η-factor according to Equation 2 and Equation 3.
eff
§ 1.008 u 2088 ·
¨
¸
© 2088 NADJUST ¹
NADJUST
§ 1.008 u 2088 ·
¨
¸
eff
©
¹
(2)
2088
(3)
The η-factor correction value must be stored in twos complement format, yielding an effective data range from
–128 to 127. The η-factor correction value is written to and read from pointer address 23h. The register power-on
reset value is 00h, thus having no effect unless a different value is written to it.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
21
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
Table 7-8. η-Factor Range
NADJUST
BINARY
HEX
DECIMAL
η
0111 1111
7F
127
0.950198
0000 1010
0A
10
1.003195
0000 1000
08
8
1.004152
0000 0110
06
6
1.005111
0000 0100
04
4
1.006072
0000 0010
02
2
1.007035
0000 0001
01
1
1.007517
0000 0000
00
0
1.008
1111 1111
FF
–1
1.008483
1111 1110
FE
–2
1.008967
1111 1100
FC
–4
1.009935
1111 1010
FA
–6
1.010905
1111 1000
F8
–8
1.011877
1111 0110
F6
–10
1.012851
1000 0000
80
–128
1.073837
7.6.1.8 Offset Register
The offset register allows the TMP451-Q1 device to store any system offset compensation value that might be
observed from precision calibration. The value in the register is stored in the same format as the temperature
result, and is added to the remote temperature result upon every conversion. Combined with the η-factor
correction, this function allows for very accurate system calibration over the entire temperature range.
7.6.1.9 General Call Reset
The TMP451-Q1 device supports reset using the two-wire general call address 00h (0000 0000b). The TMP451Q1 device acknowledges the general call address and responds to the second byte. If the second byte is 06h
(0000 0110b), the TMP451-Q1 device executes a software reset. This software reset restores the power-on
reset state to all TMP451-Q1 registers, and it aborts any conversion in progress. The TMP451-Q1 device takes
no action in response to other values in the second byte.
7.6.1.10 Identification Register
The TMP451-Q1 device allows for the two-wire bus controller to query the device for manufacturer and device
IDs to enable software identification of the device at the particular two-wire bus address. The manufacturer ID is
obtained by reading from pointer address FEh. The TMP451-Q1 device reads 55h for the manufacturer code.
22
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The TMP451-Q1 device requires only a transistor connected between the D+ and D– pins for remote
temperature measurement. Tie the D+ pin to GND if the remote channel is not used and only the local
temperature is measured. The SDA, ALERT, and THERM pins (and SCL, if driven by an open-drain output)
require pullup resistors as part of the communication bus. A 0.1-µF power-supply decoupling capacitor is
recommended for local bypassing. Figure 8-1 shows the typical configuration for the TMP451-Q1 device.
8.2 Typical Application
RS(2)
RS(2)
1.7V to 3.6V
CDIFF(3)
1.7V to 3.6V
0.1µF
10k
(typ)
Diode-connected configuration(1)
10k
(typ)
10k
(typ)
1
V+
Series Resistance
RS(2)
RS(2)
10k
(typ)
2
8
DXP
SCL
DXN
SDA
CDIFF(3)
3
7
TMP451-Q1
SMBus
Controller
4
THERM
Transistor-connected configuration(1)
5
GND
ALERT / THERM2
6
Overtemperature Shutdown
A.
Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance
cancellation.
B.
C.
RS (optional) should be < 1 kΩ in most applications. Selection of RS depends on application; see the Filtering section.
CDIFF (optional) should be < 1000 pF in most applications. Selection of CDIFF depends on application; see the Filtering section and
Figure 6-6, Remote Temperature Error vs. Differential Capacitance.
Figure 8-1. TMP451-Q1 Basic Connections Using a Discrete Remote Transistor
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
23
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
1.7V to 3.6V
1.7V to 3.6V
1
Processor
or ASIC
Built-in
Thermal
Transistor/
Diode
V+
2
3
DXP
SCL
DXN
SDA
8
7
TMP451-Q1
4
5
SMBus
Controller
THERM
GND
ALERT / THERM2
6
Overtemperature
Shutdown
Figure 8-2. TMP451-Q1 Basic Connections Using a Processor Built-In Remote Transistor
8.2.1 Design Requirements
The TMP451-Q1 device is designed to be used with either discrete transistors or substrate transistors built into
processor chips and ASICs. Either NPN or PNP transistors can be used, as long as the base-emitter junction is
used as the remote temperature sense. NPN transistors must be diode-connected. PNP transistors can either be
transistor- or diode-connected (see Figure 8-1).
Errors in remote temperature sensor readings are typically the consequence of the ideality factor and current
excitation used by the TMP451-Q1 device versus the manufacturer-specified operating current for a given
transistor. Some manufacturers specify a high-level and low-level current for the temperature-sensing substrate
transistors. The TMP451-Q1 device uses 7.5 μA for ILOW and 120 μA for IHIGH.
The ideality factor (η) is a measured characteristic of a remote temperature sensor diode as compared to an
ideal diode. The TMP451-Q1 allows for different η-factor values; see the η-Factor Correction Register section.
The ideality factor for the TMP451-Q1 device is trimmed to be 1.008. For transistors that have an ideality factor
that does not match the TMP451-Q1, Equation 4 can be used to calculate the temperature error.
Note
For the equation to be used correctly, actual temperature (°C) must be converted to Kelvin (K).
TERR =
h - 1.008
´ (273.15 + T(°C))
1.008
(4)
where
•
•
•
•
TERR = error in the TMP451-Q1 device because η ≠ 1.008
η = ideality factor of remote temperature sensor
T(°C) = actual temperature
Degree delta is the same for °C and K.
For η = 1.004 and T(°C) = 100°C:
24
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
æ 1.004 - 1.008 ö
TERR = ç
÷ ´ 273.15 + 100°C
1.008
è
ø
TERR = 1.48°C
(5)
If a discrete transistor is used as the remote temperature sensor with the TMP451-Q1, the best accuracy can be
achieved by selecting the transistor according to the following criteria:
1.
2.
3.
4.
Base-emitter voltage > 0.25 V at 7.5 μA, at the highest sensed temperature.
Base-emitter voltage < 0.95 V at 120 μA, at the lowest sensed temperature.
Base resistance < 100 Ω.
Tight control of VBE characteristics indicated by small variations in hFE (that is, 50 to 150).
Based on this criteria, two recommended small-signal transistors are the 2N3904 (NPN) or 2N3906 (PNP).
8.2.2 Detailed Design Procedure
The local temperature sensor inside the TMP451-Q1 device monitors the ambient air around the device. The
thermal time constant for the TMP451-Q1 device is approximately two seconds. This constant implies that if
the ambient air changes quickly by 100°C, it would take the TMP451-Q1 device about 10 seconds (that is, five
thermal time constants) to settle to within 1°C of the final value. In most applications, the TMP451-Q1 package
is in electrical, and therefore thermal, contact with the printed circuit board (PCB), as well as subjected to forced
airflow. The accuracy of the measured temperature directly depends on how accurately the PCB and forced
airflow temperatures represent the temperature that the TMP451-Q1 is measuring. Additionally, the internal
power dissipation of the TMP451-Q1 can cause the temperature to rise above the ambient or PCB temperature.
The internal power dissipated as a result of exciting the remote temperature sensor is negligible because of
the small currents used. For a 3.3-V supply and maximum conversion rate of 16 conversions per second, the
TMP451-Q1 device dissipates 0.54 mW (PDIQ = 3.3 V × 165 μA). A θJA of 171.3°C/W causes the junction
temperature to rise approximately 0.09°C above the ambient.
The temperature measurement accuracy of the TMP451-Q1 device depends on the remote and/or local
temperature sensor being at the same temperature as the system point being monitored. Clearly, if the
temperature sensor is not in good thermal contact with the part of the system being monitored, then there
will be a delay in the response of the sensor to a temperature change in the system. For remote temperaturesensing applications using a substrate transistor (or a small, SOT23 transistor) placed close to the device being
monitored, this delay is usually not a concern.
8.2.3 Application Curves
The following curves show the performance capabilities of the TMP451-Q1 device. Figure 8-3 shows the
accuracy performance in an oil-bath temperature drift of a population of 16 standard 2N3906 transistors
measured in a diode-connected configuration. Figure 8-4 shows the typical step response to a submerging
of a sensor in an oil bath with temperature of 100°C.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
25
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
2
Mean
Mean 66
Mean + 66
1
Temperature (ƒC)
Temperature Error ((qC))
1.5
0.5
0
-0.5
-1
-1.5
-2
-40
-25
-10
5
20 35 50 65 80 95
Remote Diode Temperature (qC)
110 125
D001
Figure 8-3. TMP451-Q1 Remote Diode Temperature
Drift (Diode-Connected 2N3906)
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
±1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Time (s)
C007
Figure 8-4. Temperature Step Response
9 Power Supply Recommendations
The TMP451-Q1 device operates with a power supply range of 1.7 V to 3.6 V. The device is optimized for
operation at 3.3-V supply but can measure temperature accurately in the full supply range.
A power-supply bypass capacitor is recommended. Place this capacitor as close as possible to the supply and
ground pins of the device. A typical value for this supply bypass capacitor is 0.1 μF. Applications with noisy or
high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise.
26
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
10 Layout
10.1 Layout Guidelines
Remote temperature sensing on the TMP451-Q1 device measures very small voltages using very low currents;
therefore, noise at the device inputs must be minimized. Most applications using the TMP451-Q1 have high
digital content, with several clocks and logic level transitions creating a noisy environment. Layout should adhere
to the following guidelines:
1. Place the TMP451-Q1 device as close to the remote junction sensor as possible.
2. Route the D+ and D– traces next to each other and shield them from adjacent signals through the use of
ground guard traces; see Figure 10-1. If a multilayer PCB is used, bury these traces between ground or V+
planes to shield them from extrinsic noise sources. 5 mil (0.127 mm) PCB traces are recommended.
3. Minimize additional thermocouple junctions caused by copper-to-solder connections. If these junctions are
used, make the same number and approximate locations of copper-to-solder connections in both the D+ and
D– connections to cancel any thermocouple effects.
4. Use a 0.1μF local bypass capacitor directly between the V+ and GND of the TMP451-Q1 device. For
optimum measurement performance, minimize filter capacitance between D+ and D– to 1000 pF or less .
This capacitance includes any cable capacitance between the remote temperature sensor and the TMP451Q1 device.
5. If the connection between the remote temperature sensor and the TMP451-Q1 device is less than 8-in
(20,32 cm) long, use a twisted-wire pair connection. For lengths greater than 8 in, use a twisted, shielded
pair with the shield grounded as close to the TMP451-Q1 device as possible. Leave the remote sensor
connection end of the shield wire open to avoid ground loops and 60-Hz pickup.
6. Thoroughly clean and remove all flux residue in and around the pins of the TMP451-Q1 device to avoid
temperature offset readings as a result of leakage paths between D+ and GND, or between D+ and V+.
V+
D+
Ground or V+ layer
on bottom and/or
top, if possible.
D-
GND
Use minimum 5-mil (0.127 mm) traces with 5-mil spacing.
Figure 10-1. Suggested PCB Layer Cross-Section
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
27
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
10.2 Layout Example
VIA to Power or Ground Plane
VIA to Internal Layer
Pull-Up Resistors
Ground Plane
Supply Voltage
Supply Bypass
Capacitor
RS
1
V+
SCL
8
2
D+
SDA
7
3
D-
ALERT /
THERM2
6
CDIFF
RS
4
THERM
Thermal
Shutdown
GND 5
Serial Bus Traces
Figure 10-2. TMP451-Q1 Layout Example
28
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
TMP451-Q1
www.ti.com
SLOS877C – OCTOBER 2014 – REVISED APRIL 2021
11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.3 Trademarks
SMBus™ is a trademark of Intel Corporation.
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMP451-Q1
29
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TMP451AQDQFRQ1
ACTIVE
WSON
DQF
8
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
DAIQ
TMP451AQDQFTQ1
ACTIVE
WSON
DQF
8
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
DAIQ
TMP451AQDQWRQ1
ACTIVE
WSON
DQW
8
3000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1A
TMP451AQDQWTQ1
ACTIVE
WSON
DQW
8
250
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1A
TMP451HQDQFRQ1
ACTIVE
WSON
DQF
8
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
1RUG
TMP451HQDQFTQ1
ACTIVE
WSON
DQF
8
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
1RUG
TMP451HQDQWRQ1
ACTIVE
WSON
DQW
8
3000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1H
TMP451HQDQWTQ1
ACTIVE
WSON
DQW
8
250
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1H
TMP451JQDQFRQ1
ACTIVE
WSON
DQF
8
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
1RVG
TMP451JQDQFTQ1
ACTIVE
WSON
DQF
8
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
1RVG
TMP451JQDQWRQ1
ACTIVE
WSON
DQW
8
3000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1J
TMP451JQDQWTQ1
ACTIVE
WSON
DQW
8
250
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 125
1J
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
