TMP64
TMP64
SNIS212C – DECEMBER 2019 – REVISED SEPTEMBER
2020
SNIS212C – DECEMBER 2019 – REVISED SEPTEMBER 2020
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TMP64 ±1% 47-kΩ Linear Thermistor with 0402 and 0603 Package Options
1 Features
3 Description
•
Get started today with the Thermistor Design Tool,
offering complete resistance vs temperature table (RT table) computation, other helpful methods to derive
temperature and example C-code.
•
•
•
•
•
•
Silicon-based thermistor with a
positive temperature coefficient (PTC)
Linear resistance change across temperature
47-kΩ nominal resistance at 25 °C (R25)
– ±1% maximum (0 °C to 70 °C)
Wide operating temperature of –40 °C to +150 °C
Consistent sensitivity across temperature
– 6400 ppm/°C TCR (25 °C)
– 0.2% typical TCR tolerance across temperature
range
Fast thermal response time of 0.6 s (DEC)
Long lifetime and robust performance
– Built-in fail-safe in case of short-circuit failures
– 0.5% typical long term sensor drift
2 Applications
•
•
•
Linear thermistors offer linearity and consistent
sensitivity across temperature to enable simple and
accurate methods for temperature conversion. Low
power consumption and a small thermal mass
minimize the impact of self-heating. With built-in
failsafe behavior at high temperatures and powerful
immunity to environmental variation, these devices
are designed for a long lifetime of high performance.
The small size of the TMP6 series also allows for
close placement to heat sources and quick response
times.
Take advantage of benefits over NTC thermistors
such as no extra linearization circuitry, minimized
calibration, less resistance tolerance variation, larger
sensitivity at high temperatures, and simplified
conversion methods to save time and memory in the
processor.
Temperature monitoring
– HVAC and thermostats
– Industrial control and appliances
Thermal compensation
– Display backlights
– Building automation
Thermal threshold detection
– Motor control
– Chargers
The TMP64 is currently available in a 0402 footprintcompatible X1SON package and a 0603 footprintcompatible SOT-5X3 package.
Device Information (1)
PART NUMBER
TMP64
(1)
BODY SIZE (NOM)
X1SON
0.60 mm × 1.00 mm
SOT-5X3
0.60 mm × 1.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
110
VBias
IBias
VTemp
90
VTemp
RTMP64
Resistance (k:)
RBias
RTMP64
PACKAGE
70
50
30
-40
Typical Implementation Circuits
-20
0
20
40
60
80 100
Temperature (qC)
120
140
160
TMP6
Typical Resistances vs Ambient Temperature
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
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Incorporated
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property
matters
and other important disclaimers. PRODUCTION DATA.
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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................4
6 Pin Configuration and Functions...................................5
Pin Functions.................................................................... 5
7 Specifications.................................................................. 6
7.1 Absolute Maximum Ratings ....................................... 6
7.2 ESD Ratings .............................................................. 6
7.3 Recommended Operating Conditions ........................6
7.4 Thermal Information ...................................................6
7.5 Electrical Characteristics ............................................7
7.6 Typical Characteristics................................................ 8
8 Detailed Description......................................................10
8.1 Overview................................................................... 10
8.2 Functional Block Diagram......................................... 10
8.3 Feature Description...................................................11
8.4 Device Functional Modes..........................................11
9 Application and Implementation.................................. 12
9.1 Application Information............................................. 12
9.2 Typical Application.................................................... 12
10 Power Supply Recommendations..............................17
11 Layout........................................................................... 17
11.1 Layout Guidelines................................................... 17
11.2 Layout Example...................................................... 17
12 Device and Documentation Support..........................18
12.1 Receiving Notification of Documentation Updates..18
12.2 Support Resources................................................. 18
12.3 Trademarks............................................................. 18
12.4 Electrostatic Discharge Caution..............................18
12.5 Glossary..................................................................18
13 Mechanical, Packaging, and Orderable
Information.................................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (June 2020) to Revision C (September 2020)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Removed DYA package preview........................................................................................................................ 1
• Updated DYA maximum temperature rating to 150 °C in device comparison table........................................... 4
• Removed preview notice on DYA package.........................................................................................................5
• Changed Junction temperature from 150 °C to 155 °C in Absolute Maximum Ratings Table............................ 6
• Changed Storage temperature from 150 °C to 155 °C in Absolute Maximum Ratings Table.............................6
• Added DYA Ambient Temperature Rating to Recommended Operating Conditions Table.................................6
• Added DYA Long Term Drift specifications......................................................................................................... 7
• Changed Typical Characteristics section............................................................................................................8
• Added Application Curve section......................................................................................................................17
Changes from Revision A (March 2019) to Revision B (June 2020)
Page
• Added DYA (SOT-5X3) preview package........................................................................................................... 1
• Updated Device Comparison table..................................................................................................................... 4
• Corrected view description in pin configurations and functions.......................................................................... 5
• Changed ISNS maximum from 400 µA to 100 µA in Recommended Operating Conditions Table...................... 6
2
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Changes from Revision Original (December 2019) to Revision A (March 2020)
Page
• Changed data sheet status from: Advanced Information to: Production Data....................................................1
• Updated Title.......................................................................................................................................................1
• Updated Features............................................................................................................................................... 1
• Updated Applications..........................................................................................................................................1
• Updated Description........................................................................................................................................... 1
• Increased CDM Rating from ±750 V to ± 1000 V in ESD Ratings Table............................................................ 6
• Changed minimum 'Long Term Drift' spec for RH = 85 % from 0.1 % to -1 %....................................................7
• Added typical. 'Long Term Drift' spec for RH = 85 %.......................................................................................... 7
• Changed maximum 'Long Term Drift' spec for RH = 85 % from 0.8 % to 1 %....................................................7
• Changed minimum 'Long Term Drift' spec from 0.1 % to -1%............................................................................ 7
• Added typical. 'Long Term Drift' spec..................................................................................................................7
• Changed maximum 'Long Term Drift' spec from 1 % to 1.8 %.......................................................................... 7
• Added 'Supply Dependence Resistance vs. Bias Current' graph....................................................................... 8
• Added 'Supply Dependence Resistance vs. Bias Voltage' graph....................................................................... 8
• Added 'Step Response' graph............................................................................................................................ 8
• Updated Thermistor Design Tool link................................................................................................................ 11
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5 Device Comparison Table
PART
NUMBER
TMP61
R25 TYP
10k
R25 %TOL
1%
RATING
Catalog
Automotive Grade-1
TMP61-Q1
TMP63
TMP63-Q1
TMP64
TMP64-Q1
4
10k
100k
100k
47k
47k
1%
1%
1%
1%
1%
Automotive Grade-0
Catalog
Automotive Grade-1
Automotive Grade-0
Catalog
TA
PACKAGE OPTIONS
–40 °C to 125 °C
X1SON / DEC (0402)
–40 °C to 150 °C
SOT-5X3 / DYA (0603)
TO-92S / LPG
–40 °C to 125 °C
X1SON / DEC (0402)
-40 °C to 150 °C
SOT-5X3 / DYA (0603)
–40 °C to 170 °C
TO-92S / LPG
–40 °C to 125 °C
X1SON / DEC (0402)
-40 °C to 150 °C
SOT-5X3 / DYA (0603)
–40 °C to 125 °C
X1SON / DEC (0402)
-40 °C to 150 °C
SOT-5X3 / DYA (0603)
–40 °C to 125 °C
X1SON / DEC (0402)
-40 °C to 150 °C
SOT-5X3 / DYA (0603)
Automotive Grade-1
–40 °C to 125 °C
X1SON / DEC (0402)
Automotive Grade-0
-40 °C to 150 °C
SOT-5X3 / DYA (0603)
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6 Pin Configuration and Functions
±
1
2
+
Figure 6-1. DEC Package 2-Pin X1SON Bottom View
ID Area
±
1
2
+
Figure 6-2. DYA Package 2-Pin SOT-5X3 Top View
Pin Functions
PIN
NAME
NO.
–
1
+
2
TYPE
—
DESCRIPTION
Thermistor (–) and (+) terminals. For proper operation, ensure a positive bias where the +
terminal is at a higher voltage potential than the – terminal.
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
Voltage across pins 2 (+) and 1 (–)
Current through the device
UNIT
6
V
450
µA
Junction temperature (TJ)
–65
155
°C
Storage temperature (Tstg)
–65
155
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or anyother conditions beyond those indicated under
Recommended OperatingConditions. Exposure to absolute-maximum-rated conditions for extended periods mayaffect device
reliability.
7.2 ESD Ratings
VALUE
Human-body model (HBM) per JESD22-A114 (1)
V(ESD)
Electrostatic discharge
Charged-device model (CDM), per JEDEC specification JESD22-C101
V
±1000
(2)
(1)
(2)
UNIT
±2000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VSns
Voltage across pins 2 (+) and 1 (–)
0
5.5
V
ISns
Current passing through the device
0
100
µA
Operating free-air temperature (X1SON/DEC Package)
–40
125
°C
Operating free-air temperature (SOT-5X3/DYA Package)
–40
150
°C
TA
7.4 Thermal Information
TMP64
THERMAL METRIC
DYA (SOT-5X3)
2 PINS
2 PINS
Units
RθJA
Junction-to-ambient thermal resistance(1) (2)
443.4
742.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
195.7
315.8
°C/W
RθJB
Junction-to-board thermal resistance
254.6
506.2
°C/W
ΨJT
Junction-to-top characterization parameter
19.9
109.3
°C/W
ΨJB
Junction-to-board characterization parameter
254.5
500.4
°C/W
RθJC(bot)
Junction-to-case (bot) thermal resistance
–
–
°C/W
(1)
(2)
6
DEC (X1SON)
The junction to ambient thermal resistance (RθJA ) under natural convection is obtained in a simulation on a JEDEC-standard, High-K
board as specified in JESD51-7, in an environment described in JESD51-2. Exposed pad packages assume that thermal vias are
included in the PCB, per JESD 51-5.
Changes in output due to self heating can be computed by multiplying the internal dissipation by the thermal resistance.
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7.5 Electrical Characteristics
TA = -40 °C - 125 °C, ISns = 42.553 μA (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
46.53
47
47.47
kΩ
R25
Thermistor Resistance at 25 °C
TA = 25 °C
TA = 25 °C
–1
1
RTOL
Resistance Tolerance
TA = 0 °C - 70 °C
–1
1
TA = -40 °C - 125 °C
TCR-35
TCR25
Temperature Coefficient of Resistance
TCR85
TCR-35 %
TCR25 %
Temperature Coefficient of Resistance
Tolerance
TCR85 %
ΔR
tRES
(stirred
Sensor Long Term Drift (Reliability)
tRES (still
1.5
T1 = -40 °C, T2 = -30 °C
+6220
T1 = 20 °C, T2 = 30 °C
+6400
T1 = 80 °C, T2 = 90 °C
+5910
T1 = -40 °C, T2 = -30 °C
±0.4
T1 = 20 °C, T2 = 30 °C
±0.2
T1 = 80 °C, T2 = 90 °C
±0.3
ppm/°C
%
96 hours continuous operation at RH =
85% and TA = 130 °C
VBias = 5.5 V, DEC Package
-1
±0.1
1
96 hours continuous operation at RH =
85%, TA = 130 °C, VBias = 5.5 V DYA
Package
-1
+/-0.14
1
600 hours continuous operation at TA = 150
°C
VBias = 5.5V DEC Package
-1
0.5
1.8
600 hours continuous operation at TA = 150
°C
VBias = 5.5 V, DYA Package
-1.5
+/-0.2
1.5
1000 hours continuous operation at TA =
150°C
VBias = 5.5 V, DYA Package
-1.8
+/-0.3
1.8
%
Thermal response to 63%
T1 = 25 °C in Still Air to T2 = 125 °C in
Stirred Liquid
0.6
s
Thermal response to 63%
T1 = 25 °C to T2 = 70 °C in Still Air
3.2
s
liquid)
air)
–1.5
%
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7.6 Typical Characteristics
120
120
100
100
80
80
Resistance (k:)
Resistance (k:)
at TA = 25 °C, (unless otherwise noted)
60
40
IBIAS = 2 PA
IBIAS = 10 PA
IBIAS = 20 PA
IBIAS = 42.6 PA
IBIAS = 100 PA
20
0
-40
-20
0
20
40
60
80 100
Temperature (qC)
120
140
60
40
VBIAS = 1.8 V
VBIAS = 2.5 V
VBIAS = 3.3 V
VBIAS = 5.5 V
20
0
-40
160
-20
0
20
TMP6
40
60
80 100
Temperature (qC)
120
140
160
TMP6
RBias = 47 kΩ with ±0.01 % Tolerance
Figure 7-2. Resistance vs. Ambient Temperature
Using Multiple Bias Voltages
6500
6500
6400
6400
TCR (ppm/qC)
TCR (ppm/qC)
Figure 7-1. Resistance vs. Ambient Temperature
Using Multiple Bias Currents
6300
6200
6100
6300
6200
6100
6000
0
10
20
30
40
50
60
70
Bias Current (PA)
80
90
6000
1.5
100
2
2.5
3
3.5
Bias Voltage (V)
64_T
4
4.5
5
64_T
RBias = 47 kΩ with ±0.01% Tolerance
Figure 7-4. TCR as a Function of Sense Voltage,
VSNS
120
120
100
100
80
80
Resistance (k:)
Resistance (k:)
Figure 7-3. TCR as a Function of Sense Current,
ISNS
60
40
20
-40 qC
25 qC
50 qC
100 qC
60
40
20
125 qC
150 qC
0
-40 qC
25 qC
50 qC
100 qC
125 qC
150 qC
0
0
20
40
60
Current (PA)
80
100
0
TMP6
0.5
1
1.5
2
2.5 3 3.5
Voltage (V)
4
4.5
5
5.5
TMP6
RBias = 47 kΩ with ±0.01% Tolerance
Figure 7-5. Supply Dependence Resistance vs.
Bias Current
8
Figure 7-6. Supply Dependence R vs. VBias
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2.5
85
80
2
Resistance (k:)
Output (V)
75
1.5
1
70
65
60
55
0.5
50
VBias
VSNS
0
45
0
2
4
6
8
Time (Ps)
10
12
14
0
TMP64: VSNS = 1 V
0.4
0.6
0.8
1
Time (s)
64_r
TMP64: Stirred Liquid. Temperature: 25 °C to 125 °C
Figure 7-7. Step Response
Figure 7-8. DEC Thermal Response Time
85
64
80
62
60
Resistance (k:)
75
Resistance (k:)
0.2
64_s
70
65
60
55
58
56
54
52
50
50
48
45
46
0
0.2
0.4
0.6
0.8
1
Time (s)
0
64_r
TMP64: Stirred Liquid. Temperature: 25 °C to 125 °C
Figure 7-9. DYA Thermal Response Time
2
4
6
8
Time (s)
10
12
14
16
64_r
TMP64: Still Air
Figure 7-10. Thermal Response Time
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8 Detailed Description
8.1 Overview
The TMP64 silicon linear thermistor has a linear positive temperature coefficient (PTC) that results in a uniform
and consistent temperature coefficient resistance (TCR) across a wide operating temperature range. TI uses a
special silicon process where the the doping level and active region areas devices control the key characteristics
(the temperature coefficient resistance (TCR) and nominal resistance (R25)) . The device has an active area and
a substrate due to the polarized terminals. Connect the positive terminal to the highest voltage potential.
Connect the negative terminal to the lowest voltage potential.
Unlike an NTC, which is a purely resistive device, the TMP64 resistance is affected by the current across the
device and the resistance changes when the temperature changes. In a voltage divider circuit, it is
recommended to maintain the top resistor value at 47 kΩ. Changing the top resistor value or the VBIAS value
changes the resistance vs temperature table (R-T table) of the TMP64, and subsequently the polynomials as
described in Section 9.2.1.1. Consult Section 8.3.1 for more information.
TCR (ppm/°C) = (RT2 – RT1) / ((T2 – T1) × R(T2+T1)/2)
(1)
Below are the definitions of the key terms used throughout this document:
• ISNS: Current flowing through the TMP64.
• VSNS: Voltage across the two TMP64 terminals.
• IBias: Current supplied by the biasing circuit.
• VBias: Voltage supplied by the biasing circuit.
• VTemp: Output voltage that corresponds to the measured temperature. Note that this is different from VSns. In
the use case of a voltage divider circuit with the TMP64 in the high side, VTemp is taken across RBias.
8.2 Functional Block Diagram
VBias
IBias
RBias
RTMP64
VTemp
RTMP64
VTemp
Figure 8-1. Typical Implementation Circuits
10
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8.3 Feature Description
8.3.1 TMP64 R-T table
The TMP64 R-T table must be re-calculated for any change in the bias voltage, bias resistor, or bias current. TI
provides a Thermistor Design Tool to calculate the R-T table. The system designer should always validate the
calculations provided.
8.3.2 Linear resistance curve
The TMP64 has good linear behavior across the whole temperature range as shown in Figure 7-1. This range
allows a simpler resistance-to-temperature conversion method that reduces look-up table memory requirements.
The linearization circuitry or midpoint calibration associated with traditional NTCs is not necessary with the
device.
The linear resistance across the entire temperature range allows the device to maintain sensitivity at higher
operating temperatures.
8.3.3 Positive Temperature Coefficient (PTC)
The TMP64 has a positive temperature coefficient. As temperature increases the device resistance increases
leading to a reduction in power consumption of the bias circuit. In comparison, a negative coefficient system
increases power consumption with temperature as the resistance decreases.
The TMP64 benefits from the reduced power consumption of the bias circuit with less self-heating than a typical
NTC system.
8.3.4 Built-In Fail Safe
The TMP6 family feature a positive tempeature coefficient. During a short-to-supply condition, the thermistor will
have increased current and power dissipated. Due to the positive temperature slope, the TMP6 will increase
resistance and limit self-heating by design.
In contrast, a NTC would continually reduce resistance due to self-heating leading to a positive feedback of
increasing power dissipation and decreasing resistance.
8.4 Device Functional Modes
The device has one mode of operation that applies when operated within the Recommended Operating
Conditions.
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
The TMP64 is a positive temperature coefficient (PTC) linear silicon thermistor. The device behaves like a
temperature-dependent resistor, and may be configured in a variety of ways to monitor temperature based on
the system-level requirements. The TMP64 has a nominal resistance at 25 °C (R25) of 47 kΩ , a maximum
operating voltage of 5.5 V (VSns), and maximum supply current of 100 µA (ISns). This device may be used in a
variety of applications to monitor temperature close to a heat source with the very small DEC package option
compatible with the typical 0402 (inch) footprint. Some of the factors that influence the total measurement error
include the ADC resolution (if applicable), the tolerance of the bias current or voltage, the tolerance of the bias
resistance in the case of a voltage divider configuration, and the location of the sensor with respect to the heat
source.
9.2 Typical Application
9.2.1 Thermistor Biasing Circuits
Figure 9-1. Biasing Circuit Implementations With Linear Thermistor (Left) vs. Non-Linear Thermistor
(Right)
9.2.1.1 Design Requirements
Existing thermistors, in general, have a non-linear temperature vs. resistance curve. To linearize the thermistor
response, the engineer can use a voltage linearization circuit with a voltage divider configuration, or a resistance
linearization circuit by adding another resistance in parallel with the thermistor, RP. Section 9.2.1 highlights the
two implementations where RT is the thermistor resistance. To generate an output voltage across the thermistor,
the engineer can use a voltage divider circuit with the thermistor placed at either the high side (close to supply)
or low side (close to ground), depending on the desired voltage response (negative or positive). Alternatively, the
thermistor can be biased directly using a precision current source (yielding the highest accuracy and voltage
gain). It is common to use a voltage divider with thermistors because of its simple implementation and lower
cost. The TMP64, on the other hand, has a linear positive temperature coefficient (PTC) of resistance such that
12
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the voltage measured across it increases linearly with temperature. As such, the need for a linearization circuits
is no longer a requirement, and a simple current source or a voltage divider circuit can be used to generate the
temperature voltage.
This output voltage can be interpreted using a comparator against a voltage reference to trigger a temperature
trip point that is either tied directly to an ADC to monitor temperature across a wider range or used as feedback
input for an active feedback control circuit.
The voltage across the TMP64, as described in Equation 2, can be translated to temperature using either a
lookup table method (LUT) or a fitting polynomial, V(T). The Thermistor Design Tool must be used to translate
Vtemp to Temperature. The temperature voltage must first be digitized using an ADC. The necessary resolution
of this ADC is dependent on the biasing method used. Additionally, for best accuracy, the bias voltage (VBIAS)
should be tied to the reference voltage of the ADC to create a measurement where the difference in tolerance
between the bias voltage and the reference voltage cancels out. The engineer can also implement a low-pass
filter to reject system level noise, and the user should place the filter as close to the ADC input as possible.
9.2.1.2 Detailed Design Procedure
The resistive circuit divider method produces an output voltage (VTEMP) scaled according to the bias voltage
(VBIAS). When VBIAS is also used as the reference voltage of the ADC, any fluctuations or tolerance error due to
the voltage supply is canceled and does not affect the temperature accuracy. This type of configuration is shown
in Figure 9-2. Equation 2 describes the output voltage (VTEMP) based on the variable resistance of the TMP64
(RTMP64) and bias resistor (RBIAS). The ADC code that corresponds to that output voltage, ADC full-scale range,
and ADC resolution is given in Equation 3.
VBias
RBias
RFilter
REF
IN
RTMP64
ADC
CFilter
IN
GND
Figure 9-2. TMP64 Voltage Divider With an ADC
VTEMP
§
·
RTMP64
VBIAS u ¨
¸
© RBIAS RTMP64 ¹
ADC Code
§ VTEMP
¨ FSR
©
(2)
· n
¸u2
¹
(3)
where
•
•
FSR is the full-scale range of the ADC, which is the voltage at REF to GND (VREF)
n is the resolution of the ADC
Equation 4 shows whenever VREF = VBIAS, VBIAS cancels out.
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ADC Code
§
§
RTMP64
¨ VBIAS u ¨
© RBIAS RTMP64
¨
¨
VBIAS
¨
¨
©
··
¸¸
¹ ¸ u 2n
¸
¸
¸
¹
§
· n
RTMP64
¨
¸u2
© RBIAS RTMP64 ¹
(4)
The engineer can use a polynomial equation or a LUT to extract the temperature reading based on the ADC
code read in the microcontroller. The Thermistor Design Tool should be used to translate the TMP64 resistance
to temperature.
The cancellation of VBIAS is one benefit to using a voltage-divider (ratiometric approach), but the sensitivity of the
output voltage of the divider circuit cannot increase much. Therefore, not all of the ADC codes are used due to
the small voltage output range compared to the FSR. This application is very common, however, and is simple to
implement.
The engineer can use a current source-based circuit, like the one shown in Figure 9-3, to have better control
over the sensitivity of the output voltage and achieve higher accuracy. In this case, the output voltage is simply V
= I × R. For example, if a current source of 100 µA is used with the TMP64, the output voltage spans
approximately 5.5 V and has a gain up to 40 mV/°C. Having control over the voltage range and sensitivity allows
for full utilization of the ADC codes and full-scale range. Similar to the ratiometric approach above, if the ADC
has a built-in current source that shares the same bias as the reference voltage of the ADC, the tolerance of the
supply current cancels out. In this case, a precision ADC is not required. This method yields the best accuracy,
but can increase the system implementation cost.
IBias
Precision
Current Source
VTemp
RTMP64
Figure 9-3. TMP64 Biasing Circuit With Current Source
In comparison to the non-linear NTC thermistor in a voltage divider, the TMP64 has an enhanced linear output
characteristic. The two voltage divider circuits with and without a linearization parallel resistor, RP, are shown in
Figure 9-4. Consider an example where VBIAS = 5 V, RBIAS = 47 kΩ, and a parallel resistor (RP) is used with the
NTC thermistor (RNTC) to linearize the output voltage with an additional 47-kΩ resistor. The TMP64 produces a
linear curve across the entire temperature range while the NTC curve is only linear across a small temperature
region. When the parallel resistor (RP) is added to the NTC circuit, the added resistor makes the curve much
more linear but greatly affects the output voltage range.
VBias
VBias
RBias
RTMP64
RBias
VTemp
RNTC
RP
VTemp
Figure 9-4. TMP64 vs. NTC With Linearization Resistor (RP) Voltage Divider Circuits
14
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9.2.1.2.1 Thermal Protection With Comparator
The engineer can use the TMP64, a voltage reference, and a comparator to program the thermal protection. As
shown in Figure 9-5, the output of the comparator remains low until the voltage of the thermistor divider, with
RBIAS and RTMP64, rises above the threshold voltage set by R1 and R2. When the output goes high, the
comparator signals an overtemperature warning signal. The engineer can also program the hysteresis to prevent
the output from continuously toggling around the temperature threshold when the output returns low. Either a
comparator with built-in hysteresis or feedback resistors may be used.
VBias
RBias
R1
VTrip
RTMP64
R2
Figure 9-5. Temperature Switch Using TMP64 Voltage Divider and a Comparator
9.2.1.2.2 Thermal Foldback
One application that uses the output voltage of the TMP64 in an active control circuit is thermal foldback. This is
performed to reduce, or fold back, the current driving a string of LEDs, for example. At high temperatures, the
LEDs begin to heat up due to environmental conditions and self heating. Thus, at a certain temperature
threshold based on the LED's safe operating area, the driving current must be reduced to cool down the LEDs
and prevent thermal runaway. The TMP64 voltage output increases with temperature when the output is in the
lower position of the voltage divider and can provide a response used to fold back the current. Typically, the
current is held at a specified level until a high temperature is reached, known as the knee point, where the
current must be rapidly reduced. To better control the temperature/voltage sensitivity of the TMP64, a rail-to-rail
operational amplifier is used. In the example shown in Figure 9-6, the temperature “knee” where the foldback
begins is set by the reference voltage (2.5 V) at the positive input, and the feedback resistors set the response of
the foldback curve. The foldback knee point may be chosen based on the output of the voltage divider and the
corresponding temperature from Equation 5 (like 110 °C, for example). A buffer is used in-between the voltage
divider with RTMP64 and the input to the op amp to prevent loading and variations in VTEMP.
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5V
RBias
94 k
RFB
300 k
R2
200 k
R1
10 k
VOut
VTemp
VRef
RTMP64
R3
200 k
Figure 9-6. Thermal Foldback Using TMP64 Voltage Divider and a Rail-to-Rail Op Amp
The op amp remains high as long as the voltage output is below VRef. When the temperature goes above 110
°C, then the output swings low to the 0-V rail of the op amp. The rate at which the foldback occurs is dependent
on the feedback network, RFB and R1, which varies the gain of the op amp, G, given by Equation 6. This in return
controls the voltage/temperature sensitivity of the circuit. This voltage output is fed into a LED driver IC that
adjusts output current accordingly. The final output voltage used for thermal foldback is VOUT, and is given in
Equation 7. In this example where the knee point is set at 110 °C, the output voltage curve is as shown in Figure
9-7.
VTEMP
G
§
·
RTMP64
VBIAS u ¨
¸
R
R
TMP64 ¹
© BIAS
(5)
RFB
R1
VOUT
(6)
G u VTEMP
1 G u VREF
(7)
6
5
VTEMP (V)
4
3
2
1
0
0
25
50
75
100
Temperature (qC)
125
150
D014
Figure 9-7. Thermal Foldback Voltage Output Curve
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9.2.2 Application Curve
120
Resistance (k:)
100
80
60
40
IBIAS = 2 PA
IBIAS = 10 PA
IBIAS = 20 PA
IBIAS = 42.6 PA
IBIAS = 100 PA
20
0
-40
-20
0
20
40
60
80 100
Temperature (qC)
120
140
160
TMP6
Figure 9-8. TMP64 Temperature Voltage With Varying Current Sources
10 Power Supply Recommendations
The maximum recommended operating voltage of the TMP64 is 5.5 V (VSns), and the maximum current through
the device is 100 µA (ISns).
11 Layout
11.1 Layout Guidelines
The layout of the TMP64 is similar to that of a passive component. If the device is biased with a current source,
the positive pin 2 is connected to the source, while the negative pin 1 is connected to ground. If the circuit is
biased with a voltage source, and the device is placed on the lower side of the resistor divider, V– is connected
to ground, and V+ is connected to the output (VTEMP). If the device is placed on the upper side of the divider, V+
is connected to the voltage source and V– is connected to the output voltage (VTEMP). Figure 11-1 shows the
device layout.
11.2 Layout Example
Figure 11-1. Recommended Layout: DEC Package
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12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
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PACKAGE OPTION ADDENDUM
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13-Nov-2023
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TMP6431DECR
ACTIVE
X1SON
DEC
2
10000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HJ
TMP6431DECT
LIFEBUY
X1SON
DEC
2
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HJ
TMP6431DYAR
ACTIVE
SOT-5X3
DYA
2
3000
RoHS & Green
SN
Level-3-260C-168 HR
-40 to 150
1HH
TMP6431DYAT
LIFEBUY
SOT-5X3
DYA
2
250
RoHS & Green
SN
Level-3-260C-168 HR
-40 to 150
1HH
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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