TMUX1119DCKR

Order Now Product Folder Technical Documents Support & Community Tools & Software TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 TMUX1119 5-V, Low-Leakage-Current, 2:1 Precision Switch 1 Features 3 Description • • • • • • • • • • • The TMUX1119 is a complementary metal-oxide semiconductor (CMOS) single-pole double-throw (2:1) switch. Wide operating supply of 1.08 V to 5.5 V allows for use in a broad array of applications from medical equipment to industrial systems. The device supports bidirectional analog and digital signals on the source (Sx) and drain (D) pins ranging from GND to VDD. All logic inputs have 1.8 V logic compatible thresholds, ensuring both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-Safe Logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage. 1 Wide supply range: 1.08 V to 5.5 V Low leakage current: 3 pA Low on-resistance: 1.8 Ω Low charge injection: –6 pC -40°C to +125°C Operating temperature 1.8 V Logic Compatible Fail-Safe Logic Rail to Rail Operation Bidirectional Signal Path Break-before-make switching ESD protection HBM: 2000 V The TMUX1119 is part of the precision switches and multiplexers family of devices. These devices have very low on and off leakage currents and low charge injection, allowing them to be used in high precision measurement applications. A low supply current of 3 nA and small package options enable use in portable applications. 2 Applications • • • • • • • • • • • • • Ultrasound scanners Patient monitoring & diagnostics Blood glucose monitors Optical module Optical transport Remote radio units Data acquisition systems Semiconductor test equipment Factory automation and industrial controls Flow transmitters Programmable logic controllers (PLC) Analog input modules Battery Test Device Information(1) PART NUMBER TMUX1119 PACKAGE BODY SIZE (NOM) SC70 (6) 2.00 mm × 1.25 mm SOT-23 (6) 2.90 mm x 1.60 mm (1) For all available packages, see the package option addendum at the end of the data sheet. SPACER SPACER Application Example Block Diagram OPA836 OPA835 TMUX1119 ADC TMUX1119 x1 SEL S1 MSP430FR599 D S2 TX/RX MUX TMUX1119 x2 MOSI TX SEL SEL 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 7 1 1 1 2 3 4 Absolute Maximum Ratings ...................................... 4 ESD Ratings.............................................................. 4 Recommended Operating Conditions....................... 4 Thermal Information .................................................. 4 Electrical Characteristics (VDD = 5 V ±10 %) ............ 5 Electrical Characteristics (VDD = 3.3 V ±10 %) ......... 7 Electrical Characteristics (VDD = 1.8 V ±10 %) ......... 9 Electrical Characteristics (VDD = 1.2 V ±10 %) ....... 11 Typical Characteristics ............................................ 13 Parameter Measurement Information ................ 16 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 On-Resistance ........................................................ Off-Leakage Current ............................................... On-Leakage Current ............................................... Transition Time ....................................................... Break-Before-Make ................................................. Charge Injection ...................................................... Off Isolation ............................................................. Crosstalk ................................................................. Bandwidth ............................................................... 16 16 17 17 18 18 19 19 20 8 Detailed Description ............................................ 21 8.1 8.2 8.3 8.4 8.5 9 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ Truth Tables ............................................................ 21 21 21 23 23 Application and Implementation ........................ 24 9.1 9.2 9.3 9.4 9.5 Application Information............................................ Typical Application ................................................. Design Requirements.............................................. Detailed Design Procedure ..................................... Application Curve .................................................... 24 24 24 25 25 10 Power Supply Recommendations ..................... 25 11 Layout................................................................... 26 11.1 Layout Guidelines ................................................. 26 11.2 Layout Example .................................................... 26 12 Device and Documentation Support ................. 27 12.1 12.2 12.3 12.4 12.5 12.6 12.7 Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 27 27 27 27 27 27 27 13 Mechanical, Packaging, and Orderable Information ........................................................... 27 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (November 2019) to Revision B Page • Changed status of DBV package From: Product Preview To: Production Data .................................................................... 1 • Added Thermal information for DBV package........................................................................................................................ 4 Changes from Original (December 2018) to Revision A Page • Changed the data sheet title From: Precision Analog Multiplexer To: Precision Switch........................................................ 1 • Changed the Applications list ................................................................................................................................................. 1 • Changed Thermal Information for DCK package ................................................................................................................... 4 2 Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 5 Pin Configuration and Functions DCK Package 6-Pin SC70 Top View DBV Package 6-Pin SOT-23 Top View SEL 1 6 S2 VDD 2 5 D GND 3 4 S1 SEL 1 6 S2 VDD 2 5 D GND 3 4 S1 Not to scale Not to scale Pin Functions PIN NAME NO. TYPE (1) DESCRIPTION SEL 1 I Select pin: controls state of the switch according to Table 1. (Logic Low = S1 to D, Logic High = S2 to D) VDD 2 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND. GND 3 P Ground (0 V) reference S1 4 I/O Source pin 1. Can be an input or output. D 5 I/O Drain pin. Can be an input or output. S2 6 I/O Source pin 2. Can be an input or output. (1) I = input, O = output, I/O = input and output, P = power Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 3 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings Over operating free-air temperature range (unless otherwise noted). (1) (2) MIN MAX VDD Supply voltage –0.5 6 V VSEL or VEN Logic control input pin voltage (SEL) –0.5 6 V ISEL or IEN Logic control input pin current (SEL) –30 30 mA VS or VD Source or drain voltage (Sx, D) –0.5 VDD+0.5 IS or ID (CONT) Source or drain continuous current (Sx, D) –30 30 mA Tstg Storage temperature –65 150 °C TJ Junction temperature 150 °C (1) (2) UNIT V Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±750 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions Over operating free-air temperature range (unless otherwise noted). MIN VDD Supply voltage VS or VD Signal path input and output voltage (source or drain pin) (Sx, D) VSEL Logic control input pin voltage (SEL) TA Ambient temperature NOM MAX UNIT 1.08 5.5 V 0 VDD V 0 5.5 V –40 125 °C 6.4 Thermal Information TMUX1119 THERMAL METRIC (1) DCK (SC70) DBV (SOT-23) UNIT 6 PINS 6 PINS RθJA Junction-to-ambient thermal resistance 243.1 212.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 206.0 156.7 °C/W RθJB Junction-to-board thermal resistance 128.3 96.5 °C/W ΨJT Junction-to-top characterization parameter 107.8 80.7 °C/W ΨJB Junction-to-board characterization parameter 128.0 96.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 6.5 Electrical Characteristics (VDD = 5 V ±10 %) At TA = 25°C, VDD = 5 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance ΔRON RON On-resistance matching between channels On-resistance flatness FLAT IS(OFF) ID(ON) IS(ON) ID(ON) IS(ON) Source off leakage current (1) Channel on leakage current Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 4 Ω –40°C to +85°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 5 V Switch Off VD = 4.5 V / 1.5 V VS = 1.5 V / 4.5 V Refer to Off-Leakage Current 25°C VDD = 5 V Switch On VD = VS = 2.5 V Refer to On-Leakage Current 25°C VDD = 5 V Switch On VD = VS = 4.5 V / 1.5 V Refer to On-Leakage Current 25°C 1.8 4.5 Ω –40°C to +125°C 4.9 Ω 0.13 Ω –40°C to +85°C 0.4 Ω –40°C to +125°C 0.5 Ω 0.85 Ω –40°C to +85°C 1.4 Ω –40°C to +125°C 1.6 Ω 0.08 nA –40°C to +85°C –0.08 –0.3 0.3 nA –40°C to +125°C –0.9 0.9 nA –0.025 ±0.005 0.025 nA –40°C to +85°C –0.3 0.3 nA –40°C to +125°C –0.95 0.95 nA 0.1 nA –0.35 0.35 nA –40°C to +125°C –2 2 nA –40°C to +85°C –0.1 ±0.003 ±0.01 LOGIC INPUTS (SEL) VIH Input logic high –40°C to +125°C 1.49 5.5 V VIL Input logic low –40°C to +125°C 0 0.87 V IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance 25°C CIN Logic input capacitance –40°C to +125°C ±0.005 µA ±0.05 1 µA pF 2 pF POWER SUPPLY IDD (1) VDD supply current Logic inputs = 0 V or 5.5 V 25°C –40°C to +125°C 0.003 µA 1 µA When VS is 4.5 V, VD is 1.5 V, and vice versa. Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 5 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com Electrical Characteristics (VDD = 5 V ±10 %) (continued) At TA = 25°C, VDD = 5 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Switching time between channels Break before make time (BBM) QC OISO XTALK Charge Injection Off Isolation Crosstalk VS = 3 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 3 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 12 –40°C to +85°C –40°C to +125°C 8 ns 18 ns 19 ns ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns VD = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –6 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –45 dB MHz BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 250 CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF 6 Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 6.6 Electrical Characteristics (VDD = 3.3 V ±10 %) At TA = 25°C, VDD = 3.3 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX 3.7 UNIT ANALOG SWITCH RON On-resistance ΔRON RON On-resistance matching between channels On-resistance flatness FLAT IS(OFF) ID(ON) IS(ON) Source off leakage current (1) Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 8.8 Ω –40°C to +85°C 9.5 Ω –40°C to +125°C 9.8 Ω VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 3.3 V Switch Off VD = 3 V / 1 V VS = 1 V / 3 V Refer to Off-Leakage Current 25°C VDD = 3.3 V Switch On VD = VS = 3 V / 1 V Refer to On-Leakage Current 25°C 0.13 Ω –40°C to +85°C 0.4 Ω –40°C to +125°C 0.5 Ω –40°C to +85°C –40°C to +125°C –0.05 1.9 Ω 2 Ω 2.2 Ω 0.05 nA –40°C to +85°C –0.1 0.1 nA –40°C to +125°C –0.5 0.5 nA 0.1 nA –0.35 0.35 nA –40°C to +125°C –2 2 nA –40°C to +85°C –0.1 ±0.001 ±0.005 LOGIC INPUTS (SEL) VIH Input logic high –40°C to +125°C 1.35 5.5 V VIL Input logic low –40°C to +125°C 0 0.8 V IIH IIL Input leakage current 25°C IIH IIL Input leakage current -40°C to 125°C CIN Logic input capacitance 25°C CIN Logic input capacitance –40°C to +125°C ±0.005 µA ±0.05 1 µA pF 2 pF POWER SUPPLY IDD (1) VDD supply current Logic inputs = 0 V or 5.5 V 25°C –40°C to +125°C 0.003 µA 0.8 µA When VS is 3 V, VD is 1 V, and vice versa. Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 7 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com Electrical Characteristics (VDD = 3.3 V ±10 %) (continued) At TA = 25°C, VDD = 3.3 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Switching time between channels Break before make time (BBM) QC OISO XTALK Charge Injection Off Isolation Crosstalk VS = 2 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 2 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 14 –40°C to +85°C –40°C to +125°C 9 ns 20 ns 21 ns ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns VD = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –6 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –45 dB MHz BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 250 CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF 8 Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 6.7 Electrical Characteristics (VDD = 1.8 V ±10 %) At TA = 25°C, VDD = 1.8 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance ΔRON IS(OFF) ID(ON) IS(ON) On-resistance matching between channels Source off leakage current (1) Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 1.98 V Switch Off VD = 1.62 V / 1 V VS = 1 V / 1.62 V Refer to Off-Leakage Current 25°C VDD = 1.98 V Switch On VD = VS = 1.62 V / 1 V Refer to On-Leakage Current 40 Ω –40°C to +85°C 80 Ω –40°C to +125°C 80 Ω 0.4 Ω –40°C to +85°C 1.5 Ω –40°C to +125°C 1.5 Ω 0.05 nA –40°C to +85°C –0.05 –0.1 ±0.003 0.1 nA –40°C to +125°C –0.5 0.5 nA 25°C –0.1 0.1 nA –40°C to +85°C –0.5 0.5 nA –40°C to +125°C –2 2 nA ±0.005 LOGIC INPUTS (SEL) VIH Input logic high –40°C to +125°C 1.07 5.5 V VIL Input logic low –40°C to +125°C 0 0.68 V IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance 25°C CIN Logic input capacitance –40°C to +125°C ±0.005 µA ±0.05 1 µA pF 2 pF POWER SUPPLY IDD (1) VDD supply current Logic inputs = 0 V or 5.5 V 25°C –40°C to +125°C 0.001 µA 0.85 µA When VS is 1.62 V, VD is 1 V, and vice versa. Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 9 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com Electrical Characteristics (VDD = 1.8 V ±10 %) (continued) At TA = 25°C, VDD = 1.8 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Transition time between channels Break before make time (BBM) QC OISO XTALK Charge Injection Off Isolation Crosstalk VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 28 –40°C to +85°C –40°C to +125°C 16 ns 44 ns 44 ns ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns VD = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –3 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –45 dB MHz BW Bandwidth RL = 50 Ω, CL = 5 pF 25°C 250 CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF 10 Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 6.8 Electrical Characteristics (VDD = 1.2 V ±10 %) At TA = 25°C, VDD = 1.2 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance ΔRON IS(OFF) ID(ON) IS(ON) On-resistance matching between channels Source off leakage current (1) Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 1.32 V Switch Off VD = 1 V / 0.8 V VS = 0.8 V / 1 V Refer to Off-Leakage Current 25°C VDD = 1.32 V Switch On VD = VS = 1 V / 0.8 V Refer to On-Leakage Current 70 Ω –40°C to +85°C 105 Ω –40°C to +125°C 105 Ω 0.4 Ω –40°C to +85°C 1.5 Ω –40°C to +125°C 1.5 Ω 0.05 nA –40°C to +85°C –0.05 –0.1 ±0.003 0.1 nA –40°C to +125°C –0.5 0.5 nA 25°C –0.1 0.1 nA –40°C to +85°C –0.5 0.5 nA –40°C to +125°C –2 2 nA ±0.005 LOGIC INPUTS (SEL) VIH Input logic high –40°C to +125°C 0.96 5.5 V VIL Input logic low –40°C to +125°C 0 0.36 V IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance 25°C CIN Logic input capacitance –40°C to +125°C ±0.005 µA ±0.05 1 µA pF 2 pF POWER SUPPLY IDD (1) VDD supply current Logic inputs = 0 V or 5.5 V 25°C –40°C to +125°C 0.003 µA 0.7 µA When VS is 1 V, VD is 0.8 V, and vice versa. Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 11 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com Electrical Characteristics (VDD = 1.2 V ±10 %) (continued) At TA = 25°C, VDD = 1.2 V (unless otherwise noted). PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Transition time between channels Break before make time (BBM) QC OISO XTALK Charge Injection Off Isolation Crosstalk VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C 55 –40°C to +85°C –40°C to +125°C 28 ns 190 ns 190 ns ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns VD = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –2 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –45 dB MHz BW Bandwidth RL = 50 Ω, CL = 5 pF 25°C 250 CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF 12 Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 6.9 Typical Characteristics at TA = 25°C, VDD = 5 V (unless otherwise noted) 6 5 VDD = 3 V 4.5 5 4 On Resistance (:) On Resistance (:) VDD = 3.63 V 4 VDD = 4.5 V 3 VDD = 5.5 V 2 3.5 TA = 125qC TA = -40qC TA = 25qC 3 2.5 2 1.5 1 1 0.5 0 0 0 1 2 3 4 VS or VD - Source or Drain Voltage (V) 5 5.5 0 1 2 3 4 VS or VD - Source or Drain Voltage (V) D001 TA = 25°C 80 7 70 5 4 3 VDD = 1.32 V 50 40 VDD = 1.62 V 30 2 20 1 10 TA = -40qC VDD = 1.08 V 60 TA = 125qC On Resistance (:) TA = 85qC D002 Figure 2. On-Resistance vs Temperature 8 6 5 VDD = 5 V Figure 1. On-Resistance vs Source or Drain Voltage On Resistance (:) TA = 85qC TA = 25qC 0 VDD = 1.98 V 0 0 0.5 1 1.5 2 2.5 3 VS or VD - Source or Drain Voltage (V) 3.5 0 0.2 D003 VDD = 3.3 V 0.4 0.6 0.8 1 1.2 1.4 1.6 VS or VD - Source or Drain Voltage (V) 1.8 2 D004 TA = 25°C Figure 3. On-Resistance vs Temperature Figure 4. On-Resistance vs Source or Drain Voltage 40 100 30 80 60 VDD = 1.32 V VDD = 1.98 V VDD = 3.63 V On-Leakage (pA) On-Leakage (pA) 20 10 0 -10 40 20 0 -20 -40 -20 -60 -30 -80 -40 -100 0 0.5 1 1.5 2 2.5 3 VS or VD - Source or Drain Voltage (V) 3.5 4 0 D005 TA = 25°C 1 2 3 4 VS or VD - Source or Drain Voltage (V) 5 D006 VDD = 5 V Figure 5. On-Leakage vs Source or Drain Voltage Figure 6. On-Leakage vs Source or Drain Voltage Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 13 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com Typical Characteristics (continued) 3 1 2 0.5 Leakage Current (nA) Leakage Current (nA) 0.75 IS(OFF) 0.25 0 -0.25 I(ON) -0.5 0 -1 I(ON) -2 -0.75 -1 -40 IS(OFF) 1 -20 0 20 40 60 Temperature (qC) 80 100 -3 -40 120 -20 0 20 40 60 Temperature (qC) D007 VDD = 3.3 V 100 120 D008 VDD = 5 V Figure 7. Leakage Current vs Temperature Figure 8. Leakage Current vs Temperature 0.4 500 0.3 400 VDD = 5 V Supply Current (PA) Supply Current (PA) 80 0.2 VDD = 3.3 V 0.1 VDD = 1.8 V 0 300 200 VDD = 3.3 V VDD = 5 V 100 VDD = 1.2 V -0.1 -40 0 -20 0 20 40 60 80 Temperature (qC) 100 120 140 0 0.5 1 D009 VSEL = 5.5 V 1.5 2 2.5 3 3.5 Logic Voltage (V) 4 4.5 5 D010 TA = 25°C Figure 9. Supply Current vs Temperature Figure 10. Supply Current vs Logic Voltage 5 20 15 Charge Injection (pC) Charge Injection (pC) 3 10 5 VDD = 3.3 V 0 VDD = 5 V -5 -10 1 VDD = 1.2 V -1 VDD = 1.8 V -3 -15 -5 -20 0 1 2 3 VD - Drain Voltage (V) 4 5 0 0.5 D011 TA = -40°C to 125°C 1.5 2 D012 TA = -40°C to 125°C Figure 11. Charge Injection vs Drain Voltage 14 1 VD - Drain Voltage (V) Figure 12. Charge Injection vs Drain Voltage Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 Typical Characteristics (continued) 0 30 -10 25 -20 Magnitude (dB) Time (ns) 20 Rising 15 Falling 10 -30 -40 -50 -60 -70 5 -80 0 0.5 1.5 2.5 3.5 VDD - Supply Voltage (V) 4.5 -90 100k 5.5 1M 10M Frequency (Hz) D013 TA = 25°C 100M D014 TA = 25°C Figure 13. Output TTRANSITION vs Supply Voltage Figure 14. Xtalk and Off-Isolation vs Frequency 0 -1 Gain (dB) -2 -3 -4 -5 -6 -7 -8 1M 10M Frequency (Hz) 100M D015 TA = 25°C Figure 15. On Response vs Frequency Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 15 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com 7 Parameter Measurement Information 7.1 On-Resistance The on-resistance of a device is the ohmic resistance between the source (Sx) and drain (D) pins of the device. The on-resistance varies with input voltage and supply voltage. The symbol RON is used to denote on-resistance. The measurement setup used to measure RON is shown in Figure 16. Voltage (V) and current (ISD) are measured using this setup, and RON is computed with RON = V / ISD: V ISD Sx D VS Figure 16. On-Resistance Measurement Setup 7.2 Off-Leakage Current Source leakage current is defined as the leakage current flowing into or out of the source pin when the switch is off. This current is denoted by the symbol IS(OFF). The setup used to measure off-leakage current is shown in Figure 17. VDD VDD Is (OFF) S1 A D S2 VS VD GND Figure 17. Off-Leakage Measurement Setup 16 Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 7.3 On-Leakage Current Source on-leakage current is defined as the leakage current flowing into or out of the source pin when the switch is on. This current is denoted by the symbol IS(ON). Drain on-leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is on. This current is denoted by the symbol ID(ON). Either the source pin or drain pin is left floating during the measurement. Figure 18 shows the circuit used for measuring the on-leakage current, denoted by IS(ON) or ID(ON). VDD VDD VDD VDD IS (ON) ID (ON) S1 N.C. S1 A D D A S2 N.C. S2 Vs VS VS VD GND GND Figure 18. On-Leakage Measurement Setup 7.4 Transition Time Transition time is defined as the time taken by the output of the device to rise or fall 10% after the address signal has risen or fallen past the logic threshold. The 10% transition measurement is utilized to provide the timing of the device. System level timing can then account for the time constant added from the load resistance and load capacitance. Figure 19 shows the setup used to measure transition time, denoted by the symbol tTRANSITION. VDD 0.1…F VDD VDD ADDRESS DRIVE (VSEL) tf < 5ns tr < 5ns VIH VIL VS 0V S1 D OUTPUT S2 RL CL tTRANSITION tTRANSITION SEL 90% OUTPUT VSEL 10% GND 0V Figure 19. Transition-Time Measurement Setup Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 17 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com 7.5 Break-Before-Make Break-before-make delay is a safety feature that prevents two inputs from connecting when the device is switching. The output first breaks from the on-state switch before making the connection with the next on-state switch. The time delay between the break and the make is known as break-before-make delay. Figure 20 shows the setup used to measure break-before-make delay, denoted by the symbol tOPEN(BBM). VDD 0.1…F VDD VDD ADDRESS DRIVE (VSEL) tr < 5ns tf < 5ns S1 VS D OUTPUT S2 0V RL CL 90% Output tBBM 1 SEL tBBM 2 0V VSEL tOPEN (BBM) = min ( tBBM 1, tBBM 2) GND Figure 20. Break-Before-Make Delay Measurement Setup 7.6 Charge Injection The TMUX1119 has a transmission-gate topology. Any mismatch in capacitance between the NMOS and PMOS transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal. The amount of charge injected into the source or drain of the device is known as charge injection, and is denoted by the symbol QC. Figure 21 shows the setup used to measure charge injection from Drain (D) to Source (Sx). VSS VDD 0.1…F 0.1…F VSS VDD VDD S2 VSEL VD N.C. D S1 OUTPUT VOUT 0V CL Output VOUT VS QC = CL × SEL VOUT VSEL GND Figure 21. Charge-Injection Measurement Setup 18 Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 7.7 Off Isolation Off isolation is defined as the ratio of the signal at the drain pin (D) of the device when a signal is applied to the source pin (Sx) of an off-channel. Figure 22 shows the setup used to measure, and the equation used to calculate off isolation. 0.1µF NETWORK VDD ANALYZER VS 50Q S VSIG D VOUT RL 50Q SX GND RL 50Q Figure 22. Off Isolation Measurement Setup Off Isolation §V · 20 ˜ Log ¨ OUT ¸ © VS ¹ (1) 7.8 Crosstalk Crosstalk is defined as the ratio of the signal at the drain pin (D) of a different channel, when a signal is applied at the source pin (Sx) of an on-channel. Figure 23 shows the setup used to measure, and the equation used to calculate crosstalk. 0.1µF NETWORK VDD ANALYZER S1 VOUT RL D 50Q VS RL S2 50Q 50Q VSIG GND Figure 23. Crosstalk Measurement Setup Channel-to-Channel Crosstalk §V · 20 ˜ Log ¨ OUT ¸ © VS ¹ (2) Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 19 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com 7.9 Bandwidth Bandwidth is defined as the range of frequencies that are attenuated by less than 3 dB when the input is applied to the source pin (Sx) of an on-channel, and the output is measured at the drain pin (D) of the device. Figure 24 shows the setup used to measure bandwidth. 0.1µF NETWORK VDD VS ANALYZER 50Q S VSIG D VOUT RL SX 50Q GND RL 50Q Figure 24. Bandwidth Measurement Setup 20 Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 8 Detailed Description 8.1 Overview The TMUX1119 is an 2:1, 1-ch. (SPDT), analog switch where the input is controlled with a single select (SEL) control pin. 8.2 Functional Block Diagram TMUX1119 S1 D S2 SEL Figure 25. TMUX1119 Functional Block Diagram 8.3 Feature Description 8.3.1 Bidirectional Operation The TMUX1119 conducts equally well from source (Sx) to drain (D) or from drain (D) to source (Sx). The device has very similar characteristics in both directions and supports both analog and digital signals. 8.3.2 Rail to Rail Operation The valid signal path input/output voltage for TMUX1119 ranges from GND to VDD. 8.3.3 1.8 V Logic Compatible Inputs The TMUX1119 has 1.8-V logic compatible control for the logic control input (SEL). The logic input threshold scales with supply but still provide 1.8-V logic control when operating at 5.5 V supply voltage. 1.8-V logic level inputs allow the TMUX1119 to interface with processors that have lower logic I/O rails and eliminates the need for an external translator, which saves both space and BOM cost. For more information on 1.8 V logic implementations refer to Simplifying Design with 1.8 V logic Muxes and Switches 8.3.4 Fail-Safe Logic The TMUX1119 supports Fail-Safe Logic on the control input pin (SEL) allowing for operation up to 5.5 V, regardless of the state of the supply pin. This feature allows voltages on the control pin to be applied before the supply pin, protecting the device from potential damage. Fail-Safe Logic minimizes system complexity by removing the need for power supply sequencing on the logic control pins. For example, the Fail-Safe Logic feature allows the select pin of the TMUX1119 to be ramped to 5.5 V while VDD = 0 V. Additionally, the feature enables operation of the TMUX1119 with VDD = 1.2 V while allowing the select pin to interface with a logic level of another device up to 5.5 V. Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 21 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com Feature Description (continued) 8.3.5 Ultra-low Leakage Current The TMUX1119 provides extremely low on-leakage and off-leakage currents. The TMUX1119 is capable of switching signals from high source-impedance inputs into a high input-impedance op amp with minimal offset error because of the ultra-low leakage currents. Figure 26 shows typical leakage currents of the TMUX1119 versus temperature. 3 Leakage Current (nA) 2 IS(OFF) 1 0 -1 I(ON) -2 -3 -40 -20 0 20 40 60 Temperature (qC) 80 100 120 D008 Figure 26. Leakage Current vs Temperature 8.3.6 Ultra-low Charge Injection The TMUX1119 has a transmission gate topology, as shown in Figure 27. Any mismatch in the stray capacitance associated with the NMOS and PMOS causes an output level change whenever the switch is opened or closed. OFF ON CGSN CGDN S D CGSP CGDP OFF ON Figure 27. Transmission Gate Topology 22 Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 TMUX1119 www.ti.com SCDS401B – DECEMBER 2018 – REVISED MAY 2020 Feature Description (continued) The TMUX1119 has special charge-injection cancellation circuitry that reduces the drain-to-source charge injection to -6 pC at VD = 1 V as shown in Figure 28. 20 Charge Injection (pC) 15 10 5 VDD = 3.3 V 0 VDD = 5 V -5 -10 -15 -20 0 1 2 3 VD - Drain Voltage (V) 4 5 D011 Figure 28. Charge Injection vs Drain Voltage 8.4 Device Functional Modes The select (SEL) pin of the TMUX1119 controls which switch is connected to the drain of the device. When a given input is not selected, that source pin is in high impedance mode (HI-Z). The control pins can be as high as 5.5 V. 8.5 Truth Tables Table 1. TMUX1119 Truth Table CONTROL LOGIC (SEL) Selected Source (Sx) Connected To Drain (D) Pin 0 S1 1 S2 Submit Documentation Feedback Copyright © 2018–2020, Texas Instruments Incorporated Product Folder Links: TMUX1119 23 TMUX1119 SCDS401B – DECEMBER 2018 – REVISED MAY 2020 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The TMUX11xx family offers ulta-low input and output leakage currents and low charge injection. These devices operate up to 5.5 V, and offer true rail-to-rail input and output of both analog and digital signals. The TMUX1119 has a low on-capacitance which allows faster settling time when multiplexing inputs in the time domain. These features make the TMUX11xx devices a family of precision, high-performance switches and multiplexers for lowvoltage applications. 9.2 Typical Application Figure 29 shows an ultrasonic gas meter front end. The ultrasonic front end design utilizes time of flight (TOF) measurement to determine the amount of gas flowing in a pipe. The circuit utilizes the MSP430FR5994, two ultra low power operational amplifiers, OPA835 and OPA836, along with two TMUX1119, 2:1 precision switches. 8 MHz OPA836 OPA835 ADC TMUX1119 x1 SEL TMUX1119 x2 MSP430FR599 32 kHz TX/RX MOSI MUX TX SEL Figure 29. Ultrasonic Gas Meter System 9.3 Design Requirements For this design example, use the parameters listed in Table 2. Table 2. Design Parameters PARAMETERS 24 VALUES Supply (VDD) 5V I/O signal range 0 V to VDD (Rail to Rail) Control logic thresholds 1.8 V compatible Single-shot standard deviation (STD)