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Table of Contents
User’s Guide
TMUXRTJ-RRQEVM User's Guide
ABSTRACT
This document is the EVM user’s guide for the TMUXRTJ-RRQEVM, which provides a quick way to evaluate TI
devices that use a 20-pin RTJ or RRQ package.
Table of Contents
1 Introduction.............................................................................................................................................................................2
2 General Texas Instruments High Voltage Evaluation Module (TI HV EVM) User Safety Guidelines...............................5
3 Information About Cautions and Warnings..........................................................................................................................6
4 Features...................................................................................................................................................................................6
5 Header Connections and Test Points................................................................................................................................... 7
6 Setup...................................................................................................................................................................................... 11
7 Layout.................................................................................................................................................................................... 14
8 Schematics............................................................................................................................................................................15
9 Bill of Materials..................................................................................................................................................................... 19
List of Figures
Figure 1-1. TMUXRTJ-RRQEVM Top View................................................................................................................................. 2
Figure 1-2. TMUXRTJ-RRQEVM Bottom View............................................................................................................................3
Figure 1-3. TMUXRTJ-RRQEVM 3D View.................................................................................................................................. 4
Figure 5-1. Header J1 for U1.1.................................................................................................................................................... 7
Figure 5-2. Pinout of Headers......................................................................................................................................................8
Figure 5-3. Thermal Pad Selector................................................................................................................................................8
Figure 5-4. Test Point Colors....................................................................................................................................................... 9
Figure 6-1. DUT Footprint U1.....................................................................................................................................................11
Figure 6-2. Signal Line Circuitry (3D).........................................................................................................................................11
Figure 6-3. Signal Line Circuitry................................................................................................................................................ 12
Figure 6-4. Signal Line Circuitry Bottom Layer.......................................................................................................................... 12
Figure 6-5. Thermal Pad Selector with Shunt............................................................................................................................13
Figure 7-1. Illustration of TMUXRTJ-RRQEVM Layout..............................................................................................................14
Figure 8-1. TMUXRTJ-RRQEVM Schematic Page 1 (Editor View)........................................................................................... 15
Figure 8-2. TMUXRTJ-RRQEVM Schematic Page 2 (Editor View)........................................................................................... 16
Figure 8-3. TMUXRTJ-RRQEVM Schematic Page 1 (DNI)....................................................................................................... 17
Figure 8-4. TMUXRTJ-RRQEVM Schematic Page 2 (DNI)....................................................................................................... 18
List of Tables
Table 5-1. Connections by Header Pin Number.......................................................................................................................... 8
Table 5-2. Test Point Connections............................................................................................................................................... 9
Table 9-1. TMUXRTJ-RRQEVM Bill of Materials....................................................................................................................... 19
Trademarks
All trademarks are the property of their respective owners.
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Introduction
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1 Introduction
The TMUXRTJ-RRQEVM evaluation module (EVM) and its intended use is described in this user's guide. This
board allows for the quick prototyping and DC characterization of TI’s line of TMUX products that use 20-pin
QFN packages (RTJ or RRQ).
Figure 1-1. TMUXRTJ-RRQEVM Top View
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Introduction
Figure 1-2. TMUXRTJ-RRQEVM Bottom View
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Introduction
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Figure 1-3. TMUXRTJ-RRQEVM 3D View
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General Texas Instruments High Voltage Evaluation Module (TI HV EVM) User Safety Guidelines
2 General Texas Instruments High Voltage Evaluation Module (TI HV EVM) User Safety
Guidelines
WARNING
Always follow TI’s setup and application instructions, including use of all interface components within their
recommended electrical rated voltage and power limits. Always use electrical safety precautions to help
ensure your personal safety and those working around you. Contact TI's Product Information Center http://
support/ti./com for further information.
Save all warnings and instructions for future reference.
WARNING
Failure to follow warnings and instructions may result in personal injury, property damage or death
due to electrical shock and burn hazards.
The term TI HV EVM refers to an electronic product typically provided as an open framed, unenclosed
printed circuit board assembly. It is intended strictly for use in development laboratory environments, solely
for qualified professional users having training, expertise and knowledge of electrical safety risks in development
and application of high voltage electrical circuits. Any other use or application are strictly prohibited by Texas
Instruments. If you are not suitably qualified, you should immediately stop from further use of the HV EVM.
1. Work Area Safety
a. Keep work area clean and orderly.
b. One or more qualified observers must be present anytime circuits are energized.
c. Effective barriers and signage must be present in the area where the TI HV EVM and its interface
electronics are energized, indicating operation of accessible high voltages may be present, for the
purpose of protecting inadvertent access.
d. All interface circuits, power supplies, evaluation modules, instruments, meters, scopes and other related
apparatus used in a development environment exceeding 50Vrms/75VDC must be electrically located
within a protected Emergency Power Off EPO protected power strip.
e. Use stable and nonconductive work surface.
f. Use adequately insulated clamps and wires to attach measurement probes and instruments. No
freehand testing whenever possible.
2. Electrical Safety
As a precautionary measure, it is always a good engineering practice to assume that the entire EVM may
have fully accessible and active high voltages.
a. De-energize the TI HV EVM and all its inputs, outputs and electrical loads before performing any
electrical or other diagnostic measurements. Revalidate that TI HV EVM power has been safely deenergized.
b. With the EVM confirmed de-energized, proceed with required electrical circuit configurations, wiring,
measurement equipment connection, and other application needs, while still assuming the EVM circuit
and measuring instruments are electrically live.
c. After EVM readiness is complete, energize the EVM as intended.
WARNING
While the EVM is energized, never touch the EVM or its electrical circuits, as they could be at
high voltages capable of causing electrical shock hazard.
3. Personal Safety
a. Wear personal protective equipment (for example, latex gloves or safety glasses with side shields) or
protect EVM in an adequate lucent plastic box with interlocks to protect from accidental touch.
Limitation for safe use:
EVMs are not to be used as all or part of a production unit.
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Information About Cautions and Warnings
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3 Information About Cautions and Warnings
The information in the warning statement is provided for personal protection and the information in the caution
statement is provided to protect the equipment from damage. Read each caution and warning statement
carefully.
CAUTION
This EVM contains components that can potentially be damaged by electrostatic discharge. Always
transport and store the EVM in its supplied ESD bag when not in use. Handle using an antistatic
wristband. Operate on an antistatic work surface. For more information on proper handling, see
Electrostatic Discharge (ESD).
4 Features
The TMUXRTJ-RRQEVM has the following features:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
6
3 power supply decoupling capacitors from VDD to GND (three 3.3 µF capacitors)
1 protection diode pad from VDD to GND available near power supply (6.9 mm × 5.8 mm)
3 power supply decoupling capacitors from VSS to GND (three 3.3 μF capacitors)
1 protection diode pad from VSS to GND available near power supply (6.9 mm × 5.8 mm)
Terminal block power supply connection
DUT footprint compatible with 20-pin RTJ and RRQ (WQFN) packages
20 length-matched signal inputs corresponding to the 20 pins of the DUT
Selectable connections to VDD, VSS, or GND for each signal input using 2.54 mm shunt
Footprints for pull-up and pull-down resistors for each signal input (two 0603 footprints on each of 20 signals)
Footprints for series resistors for each signal input (two 0805 footprints on each of 20 signals)
Footprints for decoupling capacitors for each input (one 1206 footprint and one 1812 footprint on each of 20
signals)
2 test points for each signal input
Selectable thermal pad connection
Multiple GND test point connections around board
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Header Connections and Test Points
5 Header Connections and Test Points
There are 20 headers located around the board with designators J1 through J20. These 3-by-2 headers serve as
connections to power planes and to signals of the DUT (U1). Each pin of the DUT has similar header and test
point configuration. At four different locations around the board, a legend shows the connections of the pins of
the nearby five headers. Figure 5-1 shows a representation of the header associated with pin 1 of U1.
Figure 5-1. Header J1 for U1.1
The silkscreen legend represents the connections of the pins of J1. Figure 5-2 shows the pin numbers of this
header from this same perspective.
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Header Connections and Test Points
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1
2
x
VDD
3
4
GND
U1
5
6
GND
VSS
Figure 5-2. Pinout of Headers
Table 5-1 also shows the connections.
Table 5-1. Connections by Header Pin Number
Header Pin Number
Connection
1
No connection
2
VDD
3
GND
4
U1
5
GND
6
VSS
For all headers J1 through J20, the connections are the same, but are rotated by a multiple of 90° according to
their position on the board. A legend is included for each rotation.
There is one 3-by-1 header located near the DUT (J21). Pin 2 of this header is connected to the thermal pad of
the DUT. Pin 1 of this header is connected to GND, and pin 3 of this header is connected to VSS.
Figure 5-3. Thermal Pad Selector
The connections of J21 are also labeled on the board's silkscreen layer next to the header.
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Header Connections and Test Points
In addition to headers, multiple test points are located around the board. Black test points (TP22 and TP24TP30) are connected to GND, the red test point (TP21) is connected to VDD, and the green test point (TP23) is
connected to VSS. The remaining blue test points (TP1-TP20 and TP101-TP120) are connected along the signal
paths of the pins of U1.
Figure 5-4. Test Point Colors
The last two digits of the blue test point number represent the pin with which the test point is associated. For
example, TP16 and TP116 are both pin 16 of U1.
Table 5-2 also shows the test point connections.
Table 5-2. Test Point Connections
Designator
Connection
TP1
J1.4
TP2
J2.4
TP3
J3.4
TP4
J4.4
TP5
J5.4
TP6
J6.4
TP7
J7.4
TP8
J8.4
TP9
J9.4
TP10
J10.4
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Header Connections and Test Points
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Table 5-2. Test Point Connections (continued)
Designator
Connection
TP11
J11.4
TP12
J12.4
TP13
J13.4
TP14
J14.4
TP15
J15.4
TP16
J16.4
TP17
J17.4
TP18
J18.4
TP19
J19.4
TP20
J20.4
TP21
VDD
TP22
GND
TP23
VSS
TP24
GND
TP25
GND
TP26
GND
TP27
GND
TP28
GND
TP29
GND
TP30
GND
TP101
U1.1
TP102
U1.2
TP103
U1.3
TP104
U1.4
TP105
U1.5
TP106
U1.6
TP107
U1.7
TP108
U1.8
TP109
U1.9
TP110
U1.10
TP111
U1.11
TP112
U1.12
TP113
U1.13
TP114
U1.14
TP115
U1.15
TP116
U1.16
TP117
U1.17
TP118
U1.18
TP119
U1.19
TP120
U1. 20
Terminal block J25 is the power input for the board. Three power rails (VSS, GND, and VDD) are labeled on the
board’s silkscreen layer, indicating the identities of the input pins of the header. Connect the power supply rails at
this terminal block to power the board.
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Setup
6 Setup
Figure 6-1. DUT Footprint U1
The TMUXRTJ-RRQEVM will not have any device connected at footprint U1, and there are not any devices
included with the EVM for this footprint. Attach any compatible Texas Instruments 20-pin TMUX device to this
location, which will serve as the Device Under Test (DUT). Compatible devices include parts with RTJ or RRQ
package names.
By default, the TMUXRTJ-RRQEVM will have 2.54 mm shunts on headers J1 through J20 connected such
that the pins of U1 are connected to GND. Remove these shunts from J1 through J20 as necessary if these
connections are not desired. Alternatively, the pins of U1 can be shorted to VDD or VSS by connecting between
pin 4 of the header and one of the other pins on the header. Figure 5-2 and Table 5-1 include detailed
descriptions of the connections on J1 through J20.
Figure 6-2. Signal Line Circuitry (3D)
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Setup
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As shown in Figure 6-2 and Figure 6-3 as R5 and R6 on the J1 (pin 1 of U1) signal line, the TMUXRTJRRQEVM includes 0 Ω series resistors (0805 package) on each signal line.
Figure 6-3. Signal Line Circuitry
These can be substituted for different resistors as desired. Additionally, there are pads for pull-up and pull-down
resistors to VDD and GND respectively. Add any 0603 resistor to the footprint shown here as R1 to provide
pull-up to VDD, and add any 0603 resistor to the footprint shown here as R13 to provide pull-down to GND.
Each signal line also includes two footprints that allow for the user to attach capacitors or other devices with
matching footprints. On the top side of the board, shown in Figure 6-2 and Figure 6-3 as C1, a standard 1206
footprint exists between the U1 pin signal and the GND signal. The user can solder a capacitor to this footprint to
provide capacitance to the signal line.
Figure 6-4. Signal Line Circuitry Bottom Layer
Figure 6-4 shows that a standard 1812 footprint exists as C101 on the backside of the board, which also allows a
capacitor to be connected between the U1 pin signal and GND. The user can solder a capacitor to this footprint
to provide capacitance to the signal line.
The user can select the connection of the thermal pad of U1 by using the three-by-one header located near U1
(J21).
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Setup
Figure 6-5. Thermal Pad Selector with Shunt
Connecting a shunt between pins 1 and 2 of this header will tie the thermal pad of U1 to GND, while connecting
pins 2 and 3 will tie the thermal pad of U1 to VSS. Leave pin 2 of this header unconnected to allow the thermal
pad to float, or use an external connection to tie the thermal pad to any other potential.
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Layout
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7 Layout
Figure 7-1 shows the layout of the EVM PCB.
Figure 7-1. Illustration of TMUXRTJ-RRQEVM Layout
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Schematics
8 Schematics
Figure 8-1 and Figure 8-2 are schematic views of the TMUXRTJ-RRQEVM that includes all the parts and connections.
Figure 8-1. TMUXRTJ-RRQEVM Schematic Page 1 (Editor View)
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Schematics
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Figure 8-2. TMUXRTJ-RRQEVM Schematic Page 2 (Editor View)
Figure 8-3 and Figure 8-4 are schematic views of the TMUXRTJ-RRQEVM that show only the parts that are included in the EVM and excludes the parts
that are DNI.
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Schematics
1
2
3
4
5
6
1
2
3
J 25
VDD
A
5005
TP21
GND
TP22
VDD
C21
250V
3.3uF
C22
250V
3.3uF
1
2
3
4
5
6
7
8
9
10
TP 23
5126
VS S
5011
D1
C23
250V 5.0S MDJ 100A
3.3uF 100V
GND
U1
691 101 710 003 VS S
C24
250V
3.3uF
C25
250V
3.3uF
D2
5.0S MDJ 100A
100V
C26
250V
3.3uF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
10
21
11
12
13
14
15
16
17
18
19
20
11
12
13
14
15
16
17
18
19
20
21
PAD
A
20RRQ_Generic_Footprint
GND
GND
TP24
TP25
TP26
TP27
TP28
TP29
5011
5011
5011
5011
5011
5011
TP30
5011
GND
VDD
VDD
B
J1
1
3
5
2
4
6
TP1
R5
VDD
0
GND
TP101
1
0
R13
1.0k
61300621121 VS S
VDD
R1
1.0k
R6
C1 0 1
1uF
250V
GND
J2
1
3
5
C1
450V
0.1uF
2
4
6
TP2
R7
0
VDD
J5
2
4
6
TP5
R21
C
GND
VDD
TP105
5
0
R29
1.0k
61300621121 VS S
C1 0 5
1uF
250V
GND
J6
1
3
5
C5
450V
0.1uF
2
4
6
TP6
R23
J9
1
3
5
2
4
6
61300621121 VS S
GND
TP9
R37
2
4
6
TP3
R9
GND
TP109
9
R45
1.0k
C1 0 9
1uF
250V
J 10
1
3
5
C9
450V
0.1uF
61300621121 VS S
GND
GND
2
4
6
TP10
R39
6
C1 0 6
1uF
250V
J7
1
3
5
C6
450V
0.1uF
2
4
6
TP7
R25
C3
450V
0.1uF
1uF
250V
2
4
6
TP4
R11
VDD
1
3
5
7
0
C1 0 7
C7
450V
0.1uF
1uF
250V
2
4
6
TP8
R27
TP110
10
R46
1.0k
C1 1 0
1uF
250V
J 11
1
3
5
C10
450V
0.1uF
GND
2
4
6
TP11
61300621121 VS S
GND
R41
GND
GND
TP108
8
0
C1 0 8
R32
1.0k
61300621121 VS S
GND
1uF
250V
GND
C8
450V
0.1uF
GND
C
VDD
VDD
R35
1.0k
R42
J 12
TP111
1
3
5
11
0
0
C4
450V
0.1uF
R20
1.0k
R28
0
VDD
0
1uF
250V
GND
J8
TP107
GND
VDD
B
4
C1 0 4
R16
1.0k
GND
TP104
0
VDD
R31
1.0k
61300621121 VS S
R4
1.0k
R12
0
61300621121 VS S
GND
R19
1.0k
R26
0
GND
GND
R34
1.0k
R40
GND
C1 0 3
GND
VDD
TP106
0
0
1
3
5
3
0
R15
1.0k
61300621121 VS S
J4
TP103
VDD
GND
VDD
VDD
VDD
R3
1.0k
R10
0
VDD
0
GND
1
3
5
C2
450V
0.1uF
GND
R30
1.0k
61300621121 VS S
GND
GND
R33
1.0k
R38
0
1uF
250V
R18
1.0k
R24
0
VDD
VDD
C1 0 2
J3
VDD
R17
1.0k
R22
0
2
GND
VDD
1
3
5
TP102
0
R14
1.0k
61300621121 VS S
GND
GND
VDD
VDD
R2
1.0k
R8
R47
1.0k
GND
C1 1 1
C11
450V
0.1uF
1uF
250V
2
4
6
61300621121 VS S
GND
GND
TP12
R43
R36
1.0k
R44
TP112
12
0
0
C1 1 2
R48
1.0k
1uF
250V
GND
C12
450V
0.1uF
GND
D
D
Te xa s Ins trume nts a nd/or its lice ns ors do not wa rra nt the a ccura cy or comple te ne s s of this s pe cifica tion or a ny informa tion conta ine d the re in. Te xa s Ins trume nts a nd/or its lice ns ors do not
wa rra nt tha t this de s ign will me e t the s pe cifica tions , will be s uita ble for your a pplica tion or fit for a ny pa rticula r purpos e , or will ope ra te in a n imple me nta tion. Te xa s Ins trume nts a nd/or its
lice ns ors do not wa rra nt tha t the de s ign is production worthy. You s hould comple te ly va lida te a nd te s t your de s ign imple me nta tion to confirm the s ys te m functiona lity for your a pplica tion.
1
2
3
Orde ra ble : Cha nge Me in va ria nt
TID #:
N/A
Numbe r: INT140
Re v: A
S VN Re v: Not in ve rs ion control
Dra wn By:
Engine e r: Da nny Ba cic
4
5
De s igne d for: P ublic Re le a s e
P roje ct Title : TMUXRTJ -RRQEVM
S he e t Title :
As s e mbly Va ria nt: 001
File : INT140_P a ge 1.S chDoc
Conta ct: http://www.ti.com/s upport
Mod. Da te : 4/12/2021
S he e t: 1 of 3
S ize : B
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© Te xa s Ins trume nts 2021
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Figure 8-3. TMUXRTJ-RRQEVM Schematic Page 1 (DNI)
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Schematics
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1
2
3
VDD
J 13
A
1
3
5
VDD
2
4
6
R52
TP13 0
61300621121VS S
VDD
R49
1.0k
R53
J 14
1
3
5
13
TP113
0
R58
1.0k
4
C1 1 3
1uF
250V
C13
450V
0.1uF
VDD
2
4
6
R54
TP14 0
R50
1.0k
R55
J 15
GND
C1 1 4
1uF
250V
C14
450V
0.1uF
R51
1.0k
R57
VDD
1
3
5
14
TP114
0
R59
1.0k
61300621121VS S
VDD
2
4
6
R56
TP15 0
15
TP115
0
C1 1 5
R60
1.0k
61300621121VS S
1uF
250V
A
C15
450V
0.1uF
GND
GND
GND
GND
GND
VDD
J 16
1
3
5
B
VDD
2
4
6
R64
TP16 0
GND
J 17
1
3
5
16
TP116
0
C1 1 6
1uF
250V
GND
C16
450V
0.1uF
VDD
2
4
6
R66
TP17 0
GND
GND
J 19
VDD
2
4
6
61300621121VS S
R76
TP19 0
GND
GND
TP117
0
C1 1 7
1uF
250V
C17
450V
0.1uF
R63
1.0k
R69
VDD
1
3
5
17
GND
J 20
1
3
5
19
TP119
0
C
J 18
2
4
6
R68
TP18 0
GND
18
TP118
0
C1 1 8
R72
1.0k
61300621121VS S
GND
1uF
250V
GND
C18
450V
0.1uF
B
GND
VDD
R73
1.0k
R77
R82
1.0k
GND
VDD
R62
1.0k
R67
R71
1.0k
61300621121VS S
VDD
1
3
5
GND
VDD
R61
1.0k
R65
R70
1.0k
61300621121VS S
GND
C1 1 9
1uF
250V
C19
450V
0.1uF
GND
VDD
2
4
6
R78
TP20 0
61300621121VS S
GND
J2 2
R74
1.0k
R79
J 21
20
TP120
0
R83
1.0k
GND
C1 2 0
1uF
250V
1
2
3
PAD
GND
C20
450V
0.1uF
61300311121
VS S
2-881545-2
C
In assembly, connect J22 between pins 1 and 2 of J21.
GND
D
D
Te xa s Ins trume nts a nd/or its lice ns ors do not wa rra nt the a ccura cy or comple te ne s s of this s pe cifica tion or a ny informa tion conta ine d
the re in. Te xa s Ins trume nts a nd/or its lice ns ors do not wa rra nt tha t this de s ign will me e t the s pe cifica tions , will be s uita ble for your
a pplica tion or fit for a ny pa rticula r purpos e , or will ope ra te in a n imple me nta tion. Te xa s Ins trume nts a nd/or its lice ns ors do not wa rra nt
tha t the de s ign is production worthy. You s hould comple te ly va lida te a nd te s t your de s ign imple me nta tion to confirm the s ys te m
functiona lity for your a pplica tion.
1
2
Orde ra ble : Cha nge Me in va ria nt
TID #:
N/A
Numbe r: INT140
Re v: A
S VN Re v: Not in ve rs ion control
Dra wn By:
Engine e r: Da nny Ba cic
De s igne d for: P ublic Re le a s e
P roje ct Title : TMUXRTJ -RRQEVM
S he e t Title :
As s e mbly Va ria nt: 001
File : INT140_P a ge 2.S chDoc
Conta ct: http://www.ti.com/s upport
3
Mod. Da te : 5/7/2021
S he e t: 2 of 3
S ize : Le tte r
http://www.ti.com
© Te xa s Ins trume nts 2021
4
Figure 8-4. TMUXRTJ-RRQEVM Schematic Page 2 (DNI)
18
TMUXRTJ-RRQEVM User's Guide
SCDU027 – AUGUST 2021
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Schematics
9 Bill of Materials
Table 9-1. TMUXRTJ-RRQEVM Bill of Materials
Designator
Component
Manufacturer
Description
Quantity
C21, C22, C23, C24, C25, C26
CKG57NX7T2E335M500JH
TDK
CAP, CERM, 3.3 µF, 250 V, ± 20%,
X7T, AEC-Q200 Grade 1, 6 × 5 × 5
mm
6
H1, H2, H3, H4
NY PMS 440 0025 PH
B&F Fastener Supply
Machine Screw, Round, #4-40 × 1/4, 4
Nylon, Philips panhead
H5, H6, H7, H8
1902C
Keystone
Standoff, Hex, 0.5"L #4-40 Nylon
4
J1, J2, J3, J4, J5, J6, J7, J8, J9, J10, 61300621121
J11, J12, J13, J14, J15, J16, J17,
J18, J19, J20
Wurth Elektronik
Header, 2.54 mm, 3 × 2, Gold, TH
20
J21
61300311121
Wurth Elektronik
Header, 2.54 mm, 3 × 1, Gold, TH
1
J22
2-881545-2
TE
Default shunt positioning: between
pins 1 and 2 of J21
1
J23, J24, J26, J27, J28, J29, J30,
J31, J32, J33, J34, J35, J36, J37,
J38, J39, J40, J41, J42, J43
2-881545-2
TE
Default shunt positioning: between
pins 3 and 4 of J1-J20
20
J25
691 101 710 003
Wurth Elektronik
Terminal Block, 5 mm, 3 × 1, Tin, TH 1
LBL1
THT-14-423-10
Brady
Thermal Transfer Printable Labels,
1
0.650" W x 0.200" H - 10,000 per roll
R5, R6, R7, R8, R9, R10, R11, R12, PMR10EZPJ000
R21, R22, R23, R24, R25, R26,
R27, R28, R37, R38, R39, R40,
R41, R42, R43, R44, R52, R53,
R54, R55, R56, R57, R64, R65,
R66, R67, R68, R69, R76, R77,
R78, R79
Rohm
RES, 0, 0%, W, AEC-Q200 Grade 0, 40
0805
TP1, TP2, TP3, TP4, TP5, TP6,
TP7, TP8, TP9, TP10, TP11, TP12,
TP13, TP14, TP15, TP16, TP17,
TP18, TP19, TP20, TP101, TP102,
TP103, TP104, TP105, TP106,
TP107, TP108, TP109, TP110,
TP111, TP112, TP113, TP114,
TP115, TP116, TP117, TP118,
TP119, TP120
5122
Keystone
Test Point, Compact, Blue, TH
40
TP21
5005
Keystone
Test Point, Compact, Red, TH
1
TP22, TP24, TP25, TP26, TP27,
TP28, TP29, TP30
5011
Keystone
Test Point, Multipurpose, Black, TH
8
TP23
5126
Keystone
Test Point, Multipurpose, Green, TH
1
SCDU027 – AUGUST 2021
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TMUXRTJ-RRQEVM User's Guide
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