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TPA2006D1
SLOS498B – SEPTEMBER 2006 – REVISED SEPTEMBER 2015
TPA2006D1 1.45-W MONO Filter-free Class-D Audio Power Amplifier with 1.8-V
Compatible Input Thresholds
1 Features
•
1
•
•
•
•
2 Applications
Ideal for Wireless or Cellular Handsets and PDAs
Maximum Battery Life and Minimum Heat
– Efficiency With an 8-Ω Speaker:
– 88% at 400 mW
– 80% at 100 mW
– 2.8-mA Quiescent Current
– 0.5-μA Shutdown Current
SHUTDOWN Pin has 1.8-V Compatible
Thresholds
Capable of Driving an
8-Ω Speaker (2.5 V ≤ VDD ≤ 5.5 V) and a
4-Ω Speaker (2.5 V ≤ VDD ≤ 4.2 V)
Only Three External Components
– Optimized PWM Output Stage Eliminates LC
Output Filter
– Internally Generated 250-kHz Switching
Frequency Eliminates Capacitor and Resistor
– Improved PSRR (–75 dB) and Wide Supply
Voltage (2.5 V to 5.5 V) Eliminates Need for a
Voltage Regulator
– Fully Differential Design Reduces RF
Rectification and Eliminates Bypass Capacitor
– Improved CMRR Eliminates Two Input
Coupling Capacitors
Space-Saving 3 mm x 3 mm VSON Package
(DRB)
3 Description
The TPA2006D1 device is a 1.45-W high efficiency
filter-free class-D audio power amplifier in a 3 mm × 3
mm VSON package that requires only three external
components. The SHUTDOWN pin is fully compatible
with 1.8-V logic GPIO, such as are used on lowpower cellular chipsets.
Features like 88% efficiency, –75-dB PSRR,
improved RF-rectification immunity, and small total
PCB footprint make the TPA2006D1 device ideal for
cellular handsets. A fast start-up time of 1 ms with
minimal pop makes the TPA2006D1 device ideal for
PDA applications.
In cellular handsets, the earpiece, speaker phone,
and melody ringer can each be driven by the
TPA2006D1 device. The TPA2006D1 device allows
independent gain while summing signals from
separate sources, and has a low 36-μV noise floor,
A-weighted.
The TPA2006D1 device has short-circuit and thermal
protection.
Device Information(1)
PART NUMBER
TPA2006D1
PACKAGE
VSON (8)
BODY SIZE (NOM)
3.00 mm ×3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Application Circuit
To Battery
Internal
Oscillator
+
RI
-
RI
CS
IN+
+
_
Differential
Input
VDD
PWM
HBridge
VO+
VO-
INGND
SHUTDOWN
Bias
Circuitry
TPA2006D1
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPA2006D1
SLOS498B – SEPTEMBER 2006 – REVISED SEPTEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
7.7
4
4
4
4
5
5
6
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information .................................................
Electrical Characteristics...........................................
Operating Characteristics..........................................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 10
Detailed Description ............................................ 11
9.1 Overview ................................................................. 11
9.2 Functional Block Diagram ....................................... 11
9.3 Feature Description................................................. 11
9.4 Device Functional Modes........................................ 15
10 Application and Implementation........................ 19
10.1 Application Information.......................................... 19
10.2 Typical Application ............................................... 19
10.3 System Examples ................................................. 22
11 Power Supply Recommendations ..................... 22
11.1 Power Supply Decoupling Capacitors................... 22
12 Layout................................................................... 23
12.1 Layout Guidelines ................................................. 23
12.2 Layout Example .................................................... 23
13 Device and Documentation Support ................. 24
13.1
13.2
13.3
13.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
24
24
24
24
14 Mechanical, Packaging, and Orderable
Information ........................................................... 24
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (July 2008) to Revision B
•
Page
Added ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
Changes from Original (September 2006) to Revision A
Page
•
Added Capable of Driving an 8-Ω Speaker and a 4-Ω Speaker ............................................................................................ 1
•
Added To Description: The TPA2006D1 device has short-circuit and thermal protection. .................................................... 1
•
Added RL Load resistance, to the Abs Max Ratings Table .................................................................................................... 4
•
Changed Storage Temp - From: –65°C to 85°C To: –65°C to 150°C.................................................................................... 4
•
Added graph, Figure 2 ........................................................................................................................................................... 6
•
Changed graph, Figure 3 ....................................................................................................................................................... 6
•
Changed graph, Figure 7 ....................................................................................................................................................... 6
•
Changed graph, Figure 8 ....................................................................................................................................................... 6
•
Added graph, Figure 16 ......................................................................................................................................................... 7
•
Added graph, Figure 17 ......................................................................................................................................................... 8
•
Added graph, Figure 18 ......................................................................................................................................................... 8
•
Added and causes pop. Any capacitor in the audio path should have a rating of X7R or better......................................... 21
2
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SLOS498B – SEPTEMBER 2006 – REVISED SEPTEMBER 2015
5 Device Comparison Table
DEVICE
NUMBER
SPEAKER
CHANNELS
SPEAKER
AMP TYPE
OUTPUT
POWER (W)
PSRR (dB)
SUPPLY MIN (V)
SUPPLY MAX (V)
PACKAGE
FAMILY
TPA2006D1
Mono
Class D
1.45
75
2.5
5.5
VSON
TPA2005D1
Mono
Class D
1.4
75
2.5
5.5
BGA
MICROSTAR
JUNIOR
HVSSOP
VSON
6 Pin Configuration and Functions
VSON Package
8-Pin DRB
Top View
SHUTDOWN
1
8 V
O−
NC
2
7 GND
IN+
3
6 VDD
IN−
4
5 VO+
NC − No internal connection
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
GND
7
O
High-current ground
IN–
4
I
Negative differential input
IN+
3
I
Positive differential input
NC
2
–
No Connect, not connected internal to the device. May be left unconnected.
SHUTDOWN
1
I
Shutdown pin (active low logic)
VDD
6
I
Power supply
VO+
5
O
Positive BTL output
VO-
8
O
Negative BTL output
Thermal Pad
—
—
Must be soldered to a grounded thermal pad on PCB for best thermal performance.
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VDD Supply voltage
MIN
MAX
UNIT
In active mode
–0.3
6
V
In SHUTDOWN mode
–0.3
7
V
–0.3
VDD + 0.3
Ω
VI
Input voltage
RL
Load resistance
TA
Operating free-air temperature
–40
85
°C
TJ
Operating junction temperature
–40
150
°C
–65
150
°C
2.5 ≤ VDD ≤ 4.2 V
3.2
4.2 < VDD ≤ 6 V
6.4
Tstg Storage temperature
(1)
Ω
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
V
±1500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
2.5
MAX
UNIT
VDD
Supply voltage
5.5
V
VIH
High-level input voltage
SHUTDOWN
VIL
Low-level input voltage
SHUTDOWN
1.3
VDD
V
0
0.35
RI
Input resistor
Gain ≤ 20 V/V (26 dB)
15
VIC
Common mode input voltage range
VDD = 2.5 V, 5.5 V, CMRR ≤ –49 dB
0.5
VDD–0.8
V
TA
Operating free-air temperature
–40
85
°C
V
kΩ
7.4 Thermal Information
TPA2006D1
THERMAL METRIC (1)
VSON (DRB)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
50.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
66.2
°C/W
RθJB
Junction-to-board thermal resistance
25.9
°C/W
ψJT
Junction-to-top characterization parameter
1.4
°C/W
ψJB
Junction-to-board characterization parameter
26
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
7
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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SLOS498B – SEPTEMBER 2006 – REVISED SEPTEMBER 2015
7.5 Electrical Characteristics
TA = 25°C, over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
|VOS|
Output offset voltage (measured differentially)
VI = 0 V, AV = 2 V/V, VDD = 2.5 V to 5.5 V
PSRR
Power supply rejection ratio
VDD = 2.5 V to 5.5 V
CMRR
Common mode rejection ratio
VDD = 2.5 V to 5.5 V, VIC = VDD/2 to 0.5 V,
VIC = VDD/2 to VDD –0.8 V
|IIH|
High-level input current
VDD = 5.5 V, VI = 5.8 V
|IIL|
Low-level input current
VDD = 5.5 V, VI = –0.3 V
I(Q)
I(SD)
rDS(on)
f(sw)
Quiescent current
Shutdown current
Static drain-source on-state
resistance
MIN
TYP
MAX
mV
–75
–55
dB
–68
–49
dB
100
μA
5
μA
VDD = 5.5 V, no load
3.4
VDD = 3.6 V, no load
2.8
VDD = 2.5 V, no load
2.2
3.2
V(SHUTDOWN)= 0.35 V, VDD = 2.5 V to 5.5 V
0.5
2
VDD = 2.5 V
770
VDD = 3.6 V
590
VDD = 5.5 V
500
Output impedance in SHUTDOWN
V(SHUTDOWN) = 0.35 V
Switching frequency
VDD = 2.5 V to 5.5 V
Gain
VDD = 2.5 V to 5.5 V
UNIT
25
4.9
mA
μA
mΩ
>1
200
285 kW
RI
kΩ
250
300
300 kW
RI
Resistance from shutdown to GND
kHz
315 kW
RI
V
V
300
kΩ
7.6 Operating Characteristics
TA = 25°C, Gain = 2 V/V, RL = 8 Ω (unless otherwise noted)
PARAMETER
TEST CONDITIONS
THD + N = 10%, f = 1 kHz, RL = 8 Ω
PO
Output power
THD + N = 1%, f = 1 kHz, RL = 8 Ω
THD+N
Total harmonic distortion plus
noise
MIN
TYP MAX
VDD = 5 V
1.45
VDD = 3.6 V
0.73
VDD = 2.5 V
0.33
VDD = 5 V
1.19
VDD = 3.6 V
0.59
VDD = 2.5 V
0.26
VDD = 5 V, PO = 1 W, RL = 8 Ω, f = 1 kHz
0.19%
VDD = 3.6 V, PO = 0.5 W, RL = 8 Ω, f = 1 kHz
0.19%
VDD = 2.5 V, PO = 200 mW, RL = 8 Ω, f = 1 kHz
0.20%
kSVR
Supply ripple rejection ratio
VDD = 3.6 V, Inputs ac-grounded
with Ci = 2 μF
SNR
Signal-to-noise ratio
VDD = 5 V, PO = 1 W, RL = 8 Ω, A-weighted
Vn
Output voltage noise
VDD = 3.6 V, f = 20 Hz to 20 kHz,
Inputs ac-grounded with Ci = 2 μF
No weighting
48
A weighting
36
CMRR
Common mode rejection ratio
VDD = 3.6 V, VIC = 1 VPP
f = 217 Hz
ZI
Input impedance
Start-up time from shutdown
f = 217 Hz,
V(RIPPLE) = 200 mVPP
W
W
–67
dB
97
dB
μVRMS
–63
142
VDD = 3.6 V
UNIT
150
dB
158
1
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kΩ
ms
5
TPA2006D1
SLOS498B – SEPTEMBER 2006 – REVISED SEPTEMBER 2015
www.ti.com
7.7 Typical Characteristics
90
90
VDD = 5 V,
RL = 8 W, 33 mH
80
80
70
VDD = 2.5 V,
RL = 8 W, 33 mH
60
Efficiency - %
Efficiency - %
70
50
40
Class-AB,
VDD = 5 V,
RL = 8 W
30
20
VDD = 4.2 V,
RL = 4 W, 33 mH
60
50
40
30
20
10
10
0
0
0.2
0.4
0.6
0.8
1
0
1.2
Figure 1. Efficiency vs Output Power
Figure 2. Efficiency vs Output Power
0.7
300
Class-AB, VDD = 5 V, RL = 8 W
0.6
250
VDD = 4.2 V,
RL = 4 W, 33 mH
Class-AB,
VDD = 3.6 V,
RL = 8 W
0.5
0.4
Supply Current - mA
PD - Power Dissipation - W
1.5
1
0.5
PO - Output Power - W
0
PO - Output Power - W
0.3
VDD = 3.6 V,
RL = 8 W, 33 mH
0.2
200
150
VDD = 5 V,
RL = 8 W, 33 mH
100
VDD = 3.6 V,
RL = 8 W, 33 mH
50
0.1
VDD = 5 V,
RL = 8 W, 33 mH
0
0
0.2
0.4
0.6
0.8
1
VDD = 2.5 V,
RL = 8 W, 33 mH
0
0
1.2
0.2
0.4
0.6
0.8
1
1.2
PO - Output Power - W
PO - Output Power - W
Figure 3. Power Dissipation vs Output Power
Figure 4. Supply Current vs Output Power
2
I (SD) − Shutdown Current − m A
I(Q) − Quiescent Current − mA
3.8
3.6
3.4
RL = 8 W, 33 mH
3.2
3
2.8
No Load
2.6
2.4
1.5
VDD = 5 V
1
VDD = 3.6 V
VDD = 2.5 V
0.5
2.2
0
2
2.5
3
3.5
4
4.5
5
0
5.5
VDD − Supply Voltage − V
Figure 5. Quiescent Current vs Supply Voltage
6
0.1
0.2
0.3
0.4
Shutdown Voltage − V
0.5
Figure 6. Supply Current vs Shutdown Voltage
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Typical Characteristics (continued)
1.4
1.8
f = 1 kHz,
THD+N = 10%,
Gain = 2 V/V
1.6
1.2
VDD = 5 V
PO - Output Power - W
PO - Output Power - W
1.4
VDD = 5 V
1.2
1
VDD = 4.2 V
0.8
VDD = 3.6 V
0.6
1
VDD = 4.2 V
0.8
VDD = 3.6 V
0.6
0.4
0.4
0.2
0.2
VDD = 2.5 V
VDD = 2.5 V
0
0
4
8
12
16
20
24
28
RL - Load Resistance - W
4
32
Figure 7. Output Power vs Load Resistance
8
12
16
20
24
28
RL - Load Resistance - W
32
Figure 8. Output Power vs Load Resistance
2
1.6
RL = 4 W,
f = 1 kHz,
Gain = 2 V/V
RL = 8 W
f = 1 kHz
Gain = 2 V/V
1.4
1.2
1
PO - Output Power - W
PO - Output Power - W
f = 1 kHz,
THD+N = 1%,
Gain = 2 V/V
THD+N = 10%
0.8
0.6
THD+N = 1%
0.4
1.5
THD+N = 10%
1
THD+N = 1%
0.5
0.2
0
2.5
3
3.5
4
4.5
0
2.5
5
VDD - Supply Voltage - V
20
10
RL = 8 W
f = 1 kHz
5V
3.6 V
2.5 V
1
0.1
0.001
0.01
0.1
1
Power Output − W
10
Figure 11. Total Harmonic Distortion + Noise vs Output
Power
Figure 10. Output Power vs Supply Voltage
THD+N - Total Harmonic Distortion + Noise - %
THD+N − Total Harmonic Distortion + Noise − %
Figure 9. Output Power vs Supply Voltage
3
3.5
4
VDD - Supply Voltage - V
20
10
5
RL = 4 W,
f = 1 kHz,
Gain = 2 V/V
VDD = 2.5 V
2
VDD = 3.6 V
1
VDD = 4.2 V
0.5
0.2
0.01
0.1
PO - Output Power - W
1
2
Figure 12. Total Harmonic Distortion + Noise vs Output
Power
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RL = 8 W
PO = 0.25 W
PO = 0.5 W
1
0.1
PO = 1 W
0.01
20
100
1k
f − Frequency − Hz
10 k 20 k
THD+N − Total Harmonic Distortion + Noise − %
Figure 13. Total Harmonic Distortion + Noise vs Frequency
10
VDD = 2.5 V
PO = 0.2 W
RL = 8 W
1
PO = 0.015 W
0.1
PO = 0.075 W
0.01
0.001
20
100
1k
f − Frequency − Hz
10 k 20 k
THD+N - Total Harmonic Distortion + Noise - %
Figure 15. Total Harmonic Distortion + Noise vs Frequency
10
VDD = 3.6 V,
RL = 4 W,
Gain = 2V/V
1
500 mW
250 mW
850 mW
0.1
0.01
20
100
1k
f - Frequency - Hz
10k 20k
Figure 17. Total Harmonic Distortion + Noise vs Frequency
8
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V
10
VDD = 3.6 V
RL = 8 W
PO = 0.25 W
PO = 0.125 W
1
0.1
PO = 0.5 W
0.01
0.001
20
100
1k
f − Frequency − Hz
10 k 20 k
Figure 14. Total Harmonic Distortion + Noise vs Frequency
THD+N - Total Harmonic Distortion + Noise - %
10
10
VDD = 4.2 V,
RL = 4 W,
Gain = 2V/V
500 mW
1
250 mW
1W
0.1
0.01
20
100
1k
f - Frequency - Hz
10k 20k
Figure 16. Total Harmonic Distortion + Noise vs Frequency
THD+N - Total Harmonic Distortion + Noise - %
THD+N − Total Harmonic Distortion + Noise − %
Typical Characteristics (continued)
10
VDD = 2.5 V,
RL = 4 W,
Gain = 2V/V
200 mW
1
75 mW
375 mW
0.1
0.01
20
100
1k
f - Frequency - Hz
10k 20k
Figure 18. Total Harmonic Distortion + Noise vs Frequency
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THD+N − Total Harmonic Distortion + Noise − %
Typical Characteristics (continued)
10
−30
Supply Ripple Rejection Ratio − dB
f = 1 kHz
PO = 200 mW
VDD = 2.5 V
1
VDD = 5 V
Inputs ac-grounded
CI = 2 mF
RL = 8 W
Gain = 2 V/V
−40
−50
VDD = 2. 5 V
VDD = 3.6 V
−60
−70
−80
VDD = 5 V
VDD = 3.6 V
0.1
0
0.5
1
1.5 2
3
2.5
3.5
4 4.5
−90
5
20
100
VIC − Common Mode Input Voltage − V
1k
10 k 20 k
f − Frequency − Hz
Figure 19. Total Harmonic Distortion + Noise vs Common
Mode Input Voltage
Figure 20. Supply Ripple Rejection Ratio vs Frequency
Sopply Ripple Rejection Ratio − dB
−30
Inputs floating
RL = 8 W
−40
C1 − High
3.6 V
VDD
200 mV/div
C1 − Amp
512 mV
−50
VDD = 5 V
−60
C1 − Duty
12%
−70
VOUT
20 mV/div
VDD = 3.6 V
−80
VDD = 2.5 V
−90
20
100
1k
10 k 20 k
t − Time − 2 ms/div
f − Frequency − Hz
−50
VO − Output Voltage − dBV
−100
0
VDD Shown in Figure 22
CI = 2 mF,
Inputs ac-grounded
Gain = 2V/V
−50
−150
−100
Figure 22. GSM Power Supply Rejection vs Time
0
Sopply Ripple Rejection Ratio − dB
0
V DD − Supply Voltage − dBV
Figure 21. Supply Ripple Rejection Ratio vs Frequency
−10
−20
−30
−40
VDD = 3.6 V
VDD = 2. 5 V
−50
VDD = 5 V
−60
−70
−80
−150
0
400
800
1200
1600
0
2000
0.5
1
1.5
2
2.5
3
3.5 4
4.5 5
DC Common Mode Voltage − V
f − Frequency − Hz
Figure 23. GSM Power Supply Rejection vs Frequency
Figure 24. Supply Ripple Rejection Ratio vs
DC Common Mode Voltage
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CMRR − Common Mode Rejection Ratio − dB
CMRR − Common Mode Rejection Ratio − dB
Typical Characteristics (continued)
−50
VIC = 200 mVPP
RL = 8 W
Gain = 2 V/V
−55
−60
VDD = 3.6 V
−65
−70
−75
20
10 k 20 k
100
1k
f − Frequency − Hz
0
−10
−20
−30
−40
VDD = 3.6 V
VDD = 2.5 V
−50
−60
−70
−80
VDD = 5 V,
Gain = 2
−90
−100
0
1
2
3
4
5
VIC − Common Mode Input Voltage − V
Figure 26. Common-mode Rejection Ratio vs
Common-mode Input Voltage
Figure 25. Common-mode Rejection Ratio vs Frequency
8 Parameter Measurement Information
All parameters are measured according to the conditions described in the Specifications section.
CI
TPA2006D1
RI
IN+
+
Measurement
Output
-
CI
OUT+
Load
RI
INVDD
+
OUT-
30-kHz
Low-Pass
Filter
+
Measurement
Input
-
GND
1 mF
VDD
-
A.
CI is shorted for any common-mode input voltage measurement.
B.
A 33-μH inductor is placed in series with the load resistor to emulate a small speaker for efficiency measurements.
C.
The 30-kHz low-pass filter is required even if the analyzer has an internal low-pass filter. An RC low-pass filter
(100 Ω, 47 nF) is used on each output for the data sheet graphs.
Figure 27. Test Set-up for Graphs
10
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9 Detailed Description
9.1 Overview
The TPA2006D1 device is a high-efficiency, filter-free, Class-D audio amplifier capable of delivering up to 1.45 W
into 8-Ω loads with 5-V power supply. Shutdown control is fully compatible with 1.8-V logic levels.
The fully differential design of this amplifier avoids the usage of bypass capacitors and the improved CMRR
eliminates the usage of input coupling capacitors. This makes the device size a perfect choice for small, portable
applications as only three external components are required.
The advanced modulation used in the TPA2006D1 device PWM output stage eliminates the need for an output
filter.
9.2 Functional Block Diagram
150 kW
150 kW
150 kW
SC
300 kW
150 kW
9.3 Feature Description
9.3.1 Fully Differential Amplifier
The TPA2006D1 device is a fully differential amplifier with differential inputs and outputs. The fully differential
amplifier consists of a differential amplifier and a common-mode amplifier. The differential amplifier ensures that
the amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The
common-mode feedback ensures that the common-mode voltage at the output is biased around VDD/2 regardless
of the common-mode voltage at the input. The fully differential TPA2006D1 device can still be used with a singleended input; however, the TPA2006D1 device must be used with differential inputs when in a noisy environment,
like a wireless handset, to ensure maximum noise rejection.
9.3.1.1 Advantages of Fully Differential Amplifiers
• Input-coupling capacitors not required:
– The fully differential amplifier allows the inputs to be biased at voltage other than mid-supply. For example,
if a codec has a mid-supply lower than the mid-supply of the TPA2006D1 device, the common-mode
feedback circuit will adjust, and the TPA2006D1 device outputs will still be biased at mid-supply of the
TPA2006D1 device. The inputs of the TPA2006D1 device can be biased from 0.5 V to VDD – 0.8 V. If the
inputs are biased outside of that range, input-coupling capacitors are required.
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Feature Description (continued)
•
•
Mid-supply bypass capacitor, C(BYPASS), not required:
– The fully differential amplifier does not require a bypass capacitor. This is because any shift in the
midsupply affects both positive and negative channels equally and cancels at the differential output.
Better RF-immunity:
– GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. The
transmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signal
much better than the typical audio amplifier.
9.3.2 Efficiency and Thermal Information
The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor
for the DRB package is shown in the dissipation rating table. Converting this to θJA:
1
1
o
qJA =
=
0.0218 = 45.9 C/W
Derating Factor
(1)
Given θJA of 45.9°C/W, the maximum allowable junction temperature of 125°C, and the maximum internal
dissipation of 0.2 W (Po = 1.45 W, 8-Ω load, 5-V supply, from Figure 3), the maximum ambient temperature can
be calculated with Equation 2.
o
TAMax = TJMax - qJAPDmax = 125 - 45.9(0.2) = 115.8 C
(2)
Equation 2 shows that the calculated maximum ambient temperature is 115.8°C at maximum power dissipation
with a 5-V supply and 8-Ω a load, see Figure 3. The TPA2006D1 device is designed with thermal protection that
turns the device off when the junction temperature surpasses 150°C to prevent damage to the device.
9.3.3 Eliminating the Output Filter With the TPA2006D1 Device
This section focuses on why the user can eliminate the output filter with the TPA2006D1 device.
9.3.3.1 Effect on Audio
The class-D amplifier outputs a pulse-width modulated (PWM) square wave, which is the sum of the switching
waveform and the amplified input audio signal. The human ear acts as a band-pass filter such that only the
frequencies between approximately 20 Hz and 20 kHz are passed. The switching frequency components are
much greater than 20 kHz, so the only signal heard is the amplified input audio signal.
9.3.3.2 Traditional Class-D Modulation Scheme
The traditional class-D modulation scheme, which is used in the TPA005Dxx family, has a differential output
where each output is 180 degrees out of phase and changes from ground to the supply voltage, VDD. Therefore,
the differential pre-filtered output varies between positive and negative VDD, where filtered 50% duty cycle yields
0 volts across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown
in Figure 28. Note that even at an average of 0 volts across the load (50% duty cycle), the current to the load is
high causing a high loss and thus causing a high supply current.
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Feature Description (continued)
OUT+
OUT+5 V
Differential Voltage
Across Load
0V
-5 V
Current
Figure 28. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms into an
Inductive Load With no Input
9.3.3.3 TPA2006D1 Device Modulation Scheme
The TPA2006D1 device uses a modulation scheme that still has each output switching from 0 to the supply
voltage. However, OUT+ and OUT– are now in phase with each other with no input. The duty cycle of OUT+ is
greater than 50% and OUT– is less than 50% for positive voltages. The duty cycle of OUT+ is less than 50% and
OUT– is greater than 50% for negative voltages. The voltage across the load sits at 0 volts throughout most of
the switching period greatly reducing the switching current, which reduces any I2R losses in the load.
OUT+
OUTDifferential
Voltage
Across
Load
Output = 0 V
+5 V
0V
-5 V
Current
OUT+
OUTDifferential
Voltage
Across
Load
Output > 0 V
+5 V
0V
-5 V
Current
Figure 29. The TPA2006D1 Device Output Voltage and Current Waveforms into an Inductive Load
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Feature Description (continued)
9.3.3.4 Efficiency: Why A Filter is Needed With the Traditional Class-D Modulation Scheme
The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform results
in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is
large for the traditional modulation scheme because the ripple current is proportional to voltage multiplied by the
time at that voltage. The differential voltage swing is 2 × VDD and the time at each voltage is half the period for
the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half cycle for
the next half cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive,
whereas an LC filter is almost purely reactive.
The TPA2006D1 device modulation scheme has little loss in the load without a filter because the pulses are
short and the change in voltage is VDD instead of 2 × VDD. As the output power increases, the pulses widen
making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for
most applications the filter is not needed.
An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow
through the filter instead of the load. The filter has less resistance than the speaker that results in less power
dissipated, which increases efficiency.
9.3.3.5 Effects of Applying a Square Wave into a Speaker
If the amplitude of a square wave is high enough and the frequency of the square wave is within the bandwidth
of the speaker, a square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A
250-kHz switching frequency, however, is not significant because the speaker cone movement is proportional to
1/f2 for frequencies beyond the audio band. Therefore, the amount of cone movement at the switching frequency
is small. However, damage could occur to the speaker if the voice coil is not designed to handle the additional
power. To size the speaker for added power, the ripple current dissipated in the load needs to be calculated by
subtracting the theoretical supplied power, PSUP THEORETICAL, from the actual supply power, PSUP, at maximum
output power, POUT. The switching power dissipated in the speaker is the inverse of the measured efficiency,
ηMEASURED, minus the theoretical efficiency, ηTHEORETICAL.
P
+P
–P
(at max output power)
SPKR
SUP SUP THEORETICAL
(3)
P
P
P
+ SUP – SUP THEORETICAL (at max output power)
SPKR
P
P
OUT
OUT
(4)
ǒ
Ǔ
1
1
(at max output power)
*
OUT h MEASURED h THEORETICAL
R
L
hTHEORETICAL +
(at max output power)
R ) 2r
L
DS(on)
P
SPKR
+P
(5)
(6)
The maximum efficiency of the TPA2006D1 device with a 3.6-V supply and an 8-Ω load is 86% from Equation 6.
Using Equation 5 with the efficiency at maximum power (84%), we see that there is an additional 17 mW
dissipated in the speaker. The added power dissipated in the speaker is not an issue as long as it is taken into
account when choosing the speaker.
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Feature Description (continued)
9.3.3.6 When to Use an Output Filter
Design the TPA2006D1 device without an output filter if the traces from amplifier to speaker are short. The
TPA2006D1 device passed FCC and CE radiated emissions with no shielding with speaker trace wires 100 mm
long or less. Wireless handsets and PDAs are great applications for class-D without a filter.
A ferrite bead filter can often be used if the design is failing radiated emissions without an LC filter, and the
frequency sensitive circuit is greater than 1 MHz. This is good for circuits that just have to pass FCC and CE
because FCC and CE only test radiated emissions greater than 30 MHz. If choosing a ferrite bead, choose one
with high impedance at high frequencies, but low impedance at low frequencies.
Use an LC output filter if there are low frequency (< 1 MHz) EMI sensitive circuits and/or there are long leads
from amplifier to speaker.
Figure 30 and Figure 31 show typical ferrite bead and LC output filters.
Ferrite
Chip Bead
VO+
1 nF
Ferrite
Chip Bead
VO1 nF
Figure 30. Typical Ferrite Chip Bead Filter (Chip Bead Example: NEC/Tokin: N2012ZPS121)
33 mH
VO+
0.47 mF
0.1 mF
33 mH
VO-
0.1 mF
Figure 31. Typical LC Output Filter, Cutoff Frequency of 27 kHz
9.3.4 Thermal and Short-Circuit Protection
The TPA2006D1 device features thermal and short- circuit protection. When the protection circuit is triggered, the
device will enter in shutdown mode, setting the outputs of the device into High Impedance. Thermal protection
turns the device off when the junction temperature surpasses 150°C to prevent damage to the device.
9.4 Device Functional Modes
9.4.1 Summing Input Signals with the TPA2006D1 Device
Most wireless phones or PDAs need to sum signals at the audio power amplifier or just have two signal sources
that need separate gain. The TPA2006D1 device makes it easy to sum signals or use separate signal sources
with different gains. Many phones now use the same speaker for the earpiece and ringer, where the wireless
phone would require a much lower gain for the phone earpiece than for the ringer. PDAs and phones that have
stereo headphones require summing of the right and left channels to output the stereo signal to the mono
speaker.
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Device Functional Modes (continued)
9.4.1.1 Summing Two Differential Input Signals
Two extra resistors are needed for summing differential signals (a total of 5 components). The gain for each input
source can be set independently (see Equation 7 and Equation 8, and Figure 32).
V
V
Gain 1 + O + 2 x 150 kW
V
R
V
I1
I1
(7)
V
V
Gain 2 + O + 2 x 150 kW
V
R
V
I2
I2
(8)
ǒǓ
ǒǓ
If summing left and right inputs with a gain of 1 V/V, use RI1 = RI2 = 300 kΩ.
SHUTDOWN
Filter-Free Class D
Figure 32. Application Schematic With TPA2006D1 Device Summing Two Differential Inputs
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Device Functional Modes (continued)
9.4.1.2 Summing a Differential Input Signal and a Single-Ended Input Signal
Figure 33 shows how to sum a differential input signal and a single-ended input signal. Ground noise can couple
in through IN+ with this method. It is better to use differential inputs. The corner frequency of the single-ended
input is set by CI2, shown in Equation 11. To assure that each input is balanced, the single-ended input must be
driven by a low-impedance source even if the input is not in use
V
V
Gain 1 + O + 2 x 150 kW
V
R
V
I1
I1
(9)
V
V
Gain 2 + O + 2 x 150 kW
V
R
V
I2
I2
(10)
1
C +
I2
2p R f
I2 c2
(11)
ǒǓ
ǒǓ
ǒ
Ǔ
If summing a ring tone and a phone signal, the phone signal must use a differential input signal while the ring
tone might be limited to a single-ended signal.
The high pass corner frequency of the single-ended input is set by CI2. If the desired corner frequency is less
than 20 Hz:
1
C u
I2
ǒ2p 150kW 20HzǓ
(12)
CI2 > 53 nF
(13)
RI1
Differential
Input 1
Single-Ended
Input 2
RI1
CI2 R
I2
To Battery
Internal
Oscillator
CS
IN_
RI2
VDD
PWM
HBridge
VO+
VO-
+
IN+
CI2
SHUTDOWN
GND
Bias
Circuitry
Filter-Free Class D
Figure 33. Application Schematic With TPA2006D1 Device Summing Differential Input and Single-Ended
Input Signals
9.4.1.3 Summing Two Single-Ended Input Signals
Four resistors and three capacitors are needed for summing single-ended input signals. The gain and corner
frequencies (fc1 and fc2) for each input source can be set independently (see Equation 14 through Equation 17,
and Figure 34). Resistor, RP, and capacitor, CP, are needed on the IN+ terminal to match the impedance on the
IN– terminal. The single-ended inputs must be driven by low impedance sources even if one of the inputs is not
outputting an AC signal.
V
V
Gain 1 + O + 2 x 150 kW
V
R
V
I1
I1
(14)
ǒǓ
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Device Functional Modes (continued)
V
Gain 2 +
C
C
I1
I2
+
+
V
O + 2 x 150 kW
R
I2
I2
1
ǒVVǓ
(15)
ǒ2p RI1 f c1Ǔ
(16)
1
ǒ2p RI2 f c2Ǔ
(17)
C +C ) C
P
I1
I2
R
R
I2
R + I1
P
R ) R
I1
I2
ǒ
(18)
Ǔ
(19)
Single-Ended
Input 1
Single-Ended
Input 2
CI1 R
I1
To Battery
CI2 R
I2
Internal
Oscillator
CS
IN_
RP
VDD
PWM
HBridge
VO+
VO-
+
IN+
CP
GND
SHUTDOWN
Bias
Circuitry
Filter-Free Class D
Figure 34. Application Schematic With TPA2006D1 Device Summing Two Single-Ended Inputs
9.4.2 Shutdown Mode
The TPA2006D1 device can be put in shutdown mode when asserting SHUTDOWN pin to a logic LOW. While in
shutdown mode, the device output stage is turned off and set into High Impedance, making the current
consumption very low. The device exits shutdown mode when a HIGH logic level is applied to SHUTDOWN pin.
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
These typical connection diagrams highlight the required external components and system level connections for
proper operation of the device in several popular use cases. Each of these configurations can be realized using
the evaluation modules (EVMs) for the device. These flexible modules allow full evaluation of the device in the
most common modes of operation. Any design variation can be supported by TI through schematic and layout
reviews. Visit http://e2e.ti.com for design assistance and join the audio amplifier discussion forum for additional
information.
10.2 Typical Application
Figure 35 details the recommended component selection and board configurations for the TPA2006D1 device
(see also System Examples).
To Battery
Internal
Oscillator
RI
IN_
Differential
Input
VDD
PWM
HBridge
VO+
VO-
+
RI
CS
IN+
GND
Bias
Circuitry
SHUTDOWN
TPA2006D1
Filter-Free Class D
Figure 35. Typical TPA2006D1 Device Application Schematic With Differential Input for a Wireless Phone
10.2.1 Design Requirements
For typical mono filter-free Class-D audio power amplifier applications, use the parameters listed in Table 1.
Table 1. Design Parameters
PARAMETER
EXAMPLE
Power supply
5V
Shutdown input
Speaker
High > 1.3 V
Low < 0.35 V
8Ω
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10.2.2 Detailed Design Procedure
10.2.2.1 Component Selection
Figure 35 shows the TPA2006D1 device typical schematic with differential inputs and Figure 38 shows the
TPA2006D1 device with differential inputs and input capacitors, and Figure 39 shows the TPA2006D1 device
with single-ended inputs. Differential inputs should be used whenever possible because the single-ended inputs
are much more susceptible to noise.
Table 2. Typical Component Values
REF DES
VALUE
EIA SIZE
MANUFACTURER
RI
150 kΩ (±0.5%)
0402
Panasonic
ERJ2RHD154V
CS
1 μF (+22%, -80%)
0402
Murata
GRP155F50J105Z
3.3 nF (±10%)
0201
Murata
GRP033B10J332K
CI
(1)
(1)
PART NUMBER
CI is only needed for single-ended input or if VICM is not between 0.5 V and VDD – 0.8 V. CI = 3.3 nF
(with RI = 150 kΩ) gives a high-pass corner frequency of 321 Hz.
10.2.2.2 Input Resistors (RI)
The input resistors (RI) set the gain of the amplifier according to Equation 20.
Gain + 2 x 150 kW
R
I
ǒVVǓ
(20)
Resistor matching is important in fully differential amplifiers. The balance of the output on the reference voltage
depends on matched ratios of the resistors. CMRR, PSRR, and cancellation of the second harmonic distortion
diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% tolerance resistors or better to
keep the performance optimized. Matching is more important than overall tolerance. Resistor arrays with 1%
matching can be used with a tolerance greater than 1%.
Place the input resistors close to the TPA2006D1 device to limit noise injection on the high-impedance nodes.
For optimal performance the gain must be set to 2 V/V or lower. Lower gain allows the TPA2006D1 device to
operate at its best and keeps a high voltage at the input making the inputs less susceptible to noise.
10.2.2.3 Decoupling Capacitor (CS)
The TPA2006D1 device is a high-performance class-D audio amplifier that requires adequate power supply
decoupling to ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency
transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor,
typically 1 μF, placed as close as possible to the device VDD lead works best. Placing this decoupling capacitor
close to the device is important for the efficiency of the class-D amplifier, because any resistance or inductance
in the trace between the device and the capacitor can cause a loss in efficiency. For filtering lower-frequency
noise signals, a 10-μF or greater capacitor placed near the audio power amplifier would also help, but it is not
required in most applications because of the high PSRR of this device.
10.2.2.4 Input Capacitors (CI)
The TPA2006D1 device does not require input coupling capacitors if the design uses a differential source that is
biased from 0.5 V to VDD – 0.8 V (shown in Figure 35). If the input signal is not biased within the recommended
common-mode input range, if needing to use the input as a high pass filter (shown in Figure 38), or if using a
single-ended source (shown in Figure 39), input coupling capacitors are required.
The input capacitors and input resistors form a high-pass filter with the corner frequency, fc, determined in
Equation 21.
1
fc +
2p R C
I I
(21)
ǒ
Ǔ
The value of the input capacitor is important to consider as it directly affects the bass (low frequency)
performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so the
corner frequency can be set to block low frequencies in this application.
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Equation 22 is reconfigured to solve for the input coupling capacitance.
1
C +
I
2p R f c
I
ǒ
Ǔ
(22)
If the corner frequency is within the audio band, the capacitors must have a tolerance of ±10% or better, because
any mismatch in capacitance causes an impedance mismatch at the corner frequency and below, and causes
pop. Any capacitor in the audio path should have a rating of X7R or better.
For a flat low-frequency response, use large input coupling capacitors (1 μF). However, in a GSM phone the
ground signal is fluctuating at 217 Hz, but the signal from the codec does not have the same 217-Hz fluctuation.
The difference between the two signals is amplified, sent to the speaker, and heard as a 217-Hz hum.
10.2.3 Application Curves
2
1.6
1.4
1.2
1
PO - Output Power - W
PO - Output Power - W
RL = 4 W,
f = 1 kHz,
Gain = 2 V/V
RL = 8 W
f = 1 kHz
Gain = 2 V/V
THD+N = 10%
0.8
0.6
THD+N = 1%
0.4
1.5
THD+N = 10%
1
THD+N = 1%
0.5
0.2
0
2.5
3
3.5
4
4.5
0
2.5
5
VDD - Supply Voltage - V
Figure 36. Output Power vs Supply Voltage
3
3.5
4
VDD - Supply Voltage - V
Figure 37. Output Power vs Supply Voltage
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10.3 System Examples
To Battery
CI
Differential
Input
Internal
Oscillator
RI
IN_
CI
RI
VDD
PWM
HBridge
CS
VO+
VO-
+
IN+
GND
Bias
Circuitry
SHUTDOWN
TPA2006D1
Filter-Free Class D
Figure 38. TPA2006D1 Device Application Schematic With Differential Input and Input Capacitors
SHUTDOWN
TPA2006D1
Filter-Free Class D
Figure 39. TPA2006D1 Device Application Schematic With Single-Ended Input
11 Power Supply Recommendations
The TPA2006D1 device is designed to operate from an input voltage supply range between 2.5 V and 5.2 V.
Therefore, the output voltage range of power supply Must be within this range and well regulated. The current
capability of upper power should not exceed the maximum current limit of the power switch.
11.1 Power Supply Decoupling Capacitors
The TPA2006D1 device requires adequate power supply decoupling to enure a high-efficiency operation with low
total harmonic distortion(THD).
Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF, within 2 mm of the VDD pin.
This choice of capacitor and placement helps with higher frequency transients, spikes, or digital hash on the line.
In addition to the 0.1-μF ceramic capacitor, is recommended to place a 2.2-µF to 10-µF capacitor on the VDD
supply trace. This larger capacitor acts as a charge reservoir, providing energy faster than the board supply, thus
helping to prevent any droop in the supply voltage.
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12 Layout
12.1 Layout Guidelines
Place all the external components close to the TPA2006D1 device. The input resistors need to be close to the
TPA2006D1 device input pins so noise does not couple on the high impedance nodes between the input
resistors and the input amplifier of the TPA2006D1 device. Placing the decoupling capacitor, CS, close to the
TPA2006D1 device is important for the efficiency of the class-D amplifier. Any resistance or inductance in the
trace between the device and the capacitor can cause a loss in efficiency.
12.2 Layout Example
Decoupling capacitor
placed as close as
possible to the device
SHUTDOWN
1
8
2
7
IN +
3
6
-
4
5
IN
OUT 0.1µF
OUT +
TPA2006D1
Input Resistors
placed as close as
possible to the device
Top Layer Ground Plane
Top Layer Traces
Pad to Top Layer Ground Plane
Thermal Pad
Via to Bottom Ground Plane
Via to Power Supply
Figure 40. TPA2006D1 Device DRB Package Layout Example
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13 Device and Documentation Support
13.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.2 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
24
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Copyright © 2006–2015, Texas Instruments Incorporated
Product Folder Links: TPA2006D1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Aug-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPA2006D1DRBR
ACTIVE
SON
DRB
8
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BTQ
Samples
TPA2006D1DRBRG4
ACTIVE
SON
DRB
8
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BTQ
Samples
TPA2006D1DRBT
ACTIVE
SON
DRB
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
BTQ
Samples
TPA2006D1DRBTG4
ACTIVE
SON
DRB
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
BTQ
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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