TPA2014D1
www.ti.com ............................................................................................................................................................... SLAS559A – MAY 2008 – REVISED JUNE 2008
1.5-W CONSTANT OUTPUT POWER CLASS-D AUDIO AMPLIFIER WITH INTEGRATED
BOOST CONVERTER
FEATURES
1
•
•
•
•
•
•
•
•
•
•
•
DESCRIPTION
High Efficiency Integrated Boost Converter
(Over 90% Efficiency)
1.5-W into an 8-Ω Load from a 3.6-V Supply
Operates from 2.5 V to 5.5 V
Efficient Class-D Prolongs Battery Life
Independent Shutdown for Boost Converter
and Class-D Amplifier
Differential Inputs Reduce RF Common Noise
Built-in INPUT Low Pass Filter Decreases RF
and Out of Band Noise Sensitivity
Synchronized Boost and Class-D Eliminates
Beat Frequencies
Thermal and Short-Circuit Protection
Available in 16-ball WCSP and 20-Lead QFN
Packages
3 Selectable Gain Settings of 2 V/V, 6 V/V, and
10 V/V
The TPA2014D1 is a high efficiency Class-D audio
power amplifier with an integrated boost converter. It
drives up to 1.5 W (10% THD+N) into a 8 Ω speaker
from a 3.6 V supply. With 85% typical efficiency, the
TPA2014D1 helps extend battery life when playing
audio.
The built-in boost converter generates a higher
voltage rail for the Class-D amplifier. This provides a
louder audio output than a stand-alone amplifier
connected directly to the battery. It also maintains a
consistent loudness, regardless of battery voltage.
Additionally, the boost converter can be used to
supply external devices.
The TPA2014D1 has an integrated low pass filter to
improve RF rejection and reduce out-of-band noise,
increasing the signal to noise ratio (SNR). A built-in
PLL synchronizes the boost converter and Class-D
switching frequencies, thus eliminating beat
frequencies and improving audio quality. All outputs
are fully protected against shorts to ground, power
supply, and output-to-output shorts.
APPLICATIONS
•
•
•
•
Cell Phones
PDA
GPS
Portable Electronics
R1
50 kΩ
R2
453 kΩ
22 mF
1 mF
2.2 to 6.2 mH
To Battery
10 mF
VDD
SW VCCFB
VCCOUT
VCCIN
CIN
IN–
Differential
Input
1 mF
VOUT+
IN+
CIN
Gain (VCC/Float/GND)
GPIO
TPA2014D1
VOUT–
GAIN
ShutDown Boost
SDb
ShutDown ClassD
SDd
AGND
PGND
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
TPA2014D1
SLAS559A – MAY 2008 – REVISED JUNE 2008 ............................................................................................................................................................... www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DEVICE INFORMATION
20
VDD
YZH (WCSP) Package
(Top View)
VCCIN
VCCOUT
SW
SW
PGND
RGP (QFN) Package
(Top View)
VCCIN
VCCOUT
SW
PGND
A1
A2
A3
A4
VOUT+
GAIN
VCCFB
VDD
B1
B2
B3
B4
16
15
1
VOUT+
VCCFB
VOUT+
GAIN
VOUT+
VOUT–
PGND
SDd
AGND
AGND
VOUT–
C1
C2
C3
C4
VOUT–
PGND
IN+
IN–
SDb
D1
D2
D3
D4
5
SDd
11
PGND
PGND
IN+
10
IN–
SDb
6
BOOST CONVERTER TERMINAL FUNCTIONS
TERMINAL
NAME
I/O
DESCRIPTION
QFN
WCSP
IN+
8
D2
I
Positive audio input
IN–
7
D3
I
Negative audio input
VOUT+
13, 14, 15
B1
O
Positive audio output
VOUT–
11, 12
C1
O
Negative audio output
SDb
6
D4
I
Shutdown terminal for the Boost Converter
SDd
5
C3
I
Shutdown terminal for the Class D Amplifier
SW
18, 19
A3
–
Boost and rectifying switch input
VCCOUT
17
A2
–
Boost converter output - connect to VCCIN
GAIN
3
B2
I
Gain selection pin
VCCIN
16
A1
–
Class-D audio power amplifier voltage supply - connect to VCCOUT
VCCFB
2
B3
I
Voltage feedback
VDD
1
B4
–
Supply voltage
AGND
4
C4
–
Analog ground - connect all GND pins together
PGND
9, 10, 20
D1, C2, A4
–
Power ground - connect all GND pins together
Thermal
Pad
Die Pad
N/A
P
Solder the thermal pad on the bottom of the QFN package to the GND plane of the PCB.
It is required for mechanical stability and will enhance thermal performance.
2
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Functional Block Diagram
SW
BG Control
VCCOUT
AntiRinging
VDD
VCCOUT
Vmax
Control
Gate
Control
PGND
VCCFB
Regulator
SDb
SDd
Biases, Control,
and
References
Vref
Internal
Oscillator
AGND
VCCIN
GAIN
IN–
IN+
PWM
and
Level
Shifter
Res.
Array
VOUT+
H-Bridge
VOUT–
PGND
AGND
AGND
PGND
Table 1. BOOST CONVERTER MODE CONDITION
CASE
OUTPUT CURRENT
VDD < VCC
Low
Continuous (fixed frequency)
MODE OF OPERATION
VDD < VCC
High
Continuous (fixed frequency)
VDD ≥ VCC
Low
Discontinuous (variable frequency)
VDD ≥ VCC
High
Discontinuous (variable frequency)
Table 2. DEVICE CONFIGURATION
SDb
SDd
Boost
Converter
Class D
Amplifier
low
low
OFF
OFF
Device is in shutdown mode Iq ≤ 1 µA
low
high
OFF
ON
Boost converter is off. Class-D Audio Power Amplifier (APA) can be driven by an
external pass transistor connected to the battery.
high
low
ON
OFF
Class-D APA is off. Boost Converter is on and can be used to drive an external device.
high
high
ON
ON
Boost converter and Class-D APA are on. Normal operation. Boost converter can be
used to drive an external device in parallel to the Class-D APA within the limits of the
boost converter output current.
Comments
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ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
VDD
Supply voltage
VI
Input voltage, Vi: SDb, SDd, IN+, IN–, VCCFB
(1)
Continuous total power dissipation
VALUE
UNIT
–0.3 to 6
V
–0.3 to VDD + 0.3
V
See Dissipation Rating Table
TA
Operating free-air temperature range
–40 to 85
°C
TJ
Operating junction temperature range
–40 to 150
°C
Tstg
Storage temperature range
–65 to 150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATINGS
(1)
PACKAGE
TA ≤ 25°C
DERATING FACTOR (1)
TA = 70°C
TA = 85°C
16 ball WCSP
1.5 W
12.4 mW/°C
1W
0.8 W
20 pin QFN
2.5 W
20.1 mW/°C
1.6 W
1.3 W
Derating factor measured with JEDEC High K board.
AVAILABLE OPTIONS
(1)
(2)
TA
PACKAGED DEVICES (1)
PART NUMBER
SYMBOL
–40°C TO 85°C
16-ball, 2.275 mm × 2.275 mm WCSP
(+0.01/-0.09 mm tolerance)
TPA2014D1YZH
CEJ
20-pin, 4 mm × 4 mm QFN
TPA2014D1RGP (2)
CEK
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
The RGP package is only available taped and reeled. To order, add suffix R to the end of the part number for a reel of 3000 (e.g.,
TPA2014D1RGPR).
RECOMMENDED OPERATING CONDITIONS
VDD
Supply voltage
VIH
High-level input voltage
SDb, SDd
VIL
Low-level input voltage
SDb, SDd
| IIH |
High-level input current
SDb = SDd = 5.8 V, VDD = 5.5 V
| IIL|
Low-level input current
SDb = SDd = -0.3 V, VDD = 5.5 V
TA
Operating free-air temperature
4
MIN
MAX
2.5
5.5
1.3
–40
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UNIT
V
V
0.35
V
1
µA
20
µA
85
°C
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DC CHARACTERISTICS
TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
Class-D audio power amplifier
voltage supply range, VCCIN
VCC
ISD
Shutdown quiescent current
TYP
3
MAX
5.5
SDd = SDb = 0 V, VDD = 2.5 V, RL = 8 Ω
0.04
1.5
SDd = SDb = 0 V, VDD = 3.6 V, RL = 8 Ω
0.04
1.5
SDd = SDb = 0 V, VDD = 4.5 V, RL = 8 Ω
0.02
1.5
SDd = SDb = 0.35 V, VDD = 2.5 V, RL = 8 Ω
0.03
1.5
SDd = SDb = 0.35 V, VDD = 3.6 V, RL = 8 Ω
0.03
1.5
SDd = SDb = 0.35 V, VDD = 4.5 V, RL = 8 Ω
0.02
1.5
IDD
Boost converter quiescent
current
SDd = 0 V, SDb = 1.3 V, VDD = 3.6 V, VCC = 5.5 V,
No Load, No Filter
1.3
ICC
Class D amplifier quiescent
current
VDD = 3.6, Vcc = 5.5 V, No Load, No Filter
4.3
6
VDD = 4.5, Vcc = 5.5 V, No Load, No Filter
3.6
6
SDd = SDb = 1.3V, VDD = 3.6, Vcc = 5.5 V,
No Load, No Filter
16.5
23
IDD
Boost converter and audio
power amplifier quiescent
current, Class D (1)
SDd = SDb = 1.3V, VDD = 4.5, Vcc = 5.5 V,
No Load, No Filter
11
18.5
f
UVLO
GAIN
PORD
(1)
UNIT
V
µA
mA
mA
mA
Boost converter switching
frequency
500
600
700
kHz
Class D switching frequency
250
300
350
kHz
1.7
V
0
0.35
V
0.8
1
V
Under voltage lockout
Gain input low level
Gain = 2 V/V (6dB)
Gain input mid level
Gain = 6 V/V (15.5 dB) (floating input)
Gain input high level
Gain = 10 V/V (20 dB)
Class D Power on reset ON
threshold
0.7
1.35
V
2.8
V
IDD is calculated using IDD = (ICC× VCC)/(VDD×η), where ICC is the class D amplifier quiescent current; η = 40%, which is the boost
converter efficiency when class D amplifier has no load. To achieve the minimal 40% η, it is recommended to use the suggested
inductors in table 4 and to follow the layout guidelines.
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BOOST CONVERTER DC CHARACTERISTICS
TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
Output voltage range
VFB
Feedback voltage
IOL
Output current limit, Boost_max
750
mA
RON_PB
PMOS switch resistance
220
mΩ
RON_NB
NMOS resistance
170
mΩ
IL
3
UNIT
VCC
490
500
5.5
V
510
mV
Line regulation
No Load, 1.8 V < VDD < 5.2 V,
VCC = 5.5 V
3
mV/V
Load regulation
VDD = 3.6 V, 0 < IL < 500 mA,
VCC = 5.5 V
30
mV/A
Start up current limit, Boost
0.4×IBoost
mA
CLASS D AMPLIFIER DC CHARACTERISTICS
TA = 25°C (unless otherwise noted)
PARAMETER
CMR
TEST CONDITIONS
Input common mode range
CMRR
Input common mode rejection
VOO
Output offset voltage
Class-D
MIN
RDS(on)
RDS(on)
AV
Input Impedance
2.2
Vin = ±100 mV, VDD = 2.5 V, VCC = 3.6 V, RL = 8 Ω
0.5
2.8
Vin = ±100 mV, VDD = 3.6 V, VCC = 5.5 V, RL = 8 Ω
0.5
4.7
RL = 8 Ω, Vicm = 0.5 and Vicm = VCC – 0.8, differential
inputs shorted
–75
OUTN High-side FET On-state
series resistance
UNIT
V
dB
VCC = 3.6 V, Av = 2 V/V, IN+ = IN– = Vref, RL = 8 Ω
1
6
VCC= 3.6 V, Av = 6 V/V, IN+ = IN– = Vref, RL = 8 Ω
1
6
VCC= 3.6 V, Av = 10 V/V, IN+ = IN– = Vref, RL = 8 Ω
1
6
VCC = 5.5 V, Av = 2 V/V, IN+ = IN– = Vref, RL = 8 Ω
1
6
mV
32
Gain = 6 V/V (15.5 dB)
15
Gain = 10 V/V (20 dB)
9.5
OUTP High-side FET On-state
series resistance
OUTP Low-side FET On-state
series resistance
MAX
0.5
Gain = 2 V/V (6 dB)
Rin
TYP
Vin = ±100 mV, VDD = 2.5 V, VCC = 3 V, RL = 8 Ω
kΩ
0.36
0.36
Ω
IOUTx = –300 mA; VCC = 3.6 V
0.36
OUTN Low-side FET On-state
series resistance
0.36
Low Gain
GAIN ≤ 0.35 V
1.8
2
2.2
V/V
Mid Gain
GAIN = 0.8 V
5.7
6
6.3
V/V
High Gain
GAIN ≥ 1.35 V
9.5
10
10.5
V/V
AC CHARACTERISTICS
TA = 25°C, VDD = 3.6V, RL = 8 Ω + 33 µH, L = 6.2 µH (unless otherwise noted)
PARAMETER
tSTART
η
Start up time
Efficiency
Thermal Shutdown
6
TEST CONDITIONS
2.5 V ≤ VDD ≤ 5.5 V, CIN ≤ 1 µF
MIN
TYP
7.5
THD+N = 1%, VCC = 5 V, VDD = 3.6 V,
Pout = 1.2 W, Cboost= 47µF
85%
THD+N = 1%, VCC = 5 V, VDD = 4.2 V,
Pout = 1.2 W
87.5%
Threshold
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150
MAX
UNIT
ms
°C
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CLASS D AMPLIFIER AC CHARACTERISTICS
TA = 25°C, VDD = 3.6V, RL = 8 Ω + 33 µH, L = 6.2 µH, VCC = 5 V, Gain = 2 V/V(unless otherwise noted)
PARAMETER
TEST CONDITIONS
KSVR
Class-D
Output referred power supply
rejection ratio
THD+N
Class-D
Total harmonic distortion + noise
Vn
Class-D
PO
MIN
VDD = 3.6 V, VCC = 5, 200 mVPP ripple, f = 217 Hz
TYP
–91
f = 1 kHz, Po = 1.2 W, VCC = 5 V
1%
f = 1 kHz, Po = 1.5 W, VCC = 5 V
10%
f = 1 kHz, Po = 1 W, VCC = 5 V
0.1%
Output integrated noise floor
Av = 6 dB (2V/V)
31
Output integrated noise floor
A-weighted
Av = 6 dB (2V/V)
23
THD+N = 10%, VCC = 5 V, VDD = 3.6V ,
1.5
THD+N = 1%, VCC = 5 V, VDD = 3.6V ,
1.2
Maximum output power
THD+N = 0.1%, VCC = 5 V, VDD = 3.6V ,
MAX
UNIT
dB
µVrms
W
1
TEST SET-UP FOR GRAPHS
TPA2014D1
CI
+
Measurement
Output
–
IN+
OUT+
Load
CI
IN
VDD
+
OUT–
30 kHz
Low-Pass
Filter
+
Measurement
Input
–
GND
1 mF
VDD
–
(1)
CI was shorted for any common-mode input voltage measurement. All other measurements were taken with a 1-µF CI
(unless otherwise noted).
(2)
A 33-µH inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements.
(3)
The 30-kHz low-pass filter is required, even if the analyzer has an internal low-pass filter. An RC low-pass filter (1-kΩ,
4.7-nF) is used on each output for the data sheet graphs.
(4)
L = 6.2 µH is used for the boost converter unless otherwise noted.
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TYPICAL CHARACTERISTICS
TOTAL EFFICIENCY
vs
OUTPUT POWER
OUTPUT POWER
vs
SUPPLY VOLTAGE
2
100
Gain = 2 V/V,
1.8 RL = 8W + 33 mH,
VCC = 5 V,
1.6 THD+N = 1%
VDD = 4.2 V
90
80
VDD = 3.6 V
VDD = 2.5 V
PD - Output Power - W
Efficiency - %
70
60
50
40
30
Gain = 2 V/V,
RL = 8W + 33 mH,
VCC = 5 V
20
10
0.5
1
PD - Output Power - W
0.6
3.5
4
VDD - Supply Voltage - V
Figure 1.
Figure 2.
OUTPUT POWER
vs
SUPPLY VOLTAGE
TOTAL POWER DISSIPATION
vs
OUTPUT POWER
3
5
Gain = 2 V/V,
RL = 8W + 33 mH,
VCC = 5 V
0.45
L = 4.7 mH
1.2
L = 3.3 mH
1
L = 2.2 mH
0.6
0.4
0.4
0.35
0.3
VDD = 3.6 V
0.25
VDD = 2.5 V
0.2
0.15
VDD = 4.2 V
0.1
0.05
0.2
0
3
3.5
4
VDD - Supply Voltage - V
4.5
5
0
Figure 3.
8
4.5
0.5
Gain = 2 V/V,
RL = 8W + 33 mH,
VCC = 5 V,
THD+N = 10%
1.4
0
2.5
L = 3.3 mH
L = 2.2 mH
0
2.5
1.5
L = 6.2 mH
0.8
1
0.8
PO - Output Power - W
PD - Total Power Dissipation - W
1.6
1.2
0.2
2
1.8
1.4
0.4
0
0
L = 4.7 mH
L = 6.2 mH
0.5
1
PO - Output Power - W
1.5
Figure 4.
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TYPICAL CHARACTERISTICS (continued)
TOTAL SUPPLY CURRENT
vs
OUTPUT POWER
OUTPUT POWER
vs
LOAD
0.5
2
0.45
1.8
0.4
VDD = 2.5 V
0.3
0.25
0.2
VDD = 4.2 V
0.15
1.4
1.2
THD = 10%
1
0.8
0.6
THD = 1%
0.1
Gain = 2 V/V,
RL = 8W + 33 mH,
VCC = 5 V
0.05
0.4
0.2
0
0
0
0.5
1
PO - Output Power - W
1.5
8
28
32
TOTAL HARMONIC DISTORTION + NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
THD+N - Total Harmonic Distortion + Noise - %
VDD = 4.2 V
VDD = 3.6 V
VDD = 2.5 V
0.1
0.01
0.01
18
23
RL - Load Resistance - W
Figure 6.
Gain = 2 V/V,
RL = 8W + 33 mH,
VCC = 5 V
1
13
Figure 5.
10
THD+N - Total Harmonic Distortion + Noise - %
Gain = 2 V/V,
VCC = 5 V,
VDD = 3.6 V,
f = 1 kHz
1.6
0.35
PO - Output Power - W
IDD - Total Supply Current - A
VDD = 3.6 V
0.1
PO - Output Power - W
1
3
10
1
Gain = 2 V/V,
RL = 8W + 33 mH,
VCC = 5 V,
VDD = 2.5 V
PO = 0.4 W
PO = 0.025 W
0.1
PO = 0.125 W
0.01
0.001
20
Figure 7.
100
1k
f - Frequency - Hz
10k
20k
Figure 8.
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TYPICAL CHARACTERISTICS (continued)
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
0
1
Gain = 2 V/V,
RL = 8W + 33 mH,
VCC = 5 V,
VDD = 3.6 V
PSRR - Power Supply Rejection Ratio - dB
THD+N - Total Harmonic Distortion + Noise - %
10
PO = 0.8 W
PO = 0.25 W
0.1
PO = 0.05 W
0.01
0.001
20
100
1k
f - Frequency - Hz
10k
20k
-20
-40
VDD = 3.6 V
-60
VDD = 2.5 V
-80
VDD = 4.2 V
-100
-120
20
100
Figure 10.
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
BOOST EFFICIENCY
vs
OUTPUT CURRENT
10k
20k
100
Gain = 2 V/V,
RL = 8W + 33 mH,
VCC = 5 V
-10
-20
95
VCC = 5 V
90
VDD = 4.2 V
-30
85
Efficiency -%
-40
-50
-60
VDD = 3.6 V
VDD = 2.5 V
80
65
60
55
VDD = 4.2 V
100
1k
VDD = 2.5 V
70
-80
-90
VDD = 3.6 V
75
-70
-100
20
10k
20k
50
0.01
f - Frequency - Hz
Figure 11.
10
1k
f - Frequency - Hz
Figure 9.
0
CMRR - Common Mode Rejection Ratio - dB
Gain = 2 V/V,
RL = 8W,
VCC = 5 V
0.1
IO - Output Current - A
1
Figure 12.
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TYPICAL CHARACTERISTICS (continued)
BOOST EFFICIENCY
vs
SUPPLY VOLTAGE
MAXIMUM CONTINUOUS OUTPUT CURRENT
vs
SUPPLY VOLTAGE (BOOST)
100
0.7
VCC = 5 V
Load Current = -0.25 A
VCC = 5 V
95
IOM - Maximum Output Current - A
0.6
90
Load Current = -0.05 A
Efficiency - %
85
80
75
70
65
60
Max Output Current
0.5
0.4
0.3
0.2
0.1
55
50
2.5
3
3.5
VDD - Supply Voltage - V
0
2.5
4
3
3.5
4
VDD - Supply Voltage - V
Figure 13.
Figure 14.
Start-Up Time
6
VCC
5
V - Voltage -V
4
SDZb/SDZd
3
2
Output
1
0
-1
-2
0
VCC = 5 V,
VDD = 3.6 V,
L = 6.2 mH
0.005
0.01
t - Time - s
0.015
0.02
Figure 15.
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TPA2014D1
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APPLICATION INFORMATION
FULLY DIFFERENTIAL AMPLIFIER
The TPA2014D1 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier
consists of a differential amplifier with common-mode feedback. The differential amplifier ensures that the
amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The
common-mode feedback ensures that the common-mode voltage at the output is biased around VCC/2 regardless
of the common-mode voltage at the input. The fully differential TPA2014D1 can still be used with a single-ended
input; however, the TPA2014D1 should be used with differential inputs when in a noisy environment, like a
wireless handset, to ensure maximum noise rejection.
Advantages of Fully Differential Amplifiers
• Input-coupling capacitors not required:
– The fully differential amplifier allows the inputs to be biased at voltage other than mid-supply. The inputs of
the TPA2014D1 can be biased anywhere within the common mode input voltage range listed in the
Recommended Operating Conditions table. If the inputs are biased outside of that range, input-coupling
capacitors are required.
• Midsupply bypass capacitor, C(BYPASS), not required:
– The fully differential amplifier does not require a bypass capacitor. Any shift in the midsupply affects both
positive and negative channels equally and cancels at the differential output.
• Better RF-immunity:
– GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. The
transmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signal
better than the typical audio amplifier.
BOOST CONVERTER
The TPA2014D1 consists of a boost converter and a Class-D amplifier. The boost converter takes a low supply
voltage, VDD, and increases it to a higher output voltage, VCC. VCC is the supply voltage for the Class-D amplifier.
The two main passive components necessary for the boost converter are the boost inductor and the boost
capacitor. The boost inductor stores current, and the boost capacitor stores charge. As the Class-D amplifier
depletes the charge in the boost capacitor, the boost inductor charges it back up with the stored current. The
cycle of charge/discharge occurs at a frequency of fboost.
The TPA2014D1 allows a range of VCC voltages, including setting VCC lower than VDD.
Boost Terms
The following is a list of terms and definitions used in the boost equations found later in this document.
C
Minimum boost capacitance required for a given ripple voltage on VCC.
L
Boost inductor
fboost
Switching frequency of the boost converter.
ICC
Current pulled by the Class-D amplifier from the boost converter.
IL
Average current through the boost inductor.
R1 and R2
Resistors used to set the boost voltage.
VCC
Boost voltage. Generated by the boost converter. Voltage supply for the Class-D
amplifier.
VDD
Supply voltage to the IC.
ΔIL
Ripple current through the inductor.
ΔV
Ripple voltage on VCC due to capacitance.
12
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SETTING THE BOOST VOLTAGE
Use Equation 1 to determine the value of R1 for a given VCC. The maximum recommended value for VCC is
5.5 V. The typical value of the VCCFB pin is 500 mV. The current through the resistor divider should be about 100
times greater than the current into the VCCFB pin, typically 0.01 µA. Based on those two values, the
recommended value of R2 is 500 kΩ. VCC must be greater than 3 V and less than or equal to 5.5 V.
æ 0.5 ´ (R1 + R2) ö
VCC = ç
÷
R1
è
ø
(1)
INDUCTOR SELECTION
SURFACE MOUNT INDUCTORS
Working inductance decreases as inductor current increases. If the drop in working inductance is severe enough,
it may cause the boost converter to become unstable, or cause the TPA2014D1 to reach its current limit at a
lower output power than expected. Inductor vendors specify currents at which inductor values decrease by a
specific percentage. This can vary by 10% to 35%. Inductance is also affected by dc current and temperature.
TPA2014D1 INDUCTOR EQUATIONS
Inductor current rating is determined by the requirements of the load. The inductance is determined by two
factors: the minimum value required for stability and the maximum ripple current permitted in the application.
Use Equation 2 to determine the required current rating. Equation 2 shows the approximate relationship between
the average inductor current, IL, to the load current, load voltage, and input voltage (ICC, VCC, and VDD,
respectively). Insert ICC, VCC, and VDD into Equation 2 to solve for IL. The inductor must maintain at least 90% of
its initial inductance value at this current.
æ
ö
VCC
IL = ICC ´ ç
÷
è VDD ´ 0.8 ø
(2)
The minimum working inductance is 2.2 µH. A lower value may cause instability.
Ripple current, ΔIL, is peak-to-peak variation in inductor current. Smaller ripple current reduces core losses in the
inductor as well as the potential for EMI. Use Equation 3 to determine the value of the inductor, L. Equation 3
shows the relationship between inductance L, VDD, VCC, the switching frequency, fboost, and ΔIL. Insert the
maximum acceptable ripple current into Equation 3 to solve for L.
´ (VCC - VDD )
V
L = DD
DIL ´ fboost ´ VCC
(3)
ΔIL is inversely proportional to L. Minimize ΔIL as much as is necessary for a specific application. Increase the
inductance to reduce the ripple current. Note that making the inductance too large will prevent the boost
converter from responding to fast load changes properly. Typical inductor values for the TPA2014D1 are 4.7 µH
to 6.8 µH.
Select an inductor with a small dc resistance, DCR. DCR reduces the output power due to the voltage drop
across the inductor.
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CAPACITOR SELECTION
SURFACE MOUNT CAPACITORS
Temperature and applied dc voltage influence the actual capacitance of high-K materials.
Table 3 shows the relationship between the different types of high-K materials and their associated tolerances,
temperature coefficients, and temperature ranges. Notice that a capacitor made with X5R material can lose up to
15% of its capacitance within its working temperature range.
High-K material is very sensitive to applied dc voltage. X5R capacitors can have losses ranging from 15 to 45%
of their initial capacitance with only half of their dc rated voltage applied. For example, if 5 Vdc is applied to a 10
V, 1 µF X5R capacitor, the measured capacitance at that point may show 0.85 µF, 0.55 µF, or somewhere in
between. Y5V capacitors have losses that can reach or exceed 50% to 75% of their rated value.
In an application, the working capacitance of components made with high-K materials is generally lower than
nominal capacitance. A worst case result with a typical X5R material might be –10% tolerance, –15%
temperature effect, and –45% dc voltage effect at 50% of the rated voltage. This particular case results in a
working capacitance of 42% (0.9 × 0.85 × 0.55) of the nominal value.
Select high-K ceramic capacitors according to the following rules:
1. Use capacitors made of materials with temperature coefficients of X5R, X7R, or better.
2. Use capacitors with dc voltage ratings of at least twice the application voltage. Use minimum 10 V capacitors
for the TPA2014D1.
3. Choose a capacitance value at least twice the nominal value calculated for the application. Multiply the
nominal value by a factor of 2 for safety. If a 10 µF capacitor is required, use 20 µF.
The preceding rules and recommendations apply to capacitors used in connection with the TPA2014D1. The
TPA2014D1 cannot meet its performance specifications if the rules and recommendations are not followed.
Table 3. Typical Tolerance and Temperature Coefficient of Capacitance by Material
14
Material
COG/NPO
X7R
X5R
Typical Tolerance
±5%
±10%
80/–20%
Temperature Coefficient
±30ppm
±15%
22/–82%
Temperature Range, °C
–55/125°C
–55/125°C
-30/85°C
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TPA2014D1 CAPACITOR EQUATIONS
The value of the boost capacitor is determined by the minimum value of working capacitance required for stability
and the maximum voltage ripple allowed on VCC in the application. The minimum value of working capacitance is
10 µF. Do not use any component with a working capacitance less than 10 µF.
For X5R or X7R ceramic capacitors, Equation 4 shows the relationship between the boost capacitance, C, to
load current, load voltage, ripple voltage, input voltage, and switching frequency (ICC, VCC, ΔV, VDD, fboost
respectively). Insert the maximum allowed ripple voltage into Equation 4 to solve for C. A factor of 2 is included
to implement the rules and specifications listed earlier.
C=2 ´
ICC ´
(VCC
- VDD )
DV ´ fboost ´ VCC
(4)
For aluminum or tantalum capacitors, Equation 5 shows the relationship between he boost capacitance, C, to
load current, load voltage, ripple voltage, input voltage, and switching frequency (ICC, VCC, ΔV, VDD, fboost
respectively). Insert the maximum allowed ripple voltage into Equation 5 to solve for C. Solve this equation
assuming ESR is zero.
C=
ICC ´
(VCC
- VDD )
DV ´ fboost ´ VCC
(5)
Capacitance of aluminum and tantalum capacitors is normally not sensitive to applied voltage so there is no
factor of 2 included in Equation 5. However, the ESR in aluminum and tantalum capacitors can be significant.
Choose an aluminum or tantalum capacitor with ESR around 30 mΩ. For best performance using of tantalum
capacitor, use at least a 10 V rating. Note that tantalum capacitors must generally be used at voltages of half
their ratings or less.
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RECOMMENDED INDUCTOR AND CAPACITOR VALUES BY APPLICATION
Use Table 4 as a guide for determining the proper inductor and capacitor values.
Table 4. Recommended Values
Class-D
Output
Power
(W) (1)
Class-D
Load
(Ω)
Minimum
VDD
(V)
Required
VCC
(V)
Max IL
(A)
L
(µH)
Inductor Vendor
Part Numbers
Max
ΔV
(mVPP)
C (2)
(µF)
3.3
1
8
3
4.3
0.70
Toko DE2812C
Coilcraft DO3314
Murata LQH3NPN3R3NG0
10
Kemet C1206C106K8PACTU
Murata GRM32ER61A106KA01B
Taiyo Yuden LMK316BJ106ML-T
30
4.7
1.2
(1)
(2)
8
3
5.0
0.9
Murata LQH43PN4R7NR0
Toko DE4514C
Coilcraft LPS4018-472
Capacitor Vendor
Part Numbers
22
30
Murata GRM32ER71A226KE20L
Taiyo Yuden LMK316BJ226ML-T
All power levels are calculated at 1% THD unless otherwise noted
All values listed are for ceramic capacitors. The correction factor of 2 is included in the values.
CLASS-D REQUIREMENTS
DECOUPLING CAPACITORS
The TPA2014D1 is a high-performance Class-D audio amplifier that requires adequate power supply decoupling
to ensure the efficiency is high and total harmonic distortion (THD) is low. Place a low
equivalent-series-resistance (ESR) ceramic capacitor, typically 1 µF as close as possible to the device VDD lead.
This choice of capacitor and placement helps with higher frequency transients, spikes, or digital hash on the line.
Additionally, placing this decoupling capacitor close to the TPA2014D1 is important for the efficiency of the
Class-D amplifier, because any resistance or inductance in the trace between the device and the capacitor can
cause a loss in efficiency. Place a capacitor of 10 µF or greater between the power supply and the boost
inductor. The capacitor filters out high frequency noise. More importantly, it acts as a charge reservoir, providing
energy more quickly than the board supply, thus helping to prevent any droop.
INPUT CAPACITORS
The TPA2014D1 does not require input coupling capacitors if the design uses a differential source that is biased
within the common mode input range. Use input coupling capacitors if the input signal is not biased within the
recommended common-mode input range, if high pass filtering is needed, or if using a single-ended source.
The input capacitors and input resistors form a high-pass filter with the corner frequency, fc, determined in
Equation 6.
1
fc =
(2 ´ p ´ RICI )
(6)
The value of the input capacitor is important because it directly affects the bass (low frequency) performance of
the circuit. Speakers in wireless phones does not usually respond well to low frequencies, so the corner
frequency can be set to block low frequencies in this application. Not using input capacitors can increase output
offset.
Use Equation 7 to find the required the input coupling capacitance.
1
CI =
(2 ´ p ´ fc ´ RI )
(7)
Any mismatch in capacitance between the two inputs will cause a mismatch in the corner frequencies. Choose
capacitors with a tolerance of ±10% or better.
16
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FILTER FREE OPERATION AND FERRITE BEAD FILTERS
A ferrite bead filter is often used if the design is failing radiated emissions without an LC filter and the frequency
sensitive circuit is greater than 1 MHz. This filter functions well for circuits that just have to pass FCC and CE
because FCC and CE only test radiated emissions greater than 30 MHz. When choosing a ferrite bead, choose
one with high impedance at high frequencies, and a low impedance at low frequencies. In addition, select a
ferrite bead with adequate current rating to prevent distortion of the output signal.
Use an LC output filter if there are low frequency (< 1 MHz) EMI sensitive circuits and/or there are long leads
from amplifier to speaker.
Figure 16 shows a typical ferrite bead output filters.
Ferrite
Chip Bead
OUTP
1 nF
Ferrite
Chip Bead
OUTN
1 nF
Figure 16. Typical Ferrite Chip Bead Filter
Suggested Chip Ferrite Bead
Load
Vendor
Part Number
Size
8Ω
Murata
BLM18EG121SN1
0603
OPERATION WITH DACs AND CODECs
When using switching amplifiers with CODECs and DACs, there may be an increase in the output noise floor
from the audio amplifier. This occurs when mixing of the output frequencies of the CODEC/DAC with the
switching frequencies of the audio amplifier input stage. The noise increase is solved by placing a low-pass filter
between the CODEC/DAC and audio amplifier. This filters off the high frequencies that cause the problem and
allow proper performance.
The TPA2014D1 has a two pole low pass filter at the inputs. The cutoff frequency of the filter is set to
approximately 100kHz. The integrated low pass filter of the TPA2014D1 eliminates the need for additional
external filtering components. A properly designed additional low pass filter may be added without altering the
performance of the device.
BYPASSING THE BOOST CONVERTER
Bypass the boost converter to drive the Class-D amplifier directly from the battery. Place a Shottky diode
between the SW pin and the VCCIN pin. Select a diode that has an average forward current rating of at least 1A,
reverse breakdown voltage of 10 V or greater, and a forward voltage as small as possible. See Figure 17 for an
example of a circuit designed to bypass the boost converter.
Do not configure the circuit to bypass the boost converter if VDD is higher than VCC when the boost converter is
enabled (SDb ≥ 1.3 V); VDD must be lower than VCC for proper operation. VDD may be set to any voltage within
the recommended operating range when the boost converter is disabled (SDb ≤ 0.3V).
Place a logic high on SDb to place the TPA2014D1 in boost mode. Place a logic low on SDb to place the
TPA2014D1 in bypass mode.
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Toshiba CRS 06
Schottky Diode
R1
50 kΩ
R2
453 kΩ
Toko
1098AS-4R7M
To Battery
22 mF
1 mF
4.7 mH
22 mF
VDD
SW VCCFB
VCCOUT
VCCIN
CIN
IN–
Left
Channel
Input
1 mF
VOUT+
IN+
CIN
TPA2014D1
VOUT–
GAIN
GND = Bypass
VDD = Boost Mode
SDb
GPIO
SDd
AGND
PGND
Figure 17. Bypass Circuit
EFFICIENCY AND THERMAL INFORMATION
The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factors
for the YZH and RGP packages are shown in the dissipation rating table. Apply the same principles to both
packages. Using the YZH package, and converting this to θJA:
1
1
qJA =
=
= 80.64°C/W
Derating Factor
0.0124
(8)
Given θJA of 80.64°C/W, the maximum allowable junction temperature of 150°C, and the maximum internal
dissipation of 0.193 W (VDD = 3.6 V, PO = 1.2 W), the maximum ambient temperature is calculated with the
following equation:
TA Max = TJMax - qJA PDmax = 150 - 80.64 (0.193) = 134°C
(9)
Equation 9 shows that the calculated maximum ambient temperature is 134°C at maximum power dissipation
under the above conditions. The TPA2014D1 is designed with thermal protection that turns the device off when
the junction temperature surpasses 150°C to prevent damage to the IC. Also, using speakers more resistive than
8-Ω dramatically increases the thermal performance by reducing the output current and increasing the efficiency
of the amplifier.
BOARD LAYOUT
In making the pad size for the WCSP balls, use nonsolder mask defined (NSMD) land. With this method, the
solder mask opening is made larger than the desired land area, and the opening size is defined by the copper
pad width. Figure 18 and Table 5 show the appropriate diameters for a WCSP layout.
18
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Copper Trace Width
Solder Pad Width
Solder Mask Opening
Solder Mask Thickness
Copper Trace Thickness
Figure 18. Land Pattern Dimensions
Table 5. Land Pattern Dimensions
SOLDER PAD
DEFINITIONS
COPPER PAD
SOLDER MASK
OPENING
COPPER
THICKNESS
STENCIL
OPENING
STENCIL
THICKNESS
Nonsolder mask
defined (NSMD)
275 µm
(+0.0, –25 µm)
375 µm
(+0.0, –25 µm)
1 oz max (32 µm)
275 µm x 275 µm Sq.
(rounded corners)
125 µm thick
NOTES:
1. Circuit traces from NSMD defined PWB lands should be 75 µm to 100 µm wide in the exposed area inside
the solder mask opening. Wider trace widths reduce device stand off and impact reliability.
2. Recommend solder paste is Type 3 or Type 4.
3. Best reliability results are achieved when the PWB laminate glass transition temperature is above the
operating the range of the intended application.
4. For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 mm to avoid a reduction in
thermal fatigue performance.
5. Solder mask thickness should be less than 20 µm on top of the copper circuit pattern.
6. Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically
etched stencils results in inferior solder paste volume control.
7. Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional
component movement due to solder wetting forces.
Trace Width
Recommended trace width at the solder balls is 75 µm to 100 µm to prevent solder wicking onto wider PCB
traces.
For high current pins (SW, PGND, VOUT+, VOUT–, VCCIN, and VCCOUT) of the TPA2014D1, use 100 µm trace
widths at the solder balls and at least 500 µm PCB traces to ensure proper performance and output power for
the device.
For low current pins (IN–, IN+, SDd, SDb, GAIN, VCCFB, VDD) of the TPA2014D1, use 75 µm to 100 µm trace
widths at the solder balls. Run IN- and IN+ traces side-by-side to maximize common-mode noise cancellation.
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPA2014D1RGPR
ACTIVE
QFN
RGP
20
3000
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
CEK
TPA2014D1RGPT
ACTIVE
QFN
RGP
20
250
RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 85
CEK
TPA2014D1YZHR
ACTIVE
DSBGA
YZH
16
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
CEJ
TPA2014D1YZHT
ACTIVE
DSBGA
YZH
16
250
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
CEJ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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