TPA3007D1
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SLOS418D – SEPTEMBER 2003 – REVISED MARCH 2008
6.5-W MONO CLASS-D AUDIO POWER AMPLIFIER
FEATURES
1
•
•
•
•
•
DESCRIPTION
6.5 W Into 8-Ω Load From 12-V Supply
(10% THD+N)
Short Circuit Protection (Short to VCC, Short to
GND, Short Between Outputs)
Third-Generation Modulation Technique:
– Replaces Large LC Filter With Small,
Low-Cost Ferrite Bead Filter in Most
Applications
– Improved Efficiency
– Improved SNR
Low Supply Current ... mA Typ at 12 V
Shutdown Control ... < 1µA Typ
The TPA3007D1 is a 6.5-W mono bridge-tied load
(BTL) class-D audio power amplifier with high
efficiency, eliminating the need for heat sinks. The
TPA3007D1 can drive 8-Ω speakers with only a
ferrite bead filter required to reduce EMI.
The gain of the amplifier is controlled by two input
terminals, GAIN1 and GAIN0. This allows the
amplifier to be configured for a gain of 12, 18, 23.6,
and 36 dB. The differential input stage provides high
common mode rejection and improved power supply
rejection.
The amplifier also includes "de-pop" circuitry to
reduce the amount of pop at power-up and when
cycling SHUTDOWN.
APPLICATIONS
•
•
•
•
LCD Monitors/TVs
Desktop Replacement Notebook PCs
Hands-Free Car Kits
Powered Speakers
The TPA3007D1 is available in the 24-pin TSSOP
package (PW) and does not require an external heat
sink.
Functional Schematic Diagram
U1
TPA3007D1
C1
IN−
0.47 µF
1
2
IN+
C2
0.47 µF
3
GAIN SELECT
4
GAIN SELECT
5
SHUTDOWN
CONTROL
6
7
C10
1 µF
VCC
C7
10 µF
R2
C8
0.22 µF
8
51 Ω 9
10
C5
1 µF
11
12
VCC
INN
VCC
24
INP
VREF
23
GAIN0
BYPASS
22
GAIN1
COSC
21
SHUTDOWN
PGND
VCLAMP
BSN
ROSC
20
AGND
19
AGND
18
BSP
17
PVCC
16
OUTN
OUTP
15
OUTN
OUTP
14
PGND
PGND
PVCC
C4
1 µF
C3
1 µF
C12
220 pF
C11
1 µF
R1
120 kΩ
R3
51 Ω
C9
0.22 µF
VCC
C6
1 µF
13
D1
D2
L1
L2
(Ferrite (Ferrite
Bead) Bead)
C15
1 nF
C14
1 nF
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2008, Texas Instruments Incorporated
TPA3007D1
www.ti.com
SLOS418D – SEPTEMBER 2003 – REVISED MARCH 2008
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGED DEVICES
TA
TSSOP (PW) (1)
-40°C to 85°C
(1)
TPA3007D1PW
The PW package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g.,
TPA3007D1PWR).
LEAD (PB)-FREE AND GREEN ORDERING INFORMATION
ORDERED DEVICE
STATUS
TPA3007D1PWRG4
(1)
(2)
(1)
ECO-STATUS (2)
ACTIVE
Pb-Free and Green
The marketing status values are defined as follows:
ACTIVE: This device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this
part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued production of the device.
Eco-Status information – Additional details including specific material content can be accessed at www.ti.com/leadfree
N/A: Not yet available Lead (Pb)-Free; for estimated conversion dates, go to www.ti.com/leadfree.
Pb-Free: TI defines "Lead (Pb)-Free" or "Pb-Free" to mean RoHS compatible, including a lead concentration that does not exceed 0.1%
of total product weight, and, if designed to be soldered, suitable for use in specified lead-free soldering processes.
Green: TI defines "Green" to mean Lead (Pb)-Free and in addition, uses package materials that do not contain halogens, including
bromine (Br), or antimony (Sb) above 0.1% of total product weight.
PW PACKAGE
(TOP VIEW)
INN
INP
GAIN0
GAIN1
SHUTDOWN
PGND
VCLAMP
BSN
PVCC
OUTN
OUTN
PGND
2
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
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VCC
VREF
BYPASS
COSC
ROSC
AGND
AGND
BSP
PVCC
OUTP
OUTP
PGND
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SLOS418D – SEPTEMBER 2003 – REVISED MARCH 2008
Terminal Functions
TERMINAL
NAME
NO.
AGND
18, 19
I/O
DESCRIPTION
Analog ground terminal
BSN
8
I
Bootstrap terminal for high-side gate drive of negative BTL output (connect a 0.22 µF
capacitor with a 51 Ω resistor in series from OUTN to BSN)
BSP
17
I
Bootstrap terminal for high-side gate drive of positive BTL output (connect a 0.22 µF
capacitor with a 51 Ω resistor in series from OUTP to BSP)
BYPASS
22
I
Connect 1 µF capacitor to ground for BYPASS voltage filtering
COSC
21
I
Connect a 220 pF capacitor to ground to set oscillation frequency
GAIN0
3
I
Bit 0 of gain control (see Table 2 for gain settings)
GAIN1
4
I
Bit 1 of gain control (see Table 2 for gain settings)
INN
1
I
Negative differential input
INP
2
I
Positive differential input
10, 11
O
Negative BTL output, connect Schottky diode from PGND to OUTN for short-circuit
protection
OUTP
14, 15
O
Positive BTL output, connect Schottky diode from PGND to OUTP for short-circuit protection
PGND
6, 12, 13
PVCC
9, 16
I
High-voltage power supply (for output stages)
ROSC
20
I
Connect 120 kΩ resistor to ground to set oscillation frequency
SHUTDOWN
5
I
Shutdown terminal (active low), TTL compatible, 21-V compliant
VCC
24
I
Analog high-voltage power supply
VCLAMP
7
O
Connect 1 µF capacitor to ground to provide reference voltage for H-bridge gates
VREF
23
O
5-V internal regulator for control circuitry (connect a 0.1 µF to 1 µF capacitor to ground)
OUTN
Power ground
Functional Block Diagram
VREF
AGND
VREF
VCC
VCLAMP
VCC
Clamp
Reference
BSN
PVCC
+
_
Gain
Adjust
INN
Deglitch
Logic
Gate
Drive
OUTN
_
PGND
+
_
+
BSP
+
_
PVCC
+
Gain
Adjust
INP
_
_
+
Deglitch
Logic
Gate
Drive
OUTP
PGND
SHUTDOWN
SD
GAIN1
GAIN0
2
Gain
Biases
and
References
Ramp
Generator
COSC
ROSC
BYPASS
Start-Up
Protection
Logic
Thermal
Short-Circuit
Detect
VCC OK
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SLOS418D – SEPTEMBER 2003 – REVISED MARCH 2008
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
UNIT
Supply voltage: VCC, PVCC
–0.3 V to 21 V
≥7Ω
Load impedance, RL
Input voltage
SHUTDOWN
–0.3 V to VCC + 0.3 V
GAIN0, GAIN1
–0.3 V to 5.5 V
INN, INP
–0.3 V to 7 V
Continuous total power dissipation
See Dissipation Rating Table
Operating free-air temperature range, TA
–40°C to 85°C
Operating junction temperature range, TJ
–40°C to 150°C
Storage temperature range, Tstg
–65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1)
260°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE
TA≤ 25°C
DERATING FACTOR
TA = 70°C
TA = 85°C
PW
1.43 W
11.45 mW/°C (1)
0.915 W
0.744 W
(1)
Based on High-K board
RECOMMENDED OPERATING CONDITIONS
Supply voltage, VCC, PVCC
RL≥ 7.0Ω (1)
Load impedance, RL
GAIN0, GAIN1, SHUTDOWN
Low-level input voltage, VIL
GAIN0, GAIN1, SHUTDOWN
Operating free-air temperature, TA
4
18
UNIT
V
Ω
2
–40
Operating junction temperature, TJ (2)
(2)
MAX
8
7.0
High-level input voltage, VIH
(1)
MIN
V
0.8
V
85
°C
125
°C
The TPA3007D1 must not be used with any speaker or load (including speaker with output filter) that could vary below 7.0Ω over the
audio frequency band.
Continuous operation above the recommended junction temperature may result in reduced reliability and/or lifetime of the device. The
junction temperature is controlled by the thermal design of the application and should be carefully considered in high power dissipation
applications. See the thermal considerations section on page 14 for recommendations on improving the thermal performance of your
application.
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SLOS418D – SEPTEMBER 2003 – REVISED MARCH 2008
ELECTRICAL CHARACTERISTICS
TA= 25°C, PVCC = VCC = 12 V (unless otherwise noted)
PARAMETERS
TEST CONDITIONS
MIN
TYP MAX UNIT
|VOS|
Output offset voltage (measured
differentially)
VI = 0 V, AV = 12 dB, 18, 23.6 dB
50
PSRR
Power supply rejection ratio
PVCC = 11.5 V to 12.5 V
|IIH|
High-level input current
PVCC = 12 V, VI = PVCC
1
µA
|IIL|
Low-level input current
PVCC = 12 V, VI = 0 V
1
µA
15
mA
ICC
Supply current
SHUTDOWN = VCC, VCC = 18 V, PO = 6.5 W,
RL = 8Ω
ICC(SD)
Supply current, shutdown mode
SHUTDOWN = 0.8 V
fs
Switching frequency
ROSC = 120 kΩ, COSC = 220 pF
rds(on)
Output transistor on resistance (total)
IO = 1 A, TJ = 25°C
VI = 0 V, AV = 36 dB
–73
SHUTDOWN = 2.0 V, No load
G
Gain
mV
100
dB
8
0.42
A
1
µA
2
250
kHz
1.4
Ω
12
12.8
dB
GAIN1 = 0.8 V, GAIN0 = 0.8 V
10.9
GAIN1 = 0.8 V, GAIN0 = 2 V
17.1
18
18.5
dB
GAIN1 = 2 V, GAIN0 = 0.8 V
23
23.6
24.3
dB
34.7
35.5
36.3
dB
GAIN1 = 2 V, GAIN0 = 2 V
OPERATING CHARACTERISTICS
PVCC = VCC = 12 V, Gain = 12 dB, TA= 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
Continuous output power at 10%
THD+N
f = 1 kHz, RL = 8Ω
6.5
Continuous output power at 1%
THD+N
f = 1 kHz, RL = 8Ω
5.0
THD +
N
Total harmonic distortion plus noise
PO = 3.25 W, RL = 8 Ω , f = 1 kHz
BOM
Maximum output power bandwidth
THD = 1%
kSVR
Supply ripple rejection ratio
f = 1 kHz, C(BYPASS) = 1 µF
SNR
Signal-to-noise ratio
PO = 3.25 W, RL = 8 Ω
97
dB
C(BYPASS) = 1 µF, f = 20 Hz to 22 kHz, No weighting filter
used
86
µV (rms)
81
dBV
66
µV (rms)
84
dBV
PO
Vn
W
0.19
%
Noise output voltage
C(BYPASS) = 1 µF, f = 20 Hz to 22 kHz, A-weighted filter
ZI
Input impedance
See Table 2, page 14
20
kHz
–70
dB
> 23
kΩ
OPERATING CHARACTERISTICS
PVCC = VCC = 18 V, Gain = 12 dB, TA= 25°C (unless otherwise noted)
PARAMETER
THD + N Total harmonic distortion plus noise
TEST CONDITIONS
BOM
Maximum output power bandwidth
THD = 1%
kSVR
Supply ripple rejection ratio
f = 1 kHz, CBYPASS = 1 µF
SNR
Signal-to-noise ratio
Vn
Noise output voltage
ZI
Input impedance
MIN
PO = 3.25 W, RL = 8 Ω, f = 1 kHz
TYP
MAX
UNIT
0.16%
20
kHz
–70
dB
PO = 3.25 W, RL = 8Ω
97
dB
C(BYPASS) = 1 µF, f = 20 Hz to 20 kHz, No weighting
filter used
86
µV(rms)
81
dBV
C(BYPASS) = 1 µF, f = 20 Hz to 22 kHz, A-weighted
filter
66
µV(rms)
84
dBV
>23
kΩ
See Table 2, page 14
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SLOS418D – SEPTEMBER 2003 – REVISED MARCH 2008
TYPICAL CHARACTERISTICS
Table 1. Table of Graphs
FIGURE
Efficiency
vs Output power
1
PO
Output power
vs Supply Voltage
2
ICC
Supply current
ICC(SD)
Shutdown current
3
vs Supply voltage
THD+N
Total harmonic distortion + noise
kSVR
Supply voltage rejection ratio
Common-mode rejection ratio
VIO
Input offset voltage
5, 6
vs Frequency
7, 8
vs Frequency
10
9
Gain and phase
CMRR
4
vs Output power
11
vs Common-mode input voltage
EFFICIENCY
vs
OUTPUT POWER
MAXIMUM OUTPUT POWER
vs
SUPPLY VOLTAGE
90
10
8Ω
9
Maximum Output Power − W
80
Efficiency − %
70
60
50
40
VCC = 12 V
30
20
6
8
10% THD+N
7
Thermally Limited
6
5
1% THD+N
4
3
2
10
0
12
1
0
4
8
12
16
20
0
PO − Output Power − W
8
11 12 13 14 15
VCC − Supply Voltage − V
Figure 1.
Figure 2.
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9
10
16
17
18
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SLOS418D – SEPTEMBER 2003 – REVISED MARCH 2008
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SHUTDOWN CURRENT
vs
SUPPLY VOLTAGE
11
5
ICC(SD) - Shutdown Current - µA
ICC - Supply Current - mA
SHUTDOWN = 0.8 V
10
9
8
7
6
4
3
2
1
0
8
10
12
14
16
18
8
10
VCC - Supply Voltage - V
14
16
Figure 3.
Figure 4.
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
OUTPUT POWER
THD+N − Total Harmonic Distortion + Noise − %
VCC = 12 V
RL = 8 Ω
Gain = +12 dB
f = 1 kHz
f = 20 Hz
1
f = 20 kHz
0.1
0.1
18
10
10
THD+N − Total Harmonic Distortion + Noise − %
12
VCC - Supply Voltage - V
1
10
VCC = 12 V
RL = 8 Ω
Gain = +36 dB
f = 20 Hz
1
f = 20 kHz
0.1
0.01
0.1
f f==11kHz
kHz
1
10
PO − Output Power − W
PO − Output Power − W
Figure 5.
Figure 6.
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TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
1
PO = 4 W
0.1
PO = 2 W
0.01
20
100
1k
10 k
PO = 5 W
0.1
PO = 2 W
VCC = 18 V
RL = 8 Ω
0.01
20
20 k
100
f − Frequency − Hz
Figure 7.
Figure 8.
SUPPLY VOLTAGE REJECTION RATIO
vs
FREQUENCY
GAIN and PHASE
vs
FREQUENCY
14
C(Bypass) = 1 µF
RL = 8 Ω
20 k
20
Gain
10
0
10
-10
-70
°
Gain - dB
VCC = 8 V
8
-20
Phase
-30
6
VDD = 15 V
-40
4
-80
2
100
10 k
30
12
-60
-90
20
1k
10k
0
20
-50
-60
VCC = 8 V
RL = 8 Ω
Gain = 12 dB
100
-70
1k
10k
-80
100k
f - Frequency - Hz
f - Frequency - Hz
Figure 9.
8
1k
f − Frequency − Hz
-50
kSVR - Supply Voltage Rejection Ratio - dB
PO = 0.5 W
PO = 0.5 W
Phase -
VCC = 12 V
RL = 8 Ω
THD+N − Total Harmonic Distortion − %
THD+N − Total Harmonic Distortion − %
1
Figure 10.
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COMMON-MODE REJECTION RATIO
vs
FREQUENCY
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
6
VCC = 8 V to 18 V
RL = 8 Ω
5
-41
VIO - Input Offset Voltage - mV
CMRR - Common-Mode Rejection Ratio - dB
-40
-42
-43
-44
VCC = 8 V to 18 V
4
3
2
1
0
-1
-2
-45
-3
-46
20
100
1k
f - Frequency - Hz
10 k
-4
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VIC - Common-Mode Input Voltage - V
Figure 11.
Figure 12.
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APPLICATION INFORMATION
APPLICATION CIRCUIT
U1
TPA3007D1
C1
IN−
0.47 µF
1
2
IN+
C2
0.47 µF
3
GAIN SELECT
4
GAIN SELECT
5
SHUTDOWN
CONTROL
6
7
C10
1 µF
VCC
R2
C8
0.22 µF
51 Ω
8
9
10
C7
10 µF
C5
1 µF
11
12
VCC
INN
VCC
INP
VREF
GAIN0
BYPASS
GAIN1
COSC
24
23
22
21
20
SHUTDOWN
ROSC
PGND
AGND
VCLAMP
AGND
C3
1 µF
C4
1 µF
C11
1 µF
C12
220 pF R1
120 kΩ
19
18
BSN
BSP
PVCC
PVCC
OUTN
OUTP
OUTN
OUTP
PGND
PGND
17
R3
16
51 Ω
15
L1
(Ferrite
Bead)
C15
1 nF
C14
1 nF
VCC
C6
1 µF
14
13
D1
D2
L2
(Ferrite
Bead)
C9
0.22 µF
L1, L2: Fair-Rite, Part Number 2512067007Y3
D1, D2: Diodes, Inc., Part Number B130
Figure 13. Typical Application Circuit
CLASS-D OPERATION
This section focuses on the class-D operation of the TPA3007D1.
TRADITIONAL CLASS-D MODULATION SCHEME
The traditional class-D modulation scheme, which is used in the TPA032D0x family, has a differential output
where each output is 180 degrees out of phase and changes from ground to the supply voltage, VCC. Therefore,
the differential pre-filtered output varies between positive and negative VCC, where filtered 50% duty cycle yields
0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in
Figure 14. Note that even at an average of 0 V across the load (50% duty cycle), the current to the load is high,
causing high loss, thus causing a high supply current.
10
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OUTP
OUTN
+12 V
Differential Voltage
Across Load
0V
–12 V
Current
Figure 14. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms Into an
Inductive Load With No Input
TPA3007D1 MODULATION SCHEME
The TPA3007D1 uses a modulation scheme that still has each output switching from ground to VCC. However,
OUTP and OUTN are now in phase with each other with no input. The duty cycle of OUTP is greater than 50%
and OUTN is less than 50% for positive output voltages. The duty cycle of OUTP is less than 50% and OUTN is
greater than 50% for negative output voltages. The voltage across the load is 0 V throughout most of the
switching period, greatly reducing the switching current, which reduces any I2R losses in the load. (See
Figure 15).
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OUTP
OUTN
Differential
Voltage
Across
Load
Output = 0 V
+12 V
0V
–12 V
Current
OUTP
OUTN
Differential
Voltage
Output > 0 V
+12 V
0V
Across
Load
–12 V
Current
Figure 15. The TPA3007D1 Output Voltage and Current Waveforms Into an Inductive Load
DRIVING THE OUTPUT INTO CLIPPING
The output of the TPA3007D1 may be driven into clipping to attain a higher output power than is possible with no
distortion. Clipping is typically quantified by a THD measurement of 10%. The amount of additional power into
the load may be calculated with Equation 1.
P O(10% THD) + P O(1% THD)
1.25
(1)
OUTPUT FILTER CONSIDERATIONS
A ferrite bead filter (shown in Figure 16) should be used in order to pass FCC and/or CE radiated emissions
specifications and if a frequency sensitive circuit operating higher than 1 MHz is nearby. The ferrite filter reduces
EMI around 1 MHz and higher (FCC and CE only test radiated emissions greater than 30 MHz). When selecting
a ferrite bead, choose one with high impedance at high frequencies, but very low impedance at low frequencies.
Use an additional LC output filter if there are low frequency (
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