User's Guide
SLVUAG8A – September 2015 – Revised October 2015
TPA3251D2EVM
This user’s guide describes the operation of the evaluation module (TPA3251D2EVM) for the TPA3251D2
175-W Stereo/350-W mono PurePath™ Ultra-HD Analog Input Power Stage. The user’s guide also
provides design information, which includes schematic, BOM, and PCB layout. For questions and support
go to the E2E forums (e2e.ti.com).
The main contents of this document are:
• Hardware descriptions and implementation
• Design information
Related documents:
• TPA3251D2 Data Sheet (SLASE40)
1
2
3
4
Contents
Hardware Overview.......................................................................................................... 2
1.1
TPA3251D2EVM Features ........................................................................................ 2
1.2
TPA3251D2EVM Frequency Adjust .............................................................................. 3
1.3
TPA3251D2EVM Single-Ended and Differential Input ......................................................... 3
1.4
TPA3251D2EVM Clip Overtemperature and Fault Indicators ................................................ 4
TPA3251D2EVM Setup ..................................................................................................... 5
2.1
TPA3251D2EVM Setup ............................................................................................ 5
2.2
Hardware Requirements ........................................................................................... 5
2.3
Hardware Default Setup BTL (2.0) ............................................................................... 6
Using TPA3251D2EVM in Different Output Configurations ............................................................ 7
3.1
BTL Plus Two SE (2.1) Operation ................................................................................ 7
3.2
PBTL (0.1) Output Operation ...................................................................................... 8
3.3
Single-Ended (SE) Output (4.0) Operation ...................................................................... 8
Board Layouts, Bill of Materials, and Schematic ........................................................................ 9
4.1
TPA3251D2EVM Board Layouts ................................................................................. 9
4.2
TPA3251D2EVM Board Dimension ............................................................................. 10
4.3
Bill of Materials .................................................................................................... 11
4.4
TPA3251D2EVM Schematic ..................................................................................... 14
List of Figures
1
TPA3251D2EVM ............................................................................................................. 2
2
TPA3251D2EVM Connections ............................................................................................. 5
3
TPA3251D2EVM Top Composite Assembly ............................................................................. 9
4
TPA3251D2EVM Bottom Composite Assembly ......................................................................... 9
5
TPA3251D2EVM Board Dimension ...................................................................................... 10
6
TPA3251D2EVM Schematic .............................................................................................. 14
List of Tables
1
Frequency Adjust Master Mode Selection ................................................................................ 3
2
Fault and Clip Overtemperature Status ................................................................................... 4
3
Mode Selection Pins......................................................................................................... 7
4
Bill of Materials
.............................................................................................................
11
PurePath is a trademark of Texas Instruments.
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TPA3251D2EVM
1
Hardware Overview
1
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Hardware Overview
The TPA3251D2EVM PurePath™ Ultra-HD evaluation module demonstrates the TPA3251D2DDV
integrated circuit from Texas Instruments. The TPA3251D2DDV is a high-performance, high-power, classD amplifier that enables true premium sound quality with high efficiency class-D technology. It features an
advance integrated feedback design and high-speed gate driver error correction (PurePath Ultra-HD),
which enables ultra-low distortion across the audio band and superior audio quality. This EVM supports 2
BTL (stereo 2.0) output channels, 1 PBTL (mono 0.1) output channel, 1 BTL plus 2 SE (2.1) output
channels, and 4 SE (4.0) output channel configurations. The NE5532 is a high-performance audio op amp
designed to allow TPA3251D2DDV operation with differential or single-ended input signals to the EVM
with differential inputs yielding the optimal performance. TPA3251D2EVM is a complete 2 VRMS analog
input 2 × 175-W stereo/1 × 350-W mono high-power amplifier ready for evaluation and excellent listening
experience.
Figure 1. TPA3251D2EVM
1.1
TPA3251D2EVM Features
The TPA3251D2EVM has following features:
• Stereo PurePath Ultra-HD evaluation module
• Self-contained protection system (short circuit, clip, and thermal)
• Standard 2 VRMS differential input or single-ended line input
• BTL, PBTL, and SE output configuration support
• Frequency adjust and oscillator sync interface
• Single supply voltage range 18–38 V
• Double-sided, plated-through, 2-oz Cu, 2-layer PCB layout
2
TPA3251D2EVM
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1.2
TPA3251D2EVM Frequency Adjust
The TPA3251D2EVM offers hardware trimmed oscillator frequency by external control of the FREQ_ADJ
pin. The Frequency adjust can be used to reduce interference problems while using a radio receiver tuned
within the AM band, the switching frequency can be changed from nominal to lower values. These values
should be chosen such that the nominal and the lower value switching frequencies together results in the
fewest cases of interference throughout the AM band. The oscillator frequency can be selected by the
value of the FREQ_ADJ resistor connected to GND in master mode according to Table 1.
Table 1. Frequency Adjust Master Mode Selection
Master Mode
Resistor to GND
Nominal
10 kΩ
AM1
20 kΩ
AM2
30 kΩ
For slave-mode operation, turn off the oscillator by pulling the FREQ_ADJ pin to DVDD. This configures
the OSC_I/O pins as inputs to be slaved from an external differential clock. In a master/slave system interchannel delay is automatically setup between the switching phases of the audio channels, which can be
illustrated by no idle channels switching at the same time. This will not influence the audio output, but only
the switch timing to minimize noise coupling between audio channels through the power supply. This will
optimize audio performance and result in better operating conditions for the power supply. The interchannel delay will be setup for a slave device depending on the polarity of the OSC_I/O connection such
that slave mode 1 is selected by connecting OSC_I/O of the master device in phase with OSC_I/O of the
slave device (+ to + and – to –), while slave mode 2 is selected by connecting the OSC_I/O's out of phase
(+ to – and – to +).
1.3
TPA3251D2EVM Single-Ended and Differential Input
The TPA3251D2EVM supports both differential and single-ended inputs. For single-ended inputs, J4
and/or J19 jumpers are set to the SE position, so that the TPA3251D2EVM uses the NE5532 to convert
the single-ended input signal to differential to properly drive the differential inputs of the TPA3251D2. The
input RCA jack, J3, is used to provide INA and INB inputs and RCA jack J18 is used to provide INC and
IND inputs with single-ended inputs.
For differential input operation, J4 and/or J19 jumpers are set to the DIFF position, and the
TPA3251D2EVM uses the NE5532 to buffer the differential input signal to the differential inputs of the
TPA3251D2. The input RCA jack, J3, is used to provide INA, RCA jack J14 provides INB, RCA jack J18
provides INC, and RCA jack J15 provides IND with differential inputs.
NOTE: Single-ended input settings on the TPA3251D2EVM should only be used for channels with
output configuration BTL or PBTL, not SE. For SE output configuration J4 and/or J19
jumpers for that channel must be set to the DIFF position, so the input signal INx is mapped
directly to OUTx.
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Hardware Overview
1.4
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TPA3251D2EVM Clip Overtemperature and Fault Indicators
The TPA3251D2EVM is equipped with LED indicators that illuminate when the FAULT and/or CLIP_OTW
pin goes low. See Table 2 and the TPA3251D2 data sheet (SLASE40) for more details.
Table 2. Fault and Clip Overtemperature Status
4
FAULT
CLIP_OTW
0
0
Overtemperature (OTE) or overload (OLP) or undervoltage (UVP). Junction temperature higher
than 125°C (overtemperature warning).
0
0
Overload (OLP) or undervoltage (UVP). Junction temperature higher than 125°C (overtemperature
warning).
0
1
Overload (OLP) or undervoltage (UVP). Junction temperature lower than 125°C.
1
0
Junction temperature higher than 125°C (overtemperature warning)
1
1
Junction temperature lower than 125°C and no OLP or UVP faults (normal operation)
TPA3251D2EVM
Description
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TPA3251D2EVM Setup
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2
TPA3251D2EVM Setup
This section describes the TPA3251D2EVM hardware setup and connection.
2.1
TPA3251D2EVM Setup
Figure 2 illustrates the TPA3251D2EVM connection.
Power Supply
3-3 V LED
OUTA
SE A/B Input
DIFF A Input
OUTB
DIFF B Input
TPS3251D2 Device
Under Heat Sink
SE C/D Input
DIFF C Input
GND
OUTC
OUTD
DIFF D Input
Warning LEDs
RESET Switch
Figure 2. TPA3251D2EVM Connections
2.2
Hardware Requirements
The following hardware is required for this EVM:
• TPA3251D2EVM (AIP025-001)
• Power supply 5–14 A/18–38 VDC
• Two 3–8 Ω (≈100 W) speakers/resistor loads
• Four speaker/banana cables
• RCA input cables
• Analog output audio source
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5
TPA3251D2EVM Setup
2.3
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Hardware Default Setup BTL (2.0)
BTL (2.0) default hardware setup is as follows:
• Remove the EVM from the ESD bag.
• Check that jumpers are in their default state as shown in Figure 1 for stereo BTL operation:
– J4 and J19 pin 1-pin 2 position (SE Input)
– J5 and J6 pin 2-pin 3 position (2 BTL Output)
– J7, J8, J17, and J21 out
– J16 pin 3-pin 4 position (Master Mode)
– J22, J23, J24 and J25 in (BTL Outputs)
• Set S1 to the RESET position.
• Set power supply to 36 V (18- to 38-V range) and current to 10 A (5- to 14-A range). Do not power up
until all connections are completed.
• Connect power supply to TPA3251D2 EVM positive terminal to PVDD (RED) and negative terminal to
GND (BLACK).
• Connect left channel speaker/power resistor load (3–8 Ω) to TPA3251D2 EVM positive output terminal
to OUTA (RED) and AP analog input channel A positive terminal.
• Connect left channel speaker/power resistor load (3–8 Ω) to TPA3251D2 EVM negative output
terminal to OUTB (BLACK) and AP analog input channel A negative terminal.
• Connect right channel speaker/power resistor load (3–8 Ω) to TPA3251D2 EVM positive output
terminal to OUTC (RED) and AP analog input channel B positive terminal.
• Connect right channel speaker/power resistor load (3–8 Ω) to TPA3251D2 EVM negative output
terminal to OUTD (BLACK) and AP analog input channel B negative terminal.
• Be careful not to mix up PVDD and OUTA and OUTB terminals, since the colors are the same (RED).
• For single-ended stereo inputs, connect AP channel A XLR to RCA male jacks to female RCA jacks
input A/AB (RED) and AP channel B XLR to RCA male jacks to female RCA jacks input C/CD (WHITE)
and set J4 and J19 jumper positions to SE.
• For differential stereo inputs, connect positive RCA male jacks to female RCA jacks input A/AB
(RED) and input C/CD (WHITE) and connect negative RCA male jacks to female RCA jacks input B
(YELLOW) and input D (BLACK) and set J4 and J19 jumper positions to DIFF.
• Power up power supply once all the connections are made correctly and the 3.3-V LED (GREEN) will
illuminate.
• Set S1 to the NORMAL position.
• CLIP_OTWz (ORANGE) and FAULTz (RED) LEDs should be off, if the audio source is off.
NOTE: J3/J10 and J18/J15 can be used for differential inputs to INA/INB and INC/IND, respectively.
Using a smart phone/tablet/PC with headphone to RCA cable, audio streaming via headphone jack can
begin once the EVM is powered up correctly with jumpers in their default state. Start the media player of
your choice and enjoy the enhanced audio performance TPA3251D2 provides as a quick check of the
setup.
6
TPA3251D2EVM
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Using TPA3251D2EVM in Different Output Configurations
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3
Using TPA3251D2EVM in Different Output Configurations
The TPA3251D2EVM can be configured for four different output operations. The 2.0 BTL configuration is
the default set up of the TPA3251D2EVM described in Section 2.3. The remaining three configurations are
2.1 BTL plus two single-ended (SE) outputs, 0.1 PBTL output, and 4.0 single-ended (SE) outputs.
Table 3. Mode Selection Pins
Mode Pins
3.1
Input Mode
Output Configuration Description
M2
M1
0
0
2N + 1
2 × BTL
0
1
2N/1N + 1
1 × BTL + 2 × SE
1
0
2N + 1
1 × PBTL
1
1
1N + 1
4 × SE
Stereo BTL output configuration
2.1 BTL + SE mode
Paralleled BTL configuration. Connect INPUT_C and INPUT_D to
GND.
Single-ended output configuration
BTL Plus Two SE (2.1) Operation
Configure the EVM as follows for 2 SE + 1 BTL operation:
• Set J6 to L and J5 to H.
• Connect left (stereo) speaker/power resistor load (2–4 Ω) positive terminal to OUTC and remove
jumper J24.
• Connect right (stereo) speaker/power resistor load (2–4 Ω) positive terminal to OUTD and remove
jumper J25.
• Connect subwoofer (mono) speaker/power resistor load (3–8 Ω) positive terminal to OUTA and
negative terminal to OUTB.
• Set J19 jumper position to DIFF.
• Connect left (stereo) channel input to female RCA jack input C/CD (WHITE) for OUTC speaker.
• Connect right (stereo) channel input to female RCA jack input D (BLACK) for OUTD speaker.
• For single-ended subwoofer (mono) input, connect RCA male jack to female RCA jack input A/AB
(RED) and set J4 jumper positions to SE.
• For differential subwoofer (mono) inputs, connect positive RCA male jack to female RCA jack input
A/AB (RED) and connect negative RCA male jack to female RCA jack input B (YELLOW) and set J4
jumper positions to DIFF.
NOTE: OUTC and OUTD are the single-ended output channels and OUTA and OUTB are the BTL
channel for 2.1 operations.
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Using TPA3251D2EVM in Different Output Configurations
3.2
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PBTL (0.1) Output Operation
Configure the EVM as follows for PBTL operations:
• Set J6 to H and J5 to L.
• Connect speaker/power resistor (2–4 Ω) positive terminal to OUTA and OUTC (OUT A and C shorted).
• Connect speaker/power resistor (2–4 Ω) negative terminal to OUTB and OUTD (OUT B and D
shorted).
• Install PBTL jumpers J7 and J8 (pulls input C and input D to GND).
• For single-ended mono input, connect RCA male jack to female RCA jack input A/AB (RED) and set
J4 jumper positions to SE.
• For differential mono inputs, connect positive RCA male jack to female RCA jack input A/AB (RED)
and connect negative RCA male jack to female RCA jack input B (YELLOW) and set J4 jumper
position to DIFF.
NOTE: INA and INB are the inputs for PBTL and INC and IND are grounded for PBTL operation.
3.3
Single-Ended (SE) Output (4.0) Operation
Configure the EVM as follows for 4 single-ended operations:
• Set J6 to H and J5 to H.
• Connect speaker/power resistor (2–4 Ω) positive terminal to OUTA and remove jumper J22.
• Connect speaker/power resistor (2–4 Ω) positive terminal to OUTB and remove jumper J23.
• Connect speaker/power resistor (2–4 Ω) positive terminal to OUTC and remove jumper J24.
• Connect speaker/power resistor (2–4 Ω) positive terminal to OUTD and remove jumper J25.
• Set both J4 and J19 jumpers position to DIFF.
• Connect input to female RCA jack input A/AB (RED) for OUTA speaker.
• Connect input to female RCA jack input B (YELLOW) for OUTB speaker.
• Connect input to female RCA jack input C/CD (WHITE) for OUTC speaker.
• Connect input to female RCA jack input D (BLACK) for OUTD speaker.
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NOTE: The performance of the TPA3251D2EVM/TPA3251D2DDV is dependent on the power
supply. Design the power supply with margins that can deliver the needed power. In lowfrequency applications additional bulk capacitance may be needed. Replacing the bulk
capacitors on the TPA3251D2EVM with 3300 µF or more capacitance may be necessary,
depending on the power supply used.
8
TPA3251D2EVM
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4
Board Layouts, Bill of Materials, and Schematic
4.1
TPA3251D2EVM Board Layouts
Figure 3 and Figure 4 illustrate the board layouts for the EVM.
Figure 3. TPA3251D2EVM Top Composite Assembly
Figure 4. TPA3251D2EVM Bottom Composite Assembly
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Board Layouts, Bill of Materials, and Schematic
4.2
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TPA3251D2EVM Board Dimension
Figure 5 illustrates the TPA3251D2EVM board dimensions 140 mm × 120 mm.
Figure 5. TPA3251D2EVM Board Dimension
10
TPA3251D2EVM
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4.3
Bill of Materials
Table 4 displays the BOM for this EVM.
Table 4. Bill of Materials
Designator
Qty
Value
Description
Package
Reference
Part Number
Manufacturer
!PCB1
1
C1
1
0.047uF
CAP, CERM, 0.047 µF, 25 V, +/- 10%, X7R, 0402
0402
AIP025
Any
GRM155R71E473KA88D
C2, C9, C13, C14,
C15, C22, C51,
C67, C69, C72,
C82
11
0.1uF
CAP, CERM, 0.1uF, 50V, +/-10%, X7R, 0603
Murata
0603
C0603C104K5RACTU
Kemet
C3
1
1uF
C4
1
2.2uF
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 0805
0805
GRM21BR71H105KA12L
Murata
CAP, CERM, 2.2 µF, 50 V, +/- 10%, X5R, 0805
0805
C2012X5R1H225K125AB
C5
1
TDK
47uF
CAP, AL, 47 µF, 16 V, +/- 20%, 0.36 ohm, SMD
SMT Radial D
EEE-FK1C470P
C6, C17, C20,
C28, C55, C62,
C63, C66, C71
Panasonic
9
10uF
CAP, AL, 10 µF, 16 V, +/- 20%, 1.35 ohm, SMD
SMT Radial B
EEE-FK1C100R
Panasonic
C7
1
5600pF
CAP, CERM, 5600 pF, 50 V, +/- 10%, X7R, 0603
0603
GRM188R71H562KA01D
Murata
C8, C50
2
0.47uF
CAP, CERM, 0.47 µF, 25 V, +/- 10%, X7R, 0603
0603
GRM188R71E474KA12D
Murata
C10
1
100uF
CAP, AL, 100 µF, 6.3 V, +/- 20%, 0.7 ohm, SMD
SMT Radial C
EEE-FK0J101UR
Panasonic
C11, C26, C37,
C45, C49, C61
6
0.01uF
CAP, CERM, 0.01 µF, 50 V, +/- 10%, X7R, 0603
0603
GRM188R71H103KA01D
Murata
C12
1
4700pF
CAP, CERM, 4700 pF, 50 V, +/- 10%, X7R, 0603
0603
C0603X472K5RACTU
Kemet
C16, C53, C70,
C81
4
10uF
CAP, CERM, 10 µF, 16 V, +/- 10%, X5R, 0805
0805
EMK212BJ106KG-T
Taiyo Yuden
C18, C23, C57,
C65
4
22pF
CAP, CERM, 22 pF, 50 V, +/- 5%, C0G/NP0, 0603
0603
GRM1885C1H220JA01D
Murata
C19, C30, C58,
C64
4
100pF
CAP, CERM, 100 pF, 50 V, +/- 5%, C0G/NP0, 0603
0603
GRM1885C1H101JA01D
Murata
C21, C34, C42,
C56
4
470uF
CAP, AL, 470 µF, 63 V, +/- 20%, 0.059 ohm, TH
D16xL20mm
EEU-FC1J471
Panasonic
C24, C35, C43,
C59
4
0.68uF
CAP, Film, 0.68 µF, 250 V, +/- 5%, TH
18x9x17.5mm
B32652A3684J
EPCOS Inc
C25, C36, C44,
C60
4
1000pF
CAP, CERM, 1000 pF, 50 V, +/- 5%, C0G/NP0,
1206
1206
GRM3195C1H102JA01D
Murata
C27, C29, C52,
C54
4
0.033uF
CAP, CERM, 0.033 µF, 50 V, +/- 10%, X7R, 0603
0603
GRM188R71H333KA61D
Murata
C31, C46
2
2200uF
CAP, AL, 2200 µF, 50 V, +/- 20%, 0.023 ohm, TH
Dia 18mm
EEU-FC1H222
Panasonic
C32, C33, C47,
C48, C83, C84
6
1uF
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 1206
1206
GRM31MR71H105KA88L
Murata
C38
1
4.7uF
CAP, CERM, 4.7 µF, 25 V, +/- 10%, X7R, 1206
1206
GRM31CR71E475KA88L
Murata
C39
1
47uF
CAP, AL, 47 µF, 50 V, +/- 20%, 0.3 ohm, SMD
SMT Radial G
EEE-FC1H470P
Panasonic
C40, C41
2
1uF
CAP, CERM, 1 µF, 16 V, +/- 10%, X7R, 0603
0603
GRM188R71C105KA12D
Murata
C68
1
0.1uF
CAP, CERM, 0.1 µF, 50 V, +/- 10%, X7R, 0603
0603
C0603C104K5RACTU
Kemet
D1
1
100V
Diode, Schottky, 100 V, 1 A, SMA
SMA
B1100-13-F
Diodes Inc.
D2
1
Orange
LED, Orange, SMD
LED_0805
LTST-C170KFKT
Lite-On
D3
1
100V
Diode, Schottky, 100 V, 3 A, SMA
SMA
SK310A-TP
Micro Commercial
Components
D4
1
Red
LED, Red, SMD
LED_0805
LTST-C170KRKT
Lite-On
D5
1
Green
LED, Green, SMD
LED_0805
LTST-C170KGKT
Lite-On
H1, H2, H3, H4,
H5
5
M3x5m
m
MACHINE SCREW PAN PHILLIPS M3 5mm
Screw M3 Phillips
head
MPMS 003 0005 PH
B&F Fastener Supply
H6, H7
2
M3x8m
m
MACHINE SCREW PAN PHILLIPS M3 8mm
Screw M3 Phillips
head
MPMS 003 0005 PH
B&F Fastener Supply
H8, H9, H10, H11,
H12
5
M3
Standoff, Hex,25mm Length, M3, Aluminum
Standoff M3
24438
Keystone
HEATSINK
1
Heat Sink, Vertical
Heatsink
ATS-TI1OP-519-C1-R3
Advanced Thermal
Solutions
J1, J2, J9
3
Dual Binding Posts with Base, 2x1, TH
Dual Binding
Posts with Base,
2x1, TH
6883
Pomona Electronics
J3
1
RCA Jack, Red, R/A, TH
PC Mount Phono
Jack-Red, TH
971
Keystone
J4, J5, J6, J19
4
Header, 100mil, 3x1, Gold, TH
PBC03SAAN
PBC03SAAN
Sullins Connector
Solutions
Printed Circuit Board
1x3
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Table 4. Bill of Materials (continued)
12
Designator
Qty
J7, J8, J21
Description
Package
Reference
Part Number
Manufacturer
3
Header, 100mil, 2x1, Gold, TH
Sullins 100mil,
1x2, 230 mil above
insulator
PBC02SAAN
Sullins Connector
Solutions
J10, J12
2
Header, 2.54 mm, 3x1, TH
Header, 2.54mm,
3x1, TH
22-11-2032
Molex
J11, J20
2
Binding Post, BLACK, TH
11.4x27.2mm
7007
Keystone
J14
1
RCA Jack, Yellow, R/A, TH
RCA Jack, Yellow,
R/A, TH
973
Keystone
J15
1
RCA Jack, Black, R/A, TH
RCA Jack, Black,
R/A, TH
972
Keystone
J16
1
Header, 100mil, 4x2, Tin, TH
Header, 4x2,
100mil, Tin
PEC04DAAN
Sullins Connector
Solutions
J17
1
Header (friction lock), 100mil, 4x1, Gold, TH
Header 4x1 keyed
0022112042
Molex
J18
1
RCA Jack, White, R/A, TH
PC Mount Phono
Jack-White, TH
970
Keystone
J22, J23, J24, J25
4
JUMPER TIN SMD
6.85x0.97x2.51
mm
S1911-46R
Harwin
L1
1
100uH
Inductor, Shielded Drum Core, Ferrite, 100 µH, 1.5
A, 0.165 ohm, SMD
10x5x10mm
7447714101
Wurth Elektronik eiSos
L2, L3, L4, L5
4
7uH
Inductor, Toroid, Powdered Iron, 7 µH, 6.5 A, 0.0215
ohm, TH
28.6x12.3mm
MA5173-AE
Coilcraft
L6
1
10uH
Inductor, Wirewound, 10 µH, 0.8 A, 0.204 ohm,
SMD
2-Pin SMD, Body
4 x 4 mm, Height
1.2 mm
NRS4012T100MDGJV
Taiyo Yuden
Q1, Q2
2
60V
MOSFET, N-CH, 60 V, 0.17 A, SOT-23
SOT-23
2N7002-7-F
Diodes Inc.
R1, R3, R4, R12,
R30, R44, R46
7
0
RES, 0, 5%, 0.1 W, 0603
0603
CRCW06030000Z0EA
Vishay-Dale
R2
1
182k
RES, 182 k, 1%, 0.125 W, 0805
0805
ERJ-6ENF1823V
Panasonic
R5, R10, R19,
R23, R33, R35
6
100
RES, 100, 1%, 0.1 W, 0603
0603
CRCW0603100RFKEA
Vishay-Dale
R6, R11, R14,
R18, R22
5
3.3
RES, 3.3, 5%, 0.1 W, 0603
0603
CRCW06033R30JNEA
Vishay-Dale
R7, R8, R20, R21,
R25, R27, R37,
R38, R41, R42
10
10.0k
RES, 10.0 k, 0.1%, 0.1 W, 0603
0603
RT0603BRD0710KL
Yageo America
R9, R43, R45,
R48, R61
5
100k
RES, 100 k, 1%, 0.063 W, 0402
0402
CRCW0402100KFKED
Vishay-Dale
R13
1
22.0k
RES, 22.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0722KL
Yageo America
R15, R36, R52
3
10.0k
RES, 10.0 k, 1%, 0.1 W, 0603
0603
CRCW060310K0FKEA
Vishay-Dale
R16
1
20.0k
RES, 20.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0720KL
Yageo America
R17
1
30.0k
RES, 30.0 k, 1%, 0.1 W, 0603
0603
RC0603FR-0730KL
Yageo America
R24, R28
2
47k
RES, 47 k, 5%, 0.1 W, 0603
0603
RC0603JR-0747KL
Yageo America
R26
1
3.30k
RES, 3.30 k, 1%, 0.1 W, 0603
0603
RC0603FR-073K3L
Yageo America
R29, R31
2
1.00k
RES, 1.00 k, 1%, 0.1 W, 0603
0603
CRCW06031K00FKEA
Vishay-Dale
R32
1
12.0k
RES, 12.0 k, 1%, 0.1 W, 0603
0603
ERJ-3EKF1202V
Panasonic
R39
1
4.99k
RES, 4.99 k, 1%, 0.063 W, 0402
0402
CRCW04024K99FKED
Vishay-Dale
R40
1
1.00k
RES, 1.00 k, 1%, 0.063 W, 0402
0402
CRCW04021K00FKED
Vishay-Dale
R53
1
499
RES, 499, 1%, 0.1 W, 0603
0603
CRCW0603499RFKEA
Vishay-Dale
S1
1
Switch, SPDT, On-On, 2 Pos, TH
Switch, 7x4.5mm
200USP1T1A1M2RE
E-Switch
SH1, SH2, SH3,
SH4, SH5
5
1x2
Shunt, 100mil, Gold plated, Black
Shunt
969102-0000-DA
3M
TP1, TP2, TP3,
TP4, TP5, TP6,
TP7, TP8, TP9,
TP10, TP11,
TP12, TP13, TP14
14
Grey
Test Point, Multipurpose, Grey, TH
Grey Multipurpose
Testpoint
5128
Keystone
U1
1
High Voltage 1A Step Down Switching Regulator,
10-pin LLP, Pb-Free
SDC10A
LM5010ASD/NOPB
Texas Instruments
U2
1
FIXED LOW-DROPOUT VOLTAGE REGULATOR,
DCY0003A
DCY0003A
TLV1117-33IDCY
Texas Instruments
U3
1
1A Low Dropout Regulator, 4-pin SOT-223, Pb-Free
MP04A
LM2940IMP-12/NOPB
Texas Instruments
U4
1
150W Stereo/300W MONO PurePath HD Analoginput Power Stage, DDV0044D
DDV0044D
TPA3251D2DDVR
Texas Instruments
U5, U6
2
Dual Low-Noise Operational Amplifier, 10 to 30 V, 0
to 70 degC, 8-pin SOIC (D0008A), Green (RoHS &
no Sb/Br)
D0008A
NE5532ADR
Texas Instruments
TPA3251D2EVM
Value
SLVUAG8A – September 2015 – Revised October 2015
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Board Layouts, Bill of Materials, and Schematic
www.ti.com
Table 4. Bill of Materials (continued)
Designator
Qty
U7
1
C73, C74, C75,
C76
0
C77, C78, C79,
C80
0
FID1, FID2, FID3,
FID4, FID5, FID6
Value
Description
Package
Reference
Part Number
Manufacturer
ULTRA-SMALL SUPPLY VOLTAGE
SUPERVISORS, DCK0005A
DCK0005A
TPS3802K33DCKR
Texas Instruments
22pF
CAP, CERM, 22 pF, 50 V, +/- 5%, C0G/NP0, 0603
0603
GRM1885C1H220JA01D
Murata
1uF
CAP, CERM, 1 µF, 50 V, +/- 10%, X7R, 1206
1206
GRM31MR71H105KA88L
Murata
0
Fiducial mark. There is nothing to buy or mount.
Fiducial
N/A
N/A
J13
0
Header, 100mil, 2x1, Gold, TH
Sullins 100mil,
1x2, 230 mil above
insulator
PBC02SAAN
Sullins Connector
Solutions
R34, R58, R59,
R60
0
0
RES, 0, 5%, 0.1 W, 0603
0603
CRCW06030000Z0EA
Vishay-Dale
R47, R49, R50,
R51
0
10.0k
RES, 10.0 k, 1%, 0.1 W, 0603
0603
CRCW060310K0FKEA
Vishay-Dale
R54, R55, R56,
R57
0
3.3
RES, 3.3, 5%, 0.75 W, 2010
2010
CRCW20103R30JNEF
Vishay-Dale
SLVUAG8A – September 2015 – Revised October 2015
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Copyright © 2015, Texas Instruments Incorporated
TPA3251D2EVM
13
Board Layouts, Bill of Materials, and Schematic
4.4
www.ti.com
TPA3251D2EVM Schematic
The schematic for TPA3251D2EVM is illustrated in Figure 6.
MODE PIN SELECTION
PVDD
D3
U1
M2
C39
47µF
0
C11
0.01µF
C3
1µF
M1 INPUT MODE
0
2N + 1
OUTPUT
DESCRIPTION
2xBTL
STEREO BTL OUTPUT, AD MODE
VIN
0
1
2N/1N + 1
1xBTL + 2xSE
2.1 BTL + SE MODE, AD MODE
1
0
2N + 1
1xPBTL
PARALLEL BTL OUTPUT, AD MODE
1
1
1N + 1
4xSE
SINGLE ENDED OUTPUT, AD MODE
R2
0.1uF
8
182k
GND
RON/SD
7
GND
SS
5
C12
4700pF
BST
2
SW
1
C16
10µF
C15
0.1uF
GND
C20
0
22pF
R8
10.0k
R7
10.0k
10µF
R9
100k
C17
10µF
R5
TP4
1
2
3
0
22pF
C28
10µF
R10
+3.3V
GND
D5
R53
499
GND
C33
1µF
PVDD-CD
VDD
GND
8
R1
U5B
6
GND
GVDD-AB
DNP
TP15
VDD
DNP
TP16
GVDD-CD
DNP
TP17
GVDD_CD
0
7
10.0k
GND
+12V
GND
R42
C47
1µF
C69
0.1uF
5
NE5532ADR
GND
4
R43
100k
C40
1µF
C41
1µF
PVDD_AB
PVDD_AB
PVDD_AB
31
30
29
PVDD_CD
PVDD_CD
PVDD_CD
1
VDD
2
GVDD_CD
DVDD
DNP
TP18
AVDD
DNP
TP19
22
11
14
+12V-OA
GND
R37
10.0k
INA
DNP
TP20
INB
DNP
TP21
INC
DNP
TP22
IND
DNP
TP23
VMID
GND
R38
10.0k
+3.3V
GND
M1
0.1uF
J7
1
2
R36
1
2
R52
J8
M1
GND
RESETz
GND
10.0k
GND
GND
IN=PBTL
OUT=BTL/SE
0.1uF
10µF
1
2
3
J6
0
22pF
R21
10.0k
R20
10.0k
VMID
C55
OUT_B
OUT_C
1
2
3
35
OUT_B
OUT_C
AVDD
INPUT_B
6
INPUT_B
16
INPUT_C
17
INPUT_D
7
OC_ADJ
OUT_D
OUT_D
28
27
BST_C
24
BST_D
23
TP13
3
4
RESET
18
CLIP OTW
VBG
FAULT
21
20
19
1
2
J21
C_START
15
10
9
GND
GND
GND
GND
GND
GND
GND
GND
42
41
34
33
26
25
13
12
10µF
INPUT_C
C49
0.01µF
C50
0.47µF
MODE
SELECTION
100
C_START
OC_IOP
OC_IOM
C58
100pF
GND
GND
FREQ_ADJ
FAULT
R14
3.3
GND
J11
GNDAB
Black
GND
C42
OUT_C
OC
GND
TP11
OUTC
OUTC
7uH 6.5A
MA5173
DNP VBG
TP27
J2
2
1
470µF
C43
0.68µF
C44
1000pF
C45
0.01µF
C68
0.1µF
GND
R18
3.3
GND
Hi Current Shunt
GND
J25
GND
L5
C56
OD
TP1
1
2
TP12
OUTD
OUTD
7uH 6.5A
MA5173
HEATSINK
DNP FREQ_ADJ
TP26
C37
0.01µF
J24
TP14
GND
Hi Current Shunt
C52
0.033µF
C54
0.033µF
OUT_D
GND
C36
1000pF
PWMD
TP9
CLIP_OTW
VBG
TP10
OUTB
OUTB
470µF
C35
0.68µF
GND
SE
DIFF
C34
OB
7uH 6.5A
MA5173
TPA3251D2DDVR
4
3
2
1
OSCILLATOR
SYNC
INTERFACE
GND
L3
OUT_B
OUT_D
GND
RESET
R11
3.3
GND
J23
GND
M1
M2
C26
0.01µF
Hi Current Shunt
L4
M1
M2
J9
2
1
C25
1000pF
GND
PWMC
TP7
INPUT_A
TP3
OUTA
OUTA
470µF
PWMA
TP2
PWMB
TP5
DVDD
INPUT_D
OC-ADJ
DNP
TP24
R13
OA
C24
0.68µF
OUT_A
32
GVDD_CD
OUT = BTL
M2
J17
R19
J19
8
R45
100k
40
39
VDD
GND
R44
OUT_A
OUT_A
GVDD_AB
INPUT_C
8
GND
C57
43
7uH 6.5A
MA5173
C27
0.033µF
C29
0.033µF
44
BST_B
TP6
IN = SE
+3.3V
C51
C53
10µF
5
BST_A
22.0k
DNP
TP25
1
2
3
J5
10.0k
GND
+12V-OA
C62
INPUT_A
GND
C72
C70
10µF
GND
R59
DNP0
DNP
38
37
36
GVDD_AB
C21
OUT_A
U4
C48
1µF
100
C30
100pF
VMID
C46
2200µF
C22
0.1uF
10µF
R58
DNP0
DNP
Hi Current Shunt
GND
L2
TP8
INPUT_B
10.0k
C71
3
4
1
GND
3.3
R12
R41
INPUT SE C
SE CD
DIFF C+
C10
100µF
GND
GND
PVDD
R6
GND
C23
GND
C32
1µF
GND
+12V
DIFF
GND
INC/CD
GND
J22
SE
4
GND
3
4
1
GND
PVDD-AB
C31
2200µF
GND
U5A
2
1
2
3
J18
+3.3V
2
4
OUT
PAD
GND
GND
GND
GVDD_AB
C14
0.1uF
INPUT_A
1
INPUT SE B
DIFF A-
LM2940IMP-12/NOPB
GND
IN
C6
10µF
C9
0.1uF
PVDD
C19
100pF
NE5532ADR
INB
3
C5
47µF
100
J4
8
R34
DNP0
DNP
R4
3
J14
2
0
GND
VMID
J10
GND
+12V
R3
INPUT SE A
SE AB
DIFF A+
3
GND
Green
C18
INA/AB
OUT
TAB
0.8A
GND
3
4
1
IN
4
GND
C81
10µF
J3
1
+12V-OA
L6
10uH
C8
0.47µF
R40
1.00k
LM5010ASD/NOPB
GND
+12V
C38
4.7µF
GND
11
DAP
U2
TLV1117-33IDCY
+12V
U3
R39
4.99k
6
FB
SGND
+15V
C7
5600pF
D1
100V/1A
3
ISEN
RTN
4
GND
C13
GND
L1
0.1uF
C1
0.047µF
100uH 1.5A
9
VCC
C2
C4
2.2µF
GND
10
2
1
1
PVDD
J1
470µF
C59
0.68µF
FAULTz
C60
1000pF
C61
0.01µF
CLIP_OTWz
GND
R22
3.3
GND
J20
U6A
2
GNDCD
Black
1
3
C65
R46
NE5532ADR
GND
4
J12
1
2
3
0
22pF
C63
10µF
GND
R23
INPUT_D
+3.3V
J16
100
C64
100pF
R25
10.0k
8
GND
GND
3
4
1
10.0k
10.0k
R16
20.0k
R17
30.0k
2
4
6
8
GND
7
GND
5
J13
DNP
DNP
NE5532ADR
VMID
10µF
R60
DNP0
DNP
IND
INPUT SE D
DIFF C-
R48
100k
GND
GND
SLAVE MODE
MASTER MODE
MASTER MODE AM1
MASTER MODE AM2
FREQUENCY
ADJUST
U6B
6
GND
1
3
5
7
R30
4
J15
R27
C66
R15
R47
DNP
10.0k DNP
C73
DNP
22pF DNP
OUTA
R49
DNP
10.0k DNP
C74
DNP
22pF DNP
OUTB
R50
DNP
10.0k DNP
C75
DNP
22pF DNP
OUTC
R51
DNP
10.0k DNP
C76
OUTD
FAULT
0
C77
DNP
1µF
DNP
C78
R54
DNP
3.3
DNP
DNP
1µF
DNP
GND
C79
R55
DNP
3.3
DNP
DNP
1µF
DNP
C80
R56
DNP
3.3
DNP
GND
DNP
1µF
DNP
R57
DNP
3.3
DNP
GND
GND
PVDD
+15V
R61
100k
C82
R32
12.0k
+3.3V
C83
1µF
4
VDD
RESET
5
R24
47k
RESET
FAULT
C84
1µF
R26
3.30k
5
C67
0.1uF
4
MR
+12V
R31
3
GND
S1
6
+3.3V
+12V
U7
0.1uF
DNP
22pF DNP
GND
GND
1
2
R29
R28
47k
1.00k
R35
Q2
D4
Red
FAULT
100
1.00k
R33
Q1
D2
Orange
OTW
100
MONITORS
TPS3802K33DCKR
3
CLIP_OTW
GND
1
GND
RESET
GND
GND
GND
GND
GND
GND
GND
GND
Figure 6. TPA3251D2EVM Schematic
14
TPA3251D2EVM
SLVUAG8A – September 2015 – Revised October 2015
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Copyright © 2015, Texas Instruments Incorporated
Revision History
www.ti.com
Revision History
Changes from Original (September 2015) to A Revision ............................................................................................... Page
•
•
•
•
•
•
•
Changed Nominal value to 10 kΩ in Frequency Adjust Master Mode Selection table. .......................................... 3
Text of second paragraph of TPA3251D2EVM Frequency Adjust section improved............................................. 3
Text of TPA3251D2EVM Single-Ended and Differential Input section improved. ................................................ 3
Typos corrected in TPA3251D2EVM Connections image. .......................................................................... 5
Added instruction to not power up EVM until all connections are complete. ...................................................... 6
Added note regarding power supply usage to the end of the Single-Ended (SE) Output (4.0) Operation section. .......... 8
Changed part number in the HEATSINK row of the BOM. ......................................................................... 11
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
SLVUAG8A – September 2015 – Revised October 2015
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Copyright © 2015, Texas Instruments Incorporated
Revision History
15
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
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Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
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Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
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requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
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