TPA4860EVM

TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 1-W MONO AUDIO POWER AMPLIFIER FEATURES • • • • • • • • • • D PACKAGE (TOP VIEW) 1-W BTL Output (5 V, 0.2 % THD+N) 3.3-V and 5-V Operation No Output Coupling Capacitors Required Shutdown Control (IDD = 0.6 µA) Headphone Interface Logic Uncompensated Gains of 2 to 20 (BTL Mode) Surface-Mount Packaging Thermal and Short-Circuit Protection High Power Supply Rejection(56-dB at 1 kHz) LM4860 Drop-In Compatible GND SHUTDOWN HP-SENSE GND BYPASS HP-IN1 HP-IN2 GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 GND VO2 IN+ IN– VDD GAIN VO1 GND DESCRIPTION The TPA4860 is a bridge-tied load (BTL) audio power amplifier capable of delivering 1 W of continuous average power into an 8-Ω load at 0.4 % THD+N from a 5-V power supply in voiceband frequencies (f < 5 kHz). A BTL configuration eliminates the need for external coupling capacitors on the output in most applications. Gain is externally configured by means of two resistors and does not require compensation for settings of 2 to 20. Features of this amplifier are a shutdown function for power-sensitive applications as well as headphone interface logic that mutes the output when the speaker drive is not required. Internal thermal and short-circuit protection increases device reliability. It also includes headphone interface logic circuitry to facilitate headphone applications. The amplifier is available in a 16-pin SOIC surface-mount package that reduces board space and facilitates automated assembly. TYPICAL APPLICATION CIRCUIT VDD 12 VDD/2 RF Audio Input RI 11 GAIN 13 IN– 14 IN+ VDD CS VO1 10 CI 1W CB VDD NC Headphone Plug 5 BYPASS 6 HP-IN1 7 HP-IN2 3 HP-SENSE 2 SHUTDOWN VO2 15 RPU Bias Control 1, 4, 8, 9, 16 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1996–2004, Texas Instruments Incorporated TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. AVAILABLE OPTIONS PACKAGED DEVICE TA SMALL OUTLINE (D) –40°C to 85°C TPA4860D ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) UNIT VDD Supply voltage VI Input voltage 6V –0.3 V to VDD +0.3 V Continuous total power dissipation Internally Limited (See Dissipation Rating Table) TA Operating free-air temperature range –40°C to 85°C Tstg Storage temperature range –65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds (1) 260°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C D 1250 mW 10 mW/°C 800 mW 650 mW RECOMMENDED OPERATING CONDITIONS VDD Supply voltage VIC Common-mode input voltage TA Operating free-air temperature 2 MIN MAX 2.7 5.5 UNIT V VDD = 3.3 V 1.25 2.7 V VDD = 5 V 1.25 4.5 V –40 85 °C TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 ELECTRICAL CHARACTERISTICS at specified free-air temperature range, VDD = 3.3 V (unless otherwise noted) PARAMETER VOO TEST CONDITIONS TPA4860 MIN TYP MAX 5 20 (1) Output offset voltage (measured differentially) See Supply ripple rejection ratio VDD = 3.2 V to 3.4 V UNIT mV 75 dB IDD Quiescent current 2.5 mA IDD(M) Quiescent current, mute mode 750 µA IDD(SD) Quiescent current, shutdown mode 0.6 µA VIH High-level input voltage (HP-IN) 1.7 V VIL Low-level input voltage (HP-IN) 1.7 V VOH High-level output voltage (HP-SENSE) IO = 100 µA VOL Low-level output voltage (HP-SENSE) IO = -100 µA (1) 2.5 2.8 0.2 V 0.8 V At 3 V < VDD < 5 V the dc output voltage is approximately VDD/2. OPERATING CHARACTERISTICS VDD = 3.3 V, TA = 25°C, RL = 8 Ω PARAMETER MIN TYP MAX UNIT AV = 2 350 mW THD = 2%, f = 1 kHz, AV = 2 500 mW Maximum output power bandwidth Gain = 10, THD = 2% 20 kHz Unity-gain bandwidth Open loop 1.5 MHz BTL f = 1 kHz 56 dB SE f = 1 kHz 30 dB Gain = 2 20 µV Output power BOM B1 (1) Supply ripple rejection ratio (1) (2) TPA4860 THD = 0.2%, f = 1 kHz, PO Vn TEST CONDITIONS Noise output voltage (2) Output power is measured at the output terminals of the device. Noise voltage is measured in a bandwidth of 20 Hz to 20 kHz. 3 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 ELECTRICAL CHARACTERISTICS at specified free-air temperature range, VDD = 5 V (unless otherwise noted) PARAMETER VOO TEST CONDITIONS TPA4860 MIN (1) Output offset voltage See Supply ripple rejection ratio VDD = 4.9 V to 5.1 V TYP MAX 5 20 UNIT mV 70 dB IDD Supply current 3.5 mA IDD(M) Supply current, mute 750 µA IDD(SD) Supply current, shutdown 0.6 µA VIH High-level input voltage (HP-IN) 2.5 V VIL Low-level input voltage (HP-IN) 2.5 V VOH High-level output voltage (HP-SENSE) IO = 500 µA VOL Low-level output voltage (HP-SENSE) IO = -500 µA (1) 2.5 2.8 0.2 V 0.8 V At 3 V < VDD < 5 V the dc output voltage is approximately VDD/2. OPERATING CHARACTERISTICS VDD = 5 V, TA = 25°C, RL= 8 Ω PARAMETER TYP MAX UNIT AV = 2 1000 mW AV = 2 1100 mW Maximum output power bandwidth Gain = 10, THD = 2% 20 kHz Unity-gain bandwidth Open loop 1.5 MHz BTL f = 1 kHz 56 dB SE f = 1 kHz 30 dB Gain = 2 20 µV BOM B1 (1) Supply ripple rejection ratio 4 MIN THD = 2%, f = 1 kHz, Output power (1) (2) TPA4860 THD = 0.2%, f = 1 kHz, PO Vn TEST CONDITIONS Noise output voltage (2) Output power is measured at the output terminals of the device. Noise voltage is measured in a bandwidth of 20 Hz to 20 kHz. TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VOO Output offset voltage Distribution IDD Supply current distribution vs Free-air temperature 1,2 3,4 vs Frequency 5, 6, 7, 8, 9, 10,11,15, 16,17,18 THD+N Total harmonic distortion plus noise IDD Supply current vs Supply voltage Vn Output noise voltage vs Frequency Maximum package power dissipation vs Free-air temperature Power dissipation vs Output power Maximum output power vs Free-air temperature 28 vs Load resistance 29 vs Supply voltage 30 vs Output power Output power 12, 13, 14, 19,20,21 22 23, 24 25 26, 27 Open-loop frequency response vs Frequency 31 Supply ripple rejection ratio vs Frequency 32, 33 DISTRIBUTION OF TPA4860 OUTPUT OFFSET VOLTAGE DISTRIBUTION OF TPA4860 OUTPUT OFFSET VOLTAGE 25 25 VCC = 5 V VCC = 3.3 V 20 Number of Amplifiers Number of Amplifiers 20 15 10 5 15 10 5 0 0 −3 −2 −1 0 1 2 3 4 5 6 VOO − Output Offset Voltage − mV Figure 1. 7 −3 −2 −1 0 1 2 3 4 5 6 7 VOO − Output Offset Voltage − mV Figure 2. 5 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 SUPPLY CURRENT DISTRIBUTION vs FREE-AIR TEMPERATURE SUPPLY CURRENT DISTRIBUTION vs FREE-AIR TEMPERATURE 4.5 3.5 VCC = 5 V VCC = 3.3 V 3 3.5 I DD − Supply Current − mA I DD − Supply Current − mA 4 3 2.5 Typical 2 1.5 1 2.5 2 1 0.5 0.5 0 0 −20 25 85 −20 85 Figure 3. Figure 4. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 VDD = 5 V PO = 1 W AV = −2 V/V RL = 8 Ω 1 CB = 0.1 µF 0.1 CB = 1 µF 100 1k f − Frequency − Hz Figure 5. 6 25 TA − Free-Air Temperature − °C THD+N − Total Harmonic Distortion Plus Noise − % THD+N − Total Harmonic Distortion Plus Noise − % TA − Free-Air Temperature − °C 0.01 20 Typical 1.5 10 k 20 k 10 VDD = 5 V PO = 1 W AV = −10 V/V RL = 8 Ω 1 0.1 0.01 20 CB = 0.1 µF CB = 1 µF 100 1k f − Frequency − Hz Figure 6. 10 k 20 k TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 10 VDD = 5 V PO = 1 W AV = −20 V/V RL = 8 Ω CB = 0.1 µF 1 CB = 1 µF 0.1 0.01 20 100 1k TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY THD+N − Total Harmonic Distortion Plus Noise − % THD+N − Total Harmonic Distortion Plus Noise − % TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 k 20 k 10 VDD = 5 V PO = 0.5 W AV = −2 V/V RL = 8 Ω 1 CB = 0.1 µF 0.1 CB = 1 µF 0.01 20 100 10 k 20 k Figure 7. Figure 8. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 VDD = 5 V PO = 0.5 W AV = −10 V/V RL = 8 Ω CB = 0.1 µF 1 0.1 CB = 1 µF 0.01 20 1k f − Frequency − Hz 100 1k f − Frequency − Hz Figure 9. 10 k 20 k THD+N − Total Harmonic Distortion Plus Noise − % THD+N − Total Harmonic Distortion Plus Noise − % f − Frequency − Hz 10 VDD = 5 V PO = 0.5 W AV = −20 V/V RL = 8 Ω CB = 0.1 µF 1 CB = 1 µF 0.1 0.01 20 100 1k 10 k 20 k f − Frequency − Hz Figure 10. 7 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 10 THD+N − Total Harmonic Distortion Plus Noise − % THD+N − Total Harmonic Distortion Plus Noise − % TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY VDD = 5 V AV = −10 V/V Single Ended 1 0.1 0.01 20 RL = 8 Ω PO = 250 mW RL = 32 Ω PO = 60 mW 100 1k 10 k 20 k 10 VDD = 5 V AV = −2 V/V RL = 8 Ω f = 20 Hz 1 CB = 0.1 µF CB = 1 µF 0.1 0.01 0.02 Figure 12. TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER THD+N − Total Harmonic Distortion Plus Noise − % THD+N − Total Harmonic Distortion Plus Noise − % 8 1 Figure 11. 10 VDD = 5 V AV = −2 V/V RL = 8 Ω f = 1 kHz 1 CB = 0.1 µF 0.1 0.01 0.02 0.1 0.1 2 PO − Output Power − W f − Frequency − Hz 1 2 10 VDD = 5 V AV = −2 V/V RL = 8 Ω f = 20 kHz 1 CB = 0.1 µF 0.1 0.01 0.02 0.1 PO − Output Power − W PO − Output Power − W Figure 13. Figure 14. 1 2 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 10 VDD = 3.3 V PO = 350 mW RL = 8 Ω AV = −2 V/V 1 CB = 0.1 µF 0.1 CB = 1 µF 0.01 20 100 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY THD+N − Total Harmonic Distortion Plus Noise − % THD+N − Total Harmonic Distortion Plus Noise − % TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1k 10 k 20 k 10 VDD = 3.3 V PO = 350 mW RL = 8 Ω AV = −10 V/V 1 CB = 0.1 µF 0.1 CB = 1 µF 0.01 20 100 Figure 16. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY VDD = 3.3 V PO = 350 mW RL = 8 Ω AV = −20 V/V CB = 0.1 µF 1 0.01 20 10 k 20 k Figure 15. 10 0.1 1k f − Frequency − Hz CB = 1 µF 100 1k f − Frequency − Hz Figure 17. 10 k 20 k THD+N − Total Harmonic Distortion Plus Noise − % THD+N − Total Harmonic Distortion Plus Noise − % f − Frequency − Hz 10 VDD = 3.3 V AV = −10 V/V Single Ended 1 RL = 8 Ω PO = 250 mW RL = 32 Ω PO = 60 mW 0.1 0.01 20 100 1k 10 k 20 k f − Frequency − Hz Figure 18. 9 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 THD+N − Total Harmonic Distortion Plus Noise − % 10 VDD = 3.3 V AV = −2 V/V RL = 8 Ω f = 20 Hz 1 0.1 CB = 0.1 µF CB = 1.0 µF 0.01 0.02 0.1 1 2 10 VDD = 3.3 V AV = −2 V/V RL = 8 Ω f = 1 kHz 1 CB = 0.1 µF 0.1 0.01 0.02 0.1 1 PO − Output Power − W PO − Output Power − W Figure 19. Figure 20. TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER SUPPLY CURRENT vs SUPPLY VOLTAGE 2 5 10 TA = 0°C TA = −20°C 4 1 CB = 0.1 µF 0.1 VDD = 3.3 V AV = −2 V/V RL = 8 Ω f = 20 kHz 0.01 20 m 0.1 PO − Output Power − W Figure 21. 10 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER I DD − Supplu Current − mA THD+N − Total Harmonic Distortion Plus Noise − % THD+N − Total Harmonic Distortion Plus Noise − % TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 1 2 TA = 25°C 3 TA = 85°C 2 1 0 2.5 3 3.5 4 4.5 VDD − Supply Voltage − V Figure 22. 5 5.5 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 OUTPUT NOISE VOLTAGE vs FREQUENCY OUTPUT NOISE VOLTAGE vs FREQUENCY 103 103 VCC = 3.3 V Vn − Output Noise Voltage − µ V Vn − Output Noise Voltage − µ V VCC = 5 V 102 V01 +V02 V02 101 V01 1 20 100 1k 102 V01 +V02 V02 101 V01 1 20 10 k 20 k 100 f − Frequency − Hz 1k 10 k 20 k f − Frequency − Hz Figure 23. Figure 24. MAXIMUM PACKAGE POWER DISSIPATION vs FREE-AIR TEMPERATURE POWER DISSIPATION vs OUTPUT POWER 1.5 1.5 1.25 RL = 4 Ω Power Dissipation − W Maximum Package Power Dissipation − W VDD = 5 V 1 0.75 0.5 1 RL = 8 Ω 0.5 0.25 0 −25 RL = 16 Ω 0 0 25 50 75 100 125 TA − Free-Air Temperature − °C Figure 25. 150 175 0 0.25 0.5 0.75 1 1.25 1.5 1.75 PO − Output Power − W Figure 26. 11 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 POWER DISSIPATION vs OUTPUT POWER MAXIMUM OUTPUT POWER vs FREE-AIR TEMPERATURE 1 160 VDD = 3.3 V TA − Free-Air Temperature − °C Power Dissipation − W 140 0.75 RL = 4 Ω 0.5 RL = 8 Ω 0.25 RL = 16 Ω 120 100 80 RL = 8 Ω 60 40 RL = 4 Ω 20 RL = 16 Ω 0 0 0 0.25 0.5 0 0.75 0.5 0.75 1.25 1 PO − Maximum Output Power − W Figure 27. Figure 28. OUTPUT POWER vs LOAD RESISTANCE OUTPUT POWER vs SUPPLY VOLTAGE 1.50 2 1.4 AV = −2 V/V f = 1 kHz CB = 0.1 µF THD+n ≤ 1% 1.2 1.75 1 PO − Power Output − W PO − Power Output − W 0.25 PO − Output Power − W 0.8 0.6 VCC = 5 V 0.4 AV = −2 V/V f = 1 kHz CB = 0.1 µF THD+n ≤ 1% 1.5 1.25 RL = 4 Ω 1 RL = 8 Ω 0.75 0.5 0.2 RL = 16 Ω 0.25 VCC = 3.3 V 0 4 12 8 12 16 20 24 28 32 36 40 44 48 0 2.5 3 3.5 4 4.5 Load Resistance − Ω Supply Voltage − V Figure 29. Figure 30. 5 5.5 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY OPEN-LOOP FREQUENCY RESPONSE Supply Ripple Rejection Ratio − dB VDD = 5 V RL = 8 Ω CB = 0.1 µF 80 0° Phase 40 −90° Gain 20 Phase −45° 60 −135° 0 −180° VDD = 5 V RL = 8 Ω Bridge-Tied Load −10 −20 −30 −40 CB = 0.1 µF −50 −60 CB = 1 µF −70 −80 −90 −20 10 100 1k 10 k 1M 100 k −225° 10 M −100 100 1k f − Frequency − Hz 10 k 20 k f − Frequency − Hz Figure 31. Figure 32. SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY 0 −10 Supply Ripple Rejection Ratio − dB G − Gain − dB 0 45° 100 −20 CB = 0.1 µF VDD = 5 V RL = 8 Ω Single Ended −30 −40 −50 −60 CB = 1 µF −70 −80 −90 −100 100 1k 10 k 20 k f − Frequency − Hz Figure 33. 13 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 APPLICATION INFORMATION BRIDGED-TIED LOAD VERSUS SINGLE-ENDED MODE Figure 34 shows a linear audio power amplifier (APA) in a bridge-tied load (BTL) configuration. A BTL amplifier actually consists of two linear amplifiers driving both ends of the load. There are several potential benefits to this differential drive configuration but initially let us consider power to the load. The differential drive to the speaker means that as one side is slewing up the other side is slewing down and vice versa. This, in effect, doubles the voltage swing on the load as compared to a ground-referenced load. Plugging twice the voltage into the power equation, where voltage is squared, yields 4 times the output power from the same supply rail and load impedance (see Equation 1). VO(PP) V (RMS)
 2 2 Power
V (RMS) 2 RL (1) VDD VO(PP) RL 2x VO(PP) VDD –VO(PP) Figure 34. Bridge-Tied Load Configuration In a typical computer sound channel operating at 5 V, bridging raises the power into an 8-Ω speaker from a singled-ended (SE) limit of 250 mW to 1 W. In sound power, that is a 6-dB improvement which is loudness that can be heard. In addition to increased power there are frequency response concerns; consider the single-supply SE configuration shown in Figure 35. A coupling capacitor is required to block the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 40 µF to 1000 µF); so, they tend to be expensive, occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance of the system. This frequency-limiting effect is due to the high-pass filter network created with the speaker impedance and the coupling capacitance and is calculated with Equation 2. 1 fc
2
R L CC (2) For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency performance is then limited only by the input network and speaker response. Cost and PCB space are also minimized by eliminating the bulky coupling capacitor. 14 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 APPLICATION INFORMATION (continued) VDD VO(PP) CC RL VO(PP) Figure 35. Single-Ended Configuration Increasing power to the load does carry a penalty of increased internal power dissipation. The increased dissipation is understandable considering that the BTL configuration produces 4 times the output power of the SE configuration. Internal dissipation versus output power is discussed further in the thermal considerations section. BTL AMPLIFIER EFFICIENCY Linear amplifiers are notoriously inefficient. The primary cause of these inefficiencies is voltage drop across the output stage transistors. The internal voltage drop has two components. One is the headroom or dc voltage drop that varies inversely to output power. The second component is due to the sine-wave nature of the output. The total voltage drop can be calculated by subtracting the RMS value of the output voltage from VDD. The internal voltage drop multiplied by the RMS value of the supply current, IDD(RMS), determines the internal power dissipation of the amplifier. An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power supply to the power delivered to the load. To accurately calculate the RMS values of power in the load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 36). VO IDD IDD(RMS) VL(RMS) Figure 36. Voltage and Current Waveforms for BTL Amplifiers Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are different between SE and BTL configurations. In an SE application the current waveform is a half-wave rectified shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different. Keep in mind that for most of the waveform both the push and pull transistor are not on at the same time, which supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform. The following equations are the basis for calculating amplifier efficiency. 15 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 APPLICATION INFORMATION (continued) Efficiency
PL P SUP Where: V L(RMS)
PL
VP 2 VL(RMS) 2 RL
Vp 2 2R L P SUP
VDD I DD(RMS)
I DD(RMS)
V DD 2VP
RL 2V P
RL (3)

VP Efficiency of a BTL configuration

2V DD   P LR L 2 12 2V DD (4) Table 1 employs Equation 4 to calculate efficiencies for four different output power levels. Note that the efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased, resulting in a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at full output power is less than in the half power range. Calculating the efficiency for a specific system is the key to proper power supply design. For a stereo 1-W audio system with 8-Ω loads and a 5-V supply, the maximum draw on the power supply is almost 3.25 W. Table 1. Efficiency vs Output Power in 5-V 8-Ω BTL Systems (1) OUTPUT POWER (W) EFFICIENCY (%) PEAK-TO-PEAK VOLTAGE (V) INTERNAL DISSIPATION (W) 0.25 31.4 2.00 0.55 0.50 44.4 2.83 0.62 1.00 62.8 4.00 0.59 1.25 70.2 4.47 (1) 0.53 High peak voltages cause the THD to increase. A final point to remember about linear amplifiers whether they are SE or BTL configured is how to manipulate the terms in the efficiency equation to utmost advantage when possible. Note that in Equation 4, VDD is in the denominator. This indicates that as VDD goes down, efficiency goes up. For example, if the 5-V supply is replaced with a 10-V supply (TPA4860 has a maximum recommended VDD of 5.5 V) in the calculations of Table 1, then efficiency at 1 W would fall to 31% and internal power dissipation would rise to 2.18 W from 0.59 W at 5 V. Then, for a stereo 1-W system from a 10-V supply, the maximum draw would be almost 6.5 W. Choose the correct supply voltage and speaker impedance for the application. 16 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 SELECTION OF COMPONENTS Figure 37 is a schematic diagram of a typical notebook computer application circuit. 50 kΩ CF 50 kΩ VDD 12 CS VDD/2 RF Audio Input RI 11 GAIN 13 IN − 14 IN + VDD = 5 V VO1 10 CI CB 46 kΩ 1-W Internal Speaker 46 kΩ 5 BYPASS 6 HP-IN1 7 HP-IN2 3 HP-SENSE 2 SHUTDOWN VO2 15 VDD RPU NC Bias Control 1, 4, 8, 9, 16 Headphone Plug Figure 37. TPA4860 Typical Notebook Computer Application Circuit Gain Setting Resistors, RF and RI The gain for the TPA4860 is set by resistors RF and RI according to Equation 5.   Gain 
2 RF RI (5) BTL mode operation brings about the factor of 2 in the gain equation due to the inverting amplifier mirroring the voltage swing across the load. Given that the TPA4860 is a MOS amplifier, the input impedance is high; consequently, input leakage currents are not generally a concern although noise in the circuit increases as the value of RF increases. In addition, a certain range of RF values is required for proper start-up operation of the amplifier. Taken together, it is recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 kΩ and 20 kΩ. The effective impedance is calculated in Equation 6. R FR I Effective Impedance  RF
RI (6) As an example, consider an input resistance of 10 kΩ and a feedback resistor of 50 kΩ. The gain of the amplifier would be –10 and the effective impedance at the inverting terminal would be 8.3 kΩ, which is well within the recommended range. For high-performance applications metal film resistors are recommended because they tend to have lower noise levels than carbon resistors. For values of RF above 50 kΩ, the amplifier tends to become unstable due to a pole formed from RF and the inherent input capacitance of the MOS input structure. For this reason, a small compensation capacitor of approximately 5 pF should be placed in parallel with RF. In effect, this creates a low-pass filter network with the cutoff frequency defined in Equation 7. 17 TPA4860 SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 f c(lowpass)
www.ti.com 1 2
R F CF (7) For example, if RF is 100 kΩ and CF is 5 pF, then fc is 318 kHz, which is well outside of the audio range. Input Capacitor, CI In the typical application, an input capacitor, CI is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, CI and RI form a high-pass filter with the corner frequency determined in Equation 8. 1 f c(highpass)
2
R I CI (8) The value of CI is important to consider as it directly affects the bass (low-frequency) performance of the circuit. Consider the example where RI is 10 kΩ and the specification calls for a flat bass response down to 40 Hz. Equation 8 is reconfigured as Equation 9. 1 CI
2
R I f c (9) In this example, CI is 0.40 µF; so, one would likely choose a value in the range of 0.47 µF to 1 µF. A further consideration for this capacitor is the leakage path from the input source through the input network (RI, CI) and the feedback resistor (RF) to the load. This leakage current creates a dc-offset voltage at the input to the amplifier that reduces useful headroom, especially in high-gain applications. For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at VDD/2, which is likely higher that the source dc level. Note that it is important to confirm the capacitor polarity in the application. POWER SUPPLY DECOUPLING CS The TPA4860 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF placed as close as possible to the device VDD lead, works best. For filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power amplifier is recommended. MIDRAIL BYPASS CAPACITOR, CB The midrail bypass capacitor, CB, serves several important functions. During start-up or recovery from shutdown mode, CB determines the rate at which the amplifier starts up. This helps to push the start-up pop noise into the subaudible range (so low it cannot be heard). The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is fed from a 25-kΩ source inside the amplifier. To keep the start-up pop as low as possible, the relationship shown in Equation 10 should be maintained. 1  1 C B
25 kΩ C I R I (10) As an example, consider a circuit where CB is 0.1 µF, CI is 0.22 µF and RI is 10 kΩ. Inserting these values into the Equation 9, we get: 400 ≤ 454 which satisfies the rule. Recommended value for bypass capacitor CB is 0.1-µF to 1-µF ceramic or tantalum low-ESR for the best THD and noise performance. 18 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 SINGLE-ENDED OPERATION Figure 38 is a schematic diagram of the recommended SE configuration. In SE mode configurations, the load should be driven from the primary amplifier output (VO1, terminal 10). VDD 12 CS VDD/2 RF Audio Input RI 11 GAIN 13 IN − VDD = 5 V VO1 10 CC 250-mW External Speaker CI 14 IN + CB 5 BYPASS VO2 15 RSE = 50 Ω CSE = 0.1 µF Figure 38. Singled-Ended Mode Gain is set by the RF and RI resistors and is shown in Equation 11. Because the inverting amplifier is not used to mirror the voltage swing on the load, the factor of 2 is not included. Gain 
  RF RI (11) The phase margin of the inverting amplifier into an open circuit is not adequate to ensure stability, so a termination load should be connected to VO2. This consists of a 50-Ω resistor in series with a 0.1-µF capacitor to ground. It is important to avoid oscillation of the inverting output to minimize noise and power dissipation. The output coupling capacitor required in single-supply SE mode also places additional constraints on the selection of other components in the amplifier circuit. The rules described earlier still hold with the addition of the following relationship: 1  1  1 C B
25 kΩ C I R I RLC C (12) OUTPUT COUPLING CAPACITOR, CC In the typical single-supply SE configuration, an output coupling capacitor (CC) is required to block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by Equation 13. 1 f c high
2
R L CC (13) The main disadvantage, from a performance standpoint, is that the load impedances are typically small, which drives the low-frequency corner higher. Large values of CC are required to pass low frequencies into the load. Consider the example where a CC of 68 µF is chosen and loads vary from 8 Ω, 32 Ω, to 47 kΩ. Table 2 summarizes the frequency response characteristics of each configuration. 19 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 Table 2. Common Load Impedances vs Low Frequency Output Characteristics in SE Mode RL CC LOWEST FREQUENCY 8Ω 68 µF 293 Hz 32 Ω 68 µF 73 Hz 47,000 Ω 68 µF 0.05 Hz As Table 2 indicates, most of the bass response is attenuated into 8-Ω loads while headphone response is adequate and drive into line level inputs (a home stereo for example) is good. HEADPHONE SENSE CIRCUITRY, Rpu The TPA4860 is commonly used in systems where there is an internal speaker and a jack for driving external loads (i.e., headphones). In these applications, it is usually desirable to mute the internal speaker(s) when the external load is in use. The headphone inputs (HP-1, HP-2) and headphone output (HP-SENSE) of the TPA4860 were specifically designed for this purpose. Many standard headphone jacks are available with an internal single-pole single-throw (SPST) switch that makes or breaks a circuit when the headphone plug is inserted. Asserting either or both HP-1 and/or HP-2 high mutes the output stage of the amplifier and causes HP-SENSE to go high. In battery-powered applications where power conservation is critical, HP-SENSE can be connected to the shutdown input as shown in Figure 39. This places the amplifier in a low current state for maximum power savings. Pullup resistors in the range from 1 kΩ to 10 kΩ are recommended for 5-V and 3.3-V operation. VDD RPU NC Headphone Plug 6 HP-IN1 7 HP-IN2 3 HP-SENSE 2 SHUTDOWN Bias Control Figure 39. Schematic Diagram of Typical Headphone Sense Application Table 3 details the logic for the mute function of the TPA4860. Table 3. Truth Table for Headphone Sense and Shutdown Functions INPUTS (1) HP-1 (1) (2) 20 OUTPUT SHUTDOWN Low Low Low Low Active Low High Low High Mute High Low Low High Mute High High Low High Mute X (2) X (2) High X (2) Shutdown Inputs should never be left unconnected. X = do not care HP-SENSE AMPLIFIER STATE HP-2 TPA4860 www.ti.com SLOS164B – SEPTEMBER 1996 – REVISED JUNE 2004 SHUTDOWN MODE The TPA4860 employs a shutdown mode of operation designed to reduce quiescent supply current, IDD(q), to the absolute minimum level during periods of nonuse for battery-power conservation. For example, during device sleep modes or when other audio-drive currents are used (i.e., headphone mode), the speaker drive is not required. The SHUTDOWN input terminal should be held low during normal operation when the amplifier is in use. Pulling SHUTDOWN high causes the outputs to mute and the amplifier to enter a low-current state, IDD ~ 0.6 µA. SHUTDOWN should never be left unconnected because amplifier operation would be unpredictable. USING LOW-ESR CAPACITORS Low-ESR capacitors are recommended throughout this applications section. A real capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves like an ideal capacitor. THERMAL CONSIDERATIONS A prime consideration when designing an audio amplifier circuit is internal power dissipation in the device. The curve in Figure 40 provides an easy way to determine what output power can be expected out of the TPA4860 for a given system ambient temperature in designs using 5-V supplies. This curve assumes no forced airflow or additional heat sinking. 160 VDD = 5 V TA – Free-Air Temperature – °C 140 RL = 16 Ω 120 100 80 RL = 8 Ω 60 40 RL = 4 Ω 20 0 0 0.25 0.5 0.75 1 1.25 1.50 Maximum Output Power – W Figure 40. Free-Air Temperature Versus Maximum Continuous Output Power 5-V VERSUS 3.3-V OPERATION The TPA4860 was designed for operation over a supply range of 2.7 V to 5.5 V. This data sheet provides full specifications for 5-V and 3.3-V operation, as these are considered to be the two most common standard voltages. There are no special considerations for 3.3-V versus 5-V operation as far as supply bypassing, gain setting, or stability. Supply current is slightly reduced from 3.5 mA (typical) to 2.5 mA (typical). The most important consideration is that of output power. Each amplifier in TPA4860 can produce a maximum voltage swing of VDD – 1 V. This means, for 3.3-V operation, clipping starts to occur when VO(PP) = 2.3 V as opposed to when VO(PP) = 4 V while operating at 5 V. The reduced voltage swing subsequently reduces maximum output power into an 8-Ω load to less than 0.33 W before distortion begins to become significant. Operation at 3.3-V supplies, as can be shown from the efficiency formula in Equation 4, consumes approximately two-thirds the supply power for a given output-power level than operation from 5-V supplies. When the application demands less than 500 mW, 3.3-V operation should be strongly considered, especially in battery-powered applications. 21 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPA4860D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TPA4860 Samples TPA4860DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TPA4860 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of