TPD1E10B06DYARQ1

TPD1E10B06-Q1 SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 TPD1E10B06-Q1 Automotive 12-pF, ±5.5-V ±30-kV, Single Channel ESD Protection Diode in 0402 and SOD-523 Package 1 Features 3 Description • • The TPD1E10B06-Q1 device is a bidirectional TVS ESD protection diode in a small 0402 package convenient for space contrained applications and an industry standard leaded SOD-523 package that enables automatic optical inspection (AOI). The TPD1E10B06-Q1 is rated to dissipate ESD strikes above the maximum level specified in the IEC 61000-4-2 international standard (Level 4) since ESD voltages can easily reach 5000 V, which is more than enough to damage many integrated circuits, but during extreme conditions the voltages can be significantly higher. For example, in a low humidity environment voltages can exceed 20,000 V. • • • • • • • • • • AEC-Q101 qualified IEC 61000-4-2 Level 4 ESD protection – ±30-kV contact discharge – ±30-kV air-gap discharge ISO 10605 (330 pF, 330 Ω) ESD protection – ±8-kV contact discharge (DPY) – ±15-kV air-gap discharge (DPY) – ± 25-kV contact discharge (DYA) – ± 25-kV air-gap discharge (DYA) IEC 61000-4-5 surge protection – 6 A (8/20 µs) I/O capacitance 12 pF (typical) RDYN: 0.38 Ω (typical) DC breakdown voltage: ±6 V (minimum) Ultra low leakage current 100 nA (maximum) 10-V clamping voltage (typical at IPP = 1 A) Industrial temperature range: –40°C to +125°C Space-saving 0402 footprint Industry standard leaded SOD-523 package (1.6 mm × 0.8 mm × 0.65 mm) 2 Applications • • End equipment: – Head unit – Premium audio – External amplifier – Body control module – Gateway – Telematics – Camera module Interfaces: – Audio lines – Pushbuttons – Memory interface – GPIO The low dynamic resistance and low clamping voltage ensures system level protection against transient events, providing sufficient protection on designs that are exposed to ESD events. This device also features a 12-pF IO capacitance making it ideal for audio lines, push buttons, memory interfaces, or GPIOs. This device is also available without automotive qualification: TPD1E10B06. Device Information(1) PART NUMBER PACKAGE TPD1E10B06-Q1 (1) L Audio IN BODY SIZE (NOM) X1SON (2) 0.6 mm × 1.00 mm SOD-523 (2) 0.80 mm × 1.2 mm For all available packages, see the orderable addendum at the end of the data sheet. Audio amplifier class AB (ESD Sensitive) L Audio L GND R Audio IN Speaker connector (source of ESD) 1 1 R Audio Audio amplifier class AB (ESD Sensitive) R GND 2 GND 2 Typical Application Schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 ESD Ratings - AEC Specification..................................... 4 6.2 ESD Ratings—IEC Specification................................ 4 6.3 ESD Ratings—ISO Specification................................ 4 6.4 Recommended Operating Conditions.........................4 6.5 Thermal Information....................................................4 6.6 Electrical Characteristics.............................................5 6.7 Typical Characteristics................................................ 6 7 Detailed Description........................................................8 7.1 Overview..................................................................... 8 7.2 Functional Block Diagram........................................... 8 7.3 Feature Description.....................................................8 7.4 Device Functional Modes............................................9 8 Application and Implementation.................................. 10 8.1 Application Information............................................. 10 8.2 Typical Application.................................................... 10 9 Power Supply Recommendations................................12 10 Layout...........................................................................12 10.1 Layout Guidelines................................................... 12 10.2 Layout Example...................................................... 12 11 Device and Documentation Support..........................13 11.1 Documentation Support.......................................... 13 11.2 Receiving Notification of Documentation Updates.. 13 11.3 Support Resources................................................. 13 11.4 Trademarks............................................................. 13 11.5 Electrostatic Discharge Caution.............................. 13 11.6 Glossary.................................................................. 13 12 Mechanical, Packaging, and Orderable Information.................................................................... 13 4 Revision History Changes from Revision A (August 2016) to Revision B (February 2022) Page • Updated the numbering format for tables, figures, and cross-references throughout the document..................1 • Updated the Features section to include the DPY (X1SON) and DYA (SOD-523) package features................ 1 • Updated the Description section.........................................................................................................................1 • Added the DYA package details to the Device Information table....................................................................... 1 • Removed the TPD1E10B06 device from the Device Information table.............................................................. 1 • Added the DYA package to the Pin Configuration and Functions section.......................................................... 3 • Updated the Overview section............................................................................................................................8 • Updated the Functional Block Diagram ............................................................................................................. 8 • Updated the Feature Description section........................................................................................................... 8 • Updated the ISO 10605 ESD Protection section................................................................................................ 8 • Updated the Typical Application Schematic figure............................................................................................10 • Updated the Related Documentation section................................................................................................... 13 Changes from Revision * (August 2016) to Revision A (August 2016) Page • Changed device status from Product Preview to Production Data .................................................................... 1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 5 Pin Configuration and Functions 1 2 Figure 5-1. DPY Package, 2-Pin X1SON (Top View) ID Area 1 2 Figure 5-2. DYA Package, 2-Pin SOD-523 (Top View) Table 5-1. Pin Functions PIN NO. NAME 1 IO 2 IO (1) TYPE(1) I/O DESCRIPTION ESD Protected I/O. Connect other pin to ground I = input, O = output Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 3 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN Peak pulse MAX UNIT IEC 61000-4-5 power (tp - 8/20 µs) at 25°C 90 W IEC 61000-4-5 current (tp - 8/20 µs) at 25°C 6 A TA Operating free-air temperature -40 125 °C Tstg Storage temperature –65 155 °C (1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ESD Ratings - AEC Specification V(ESD) Electrostatic discharge - DPY V(ESD) Electrostatic discharge - DYA VALUE UNIT Human body model (HBM), per AEC Q100-002 ±2500 V Charged device model (CDM), per AEC Q100-011 ±1000 V Human body model (HBM), per AEC Q101-001 ±2500 V Charged device model (CDM), per AEC Q101-005 ±1000 V VALUE UNIT 6.2 ESD Ratings—IEC Specification V(ESD) Electrostatic discharge IEC 61000-4-2 Contact Discharge, all pins ±30000 IEC 61000-4-2 Air-gap Discharge, all pins ±30000 V 6.3 ESD Ratings—ISO Specification VALUE UNIT ± 15000 V Contact discharge ± 8000 V Air-gap discharge ± 25000 V Contact discharge ± 25000 V V(ESD) Electrostatic discharge ISO 10605, 330-pF, 330-Ω (DPY) Air-gap discharge V(ESD) Electrostatic discharge ISO 10605, 330-pF, 330-Ω (DPY) V(ESD) Electrostatic discharge ISO 10605, 330-pF, 330-Ω (DYA) V(ESD) Electrostatic discharge ISO 10605, 330-pF, 330-Ω (DYA) 6.4 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN Operating voltage Pin 1 to 2 or Pin 2 to 1 TA Operating free-air temperature NOM MAX UNIT –5.5 5.5 V -40 125 °C 6.5 Thermal Information THERMAL METRIC(1) 4 DPY (X1SON) DYA (SOD523) 2 PINS 2 PINS UNIT RθJA Junction-to-ambient thermal resistance 615.5 730.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 404.8 413.4 °C/W RθJB Junction-to-board thermal resistance 493.3 497.7 °C/W Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 6.5 Thermal Information (continued) THERMAL METRIC(1) DPY (X1SON) DYA (SOD523) 2 PINS 2 PINS UNIT ΨJT Junction-to-top characterization parameter 127.7 129.7 °C/W ΨJB Junction-to-board characterization parameter 493.3 491.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 162 - °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.6 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITION MIN TYP MAX UNIT VRWM Reverse stand-off voltage Pin 1 to 2 or Pin 2 to 1 5.5 V ILEAK Leakage current Pin 1 = 5 V, Pin 2 = 0 V 100 nA VClamp1,2 Clamp voltage with surge strike on pin 1, pin 2 grounded. IPP = 1 A, tp = 8/20 µs(2) 10 V VClamp1,2 Clamp voltage with surge strike on pin 1, pin 2 grounded. IPP =5 A, tp = 8/20 µs(2) 14 V VClamp2,1 Clamp voltage with surge strike on pin 2, pin 1 grounded. IPP = 1 A, tp = 8/20 µs(2) 8.5 V VClamp2,1 Clamp voltage with surge strike on pin 2, pin 1 grounded. IPP =5 A, tp = 8/20 µs(2) 14 V RDYN Dynamic resistance CIO I/O capacitance VIO = 2.5 V; ƒ = 1 MHz VBR1,2 Break-down voltage, pin 1 to pin 2 IIO = 1 mA 6 V VBR2,1 Break-down voltage, pin 2 to pin 1 IIO = 1 mA 6 V (1) (2) Pin 1 to Pin 2(1) 0.32 Pin 2 to Pin 1(1) 0.38 12 Ω pF Extraction of RDYN using least squares fit of TLP characteristics between IPP = 10 A and IPP = 20 A. Nonrepetitive current pulse 8 to 20 µs exponentially decaying waveform according to IEC 61000-4-5 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 5 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 6.7 Typical Characteristics Figure 6-2. IEC 61000-4-2 Clamp Voltage –8-kV Contact ESD Figure 6-3. Transmission Line Pulse (TLP) Waveform Pin 1 to Pin 2 Figure 6-4. Transmission Line Pulse (TLP) Waveform Pin 2 to Pin 1 Current (A) 10 9 150 Current Power 135 8 120 7 105 6 90 5 75 4 60 3 45 2 30 1 15 0 -10 Figure 6-5. IV Curve 6 0 10 20 30 40 Time (Ps) 50 60 Power (W) Figure 6-1. IEC 61000-4-2 Clamp Voltage +8-kV Contact ESD 0 70 D001 Figure 6-6. Positive Surge Waveform (8/20 µs) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 6.7 Typical Characteristics (continued) 110 Current 100 Power 90 10 Current (A) 9 8 80 7 70 6 60 5 50 4 40 3 30 2 20 1 10 0 -10 0 10 20 30 40 Time (Ps) 50 60 Power (W) 11 0 70 D002 Figure 6-7. Negative Surge Waveform (8/20 µs) Figure 6-8. Pin Capacitance Across VBIAS Figure 6-9. Insertion Loss Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 7 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 7 Detailed Description 7.1 Overview The TPD1E10B06-Q1 is a single-channel ESD TVS diode in a 0402 package convenient for space constrained applications and an industry standard SOD-523 package. This TVS protection product offers ±30-kV IEC air-gap, ±30-kV contact ESD protection, and has an ESD clamp circuit with a back-to-back TVS diode for bipolar or bidirectional signal support. The 12-pF line capacitance of this ESD protection diode is suitable for a wide range of applications supporting data rates up to 400 Mbps. Typical application of this ESD protection product is the circuit protection for audio lines, push buttons, memory interfaces, and general-purpose I/O ports. This ESD clamp is a good fit for the protection of the end equipments such as head units, premium audio, external amplifiers, and many other automotive applications. 7.2 Functional Block Diagram 1 2 7.3 Feature Description The TPD1E10B06-Q1 is a bidirectional TVS with high ESD protection level. This device protects the circuit from ESD strikes up to ±30-kV contact and ±30-kV air-gap specified in the IEC 61000-4-2 Level 4 international standard. The device can also handle up to 6-A surge current (IEC 61000-4-5 8/20 µs). The I/O capacitance of 12 pF supports a data rate up to 400 Mbps. This clamping device has a small dynamic resistance, which makes the clamping voltage low when the device is actively protecting other circuits. For example, the clamping voltage is only 10 V when the device is taking 1-A transient current. The breakdown is bidirectional so that this protection device is a good fit for GPIO and especially audio lines which carry bidirectional signals. Low leakage allows the diode to conserve power when working below the VRWM. The industrial temperature range of –40°C to +125°C makes this ESD device work at extensive temperatures in most environments. The space-saving 0402 package can fit into many flexible spaces, whereas in the leaded SOD-523 package is good for applications requiring automatic optical inspection (AOI). 7.3.1 AEC-Q101 Qualified This device is qualified to AEC-Q101 standards and is qualified to operate from –40°C to +125°C. 7.3.2 IEC 61000-4-2 ESD Protection The I/O pins can withstand ESD events up to ±30-kV contact and ±30-kV air according to the IEC 61000-4-2 standard. An ESD-surge clamp diverts the current to ground. 7.3.3 ISO 10605 ESD Protection The I/O pins can withstand ESD events at least ±25-kV contact and ±25-kV air in the leaded SOD-523 package according to the ISO 10605 (330 pF, 330 Ω) standard. An ESD-surge clamp diverts the current to ground. 7.3.4 IEC 61000-4-5 Surge Protection The IO pins can withstand surge events up to 6 A (8/20 µs waveform). An ESD-surge clamp diverts this current to ground. 7.3.5 IO Capacitance The capacitance between the I/O pins is 12 pF. This capacitance support data rates up to 400 Mbps. 7.3.6 Dynamic Resistance The IO pins feature an ESD clamp that has a low RDYN of 0.32 Ω (Pin 1 to Pin 2) and 0.38 Ω (Pin 2 to Pin 1) which prevents system damage during ESD events. 8 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 7.3.7 DC Breakdown Voltage The DC breakdown voltage between the IO pins is a minimum of 6 V. This ensures that sensitive equipment is protected from surges above the reverse standoff voltage of 5.5 V. 7.3.8 Ultra Low Leakage Current The IO pins feature an ultra-low leakage current of 100 nA (maximum) with a bias of 5 V. 7.3.9 Clamping Voltage The IO pins feature an ESD clamp that is capable of clamping the voltage to 10 V (IPP = 1 A) and 14V (IPP = 5 A). 7.3.10 Industrial Temperature Range This device features an industrial operating range of –40°C to +125°C 7.3.11 Space-Saving Footprint This device features a space-saving, industry standard 0402 footprint. 7.4 Device Functional Modes The TPD1E10B06-Q1 is a passive clamp that has low leakage during normal operation when the voltage between pin 1 and pin 2 is below VRWM and activates when the voltage between pin 1 and pin 2 goes above VBR. During IEC ESD events, transient voltages as high as ±30 kV can be clamped between the two pins. When the voltages on the protected lines fall below the trigger voltage, the device reverts back to the low leakage passive state. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 9 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 8 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 8.1 Application Information When a system contains a human interface connector, the system becomes vulnerable to large system-level ESD strikes that standard ICs cannot survive. TVS ESD protection diodes are typically used to suppress ESD at these connectors. The TPD1E10B06-Q1 is a single-channel ESD protection device containing back-to-back TVS diodes, which is typically used to provide a path to ground for dissipating ESD events on bidirectional signal lines between a human interface connector and a system. As the current from ESD passes through the device, only a small voltage drop is present across the diode structure. This is the voltage presented to the protected IC. The low RDYN of the triggered TVS holds this voltage, VCLAMP, to a tolerable level to the protected IC. 8.2 Typical Application L Audio IN Audio amplifier class AB (ESD Sensitive) L Audio L GND R Audio IN Speaker connector (source of ESD) 1 1 R Audio Audio amplifier class AB (ESD Sensitive) R GND 2 GND 2 Figure 8-1. Typical Application Schematic 8.2.1 Design Requirements For this design example, the two TPD1E10B06-Q1s are used to protect left and right audio channels. For this audio application, the system parameters shown in Table 8-1 are known. Table 8-1. Design Parameters DESIGN PARAMETER VALUE Audio amplifier class AB Audio signal voltage range –3 V to 3 V Audio frequency content 20 Hz to 20 kHz Required IEC 61000-4-2 ESD protection ±20-kV contact, ±25-kV air-gap 8.2.2 Detailed Design Procedure To begin the design process, some parameters must be decided upon; the designer must make sure: • • • 10 Voltage range on the protected line must not exceed the reverse standoff voltage of the TVS diode(s) (VRWM) Operating frequency is supported by the I/O capacitance CIO of the TVS diode IEC 61000-4-2 protection requirement is covered by the IEC performance of the TVS diode Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 For this application, the audio signal voltage range is –3 V to 3 V. The VRWM for the TVS is –5.5 V to 5.5 V; therefore, the bidirectional TVS does not break down during normal operation, and therefore normal operation of the audio signal is not effected because of the signal voltage range. In this application, a bidirectional TVS like TPD1E10B06-Q1 is required. Next, consider the frequency content of this audio signal. In this application with the class AB amplifier, the frequency content is from 20 Hz to 20 kHz; ensure that the TVS I/O capacitance does not distort this signal by filtering it. With the TPD1E10B06-Q1 typical capacitance of 12 pF, which leads to a typical 3-dB bandwidth of 400 MHz, this diode has sufficient bandwidth to pass the audio signal without distorting it. Finally, the human interface in this application requires above standard Level 4 IEC 61000-4-2 system-level ESD protection (±20-kV Contact, ±25-kV Air-Gap). A standard TVS cannot survive this level of IEC ESD stress. However, the TPD1E10B06-Q1 can survive at least ±30-kV Contact/ ±30-kV Air-Gap. Therefore, the device can provide sufficient ESD protection for the interface, even though the requirements are stringent. For any TVS diode to provide the full range of ESD protection capabilities, as well as to minimize the noise and EMI disturbances the board will see during ESD events, a system designer must use proper board layout of their TVS ESD protection diodes. See Section 10 for instructions on properly laying out TPD1E10B06-Q1. 8.2.3 Application Curves Figure 8-2. IEC 61000-4-2 Clamp Voltage +8-kV Contact ESD Figure 8-3. IEC 61000-4-2 Clamp Voltage –8-kV Contact ESD Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 11 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 9 Power Supply Recommendations This device is a passive TVS diode-based ESD protection device, therefore there is no requirement to power it. Take care to make sure that the maximum voltage specifications for each pin are not violated. 10 Layout 10.1 Layout Guidelines • • • • The optimum placement is as close to the connector as possible. – EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces, resulting in early system failures. – The PCB designer must minimize the possibility of EMI coupling by keeping any unprotected traces away from the protected traces which are between the TVS and the connector. Route the protected traces as straight as possible. Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded corners with the largest radii possible. – Electric fields tend to build up on corners, increasing EMI coupling. If pin 1 or pin 2 is connected to ground, use a thick and short trace for this return path. 10.2 Layout Example To connector To protected IC Place pin 1 on the signal line Minimum distance from connector (source of ESD) Thick and short return path to GND Figure 10-1. Layout Recommendation 12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 TPD1E10B06-Q1 www.ti.com SLVSDN7B – AUGUST 2016 – REVISED FEBRUARY 2022 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For related documentation, see the following: • Texas Instruments, ESD Layout Guide user's guide • Texas Instruments, ESD Protection Diodes EVM user's guide • Texas Instruments, Generic ESD Evaluation Module user's guide • Texas Instruments, Reading and Understanding an ESD Protection data sheet • Texas Instruments, TPD1E10B06-Q1 Evaluation Module user's guide 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 11.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 11.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPD1E10B06-Q1 13 PACKAGE OPTION ADDENDUM www.ti.com 3-Mar-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPD1E10B06DYARQ1 ACTIVE SOT-5X3 DYA 2 3000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 1KG TPD1E10B06QDPYRQ1 ACTIVE X1SON DPY 2 10000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 4M (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of