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TPD4F003DQDR

TPD4F003DQDR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    WSON8_1.7X1.35MM

  • 描述:

    TPDxF003 四通道、六通道和八通道 EMI 滤波器,集成 ESD 保护

  • 数据手册
  • 价格&库存
TPD4F003DQDR 数据手册
Product Folder Sample & Buy Support & Community Tools & Software Technical Documents TPD4F003, TPD6F003, TPD8F003 SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 TPDxF003 Four-, Six-, and Eight-Channel EMI Filters With Integrated ESD Protection 1 Features 3 Description • The TPDxF003 family is a series of highly integrated devices designed to provide Electromagnetic Interference (EMI) filtering in all systems subjected to electromagnetic interference. These filters also provide a Transient Voltage Suppressor (TVS) diode circuit for Electrostatic Discharge (ESD) protection which prevents damage to the application when subjected to ESD stress far exceeding IEC 61000-4-2 (Level 4). 1 • • • • • • Four-, Six-, and Eight-Channel EMI Filtering for Data Ports –3 dB Bandwidth of 200 MHz Greater than 25 dB attenuation at 1 GHz IEC 61000-4-2 Level 4 ESD Protection – ±12-kV Contact Discharge – ±20-kV Air Gap Discharge Pi-Style (C-R-C) Filter Configuration (R = 100 Ω, CTOTAL = 17 pF) Low 10-nA Leakage Current Easy Flow-Through Routing The TPDxF003 family is specified for –40°C to 85°C operation. These filters are also packaged in spacesaving 0.4-mm pitch DQD packages. Device Information(1) PACKAGE BODY SIZE (NOM) TPD4F003 PART NUMBER WSON (8) 1.70 mm x 1.35 mm TPD6F003 WSON (12) 2.50 mm x 1.35 mm TPD8F003 WSON (16) 3.30 mm x 1.35 mm 2 Applications • • • • • Display Interfaces Cell Phones Tablets SVGA Video Connections Memory Interfaces (1) For all available packages, see the orderable addendum at the end of the datasheet. Equivalent Schematic 100 Ω Ch_In 8.5 pF Ch_Out 8.5 pF GND 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPD4F003, TPD6F003, TPD8F003 SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 4 5 Absolute Maximum Ratings ..................................... Handling Ratings....................................................... Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 7 7.1 Overview ................................................................... 7 7.2 Functional Block Diagram ......................................... 7 7.3 Feature Description................................................... 7 7.4 Device Functional Modes.......................................... 8 8 Applications and Implementation ........................ 9 8.1 Application Information.............................................. 9 8.2 Typical Application .................................................... 9 9 Power Supply Recommendations...................... 11 10 Layout................................................................... 11 10.1 Layout Guidelines ................................................. 11 10.2 Layout Example .................................................... 11 11 Device and Documentation Support ................. 12 11.1 11.2 11.3 11.4 Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 12 12 12 12 12 Mechanical, Packaging, and Orderable Information ........................................................... 12 4 Revision History Changes from Revision D (January 2010) to Revision E • 2 Page Added Handling Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1 Submit Documentation Feedback Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 TPD4F003, TPD6F003, TPD8F003 www.ti.com SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 5 Pin Configuration and Functions DQD PACKAGE (TOP VIEW) TPD4F003 TPD6F003 TPD8F003 Ch1_Out Ch1_In 1 12 Ch1_Out Ch1_In 1 16 Ch1_Out Ch2_In 2 7 Ch2_Out Ch2_In 2 11 Ch2_Out Ch2_In 2 15 Ch2_Out Ch3_In 3 6 Ch3_Out Ch3_In 3 10 Ch3_Out Ch3_In 3 14 Ch3_Out Ch4_In 4 5 Ch4_Out Ch4_In 4 9 Ch4_Out Ch4_In 4 13 Ch4_Out Ch5_In 5 8 Ch5_Out Ch5_In 5 12 Ch5_Out Ch6_In 6 7 Ch6_Out Ch6_In 6 11 Ch6_Out Ch7_In 7 10 Ch7_Out Ch8_In 8 9 Ch8_Out 1.7 mm x 1.35 mm x 0.75 mm (0.4-mm pitch) 2.5 mm x 1.35 mm x 0.75 mm (0.4-mm pitch) GND 8 GND 1 GND Ch1_In 3.3 mm x 1.35 mm x 0.75 mm (0.4-mm pitch) Pin Functions - TPD4F003 PIN I/O DESCRIPTION 1, 2, 3, 4 IO ESD-protected channel, connected to corresponding ChX_Out 5, 6, 7, 8 IO ESD-protected channel, connected to corresponding ChX_In GND G Ground NAME No. ChX_In ChX_Out GND Pin Functions - TPD6F003 PIN Name No. I/O Description ChX_In 1, 2, 3, 4, 5, 6 IO ESD-protected channel, connected to corresponding ChX_Out ChX_Out 7, 8, 9, 10, 11, 12 IO ESD-protected channel, connected to corresponding ChX_In GND G Ground GND Pin Functions - TPD8F003 PIN Name No. I/O Description ChX_In 1, 2, 3, 4, 5, 6, 7, 8 IO ESD-protected channel, connected to corresponding ChX_Out ChX_Out 9, 10, 11, 12, 13, 14, 15, 16 IO ESD-protected channel, connected to corresponding ChX_In GND G Ground GND Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 Submit Documentation Feedback 3 TPD4F003, TPD6F003, TPD8F003 SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN VIO IO to GND TJ Junction temperature (1) MAX UNIT 6 V 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. 6.2 Handling Ratings Tstg Storage temperature range MIN MAX UNIT –65 150 °C Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) V(ESD) (1) (2) Electrostatic discharge ±15 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) kV ±1500 IEC 61000-4-2 ESD Rating - Contact ±12 IEC 61000-4-2 ESD Rating - Air ±20 V kV JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX 0 5.5 V –40 85 °C VIO TA UNIT 6.4 Thermal Information TPD4F003 TPD6F003 THERMAL METRIC (1) TPD8F003 DQD UNIT 8 PINS 12 PINS 16 PINS RθJA Junction-to-ambient thermal resistance 115.6 89.2 80.8 RθJC(top) Junction-to-case (top) thermal resistance 108.5 100.1 88.3 RθJB Junction-to-board thermal resistance 66.4 50.5 45.8 ψJT Junction-to-top characterization parameter 6.8 9.4 9.2 ψJB Junction-to-board characterization parameter 65.9 50.0 45.4 RθJC(bot) Junction-to-case (bottom) thermal resistance 33.2 31.0 31.8 (1) °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 6.5 Electrical Characteristics TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN IIO = 10 μA TYP (1) MAX UNIT 100 115 Ω VBR DC breakdown voltage R Resistance C Capacitance (C1 or C2) VIO = 2.5 V 8.5 pF IIO Channel leakage current VIO = 3.3 V 10 nA fC Cut-off frequency ZSOURCE = 50 Ω, ZLOAD = 50 Ω 200 MHz (1) 4 6 85 V Typical values are at TA = 25°C. Submit Documentation Feedback Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 TPD4F003, TPD6F003, TPD8F003 www.ti.com SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 6.6 Typical Characteristics 6.6.1 IEC Clamping Waveforms (clamp voltage measured both at Ch_Out and Ch_In) 140 140 120 120 100 100 Ch_In Ch_Out Amplitude (V) Amplitude (V) Ch_In 60 40 60 40 20 20 0 0 -20 -20 -40 -40 0 25 50 75 100 125 150 175 0 200 25 50 75 125 150 175 200 Figure 2. With 12 kV Contact ESD Stress at Ch_Out Figure 1. With 8 kV Contact ESD Stress at Ch_Out 40 40 20 20 Ch_In Ch_In Ch_Out 0 0 -20 -20 Amplitude (V) Amplitude (V) 100 Time (ns) Time (ns) -40 -60 Ch_Out -40 -60 -80 -80 -100 -100 -120 -120 -140 -140 0 25 50 75 100 125 150 175 0 200 25 50 75 Figure 3. With -8 kV Contact ESD Stress at Ch_Out TPD6F003 200 TPD4F003 TPD8F003 3dB drop/Bias of 0.0V -3dB = 198MHz Peak/Freq/Db = 2.57/45 GHz/dB 0.0006 0.0004 TPD6F003 3dB drop/Bias of 0.0V -3dB = 197MHz Peak/Freq/Db = 2.30/47 GHz/dB 0.0002 Current (mA) -25 -30 175 0.0008 TPD8F003 -20 150 0.001 0 -15 125 Figure 4. With -12 kV Contact ESD Stress at Ch_Out -5 -10 100 Time (ns) Time (ns) Insertion Loss (dB) Ch_Out 80 80 TPD4F003 3dB drop/Bias of 0.0V -3dB = 197MHz Peak/Freq/Db = 2.25/45 GHz/dB 0 -35 -0.0002 -40 -0.0004 -45 -0.0006 -50 1.00E+06 1.00E+07 1.00E+08 1.00E+09 Frequency (Hz) 1.00E+10 -0.0008 -0.001 -4 -2 0 2 4 6 8 Voltage (V) Figure 5. Frequency Response Figure 6. DC Voltage-Current Sweep Across Input/Output Pins Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 Submit Documentation Feedback 5 TPD4F003, TPD6F003, TPD8F003 SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 www.ti.com 6.6.2 Channel-to-Channel Crosstalk 0 0 -5 -10 -5 Adjacent Signal Pair Farthest Signal Pair -15 -20 -25 -30 -30 -35 -40 -40 -45 -50 Crosstalk (dB) Crosstalk (dB) Farthest Signal Pair -25 -35 -55 -60 -65 -70 -75 -45 -50 -55 -60 -65 -70 -75 -80 -80 -85 -85 -90 -90 -95 -95 -100 -100 -105 -105 -110 -110 1.00E+05 Adjacent Signal Pair -10 -15 -20 1.00E+06 1.00E+07 1.00E+08 1.00E+09 1.00E+10 1.00E+05 1.00E+06 1.00E+07 Frequency (Hz) 1.00E+08 1.00E+09 1.00E+10 Frequency (Hz) Figure 8. TPD6F003 Figure 7. TPD4F003 0 -5 -10 Adjacent Signal pair Farthest Signal Pair -15 -20 -25 -30 -35 Crosstalk (dB) -40 -45 -50 -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 -105 -110 1.00E+05 1.00E+06 1.00E+07 1.00E+08 1.00E+09 1.00E+10 Frequency (Hz) Figure 9. TPD8F003 6 Submit Documentation Feedback Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 TPD4F003, TPD6F003, TPD8F003 www.ti.com SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 7 Detailed Description 7.1 Overview The TPDxF003 family is a series of highly integrated devices designed to provide EMI filtering in all systems subjected to electromagnetic interference. These filters also provide a Transient Voltage Suppressor (TVS) diode circuit for ESD protection which prevents damage to the application when subjected to ESD stress far exceeding IEC 61000-4-2 (Level 4). 7.2 Functional Block Diagram 100 Ω Ch_In 8.5 pF Ch_Out 8.5 pF GND 7.3 Feature Description The TPDxF003 family is a line of ESD and EMI filtering devices designed to reduce EMI emissions and provide system level ESD protection. Each device can dissipate ESD strikes above the maximum level specified by IEC 61000-4-2 international standard. Additionally, the EMI filtering structure reduces EMI emissions by providing high frequency roll-off. 7.3.1 Four-, Six-, and Eight-Channel EMI Filtering for Data Ports These devices provide EMI filtering for four, six, or eight channels of data lines. 7.3.2 –3 dB Bandwidth of 200 MHz These devices have a through –3dB bandwidth of 200 MHz. 7.3.3 Greater Than 25 dB Attenuation at 1 GHz Signal attenuation is above 25dB at 1 GHz, which provides significant reduction in spurious emissions. 7.3.4 Robust ESD Protection Exceeds IEC 61000-4-2 The ESD protection on all pins exceeds the IEC 61000-4-2 level 4 standard. Contact ESD is rated at ±12 kV and Air-gap ESD is rated at ±20 kV. 7.3.5 Pi-Style (C-R-C) Filter Configuration This family of devices has a pi-style filtering configuration composed of a series resistor and two capacitors in parallel with the I/O pins. The typical resistor value is 100 Ω and the typical capacitor values are 8.5 pF each. 7.3.6 Low 10-nA Leakage Current The I/O pins feature an ultra-low leakage current of 10-nA (typical) with a bias of 3.3 V. 7.3.7 Easy Flow-Through Routing The layout of this device makes it easy to add protection to existing layouts. The packages offer flow-through routing which requires minimal changes to existing layout for addition of these devices. Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 Submit Documentation Feedback 7 TPD4F003, TPD6F003, TPD8F003 SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 www.ti.com 7.4 Device Functional Modes The TPDxF003 family of devices are passive integrated circuits that passively filter EMI and trigger when voltages are above VBR or below the lower diode voltage (–0.6 V). During ESD events, voltages as high as ±20 kV (air) can be directed to ground via the internal diode network. Once the voltages on the protected line fall below the trigger levels, the device reverts to passive. 8 Submit Documentation Feedback Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 TPD4F003, TPD6F003, TPD8F003 www.ti.com SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 8 Applications and Implementation 8.1 Application Information The TPDxF003 family are diode type TVS' integrated with series resistors for filtering emitted EMI. As signal passes through the device, higher frequency components are filtered out. This device also provides a path to ground during ESD events and isolates the protected IC. As the current from ESD passes through the TVS, only a small voltage drop is present across the diode. This is the voltage presented to the protected IC. In particular, these filters are ideal for EMI filtering and protecting data lines from ESD at the display, keypad, and memory interfaces. 8.2 Typical Application TPD6F003 R0 1 12 R1 2 11 R2 3 10 R3 4 9 R4 5 8 R5 6 7 Display Panel Connector G0 1 12 G1 2 11 G2 3 10 G3 4 9 G4 5 8 G5 6 7 TPD6F003 Connector TPD6F003 GND GND B0 1 12 B1 2 11 B2 3 10 B3 4 9 B4 5 8 B5 6 7 GND Figure 10. Display Panel Schematic Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 Submit Documentation Feedback 9 TPD4F003, TPD6F003, TPD8F003 SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 www.ti.com Typical Application (continued) 8.2.1 Design Requirements For this design example, three TPD6F003 devices are used in an 18-bit display panel application. This will provide a complete ESD and EMI protection solution for the display connector. Given the display panel application, the following parameters are known. DESIGN PARAMETER VALUE Signal range on all pins except GND 0 V to 5 V Operating Frequency 100 MHz 8.2.2 Detailed Design Procedure To begin the design process, some design parameters must be decided; the designer need to know the following: • • Signal range on all the protected lines Operating frequency 8.2.2.1 Signal Range on All Protected Lines The TPD6F003 has 8 identical protection channels for signal lines. All I/O pins will support a signal range from 0 to 5.5 V. 8.2.2.2 Operating Frequency The TPD6F003 has a 200 MHz –3dB bandwidth, which supports the operating frequency for this display. 8.2.3 Application Curve 0 ±5 Insertion Loss (dB) ±10 ±15 ±20 Channel 1 ±25 Channel 2 ±30 Channel 3 ±35 Channel 4 ±40 Channel 5 ±45 Channel 6 ±50 1.E+05 1.E+06 1.E+07 1.E+08 1.E+09 1.E+10 Frequency (Hz) C001 Figure 11. Frequency Response 10 Submit Documentation Feedback Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 TPD4F003, TPD6F003, TPD8F003 www.ti.com SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 9 Power Supply Recommendations This family of devices are passive EMI and ESD devices so there is no need to power them. Care should be taken to not violate the recommended VIO specification (5.5 V) to ensure the device functions properly. 10 Layout 10.1 Layout Guidelines • • • The optimum placement is as close to the connector as possible. – EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces, resulting in early system failures. – The PCB designer needs to minimize the possibility of EMI coupling by keeping any unprotected traces away from the protected traces which are between the TVS and the connector. Route the protected traces as straight as possible. Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded corners with the largest radii possible. – Electric fields tend to build up on corners, increasing EMI coupling. 10.2 Layout Example This application is typical of an 18-bit RGB display panel layout. VIA to GND Plane B5 B4 B3 B2 B1 B0 G5 G4 G3 G2 G1 G0 R5 R4 R3 R2 R1 R0 6 5 4 3 2 1 6 5 4 3 2 1 6 5 4 3 2 1 11 12 GND GND GND 10 9 8 7 12 11 10 9 8 7 12 11 10 9 8 7 Figure 12. TPD6F003 Layout Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 Submit Documentation Feedback 11 TPD4F003, TPD6F003, TPD8F003 SLLS907E – AUGUST 2008 – REVISED AUGUST 2014 www.ti.com 11 Device and Documentation Support 11.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TPD4F003 Click here Click here Click here Click here Click here TPD6F003 Click here Click here Click here Click here Click here TPD8F003 Click here Click here Click here Click here Click here 11.2 Trademarks All trademarks are the property of their respective owners. 11.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 12 Submit Documentation Feedback Copyright © 2008–2014, Texas Instruments Incorporated Product Folder Links: TPD4F003 TPD6F003 TPD8F003 PACKAGE OPTION ADDENDUM www.ti.com 13-May-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPD4F003DQDR ACTIVE WSON DQD 8 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 5RS TPD6F003DQDR ACTIVE WSON DQD 12 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 47S TPD8F003DQDR ACTIVE WSON DQD 16 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 (5US, 5UU) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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