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TPS1HB08-Q1
SLVSE16C – MAY 2019 – REVISED JANUARY 2020
TPS1HB08-Q1 40-V, 8-mΩ Single-Channel Smart High-Side Switch
1 Features
3 Description
•
The TPS1HB08-Q1 device is a smart high-side switch
intended for use in 12-V automotive systems. The
device integrates robust protection and diagnostic
features to ensure output port protection even during
harmful events like short circuits in automotive
systems. The device protects against faults through a
reliable current limit, which, depending on device
variant, is adjustable from 6.4 A to 70 A or set at 94
A. The high current limit range allows for usage in
loads that require large transient currents, while the
low current limit range provides improved protection
for loads that do not require high peak current. The
device is capable of reliably driving a wide range of
load profiles.
1
•
•
•
•
•
•
AEC-Q100 qualified for automotive applications
– Temperature grade 1: –40°C to 125°C
– Device HBM ESD classification level 2
– Device CDM ESD classification level C4B
– Withstands 40-V load dump
Functional safety capable
– Documentation available to aid functional
safety system design
Single-channel smart high-side switch with 8-mΩ
RON (TJ = 25°C)
Improve system level reliability through adjustable
current limiting
– Current limit set-point from 6.4 A to 70 A
– Version F: 94 A fixed ILIM
Robust integrated output protection:
– Integrated thermal protection
– Protection against short to ground and battery
– Protection against reverse battery events
including automatic switch on of FET with
reverse voltage
– Automatic shut off on loss of battery and
ground
– Integrated output clamp to demagnetize
inductive loads
– Configurable fault handling
Analog sense output can be configured to
accurately measure:
– Load current
– Device temperature
Provides fault indication through SNS pin or FLT
pin
– Detection of open load and short-to-battery
The TPS1HB08-Q1 also provides a high accuracy
analog current sense that allows for improved load
diagnostics. By reporting load current and device
temperature to a system MCU, the device enables
predictive maintenance and load diagnostics that
improves the system lifetime.
The TPS1HB08-Q1 is available in a HTSSOP
package which allows for reduced PCB footprint.
Device Information(1)
PART NUMBER
TPS1HB08-Q1
•
•
•
•
•
•
•
•
Automotive display module
65-W Automotive headlight
ADAS modules
Seat comfort module
Transmission control unit
HVAC control module
Body control modules
Incandescent and LED lighting
BODY SIZE (NOM)
5.0 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
VBAT
DIA_EN
VBB
Bulbs
SEL1
SNS
µC
Relays/Motors
ILIM
VOUT
LATCH
2 Applications
PACKAGE
HTSSOP (16)
EN
GND
Power Module:
Cameras, Sensors
General Resistive,
Capacitive, Inductive Loads
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS1HB08-Q1
SLVSE16C – MAY 2019 – REVISED JANUARY 2020
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
1
1
1
2
3
3
7
Specifications......................................................... 5
6.1 Recommended Connections for Unused Pins .......... 4
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
8
9
Absolute Maximum Ratings ...................................... 5
ESD Ratings.............................................................. 5
Recommended Operating Conditions....................... 5
Thermal Information .................................................. 5
Electrical Characteristics........................................... 6
SNS Timing Characteristics ...................................... 8
Switching Characteristics .......................................... 9
Typical Characteristics ............................................ 10
Parameter Measurement Information ................ 15
Detailed Description ............................................ 17
9.1 Overview ................................................................. 17
9.2 Functional Block Diagram ....................................... 18
9.3 Feature Description................................................. 18
9.4 Device Functional Modes........................................ 30
10 Application and Implementation........................ 32
10.1 Application Information.......................................... 32
10.2 Typical Application ............................................... 35
10.3 Typical Application ................................................ 38
11 Power Supply Recommendations ..................... 39
12 Layout................................................................... 40
12.1 Layout Guidelines ................................................. 40
12.2 Layout Example .................................................... 40
13 Device and Documentation Support ................. 41
13.1
13.2
13.3
13.4
13.5
13.6
Documentation Support .......................................
Receiving Notification of Documentation Updates
Support Resources ...............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
41
41
41
41
41
41
14 Mechanical, Packaging, and Orderable
Information ........................................................... 41
4 Revision History
Changes from Revision B (December 2019) to Revision C
•
Deleted tablenote from the Device Comparison Table to remove product preview from Versions A and B.......................... 3
Changes from Revision A (December 2019) to Revision B
•
2
Page
Added functional safety capable link to the Features section ................................................................................................ 1
Changes from Original (May 2019) to Revision A
•
Page
Page
Changed from Advance Information to Production Data ....................................................................................................... 1
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SLVSE16C – MAY 2019 – REVISED JANUARY 2020
5 Device Comparison Table
Table 1. Device Options
Device
Version
Part Number
Current Limit
Current Limit Range
Overcurrent Behavior
A
TPS1HB08A-Q1
Resistor Programmable
6.4 A to 32 A
Disable switch immediately
B
TPS1HB08B-Q1
Resistor Programmable
14 A to 70 A
Disable switch immediately
F
TPS1HB08F-Q1
Internally Set
94 A
Disable switch immediately
6 Pin Configuration and Functions
PWP Package
16-Pin HTSSOP
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NAME
Version
A/B
Version F
GND
1
1
—
Device ground
SNS
2
2
O
Sense output
LATCH
3
3
I
Sets fault handling behavior (latched or auto-retry)
EN
4
4
I
Control input, active high
ILIM
5
-
O
Connect resistor to set current-limit threshold
FLT
-
5
O
Open drain output with pulldown to signal fault.
VOUT
6 - 11
6 - 11
O
Channel output
I
No Connect, leave floating
NC
12 - 13, 15 12 - 13, 15
SEL1
14
14
I
Diagnostics select. No functionality on device version F; connect to IC GND
through RPROT resistor
DIA_EN
16
16
I
Diagnostic enable, active high
VBB
Exposed
pad
Exposed
pad
I
Power supply input
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TPS1HB08-Q1
SLVSE16C – MAY 2019 – REVISED JANUARY 2020
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6.1 Recommended Connections for Unused Pins
The TPS1HB08-Q1 is designed to provide an enhanced set of diagnostic and protection features. However, if the
system design only allows for a limited number of I/O connections, some pins may be considered as optional.
Table 2. Connections for Optional Pins
4
PIN NAME
CONNECTION IF NOT USED
SNS
Ground through 1-kΩ resistor
IMPACT IF NOT USED
LATCH
Float or ground through
RPROT resistor
ILIM (Version A/B)
Float
If the ILIM pin is left floating, the device will be set to the default internal
current-limit threshold. This is considered a fault state for the device.
FLT (Version F)
Float
If the FLT pin is unused, the system cannot read faults from the output.
SEL1
Ground through RPROT
resistor
SEL1 selects the TJ sensing feature. With SEL1 unused, only current
sensing and open load detection are available. If unused, must be
grounded through a resistor to engage FET turn-on during reverse battery.
DIA_EN
Float or ground through
RPROT resistor
With DIA_EN unused, the analog sense, open-load, and short-to-battery
diagnostics are not available.
Analog sense is not available.
With LATCH unused, the device will auto-retry after a fault. If latched
behavior is desired, but the system describes limited I/O, it is possible to
use one microcontroller output to control the latch function of several highside channels.
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7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
Maximum continuous supply voltage, VBB
Load dump voltage, VLD
ISO16750-2:2010(E)
Reverse battery voltage, VRev, t ≤ 3 minutes
UNIT
36
V
40
V
–18
V
Enable pin voltage, VEN
–1
7
V
LATCH pin voltage, VLATCH
–1
7
V
Diagnostic Enable pin voltage, VDIA_EN
–1
7
V
Sense pin voltage, VSNS
–1
18
V
Select pin voltage, VSEL`
–1
Reverse ground current, IGND
VBB < 0 V
Energy dissipation during turnoff, ETOFF
Energy dissipation during turnoff, ETOFF
7
mA
Single pulse, LOUT = 5 mH, TJ,start = 125°C
95 (2)
mJ
Repetitive pulse, LOUT = 5 mH, TJ,start = 125°C
56 (2)
mJ
150
°C
150
°C
Maximum junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
V
–50
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
For further details, see the section regarding switch-off of an inductive load.
7.2 ESD Ratings
VALUE
V(ESD)
Electrostatic
discharge
Human-body model (HBM), per AEC Q100-002 (1)
Charged-device model (CDM), per AEC Q100-011
(1)
All pins except VBB and
VOUT
±2000
VBB and VOUT
±4000
All pins
±750
UNIT
V
AEC-Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specifications.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VBB
Nominal supply voltage
(1)
MIN
MAX
6
18
V
(1)
(2)
UNIT
VBB
Extended supply voltage
3
28
V
VEN
Enable voltage
–1
5.5
V
VLATCH
LATCH voltage
–1
5.5
V
VDIA_EN
Diagnostic Enable voltage
–1
5.5
V
VSEL1
Select voltage
–1
5.5
V
VSNS
Sense voltage
–1
7
V
(1)
(2)
All operating voltage conditions are measured with respect to device GND
Device will function within extended operating range, however some parametric values might not apply
7.4 Thermal Information
TPS1HB08-Q1
THERMAL METRIC
(1) (2)
PWP (HTSSOP)
UNIT
16 PINS
RθJA
(1)
(2)
Junction-to-ambient thermal resistance
32.6
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
The thermal parameters are based on a 4-layer PCB according to the JESD51-5 and JESD51-7 standards.
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Thermal Information (continued)
TPS1HB08-Q1
THERMAL METRIC
(1) (2)
PWP (HTSSOP)
UNIT
16 PINS
RθJC(top)
Junction-to-case (top) thermal resistance
25.3
°C/W
RθJB
Junction-to-board thermal resistance
9.2
°C/W
ψJT
Junction-to-top characterization parameter
2.3
°C/W
ψJB
Junction-to-board characterization parameter
9.3
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
1.0
°C/W
7.5 Electrical Characteristics
VBB = 6 V to 18 V, TJ = -40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT VOLTAGE AND CURRENT
VDSCLAMP
VDS clamp voltage
40
46
V
VBBCLAMP
VBB clamp voltage
58
76
V
VUVLOF
VBB undervoltage lockout
falling
Measured with respect to the GND pin of the device
2.0
3
V
VUVLOR
VBB undervoltage lockout
rising
Measured with respect to the GND pin of the device
2.2
3
V
VBB = 13.5 V, TJ = 25°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
0.1
µA
ISB
Standby current (total
device leakage including
MOSFET)
VBB = 13.5 V, TJ = 85°C,
VEN = VDIA_EN = 0 V, VOUT = 0 V
0.5
µA
ILNOM
Continuous load current
IOUT(standby) Output leakage current
TAMB = 70°C
11
VBB = 13.5 V, TJ = 25°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
0.01
VBB = 13.5 V, TJ = 125°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
A
0.5
µA
3
µA
IDIA
Current consumption in
diagnostic mode
VBB = 13.5 V, ISNS = 0 mA
VEN = 0 V, VDIA_EN = 5 V, VOUT = 0V
3
6
mA
IQ
Quiescent current
VBB = 13.5 V
VEN = VDIA_EN = 5 V, IOUT = 0 A
3
6
mA
tSTBY
Standby mode delay time VEN = VDIA_EN = 0 V to standby
17
22
ms
12
RON CHARACTERISTICS
RON
RON(REV)
On-resistance
(Includes MOSFET and
package)
TJ = 25°C, 6 V ≤ VBB ≤ 28 V
On-resistance during
reverse polarity
TJ = 25°C, -18 V ≤ VBB ≤ -8 V
8
mΩ
TJ = 150°C, 6 V ≤ VBB ≤ 28 V
16
mΩ
TJ = 25°C, 3 V ≤ VBB ≤ 6 V
12
mΩ
8
TJ = 105°C, -18 V ≤ VBB ≤ -8 V
mΩ
16
mΩ
CURRENT SENSE CHARACTERISTICS
KSNS
6
Current sense ratio
IOUT / ISNS
IOUT = 1 A
5000
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Electrical Characteristics (continued)
VBB = 6 V to 18 V, TJ = -40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOUT = 10 A
IOUT = 3 A
IOUT = 1 A
ISNSI
Current sense current
and accuracy
VEN = VDIA_EN = 5 V,
VSEL1 = 0 V
IOUT = 300 mA
IOUT = 100 mA
IOUT = 50 mA
IOUT = 20m A
MIN
TYP
MAX
UNIT
2.000
–5
mA
5.3
%
0.6
–5
mA
5.3
%
0.2
–5
mA
5.3
%
0.06043
-4.6
mA
6.2
%
0.0206
-13.6
mA
15.1
%
0.0106
-28.3
mA
30.3
%
0.0046
-56
mA
57.3
%
TJ SENSE CHARACTERISTICS
ISNST
dISNST/dT
Temperature sense
current
Device Version A/B
VDIA_EN = 5 V, VSEL1 = 5
V
TJ = -40°C
0.01
0.12
0.38
mA
TJ = 25°C
0.72
0.85
0.98
mA
TJ = 85°C
1.25
1.52
1.79
mA
TJ = 125°C
1.61
1.96
2.31
mA
TJ = 150°C
1.80
2.25
2.70
mA
Coefficient
0.0112
mA/°C
SNS CHARACTERISTICS
ISNSFH
ISNS fault high-level
VDIA_EN = 5 V, VSEL1 = 0 V
ISNSleak
ISNS leakage
VDIA_EN = 0 V
4
4.5
5.3
mA
1
µA
CURRENT LIMIT CHARACTERISTICS
Device Version A, TJ =
-40°C to 150°C
ICL
Current limit threshold
Device Version B, TJ =
-40°C to 150°C
Device Version F
KCL
Current Limit Ratio
RILIM = GND, open, or
out of range
42
A
RILIM = 5 kΩ
27.2
32
36.8
A
RILIM = 25 kΩ
4.7
6.4
8.1
A
RILIM = GND, open, or
out of range
104
A
RILIM = 5 kΩ
47.1
70
84.2
A
RILIM = 25 kΩ
9.9
14
17.8
A
TJ = -40°C to 60°C
80
94
105
A
68
77
86.1
A
Version A
TJ = 150°C
120
160
208
A * kΩ
Version B
245
350
437.5
A * kΩ
2
3
4
V
1
V
FAULT CHARACTERISTICS
VOL
Open-load (OL) detection
VEN = 0 V, VDIA_EN = 5 V, VSEL1 = 0 V
voltage
VFLT
FLT low output voltage
(Version F only)
IFLT = 1 mA
tOL1
OL and STB indicationtime from EN falling
VEN = 5 V to 0 V, VDIA_EN = 5 V, VSEL1 = 0 V
IOUT = 0 mA, VOUT = 4 V
300
500
700
µs
tOL2
OL and STB indicationtime from DIA_EN rising
VEN = 0 V, VDIA_EN = 0 V to 5 V, VSEL1 = 0 V
IOUT = 0 mA, VOUT = 4 V
2
20
50
µs
tOL3
OL and STB indicationtime from VOUT rising
VEN = 0 V, VDIA_EN = 5 V, VSEL1 = 0 V
IOUT = 0 mA, VOUT = 0 V to 4 V
2
20
50
µs
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Electrical Characteristics (continued)
VBB = 6 V to 18 V, TJ = -40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TABS
Thermal shutdown
150
THYS
Thermal shutdown
hysteresis
20
tFAULT
Fault shutdown
indication-time
VDIA_EN = 5 V
Time between switch shutdown and ISNS settling at
ISNSFH
tRETRY
Retry time
Time from fault shutdown until switch re-enable
(thermal shutdown or current limit).
1
TYP
MAX
UNIT
°C
25
2
30
°C
50
µs
3
ms
EN PIN CHARACTERISTICS
VIL, EN
VIH,
EN
VIHYS,
EN
Input voltage low-level
No GND network diode
Input voltage high-level
No GND network diode
0.8
2.0
Input voltage hysteresis
V
350
1
mV
REN
Internal pulldown resistor
IIL, EN
Input current low-level
VEN = 0.8 V
0.8
µA
IIH,
Input current high-level
VEN = 5 V
5.0
µA
EN
0.5
V
2
MΩ
DIA_EN PIN CHARACTERISTICS
VIL, DIA_EN
Input voltage low-level
No GND network diode
VIH,
Input voltage high-level
No GND network diode
DIA_EN
VIHYS,
0.8
2.0
Input voltage hysteresis
V
V
350
mV
DIA_EN
RDIA_EN
Internal pulldown resistor
IIL, DIA_EN
Input current low-level
VDIA_EN = 0.8 V
0.8
µA
IIH,
Input current high-level
VDIA_EN = 5 V
5.0
µA
DIA_EN
0.5
1
2
MΩ
SEL1 PIN CHARACTERISTICS
VIL, SEL1
Input voltage low-level
No GND network diode
VIH,
Input voltage high-level
No GND network diode
SEL1
VIHYS,
SEL1
Input voltage hysteresis
Internal pulldown resistor
IIL, SEL1
Input current low-level
VSEL1 = 0.8 V
0.5
IIH,
Input current high-level
VSEL1 = 5 V
V
V
350
RSEL1
SEL1
0.8
2.0
1
mV
2
MΩ
0.8
µA
5
µA
LATCH PIN CHARACTERISTICS
VIL, LATCH
Input voltage low-level
No GND network diode
VIH, LATCH
Input voltage high-level
No GND network diode
VIHYS,
Input voltage hysteresis
0.8
2.0
V
V
350
mV
LATCH
RLATCH
Internal pulldown resistor
IIL, LATCH
Input current low-level
VLATCH = 0.8 V
0.8
µA
IIH,
Input current high-level
VLATCH = 5 V
5.0
µA
LATCH
0.5
1
2
MΩ
7.6 SNS Timing Characteristics
VBB = 6 V to 18 V, TJ = -40°C to +150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SNS TIMING - CURRENT SENSE
tSNSION1
Settling time from rising edge of DIA_EN
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
tSNSION2
Settling time from rising edge of EN and
DIA_EN
VEN = VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
8
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40
µs
200
µs
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SNS Timing Characteristics (continued)
VBB = 6 V to 18 V, TJ = -40°C to +150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tSNSION3
Settling time from rising edge of EN
VEN = 0 V to 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
165
µs
tSNSIOFF1
Settling time from falling edge of DIA_EN
VEN = 5 V, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ, RL = 2.6 Ω
20
µs
tSETTLEH
Settling time from rising edge of load step
VEN = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 1 A to 5 A
20
µs
tSETTLEL
Settling time from falling edge of load step
VEN = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 5 A to 1 A
20
µs
SNS TIMING - TEMPERATURE SENSE
tSNSTON1
Settling time from rising edge of DIA_EN
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
40
µs
tSNSTON2
Settling time from rising edge of DIA_EN
VEN = 0 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
70
µs
tSNSTOFF
Settling time from falling edge of DIA_EN
VEN = X, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ
20
µs
Settling time from temperature sense to
current sense
VEN = 5 V, VDIA_EN = 5 V
VSEL1 = 5 V to 0 V
RSNS = 1 kΩ, RL = 2.6 Ω
60
µs
Settling time from current sense to
temperature sense
VEN = 5 V, VDIA_EN = 5 V
VSEL1 = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
60
µs
SNS TIMING - MULTIPLEXER
tMUX
7.7 Switching Characteristics
VBB = 13.5 V, TJ = -40°C to +150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
20
60
100
µs
tDR
Turnon delay time (from Active)
VBB = 13.5 V, RL = 2.6 Ω, 50% EN
rising to 10% VOUT rising
tDF
Turnoff delay time
VBB = 13.5 V, RL = 2.6 Ω, 50% EN
falling to 90% VOUT Falling
20
60
100
µs
SRR
VOUT rising slew rate
VBB = 13.5 V, 20% to 80% of VOUT,
RL = 2.6 Ω
0.1
0.4
0.7
V/µs
SRF
VOUT falling slew rate
VBB = 13.5 V, 80% to 20% of VOUT,
RL = 2.6 Ω
0.1
0.4
0.7
V/µs
tON
Turnon time (active)
VBB = 13.5 V, RL = 2.6 Ω, 50% EN
rising to 80% VOUT rising
39
94
235
µs
tOFF
Turnoff time
VBB = 13.5 V, RL = 2.6 Ω, 50% EN
falling to 20% VOUT falling
39
94
235
µs
ΔPWM
PWM accuracy - average load
current
200-µs enable pulse, VS = 13.5 V,
RL = 2.6 Ω
–25
0
25
%
tON - tOFF
Turnon and turnoff matching
200-µs enable pulse
–85
0
85
µs
EON
Switching energy losses during
turnon
VBB = 13.5 V, RL = 2.6 Ω
0.8
mJ
EOFF
Switching energy losses during
turnoff
VBB = 13.5 V, RL = 2.6 Ω
0.8
mJ
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7.8 Typical Characteristics
30
6
27
5.5
6V
8V
13.5 V
18 V
5
24
4.5
21
4
3.5
ISB (PA)
RTJA
18
15
12
3
2.5
2
9
1.5
6
1
3
0.5
0
0.0001
0.001
0.01
0.1
0.5
Time (s)
2 3 5 10 20
0
-40
100
-20
0
20
VOUT = 0 V
Figure 1. Transient Thermal Impedance
0.5
0.4
6V
8V
13.5 V
18 V
0.3
IQ (mA)
IOUTSB (PA)
0.35
0.25
0.2
0.15
0.1
0.05
0
-0.05
-40
-20
0
20
VOUT = 0 V
40
60
80
Temeprature (qC)
100
VEN = 0 V
120
140
VDIAG_EN = 0 V
13
12.5
12
11.5
11
10.5
10
9.5
9
8.5
8
7.5
7
6.5
6
5.5
-40
VEN = 0 V
140
160
VDIAG_EN = 0 V
6V
8V
13.5 V
18 V
-20
0
IOUT = 0 A
RSNS = 1 kΩ
20
40
60
80 100
Temperature (qC)
VEN = 5 V
VSEL1 = 0 V
120
140
160
VDIAG_EN = 5 V
Figure 4. Quiescent Current (IQ) vs Temperature
16
6V
8V
13.5 V
18 V
25qC
-40qC
15
14
85qC
125qC
150qC
13
12
11
10
9
8
7
6
5
-20
IOUT = 200 mA
RSNS = 1 kΩ
0
20
40
60
80 100
Temeprature (qC)
VEN = 5 V
120
140
160
VDIAG_EN = 0 V
Figure 5. On Resistance (RON) vs Temperature
10
4.35
4.3
4.25
4.2
4.15
4.1
4.05
4
3.95
3.9
3.85
3.8
3.75
3.7
3.65
3.6
-40
RON (m:)
RON (m:)
Figure 3. Output Leakage Current (IOUT(standby)) vs
Temperature
120
Figure 2. Standby Current (ISB) vs Temperature
0.55
0.45
40
60
80 100
Temperature (qC)
4
2.5
5
7.5
IOUT = 200 mA
RSNS = 1 kΩ
10 12.5 15 17.5 20 22.5 25 27.5 30
VBB (V)
VEN = 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
Figure 6. On Resistance (RON) vs VBB
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70
60
65
55
60
50
tDF (Ps)
tDR (Ps)
Typical Characteristics (continued)
55
50
45
40
-40
40
6V
8V
13.5 V
18 V
-20
35
0
ROUT = 2.6 Ω
RSNS = 1 kΩ
20
40
60
80
Temeprature (qC)
100
VEN = 0 V to 5 V
VBB = 13.5 V
120
VDIAG_EN = 0 V
0.5
0.45
0.45
0.4
0.4
0.35
0.35
0.25
0.2
0.15
0.1
0.05
0
-40
6V
8V
13.5 V
18 V
40
60
80
Temperature (qC)
100
VEN = 5 V to 0 V
VBB = 13.5 V
120
140
VDIAG_EN = 0 V
6V
8V
13.5 V
18 V
0.3
0.25
0.2
-20
0
0.1
20
40
60
80
Temperature (qC)
100
VEN = 0 V to 5 V
VBB = 13.5 V
120
0
-40
140
VDIAG_EN = 0 V
-20
0
ROUT = 2.6 Ω
RSNS = 1 kΩ
20
40
60
80
Temperature (qC)
100
VEN = 5 V to 0 V
VBB = 13.5 V
120
140
VDIAG_EN = 0 V
Figure 10. VOUT Slew Rate Falling (SRF) vs Temperature
120
120
6V
8V
13.5 V
18 V
TOFF (Ps)
100
80
90
80
70
70
60
60
-20
ROUT = 2.6 Ω
RSNS = 1 kΩ
0
6V
8V
13.5 V
18 V
110
90
50
-40
20
0.05
Figure 9. VOUT Slew Rate Rising (SRR) vs Temperature
100
0
0.15
ROUT = 2.6 Ω
RSNS = 1 kΩ
110
-20
Figure 8. Turn-off Delay Time (tDF) vs Temperature
0.5
0.3
6V
8V
13.5 V
18 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
SRF (V/Ps)
SRR (V/Ps)
30
-40
140
Figure 7. Turn-on Delay Time (tDR) vs Temperature
TON (Ps)
45
20
40
60
80
Temperature (qC)
100
VEN = 0 V to 5 V
VBB = 13.5 V
120
140
VDIAG_EN = 0 V
Figure 11. Turn-on Time (tON) vs Temperature
50
-40
-20
ROUT = 2.6 Ω
RSNS = 1 kΩ
0
20
40
60
80
Temperature (qC)
VEN = 5 V to 0 V
VBB = 13.5 V
100
120
140
VDIAG_EN = 0 V
Figure 12. Turn-off Time (tOFF) vs Temperature
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Typical Characteristics (continued)
20
15
5
ISNSI (PA)
tON - tOFF (Ps)
10
0
-5
-10
6V
8V
13.5 V
18 V
-15
-20
-40
-20
0
ROUT = 2.6 Ω
20
40
60
80
Temperature (qC)
100
120
VEN = 0 V to 5 V
and 5 V to 0 V
VBB = 13.5 V
RSNS = 1 kΩ
140
VDIAG_EN = 0 V
-40qC
25qC
85qC
125qC
0
0.2
0.3
0.4
ILOAD (A)
0.5
0.6
VEN = 5 V
VBB = 13.5 V
0.7
VDIAG_EN = 5 V
Figure 14. Current Sense Output Current (ISNSI ) vs Load
Current (IOUT) Across Temperature
2.2
0.16
0.15
0.14
0.13
0.12
0.11
0.1
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
6V
8V
13.5 V
18 V
2
1.8
1.6
6V
8V
13.5 V
18 V
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0.1
0.2
VSEL1 = 0 V
RSNS = 1 kΩ
0.3
0.4
ILOAD (A)
0.5
VEN = 5 V
TA = 25°C
0.6
0
-40
0.7
VDIAG_EN = 5 V
Figure 15. Current Sense Output Current (ISNSI) vs Load
Current (IOUT) Across VBB
0
20
40
60
80 100
Temperature (qC)
120
VEN = 0 V
140
160
VDIAG_EN = 5 V
Figure 16. Temperature Sense Output Current (ISNST) vs
Temperature
1.64
6V
8V
13.5 V
18 V
4.9
1.54
4.7
1.49
4.6
1.44
-20
VSEL1 = 0 V
RSNS = 500 Ω
0
20
40
60
80
Temperature (qC)
VEN = 0 V
VOUT Floating
100
120
140
VDIAG_EN = 5 V
6V
8V
13.5 V
18 V
1.59
VIL (V)
4.8
4.5
-40
-20
VSEL1 = 5 V
RSNS = 1 kΩ
5
1.39
-40
-20
VEN = 3.3 V to 0 V
ROUT = 1 kΩ
Figure 17. Fault High Output Current (ISNSFH) vs
Temperature
12
0.1
VSEL1 = 0 V
RSNS = 1 kΩ
ISNST (mA)
ISNSI (PA)
Figure 13. Turn-on and Turn-off Matching (tON - tOFF) vs
Temperature
ISNSFH (mA)
0.16
0.15
0.14
0.13
0.12
0.11
0.1
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
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0
20
40
60
80
Temperature (qC)
VOUT = 0 V
100
120
140
VDIAG_EN = 0 V
Figure 18. VIL vs Temperature
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Typical Characteristics (continued)
400
2
6V
8V
13.5 V
18 V
1.95
1.9
6V
8V
13.5 V
18 V
390
380
370
VIHYS (mV)
VIH (V)
1.85
1.8
1.75
360
350
340
330
1.7
320
1.65
1.6
-40
310
-20
0
20
VEN = 0 V to 3.3 V
ROUT = 1 kΩ
40
60
80
Temperature (qC)
100
120
VOUT = 0 V
300
-40
140
VDIAG_EN = 0 V
1.25
40
60
80
Temperature (qC)
100
120
VOUT = 0 V
140
VDIAG_EN = 0 V
6.9
6V
8V
13.5 V
18 V
6.6
6.3
6V
8V
13.5 V
18 V
6
1.2
1.15
IIH (PA)
IIL (PA)
20
Figure 20. VIHYS vs Temperature
1.4
1.3
0
VEN = 0 V to 3.3 V
and 3.3 V to 0 V
ROUT = 1 kΩ
Figure 19. VIH vs Temperature
1.35
-20
1.1
1.05
1
5.7
5.4
5.1
4.8
0.95
4.5
0.9
4.2
0.85
0.8
-40
-20
0
VEN = 0.8 V
ROUT = 1 kΩ
20
40
60
80
Temperature (qC)
100
120
VOUT = 0 V
140
VDIAG_EN = 0 V
3.9
-40
RSNS = 1 kΩ
0
VEN = 5 V
ROUT = 1 kΩ
Figure 21. IIL vs Temperature
ROUT1 = 2.6 Ω
VSEL = 0 V
-20
20
40
60
80
Temperature (qC)
100
120
VOUT = 0 V
140
VDIAG_EN = 0 V
Figure 22. IIH vs Temperature
VDIA_EN = 5 V
ROUT1 = 2.6 Ω
VSEL = 0 V
Figure 23. Turn-on Time (tON)
RSNS = 1 kΩ
VDIA_EN = 5 V
Figure 24. Turn-off Time (tOFF)
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Typical Characteristics (continued)
ROUT1 = 2.6 Ω
IOUT1 = 1 A to 5 A
RSNS = 1 kΩ
VBB = 13.5 V
VSEL = 0 V
Figure 25. ISNS Settling time (tSNSION1) on Load Step
LOUT = 5 µH to
GND
VEN = 0 V to 5 V
RSNS = 1 kΩ
VSEL = 0 V
VDIAG_EN = 5 V
TA = 25°C
Figure 27. Device Version F Short Circuit Event
14
VBB = 13.5 V
VEN = 0 V to 5 V
TA = 25°C
IOUT1 = 5 A
Figure 26. SNS Output Current Measurement Enable on
DIAG_EN PWM
VBB = 13.5 V
TA = 25°C
LOUT = 5 mH
Figure 28. 5 mH Inductive Load Demagnetization
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8 Parameter Measurement Information
IBB
VBB
ISNS
SNS
ILATCH
LATCH
ILIM
IOUT
VEN
VDIA_EN
EN
IILIM
VOUT
GND
IGND
VOUT
VILIM
VLATCH
ISEL1
SEL1
VSEL1
VBB
IEN
VSNS
IDIA_EN
DIA_EN
Figure 29. Parameter Definitions
VEN(1)
50%
50%
90%
90%
tDR
tDF
VOUT
10%
10%
tON
tOFF
Rise and fall time of VEN is 100 ns.
Figure 30. Switching Characteristics Definitions
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Parameter Measurement Information (continued)
VEN
VDIA_EN
IOUT
ISNS
tSNSION1
tSNSION2
tSETTLEH
tSETTLEL
tSNSTON1
tSNSTON2
tSNSION3
tSNSIOFF1
VEN
VDIA_EN
IOUT
ISNS
VEN
VDIA_EN
TJ
ISNS
tSNSTOFF
NOTES: Rise and fall times of control signals are 100 ns. Control signals include: EN, DIA_EN, SEL1
SEL1 pin must be set to the appropriate value.
Figure 31. SNS Timing Characteristics Definitions
16
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9 Detailed Description
9.1 Overview
The TPS1HB08-Q1 device is a single-channel smart high-side switch intended for use with 12-V automotive
batteries. Many protection and diagnostic features are integrated in the device.
Diagnostics features include the analog SNS output that is capable of providing a signal that is proportional to
load current or device temperature. The high-accuracy load current sense allows for diagnostics of complex
loads. Version F of the device includes an open drain FLT pin that indicates device fault states.
This device includes protection through thermal shutdown, current limiting, transient withstand, and reverse
battery operation. For more details on the protection features, refer to the Feature Description and Application
Information sections of the document.
The TPS1HB08-Q1 is one device in a family of TI high side switches. For each device, the part number indicates
elements of the device behavior. Figure 32 gives an example of the device nomenclature.
Figure 32. Naming Convention
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9.2 Functional Block Diagram
The functional block diagram shown is for device versions A/B. For version F, the ILIM pin will be replaced by
open drain output FLT .
VBB
VBB to GND
Clamp
Internal Power
Supply
VBB to VOUT
Clamp
GND
VOUT
Gate Driver
EN
Power FET
LATCH
Current Limit
ILIM
Thermal
Shutdown
Open-load /
Short-to-Bat
Detection
DIA_EN
SEL1
Fault
Indication
SNS
SNS Mux
Current Sense
Temperature
Sense
9.3 Feature Description
9.3.1 Protection Mechanisms
The TPS1HB08-Q1 is designed to operate in the automotive environment. The protection mechanisms allow the
device to be robust against many system-level events such as load dump, reverse battery, short-to-ground, and
more.
There are two protection features which, if triggered, will cause the switch to automatically disable:
• Thermal Shutdown
• Current Limit
When any of these protections are triggered, the device will enter the FAULT state. In the FAULT state, the fault
indication will be available on the SNS pin (see the Diagnostic Mechanisms section of the data sheet for more
details). For version F of the device, the fault will also be indicated on the FLT pin.
The switch is no longer held off and the fault indication is reset when all of the below conditions are met:
• LATCH pin is low
• tRETRY has expired
• All faults are cleared (thermal shutdown, current limit)
18
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Feature Description (continued)
9.3.1.1 Thermal Shutdown
The TPS1HB08-Q1 includes a temperature sensor on the power FET and also within the controller portion of the
device. There are two cases that the device will consider to be a thermal shutdown fault:
• TJ,FET > TABS
• (TJ,FET – TJ,controller) > TREL
After the fault is detected, the switch will turn off. If TJ,FET passes TABS, the fault is cleared when the switch
temperature decreases by the hysteresis value, THYS. If instead the TREL threshold is exceeded, the fault is
cleared after TRETRY passes.
9.3.1.2 Current Limit
When IOUT reaches the current limit threshold, ICL, the channel will switch off immediately. The ICL value will vary
with slew rate and a fast current increase that occurs during a powered-on short circuit can temporarily go above
the specified ICL value. When the switch is in the FAULT state it will output an output current ISNSFH on the SNS
pin and on version F of the device, the fault will also be indicated on the corresponding FLT pin.
During a short circuit event, the device will hit the ICL value that is listed in the Electrical Characteristics table (for
the given device version and RILIM) and then turn the output off to protect the device. The device will register a
short circuit event when the output current exceeds ICL, however the measured maximum current may exceed
the ICL value due to the TPS1HB08-Q1 deglitch filter and turn-off time. This deglitch time is defined at 3 µs so
therefore use the test setup described in TPS1HB08-Q1 AEC-Q100-012 Short Circuit Reliability and take 3 µs
before the peak value as the ICL. The device is guaranteed to protect itself during a short circuit event over the
nominal supple voltage range (as defined in the Electrical Characteristics table) at 125°C.
On version F of the device, the current limit set point of the device is flat from -40°C to 60°C, and then will
linearly decrease until 150°C. This decrease of the current limit is designed to protect the part in even hot
temperatures where a short-circuit event causes more damage.
9.3.1.2.1 Current Limit Foldback
Version B and F of the TPS1HB08-Q1 implement a current limit foldback feature that is designed to protect the
device in the case of a long-term fault condition. If the device undergoes fault shutdown events (either of thermal
shutdown or current limit) seven consecutive times, the current limit will be reduced to half of the original value.
The device will revert back to the original current limit threshold if either of the following occurs:
• The device goes to standby mode.
• The switch turns on and turns off without any fault occurring.
Version A do not implement the current limit foldback due to the lower current limit causing less harm during
repetitive long-term faults.
9.3.1.2.2 Programmable Current Limit
All versions except F of the TPS1HB08-Q1 include an adjustable current limit. Some applications (for example,
incandescent bulbs) will require a high current limit while other applications can benefit from a lower current limit
threshold. In general, wherever possible a lower current limit is recommended due to allowing system
advantages through:
• Reduced size and cost in current carrying components such as PCB traces and module connectors
• Less disturbance at the power supply (VBB pin) during a short circuit event
• Improved protection of the downstream load
To set the current limit threshold, connect a resistor from ILIM to VBB. The current limit threshold is determined by
Equation 1 (RILIM in kΩ):
ICL = KCL / RILIM
(1)
The RILIM range is between 5 kΩ and 25 kΩ. An RILIM resistor is required, however in the fault case where the pin
is floating, grounded, or outside of this range the current limit will default to an internal level that is defined in the
Specifications section of this document. If RILIM is out of this range, the device cannot guarantee complete shortcircuit protection.
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Feature Description (continued)
NOTE
Capacitance on the ILIM pin can cause ILIM to go out of range during short circuit events.
For accurate current limiting, place RILIM near to the device with short traces to ensure 3 V (above the maximum VUVLOF) during VOUT short-to-ground.
This is typically accomplished by placing bulk capacitance on the power supply node.
9.3.1.3 Voltage Transients
The TPS1HB08-Q1 device contains two types of voltage clamps which protect the FET against system-level
voltage transients. The two different clamps are shown in Figure 33.
The clamp from VBB to GND is primarily used to protect the controller from positive transients on the supply line
(for example, ISO7637-2). The clamp from VBB to VOUT is primarily used to limit the voltage across the FET when
switching off an inductive load. If the voltage potential from VBB to GND exceeds the VBB clamp level, the clamp
will allow current to flow through the device from VBB to GND (Path 2). If the voltage potential from VBB to VOUT
exceeds the clamping voltage, the power FET will allow current to flow from VBB to VOUT (Path 3). Additional
capacitance from VBB to GND can increase the reliability of the system during ISO 7637 pulse 2 A testing.
Ri
Positive Supply Transient
(e.g. ISO7637 pulse 2a/3b)
(1)
VBB
VDS
Clamp
(3)
(2)
Controller
VBB
Clamp
VOUT
Load
GND
Figure 33. Current Path During Supply Voltage Transient
20
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Feature Description (continued)
9.3.1.3.1 Load Dump
The TPS1HB08-Q1 device is tested according to ISO 16750-2:2010(E) suppressed load dump pulse. The device
supports up to 40-V load dump transient and will maintain normal operation during the load dump pulse. If the
switch is enabled, it will stay enabled and if the switch is disabled, it will stay disabled.
9.3.1.3.2 Driving Inductive Loads
When switching off an inductive load, the inductor may impose a negative voltage on the output of the switch.
The TPS1HB08-Q1 includes a voltage clamp to limit voltage across the FET. The maximum acceptable load
inductance is a function of the device robustness. With a 5 mH load, the device can withstand one pulse of 95
mJ inductive dissipation at 125°C and can withstand 56 mJ of one million inductive repetitive pulses with a 10 Hz
repetitive pulse. If the application parameters exceed this device limit, it is necessary to use a protection device
like a freewheeling diode to dissipate the energy stored in the inductor.
For more information on driving inductive loads, refer to TI's How To Drive Inductive, Capacitive, and Lighting
Loads With Smart High Side Switches application report.
9.3.1.4 Reverse Battery
In the reverse battery condition, the switch will automatically be enabled regardless of the state of EN to prevent
excess power dissipation inside the MOSFET body diode. In many applications (for example, resistive loads), the
full load current may be present during reverse battery. In order to activate the automatic switch on feature, all
NC pins must be grounded to IC ground.
There are two options for blocking reverse current in the system. The first option is to place a blocking device
(FET or diode) in series with the battery supply, blocking all current paths. The second option is to place a
blocking diode in series with the GND node of the high-side switch. This method will protect the controller portion
of the switch (path 2), but it will not prevent current from flowing through the load (path 3). The diode used for the
second option may be shared amongst multiple high-side switches.
Path 1 shown in Figure 34 is blocked inside of the device.
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Feature Description (continued)
Reverse blocking
FET or diode
BAT
Option 1
0V VBB
µC
VDD
(3)
(2)
Controller
GPIO
GPIO
VOUT
VBB
Clamp
RPROT
Load
(1)
GND
Option 2
13.5V
Figure 34. Current Path During Reverse Battery
For more information on reverse battery protection, refer to TI's Reverse Battery Protection for High Side
Switches application note.
9.3.1.5 Fault Event – Timing Diagrams - Version A and B
NOTE
All timing diagrams assume that the SEL1 pin is low.
The LATCH, DIA_EN, and EN pins are controlled by the user. The timing diagrams
represent a possible use-case.
Figure 35 shows the immediate current limit switch off behavior. The diagram also illustrates the retry behavior.
As shown, the switch will remain latched off until the LATCH pin is low.
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Feature Description (continued)
µC resets
the latch
LATCH
DIA_EN
ISNSFH
SNS
High-z
Current
Sense
High-z
High-z
Current
Sense
High-z
VOUT
EN
tRETRY
ICL
IOUT
t
Load reaches limit.
Switch is Disabled.
Switch follows EN. Normal
operation.
Figure 35. Current Limit – Version A and B - Latched Behavior
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Feature Description (continued)
Figure 36 shows the immediate current limit switch off behavior. In this example, LATCH is tied to GND; hence,
the switch will retry after the fault is cleared and tRETRY has expired.
DIA_EN
ISNSFH
SNS
High-z
Current
Sense
High-z
High-z
Current
Sense
High-z
VOUT
EN
tRETRY
ICL
IOUT
t
Load reaches limit.
Switch is Disabled.
Switch follows EN. Normal
operation.
Figure 36. Current Limit - Version A and B - LATCH = 0
When the switch retries after a shutdown event, the SNS fault indication will remain until VOUT has risen to VBB –
1.8 V. Once VOUT has risen, the SNS fault indication is reset and current sensing is available. If there is a shortto-ground and VOUT is not able to rise, the SNS fault indication will remain indefinitely. Figure 37 illustrates autoretry behavior and provides a zoomed-in view of the fault indication during retry.
NOTE
Figure 37 assumes that tRETRY has expired by the time that TJ reaches the hysteresis
threshold.
LATCH = 0 V and DIA_EN = 5 V
24
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Feature Description (continued)
ISNSFH
ISNSFH
ISNSFH
ISNSFH
SNS
VOUT
EN
TABS
THYS
TJ
t
ISNSFH
ISNSI
SNS
VBB t 1.8 V
VOUT
EN
TABS
THYS
TJ
t
Figure 37. Fault Indication During Retry
9.3.1.6 Fault Event – Timing Diagrams - Version F
TPS1HB08-Q1 device version F will follow the same timing and fault diagrams as described in Fault Event –
Timing Diagrams - Version A and B, with the only difference being the behavior of the FLT pin. For each
diagram, if version F is used, it will indicate fault in the same cases as the SNS pin. In every diagram, when the
SNS pin outputs ISNSFH, the FLT pin will go to an open drain state to indicate fault as well.
9.3.2 Diagnostic Mechanisms
9.3.2.1 VOUT Short-to-Battery and Open-Load
The TPS1HB08-Q1 is capable of detecting short-to-battery and open-load events regardless of whether the
switch is turned on or off, however the two conditions use different methods.
9.3.2.1.1 Detection With Switch Enabled
When the switch is enabled, the VOUT short-to-battery and open-load conditions can be detected by the current
sense feature. In both cases, the load current will be measured through the SNS pin as below the expected
value.
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Feature Description (continued)
9.3.2.1.2 Detection With Switch Disabled
While the switch is disabled, if DIA_EN is high, an internal comparator will detect the condition of VOUT. If the
load is disconnected (open load condition) or there is a short to battery the VOUT voltage will be higher than the
open load threshold (VOL,off) and a fault is indicated on the SNS pin and the FLT pin on version F. An internal
pull-up of 1 MΩ is in series with an internal MOSFET switch, so no external component is required if a
completely open load must be detected. However, if there is significant leakage or other current draw even when
the load is disconnected, a lower value pull-up resistor and switch can be added externally to set the VOUT
voltage above the VOL,off during open load conditions.
This figure assumes that the device ground and the load ground are at the same potential. In a real system, there
may be a ground shift voltage of 1 V to 2 V.
Figure 38. Short to Battery and Open Load Detection
The detection circuitry is only enabled when DIA_EN = HIGH and EN = LOW. If VOUT > VOL, the SNS pin will go
to the fault level, but if VOUT < VOL there will be no fault indication. The fault indication will only occur if the SEL1
pin is low.
While the switch is disabled and DIA_EN is high, the fault indication mechanisms will continuously represent the
present status. For example, if VOUT decreases from greater than VOL to less than VOL, the fault indication is
reset. Additionally, the fault indication is reset upon the falling edge of DIA_EN or the rising edge of EN.
26
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Feature Description (continued)
DIA_EN
ISNSFH
High-z
SNS
High-z
tOL2
Enabled
VOUT depends on external conditions
VOL
VOUT
EN
t
Switch is disabled and DIA_EN goes
high.
The condition is determined by the
internal comparator.
The open-load fault is
indicated.
Device standby
Figure 39. Open Load
9.3.2.2 SNS Output
The SNS output may be used to sense the load current if the SEL1 pin is low and there is no fault or device
temperature if the SEL1 pin is high and there is no fault. The sense circuit will provide a current that is
proportional to the selected parameter. This current will be sourced into an external resistor to create a voltage
that is proportional to the selected parameter. This voltage may be measured by an ADC or comparator. In
addition, the SNS pin can be used to measure the FET temperature.
To ensure accurate sensing measurement, the sensing resistor should be connected to the same ground
potential as the μC ADC.
Table 3. Analog Sense Transfer Function
PARAMETER
TRANSFER FUNCTION
Load current
ISNSI = IOUT / KSNS = IOUT / 5000
Device temperature
ISNST = (TJ – 25°C) × dISNST / dT + 0.85
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The SNS output will also be used to indicate system faults. ISNS will go to the predefined level, ISNSFH, when there
is a fault. ISNSFH, dISNST/dT, and KSNS are defined in the Specifications section.
Device version F does not have the capability to measure device temperature, so can only measure load current.
9.3.2.2.1 RSNS Value
The following factors should be considered when selecting the RSNS value:
• Current sense ratio (KSNS)
• Largest and smallest diagnosable load current required for application operation
• Full-scale voltage of the ADC
• Resolution of the ADC
For an example of selecting RISNS value, reference RILIM Calculation in the applications section of this datasheet.
9.3.2.2.1.1 High Accuracy Load Current Sense
In many automotive modules, it is required that the high-side switch provide diagnostic information about the
downstream load. With more complex loads, high accuracy sensing is required. A few examples follow:
• LED lighting: In many architectures, the body control module (BCM) must be compatible with both
incandescent bulbs and also LED modules. The bulb may be relatively simple to diagnose. However, the LED
module will consume less current and also can include multiple LED strings in parallel. The same BCM is
used in both cases, so the high-side switch can accurately diagnose both load types.
• Solenoid protection: Often solenoids are precisely controlled by low-side switches. However, in a fault
event, the low-side switch cannot disconnect the solenoid from the power supply. A high-side switch can be
used to continuously monitor several solenoids. If the system current becomes higher than expected, the
high-side switch can disable the module.
9.3.2.2.1.2 SNS Output Filter
To achieve the most accurate current sense value, it is recommended to filter the SNS output. There are two
methods of filtering:
• Low-Pass RC filter between the SNS pin and the ADC input. This filter is illustrated in Figure 43 with typical
values for the resistor and capacitor. The designer should select a CSNS capacitor value based on system
requirements. A larger value will provide improved filtering but a smaller value will allow for faster transient
response.
• The ADC and microcontroller can also be used for filtering. It is recommended that the ADC collects several
measurements of the SNS output. The median value of this data set should be considered as the most
accurate result. By performing this median calculation, the microcontroller can filter out any noise or outlier
data.
9.3.2.3 Fault Indication and SNS Mux
The following faults will be communicated through the SNS output:
• Switch shutdown, due to:
– Thermal Shutdown
– Current limit
• Open-Load and VOUT shorted-to-battery
Open-load and Short-to-battery are not indicated while the switch is enabled, although these conditions can still
be detected through the sense current. Hence, if there is a fault indication while the channel is enabled, then it
must be either due to an overcurrent or overtemperature event.
The SNS pin will only indicate the fault if the SEL1 pins is low. When the SEL1 pin is high and the device is set
to measure temperature, the pin will be measuring the channel FET temperature.
For device version F, the FLT pin will pull low when the device is in any of these fault states.
28
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Table 4. Device Version A/B SNS Mux
INPUTS
OUTPUTS
DIA_EN
SEL1
FAULT DETECT (1)
0
X
X
High-z
1
0
0
Output current
1
1
0
Device temperature
1
0
1
ISNSFH
1
1
1
Device temperature
SNS
For device version F, the SEL1 pin has no functionality so the device cannot output a temperature sense current.
In this case, SEL1 should be connected to ground through an RPROT resistor and the SNS behavior will follow the
table below.
Table 5. Device Version F SNS Mux
INPUTS
OUTPUTS
DIA_EN
SEL1
FAULT DETECT (1)
SNS
FLT (2)
0
X
X
High-z
High-z
1
X
0
Output current
High-z
1
X
1
ISNSFH
Open-drain
9.3.2.4 Resistor Sharing
Multiple high-side devices may use the same SNS resistor as shown in Figure 40. This reduces the total number
of passive components in the system and the number of ADC terminals that are required of the microcontroller.
Microcontroller
GPIO
DIA_EN
Switch 1
SNS
GPIO
DIA_EN
Switch 2
SNS
GPIO
DIA_EN
Switch 3
SNS
GPIO
DIA_EN
Switch 4
SNS
ADC
RPROT
CSNS
RSNS
Figure 40. Sharing RSNS Among Multiple Devices
(1)
(1)
(2)
Fault Detect encompasses multiple conditions:
(a) Switch shutdown and waiting for retry
(b) Open Load and Short To Battery
Fault Detect encompasses multiple conditions:
(a) Switch shutdown and waiting for retry
(b) Open Load / Short To Battery
Version F Only
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9.3.2.5 High-Frequency, Low Duty-Cycle Current Sensing
Some applications will operate with a high-frequency, low duty-cycle PWM or require fast settling of the SNS
output. For example, a 250 Hz, 5% duty cycle PWM will have an on-time of only 200 µs that must be
accommodated. The micro-controller ADC may sample the SNS signal after the defined settling time tSNSION3.
Figure 41. Current Sensing in Low-Duty Cycle Applications
9.4 Device Functional Modes
During typical operation, the TPS1HB08-Q1 can operate in a number of states that are described below and
shown as a state diagram in Figure 42.
9.4.1 Off
Off state occurs when the device is not powered.
9.4.2 Standby
Standby state is a low-power mode used to reduce power consumption to the lowest level. Diagnostic
capabilities are not available in Standby mode.
9.4.3 Diagnostic
Diagnostic state may be used to perform diagnostics while the switch is disabled.
9.4.4 Standby Delay
The Standby Delay state is entered when EN and DIA_EN are low. After tSTBY, if the EN and DIA_EN pins are
still low, the device will go to Standby State.
9.4.5 Active
In Active state, the switch is enabled. The diagnostic functions may be turned on or off during Active state.
30
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Device Functional Modes (continued)
9.4.6 Fault
The Fault state is entered if a fault shutdown occurs (thermal shutdown or current limit). After all faults are
cleared, the LATCH pin is low, and the retry timer has expired, the device will transition out of Fault state. If the
EN pin is high, the switch will re-enable. If the EN pin is low, the switch will remain off.
VBB < UVLO
OFF
ANY STATE
VBB > UVLO
EN = Low
DIA_EN = Low
t > tSTBY
STANDBY
EN = Low
DIA_EN = High
EN = Low
DIA_EN = Low
EN = High
DIA_EN = X
DIAGNOSTIC
STANDBY DELAY
EN = Low
DIA_EN = High
EN = Low
DIA_EN = High
EN = High
DIA_EN = X
ACTIVE
EN = Low
DIA_EN = Low
EN = High
DIA_EN = X
!OT_ABS & !OT_REL & !ILIM
& LATCH = Low & tRETRY
expired
OT_ABS || OT_REL ||
ILIM
FAULT
Figure 42. State Diagram
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
Figure 43 shows the schematic of a typical application for version A or B of the TPS1HB08-Q1. It includes all
standard external components. This section of the datasheet discusses the considerations in implementing
commonly required application functionality. Version F of the device will replace the ILIM pin with the open drain
FLT pin. In this case, the FLT pin must be connected to a 5 V rail through a 10 kΩ pull up resistor.
CVBB2
CVBB1
+
VBB
DIA_EN
RPROT
BAT
±
SEL1
RPROT
GND
RGND
DGND
(1)
EN
RPROT
(1)
Microcontroller
LATCH
RPROT
Optional
CGND
Load
VBB
VOUT
RILIM
COUT
ILIM
Legend
SNS
ADC
RPROT
Chassis GND
RSNS
Module GND
Device GND
CSNS
(1) With the ground protection network, the
device ground will be offset relative to the
microcontroller ground.
With the ground protection network, the device ground will be offset relative to the microcontroller ground.
Figure 43. System Diagram
Table 6. Recommended External Components
32
COMPONENT
TYPICAL VALUE
RPROT
15 kΩ
Protect microcontroller and device I/O pins
PURPOSE
RSNS
1 kΩ
Translate the sense current into sense voltage
CSNS
100 pF - 10 nF
RGND
4.7 kΩ
DGND
BAS21 Diode
Protects device during reverse battery
RILIM
5 kΩ - 25 kΩ
Set current limit threshold
CVBB1
4.7 nF to Device GND
Low-pass filter for the ADC input
Stabilize GND potential during turn-off of inductive load
Filtering of voltage transients (for example, ESD, ISO7637-2) and improved
emissions
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Application Information (continued)
Table 6. Recommended External Components (continued)
COMPONENT
TYPICAL VALUE
CVBB2
220 nF to Module GND
PURPOSE
COUT
220 nF
Stabilize the input supply and filter out low frequency noise.
Filtering of voltage transients (for example, ESD, ISO7637-2)
10.1.1 Ground Protection Network
As discussed in the Reverse Battery section, DGND may be used to prevent excessive reverse current from
flowing into the device during a reverse battery event. Additionally, RGND is placed in parallel with DGND if the
switch is used to drive an inductive load. The ground protection network (DGND and RGND) may be shared
amongst multiple high-side switches.
A minimum value for RGND may be calculated by using the absolute maximum rating for IGND. During the reverse
battery condition, IGND = VBB / RGND:
RGND ≥ VBB / IGND
• Set VBB = –13.5 V
• Set IGND = –50 mA (absolute maximum rating)
RGND ≥ –13.5 V / –50 mA = 270 Ω
(2)
In this example, it is found that RGND must be at least 270 Ω. It is also necessary to consider the power
dissipation in RGND during the reverse battery event:
PRGND = VBB2 / RGND
(3)
2
PRGND = (13.5 V) / 270 Ω = 0.675 W
In practice, RGND may not be rated for such a high power. In this case, a larger resistor value should be selected.
10.1.2 Interface With Microcontroller
The ground protection network will cause the device ground to be at a higher potential than the module ground
(and microcontroller ground). This offset will impact the interface between the device and the microcontroller.
Logic pin voltage will be offset by the forward voltage of the diode. For input pins (for example, EN), the designer
must consider the VIH specification of the switch and the VOH specification of the microcontroller. For a system
that does not include DGND, it is required that VOH > VIH. For a system that does include DGND, it is required that
VOH > (VIH + VF). VF is the forward voltage of DGND.
The sense resistor, RSNS, should be terminated to the microcontroller ground. In this case, the ADC can
accurately measure the SNS signal even if there is an offset between the microcontroller ground and the device
ground.
10.1.3
I/O Protection
RPROT is used to protect the microcontroller I/O pins during system-level voltage transients such as ISO pulses or
reverse battery. The SNS pin voltage can exceed the ADC input pin maximum voltage if the fault or saturation
current causes a high enough voltage drop across the sense resistor. If that can occur in the design (for
example, by switching to a high value RSNS to improve ADC input level), then an appropriate external clamp has
to be designed to prevent a high voltage at the SNS output and the ADC input.
10.1.4 Inverse Current
Inverse current occurs when 0 V < VBB < VOUT. In this case, current may flow from VOUT to VBB. Inverse current
cannot be caused by a purely resistive load. However, a capacitive or inductive load can cause inverse current.
For example, if there is a significant amount of load capacitance and the VBB node has a transient droop, VOUT
may be greater than VBB.
The TPS1HB08-Q1 will not detect inverse current. When the switch is enabled, inverse current will pass through
the switch. When the switch is disabled, inverse current may pass through the MOSFET body diode. The device
will continue operating in the normal manner during an inverse current event.
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10.1.5 Loss of GND
The ground connection may be lost either on the device level or on the module level. If the ground connection is
lost, the switch will be disabled. If the switch was already disabled when the ground connection was lost, the
switch will remain disabled. When the ground is reconnected, normal operation will resume.
10.1.6 Automotive Standards
The TPS1HB08-Q1 is designed to be protected against all relevant automotive standards to ensure reliable
operations when connected to a 12-V automotive battery.
10.1.6.1 ISO7637-2
The TPS1HB08-Q1 is tested according to the ISO7637-2:2011 (E) standard. The test pulses are applied both
with the switch enabled and disabled. The test setup includes only the DUT and minimal external components:
CVBB, COUT, DGND, and RGND.
Status II is defined in ISO 7637-1 Function Performance Status Classification (FPSC) as: “The function does not
perform as designed during the test but returns automatically to normal operation after the test”. See Table 7 for
ISO7637-2:2011 (E) expected results.
Table 7. ISO7637-2:2011 (E) Results
TEST
PULSE
1
2a
(1)
(1)
TEST PULSE SEVERITY LEVEL WITH
STATUS II FUNCTIONAL PERFORMANCE
LEVEL
US
MINIMUM NUMBER
OF PULSES OR TEST
TIME
III
–112 V
500 pulses
BURST CYCLE / PULSE REPETITION TIME
MIN
MAX
0.5 s
-5s
III
+55 V
500 pulses
0.20
2b
IV
+10 V
10 pulses
0.5 s
5s
3a
IV
–220 V
1 hour
90 ms
100 ms
3b
IV
+150 V
1 hour
90 ms
100 ms
1 µF capacitance on CVBB is required for passing level 3 ISO7637 pulse 2 A.
10.1.6.2 TPS1HB08-Q1 AEC-Q100-012 Short Circuit Reliability
The TPS1HB08-Q1 is tested according to the AEC-Q100-012 Short Circuit Reliability standard. This test is
performed to demonstrate the robustness of the device against VOUT short-to-ground events. Test conditions and
test procedures are summarized in . For further details, refer to the AEC-Q100-012 standard document.
Test conditions:
• LATCH = 0 V
• 10 units from 3 separate lots for a total of 30 units.
• Lsupply = 5 μH, Rsupply = 10 mΩ
• VBB = 14 V
Test procedure:
• Parametric data is collected on each unit pre-stress
• Each unit is enabled into a short-circuit with the required short circuit cycles or duration as specified
• Functional testing is performed on each unit post-stress to verify that the part still operates as expected
The cold repetitive test is run at 85ºC which is the worst case condition for the device to sustain a short circuit.
The cold repetitive test refers to the device being given time to cool down between pulses, rather than being run
at a cold temperature. The load short circuit is the worst case situation, since the energy stored in the cable
inductance can cause additional harm. The fast response of the device ensures current limiting occurs quickly
and at a current close to the load short condition. In addition, the hot repetitive test is performed as well.
34
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Table 8. AEC-Q100-012 Test Results
TEST
LOCATION OF SHORT
DEVICE
VERSION
NO. OF CYCLES /
DURATION
NO. OF
UNITS
NO. OF
FAILS
Cold Repetitive - Long
Pulse
Load Short Circuit, Lshort = 5 μH, Rshort =
50 mΩ, TA = -40ºC
F
100 k cycles
30
0
Cold Repetitive - Long
Pulse - Load Short (1)
Load Short Circuit, Lshort = 5 μH, Rshort =
200 mΩ, TA = 85ºC
F
100 k cycles
30
0
Cold Repetitive - Long
Pulse - Load Short (1)
Load Short Circuit, Lshort = 5 μH, Rshort =
200 mΩ, TA = -40ºC
F
100 k cycles
30
0
Cold Repetitive - Long
Pulse - Terminal Short
Load Short Circuit, Lshort < 1 μH, Rshort <
20 mΩ, TA = 85ºC
F
100 k cycles
30
0
Hot Repetitive - Long Pulse
Load Short Circuit, Lshort = 5 μH, Rshort =
100 mΩ, TA = 25ºC
F
100 hours
30
0
(1)
For Cold Repetitive short, 200 mΩ Rshort is used so that the device is at a higher junction temperature before the short circuit event,
increasing the harshness of the test.
10.1.7 Thermal Information
When outputting current, the TPS1HB08-Q1 will heat up due to the power dissipation. The transient thermal
impedance curve can be used to determine the device temperature during a pulse of a given length. This ZθJA
value corresponds to a JEDEC standard 2s2p thermal test PCB with thermal vias.
35
30
RTJA (qC/W)
25
20
15
10
5
0
0.0001
0.0010.002 0.005 0.01 0.02
0.05 0.1
0.20.3 0.5
Time (s)
1
2 3 4 5 67 10
20 30 50
100 200
500 1000
Ther
Figure 44. TPS1HB08-Q1 Transient Thermal Impedance
10.2 Typical Application
This application example demonstrates how the TPS1HB08-Q1 device can be used to power resistive heater
loads in automotive seats. In this example, we consider a heater load that is powered by the device. This is just
one example of the many applications where this device can fit.
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Typical Application (continued)
Figure 45. Block Diagram for Powering Heater Load
10.2.1 Design Requirements
For this design example, use the input parameters shown in Table 9.
Table 9. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
VBB
13.5 V
Load - Heater
130 W max
Load Current Sense
100 mA to 20 A
ILIM
12 A
Ambient temperature
70°C
RθJA
32.6°C/W (depending on PCB)
Device Version
A
10.2.2 Detailed Design Procedure
10.2.2.1 Thermal Considerations
The 130 W heater load will cause a DC current in the channel under maximum load power condition of around
9.6 A. Therefore, this current at 13.5 V will assume worst case heating.
Power dissipation in the switch is calculated in Equation 4. RON is assumed to be 16 mΩ because this is the
maximum specification at high temperature. In practice, RON will almost always be lower.
36
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PFET = I2 × RON
PFET = (9.6 A)2 × 16 mΩ = 1.47 W
(4)
(5)
This means that the maximum FET power dissipation is 1.47 W. The junction temperature of the device can be
calculated using Equation 6 and the RθJA value from the Specifications section.
TJ = TA + RθJA × PFET
TJ = 70°C + 32.6°C/W × 1.47 W = 117.9°C
(6)
The maximum junction temperature rating for the TPS1HB08-Q1 is TJ = 150°C. Based on the above example
calculation, the device temperature will stay below the maximum rating even at this high level of current.
10.2.2.2 RILIM Calculation
In this application, the TPS1HB08-Q1 must allow for the maximum DC current with margin but minimize the
energy in the switch during a fault condition by minimizing the current limit. For this application, the best ILIM set
point is approximately 12 A. Equation 7 allows you to calculate the RILIM value that is placed from the ILIM pins to
VBB. RILIM is calculated in kΩ.
RILIM = KCL / ICL
(7)
Because this device is version A, the KCL value in the Specifications section is 160 A × kΩ.
RILIM = 160 (A × kΩ) / 12 A = 13.3 kΩ
(8)
For a ILIM of 12 A, the RILIM value should be set at around 13.3 kΩ
10.2.2.3 Diagnostics
If the resistive heating load is disconnected (heater malfunction), an alert is desired. Open-load detection can be
performed in the switch-enabled state with the current sense feature of the TPS1HB08-Q1 device. Under open
load condition, the current in the SNS pin will be the fault current and the can be detected from the sense voltage
measurement.
10.2.2.3.1 Selecting the RISNS Value
Table 10 shows the requirements for the load current sense in this application. The KSNS value is specified for
the device and can be found in the Specifications section.
Table 10. RSNS Calculation Parameters
PARAMETER
EXAMPLE VALUE
Current Sense Ratio (KSNS)
5000
Largest diagnosable load current
20 A
Smallest diagnosable load current
100 mA
Full-scale ADC voltage
5V
ADC resolution
10 bit
The load current measurement requirements of 20 A ensures that even in the event of a overcurrent surpassing
the set current limit, the MCU can register and react by shutting down the TPS1HB08-Q1, while the low level of
100 mA allows for accurate measurement of low load currents.
The RSNS resistor value should be selected such that the largest diagnosable load current puts VSNS at about
95% of the ADC full-scale. With this design, any ADC value above 95% can be considered a fault. Additionally,
the RSNS resistor value should ensure that the smallest diagnosable load current does not cause VSNS to fall
below 1 LSB of the ADC. With the given example values, a 1.2-kΩ sense resistor satisfies both requirements
shown in Table 11.
Table 11. VSNS Calculation
LOAD (A)
SENSE RATIO
ISNS (mA)
RSNS (Ω)
VSNS (V)
0.1
5000
0.02
1200
0.024
% of 5-V ADC
0.5%
20
5000
4
1200
4.800
96.0%
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10.3 Typical Application
This application example demonstrates how the TPS1HB08-Q1 device can be used to power bulb loads in
automotive headlights. In this example, we consider a 65 W bulb that is powered by the device. This is just one
example of the many applications where this device can fit.
12 V Battery/
Cap Bank
10m
~1m 8 AWG
Temperature
Chamber
DIA_EN
VBB
65 m
~2m 18 AWG
SEL1
BULB LOAD
VOUT
SNS
µC
ILIM
LATCH
GND
EN
10m
~2m 8 AWG
Figure 46. Block Diagram for Driving Bulb Load
10.3.1 Design Requirements
For this design example, use the input parameters shown in Table 12.
Table 12. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
VBB
16 V
Load - Bulb
65 W W max
Fixed ILIM
94 A
Ambient temperature
25°C
Bulb Temperature in Chamber
-40°C
Cable Impedance from Device to
Bulb
65 mΩ
Device Version
F
10.3.2 Detailed Design Procedure
The typical bulb test setup is where the device is at 25°C and the bulb is in a temperature chamber at -40°C. The
bulb needs to be kept at -40°C so that the impedance is very low and the inrush current will be the highest. The
impedance of the cables is important because it will change the inrush current of the bulb as well. The F version
of the TPS1HB08-Q1 has a very high fixed current limit so that the inrush current of the bulb can be passed
without limitation.
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10.3.3 Application Curves
Figure 47. TPS1HB08-Q1 Version F 65W Bulb Turn On
11 Power Supply Recommendations
The TPS1HB08-Q1 device is designed to operate in a 12-V automotive system. The nominal supply voltage
range is 6 V to 18 V as measured at the VBB pin with respect to the GND pin of the device. In this range the
device meets full parametric specifications as listed in the Electrical Characteristics table. The device is also
designed to withstand voltage transients beyond this range. When operating outside of the nominal voltage range
but within the operating voltage range, the device will exhibit normal functional behavior. However, parametric
specifications may not be specified outside the nominal supply voltage range.
Table 13. Operating Voltage Range
VBB Voltage Range
Note
3 V to 6 V
Transients such as cold crank and start-stop, functional operation
are specified but some parametric specifications may not apply. The
device is completely short-circuit protected up to 125°C
6 V to 18 V
Nominal supply voltage, all parametric specifications apply. The
device is completely short-circuit protected up to 125°C
18 V to 40 V
Transients such as jump-start and load-dump, functional operation
specified but some parametric specifications may not apply
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12 Layout
12.1 Layout Guidelines
To achieve optimal thermal performance, connect the exposed pad to a large copper pour. On the top PCB layer,
the pour may extend beyond the package dimensions as shown in the example below. In addition to this, it is
recommended to also have a VBB plane either on one of the internal PCB layers or on the bottom layer.
Vias should connect this plane to the top VBB pour.
Ensure that all external components are placed close to the pins. Device current limiting performance can be
harmed if the RILIM is far from the pins and extra parasitics are introduced.
12.2 Layout Example
The layout example is for device versions A/B.For device version F, the ILIM pin will be replaced by the FLT pin.
Figure 48. 16-PWP Layout Example
40
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13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
For related documentation see the following:
• TI's How To Drive Inductive, Capacitive, and Lighting Loads with Smart High Side Switches
• TI's Short-Circuit Reliability Test for Smart Power Switch
• TI's Reverse Battery Protection for High Side Switches
• TI's Adjustable Current Limit of Smart Power Switches
13.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS1HB08AQPWPRQ1
ACTIVE
HTSSOP
PWP
16
3000
RoHS-Exempt
& Green
NIPDAU
Level-3-260C-168HRS
-40 to 125
1HB08A
TPS1HB08BQPWPRQ1
ACTIVE
HTSSOP
PWP
16
3000
RoHS-Exempt
& Green
NIPDAU
Level-3-260C-168HRS
-40 to 125
1HB08B
TPS1HB08FQPWPRQ1
ACTIVE
HTSSOP
PWP
16
3000
RoHS-Exempt
& Green
NIPDAU
Level-3-260C-168HRS
-40 to 125
1HB08F
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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