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TPS2062-Q1, TPS2065-Q1
SLVSA01C – MAY 2011 – REVISED JUNE 2016
TPS206x-Q1 Current-Limited Power-Distribution Switches
1 Features
3 Description
•
•
•
•
•
The TPS206x-Q1 power-distribution switch is
intended for applications where heavy capacitive
loads and short circuits are likely to be encountered.
This device incorporates 70-mΩ N-channel MOSFET
power switches for power-distribution systems that
require multiple power switches in a single package.
Each switch is controlled by a logic enable input.
Gate drive is provided by an internal charge pump
designed to control the power-switch rise times and
fall times to minimize current surges during switching.
The charge pump requires no external components
and allows operation from supplies as low as 2.7 V.
1
•
•
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
70-mΩ High-Side MOSFET
1-A Continuous Current
Thermal and Short-Circuit Protection
Accurate Current Limit
(1.1-A Minimum, 2.1-A Maximum)
Operating Range: 2.7 V to 5.5 V
0.6-ms Typical Rise Time
Undervoltage Lockout
Deglitched Fault Report (OC)
No OC Glitch During Power Up
1-μA Maximum Standby Supply Current
Bidirectional Switch
Built-in Soft Start
UL Recognized Under File No. E166910
Ambient Temperature Range: –40°C to 125°C
2 Applications
•
•
•
Power Distribution and Switching
Heavy Capacitive Loads
Short-Circuit Protections
When the output load exceeds the current-limit
threshold or a short is present, the device limits the
output current to a safe level by switching into a
constant-current mode, pulling the overcurrent (OCx)
logic output low. When continuous heavy overloads
and short circuits increase the power dissipation in
the switch, causing the junction temperature to rise, a
thermal protection circuit shuts off the switch to
prevent damage. Recovery from a thermal shutdown
is automatic once the device has cooled sufficiently.
Internal circuitry ensures that the switch remains off
until valid input voltage is present. This powerdistribution switch is designed to set current limit at
1.5 A (typically).
Device Information(1)
PART NUMBER
TPS206x-Q1
PACKAGE
BODY SIZE (NOM)
MSOP-PowerPAD (8) 3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
TPS2065-Q1 Functional Block Diagram
Copyright © 2016, Texas Instruments Incorporated
A.
Current sense
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS2062-Q1, TPS2065-Q1
SLVSA01C – MAY 2011 – REVISED JUNE 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
5
5
5
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Dissipation Ratings ...................................................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 10
Detailed Description ............................................ 12
8.1
8.2
8.3
8.4
Overview .................................................................
Functional Block Diagrams .....................................
Feature Description.................................................
Device Functional Modes........................................
12
12
13
14
9
Application and Implementation ........................ 15
9.1 Application Information............................................ 15
9.2 Typical Application .................................................. 20
10 Power Supply Recommendations ..................... 22
11 Layout................................................................... 22
11.1
11.2
11.3
11.4
Layout Guidelines ................................................. 22
Layout Examples................................................... 22
Thermal Considerations ........................................ 23
Power Dissipation and Junction Temperature ...... 23
12 Device and Documentation Support ................. 24
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Device Support......................................................
Receiving Notification of Documentation Updates
Related Links ........................................................
Community Resource............................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
24
24
24
24
24
24
24
13 Mechanical, Packaging, and Orderable
Information ........................................................... 24
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (April 2012) to Revision C
Page
•
Added ESD Ratings table, Feature Description section, Thermal Information table, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section ..................................... 1
•
Changed Current Limit max from 1.9 A at TA = 25°C to 2.1 A across full TA range in Features............................................ 1
•
Changed UL Listed to UL Recognized Under in Features ..................................................................................................... 1
•
Removed the General Switch Catalog image from the front page ........................................................................................ 1
•
Removed Ordering Information table, see POA at the end of the document......................................................................... 3
•
Changed pin 4 name from EN or EN to EN under the TPS2065-Q1 pinout to reflect the correct pin name for that
specific part instead of the EN and EN options from the TPS206x family ............................................................................. 4
Changes from Revision A (November 2011) to Revision B
Page
•
Changed Pin Out drawing to include EN................................................................................................................................ 1
•
Added "or EN" to Electrical Characteristics table. .................................................................................................................. 5
2
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SLVSA01C – MAY 2011 – REVISED JUNE 2016
5 Pin Configuration and Functions
TPS2062-Q1 DGN Package
8-Pin MSOP-PowerPAD
Top View
GND
1
IN
2
8
OC1
7
OUT1
6
OUT2
5
OC2
Thermal
EN1
3
EN2
4
Pad
Pin Functions: TPS2062-Q1
PINS
NAME
NO.
TYPE
DESCRIPTION
EN1
3
I
Enable input, logic low (active low) turns on power switch IN-OUT1
EN2
4
I
Enable input, logic low (active low) turns on power switch IN-OUT2
GND
1
GND
Ground
IN
2
PWR
Supply Input voltage
OC1
8
O
Overcurrent, open-drain output, active low, IN-OUT1
OC2
5
O
Overcurrent, open-drain output, active low, IN-OUT2
OUT1
7
O
Power-switch output, IN-OUT1
OUT2
6
O
Power-switch output, IN-OUT2
Thermal
Pad
—
GND
Internally connected to GND; used to heat-sink the part to the circuit board ground plane, also
calledPowerPAD™ or exposed thermal pad. Must be connected to GND pin.
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TPS2062-Q1, TPS2065-Q1
SLVSA01C – MAY 2011 – REVISED JUNE 2016
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TPS2065-Q1 DGN Package
8-Pin HVSSOP
Top View
GND
1
IN
2
8
OUT
7
OUT
6
OUT
5
OC
Thermal
IN
3
EN
4
Pad
Pin Functions: TPS2065-Q1
PINS
NAME
NO.
TYPE
DESCRIPTION
EN
4
I
GND
1
GND
Ground
IN
2, 3
PWR
Supply Input voltage
OC
5
O
Overcurrent, open-drain output, active low, IN-OUT
6, 7, 8
O
Power-switch output, IN-OUT
—
GND
OUT
Thermal
Pad
Enable input, logic high (active high) turns on power switch IN-OUT
Internally connected to GND; used to heat-sink the part to the circuit board ground plane, also called
PowerPAD™ or exposed thermal pad. Must be connected to GND pin.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range unless otherwise noted (1)
Input voltage, VI(IN)
(2)
MIN
MAX
UNIT
–0.3
6
V
Output voltage (2), VO(OUTx)
–0.3
6
V
Input voltage, VI(ENx)
–0.3
6
V
Voltage, VI(OCx)
–0.3
6
V
Continuous output current, IO(OUTx)
Internally limited
Continuous total power dissipation
See Dissipation
Ratings
Operating virtual junction temperature range, TJ
–40
150
°C
Storage temperature range, Tstg
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to GND.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
4
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002 (1)
±2000
Charged-device model (CDM), per AEC Q100-011
±1000
Machine model (MM)
±100
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
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SLVSA01C – MAY 2011 – REVISED JUNE 2016
6.3 Recommended Operating Conditions
MIN
MAX
2.7
5.5
V
Input voltage, VI(ENx)
0
5.5
V
Continuous output current, IO(OUTx)
0
1
A
Ambient temperature, TA
–40
125
°C
Operating virtual junction temperature, TJ
–40
150
°C
Input voltage, VI(IN)
UNIT
6.4 Thermal Information
TPS2062-Q1
TPS2065-Q1
DGN
(MSOPPowerPAD)
DGN
(MSOPPowerPAD)
8 PINS
8 PINS
65
57.3
°C/W
THERMAL METRIC (1)
UNIT
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
52.8
54.7
°C/W
RθJB
Junction-to-board thermal resistance
42.3
38.8
°C/W
ψJT
Junction-to-top characterization parameter
3.1
3.9
°C/W
ψJB
Junction-to-board characterization parameter
41.9
38.6
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
17.7
10.1
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics
over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(ENx) = 0 V for TPS2062-Q1 or
VI(EN) = 5.5 V for TPS2065-Q1 (unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
MIN
TYP
MAX
UNIT
POWER SWITCH
Static drain-source ON-state resistance,
5-V operation and 3.3-V operation
VI(IN) = 5 V or 3.3 V, IO = 1 A, –40°C ≤ TA ≤ 125°C
70
135
mΩ
Static drain-source ON-state resistance,
2.7-V operation (2)
VI(IN) = 2.7 V, IO = 1 A, –40°C ≤ TA ≤ 125°C
75
150
mΩ
tr
Rise time, output
CL = 1 μF, RL= 5 Ω, TA = 25°C
VI(IN) = 5.5 V
0.6
1.5
VI(IN) = 2.7 V
0.4
1
tf
Fall time, output
CL = 1 μF, RL= 5 Ω, TA = 25°C
rDS(ON)
VI(IN) = 5.5 V
0.05
0.5
VI(IN) = 2.7 V
0.05
0.5
ms
ms
ENABLE INPUT EN OR EN
VIH
High-level input voltage
2.7 V ≤ VI(IN) ≤ 5.5 V
VIL
Low-level input voltage
2.7 V ≤ VI(IN) ≤ 5.5 V
II
Input current
VI(ENx) = 0 V or 5.5 V
tON
Turnon time
CL = 100 μF, RL= 5 Ω
3
toff
Turnoff time
CL = 100 μF, RL= 5 Ω
10
2
0.8
–1
1
V
μA
ms
CURRENT LIMIT
IOS
Short-circuit output current (1)
IOC_TRIP Overcurrent trip threshold
(1)
(2)
VI(IN) = 5 V, OUT connected to GND,
Device enabled into short-circuit
TA = 25°C
1.1
1.5
1.9
–40°C ≤ TA ≤ 125°C
1.1
1.5
2.1
1.6
2.3
2.9
VI(IN) = 5 V, current ramp (≤ 100 A/s) on OUT
A
A
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
Not tested in production, specified by design.
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Electrical Characteristics (continued)
over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(ENx) = 0 V for TPS2062-Q1 or
VI(EN) = 5.5 V for TPS2065-Q1 (unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
MIN
TYP
MAX
TA = 25°C
0.5
1
–40°C ≤ TA ≤ 125°C
0.5
5
TA = 25°C
50
70
–40°C ≤ TA ≤ 125°C
50
90
UNIT
SUPPLY CURRENT (TPS2062-Q1)
Supply current, low-level output
No load on OUT, VI(ENx) = 5.5 V
Supply current, high-level output
No load on OUT, VI(ENx) = 0 V
Leakage current
OUT connected to ground, VI(ENx) = 5.5 V
–40°C ≤ TA ≤ 125°C
1
μA
Reverse leakage current
VI(OUTx) = 5.5 V, IN = ground
TA = 25°C
0.2
μA
TA = 25°C
0.5
1
–40°C ≤ TA ≤ 125°C
0.5
5
TA = 25°C
43
60
–40°C ≤ TA ≤ 125°C
43
70
μA
μA
SUPPLY CURRENT (TPS2065-Q1)
Supply current, low-level output
No load on OUT, VI(EN) = 0 V
Supply current, high-level output
No load on OUT, VI(EN) = 5.5 V
Leakage current
OUT connected to ground, VI(EN) = 0 V
–40°C ≤ TA ≤ 125°C
1
μA
Reverse leakage current
VI(OUTx) = 5.5 V, IN = ground
TA = 25°C
0
μA
μA
μA
UNDERVOLTAGE LOCKOUT
Low-level input voltage, IN
2
Hysteresis, IN
TA = 25°C
2.5
75
V
mV
OVERCURRENT OC1 AND OC2
Output low voltage, VOL(OCx)
IO(OCx) = 5 mA
Off-state current
VO(OCx) = 5 V or 3.3 V
OC deglitch (2)
OCx assertion or deassertion
4
8
0.4
V
1
μA
15
ms
THERMAL SHUTDOWN (3)
Thermal shutdown threshold
135
Recovery from thermal shutdown
125
Hysteresis
(3)
°C
°C
10
°C
The thermal shutdown only reacts under overcurrent conditions.
6.6 Dissipation Ratings
6
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 125°C
POWER RATING
DGN-8
2.14 W
17.123 mW/°C
428 mW
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SLVSA01C – MAY 2011 – REVISED JUNE 2016
6.7 Typical Characteristics
1.0
2
CL = 100 mF,
RL = 5 W,
TA = 255C
0.9
0.8
CL = 100 mF,
RL = 5 W,
TA = 255C
1.9
Turnoff Time − mS
Turnon Time − ms
0.7
0.6
0.5
0.4
1.8
1.7
0.3
0.2
1.6
0.1
0
2
3
4
5
VI − Input Voltage − V
1.5
6
2
Figure 1. Turnon Time vs Input Voltage
4
5
VI − Input Voltage − V
6
Figure 2. Turnoff Time vs Input Voltage
0.25
0.6
CL = 1 mF,
RL = 5 W,
TA = 255C
CL = 1 mF,
RL = 5 W,
TA = 255C
0.5
0.2
0.4
Fall Time − ms
Rise Time − ms
3
0.3
0.15
0.1
0.2
0.05
0.1
0
0
2
3
4
5
VI − Input Voltage − V
6
2
Figure 3. Rise Time vs Input Voltage
6
Figure 4. Fall Time vs Input Voltage
I I (IN) − Supply Current, Output Enabled − µ A
I I (IN) − Supply Current, Output Enabled − µ A
4
5
VI − Input Voltage − V
60
70
VI = 5.5 V
60
50
VI = 5 V
VI = 3.3 V
40
30
VI = 2.7 V
20
10
0
3
−50
0
50
100
150
VI = 5.5 V
50
VI = 5 V
40
30
VI = 3.3 V
10
0
−50
TJ − Junction Temperature − 5C
Figure 5. TPS2062-Q1 Supply Current, Output Enabled
vs Junction Temperature
VI = 2.7 V
20
0
50
100
150
TJ − Junction Temperature − 5C
Figure 6. TPS2065-Q1 Supply Current, Output Enabled
vs Junction Temperature
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0.5
0.5
I I (IN) − Supply Current, Output Disabled − µ A
I I (IN) − Supply Current, Output Disabled − µ A
Typical Characteristics (continued)
VI = 5.5 V
0.45
VI = 5 V
0.4
0.35
0.3
VI = 3.3 V
VI = 2.7 V
0.25
0.2
0.15
0.1
0.05
0
−50
0
50
100
VI = 5.5 V
0.45
VI = 5 V
0.4
0.35
0.3
0.25
0.2
0.15
0.1
0.05
0
−50
150
0
Figure 7. TPS2062-Q1 Supply Current, Output Disabled
vs Junction Temperature
100
150
Figure 8. TPS2065-Q1 Supply Current, Output Disabled
vs Junction Temperature
120
1.56
IO = 0.5 A
VI = 2.7 V
1.54
I OS − Short-Circuit Output Current − A
Out1 = 5 V
100
On-State Resistance − mΩ
50
TJ − Junction Temperature − 5C
TJ − Junction Temperature − 5C
r DS(on) − Static Drain-Source
VI = 3.3 V
VI = 2.7 V
Out1 = 3.3 V
80
Out1 = 2.7 V
60
40
20
1.52
VI = 3.3 V
1.5
1.48
1.46
1.44
VI = 5 V
1.42
VI = 5.5 V
1.4
1.38
1.36
1.34
0
−50
0
50
100
−50
150
100
150
2.3
2.5
UVLO Rising
UVOL − Undervoltage Lockout − V
TA = 255C
Load Ramp = 1A/10 ms
2.3
Threshold Trip Current − A
50
Figure 10. Short-Circuit Output Current
vs Junction Temperature
Figure 9. Static Drain-Source ON-State Resistance
vs Junction Temperature
2.1
1.9
1.7
1.5
2.5
3
3.5
4
4.5
5
5.5
6
2.26
2.22
UVLO Falling
2.18
2.14
2.1
−50
0
Figure 11. Threshold Trip Current vs Input Voltage
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50
100
150
TJ − Junction Temperature − 5C
VI − Input Voltage − V
8
0
TJ − Junction Temperature − 5C
TJ − Junction Temperature − 5C
Figure 12. Undervoltage Lockout vs Junction Temperature
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SLVSA01C – MAY 2011 – REVISED JUNE 2016
Typical Characteristics (continued)
200
Current-Limit Response − µ s
VI = 5 V,
TA = 255C
150
100
50
0
0
2.5
5
7.5
Peak Current − A
10
12.5
Figure 13. Current-Limit Response vs Peak Current
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7 Parameter Measurement Information
OUT
RL
tf
tr
CL
VO(OUT)
90%
10%
90%
10%
TEST CIRCUIT
50%
VI(EN)
50%
toff
ton
VO(OUT)
90%
50%
50%
VI(EN)
toff
ton
90%
VO(OUT)
10%
10%
VOLTAGE WAVEFORMS
Figure 14. Test Circuit and Voltage Waveforms
RL = 5 W,
CL = 1 mF
TA = 255C
VI(EN)
5 V/div
VI(EN)
5 V/div
RL = 5 W,
CL = 1 mF
TA = 255C
VO(OUT)
2 V/div
VO(OUT)
2 V/div
t − Time − 500 ms/div
Figure 15. Turnon Delay and Rise Time With 1-μF Load
RL = 5 W,
CL = 100 mF
TA = 255C
VI(EN)
5 V/div
t − Time − 500 ms/div
Figure 16. Turnoff Delay and Fall Time With 1-μF Load
VI(EN)
5 V/div
RL = 5 W,
CL = 100 mF
TA = 255C
VO(OUT)
2 V/div
VO(OUT)
2 V/div
t − Time − 500 ms/div
Figure 17. Turnon Delay and Rise Time With 100-μF Load
10
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t − Time − 500 ms/div
Figure 18. Turnoff Delay and Fall Time With 100-μF Load
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SLVSA01C – MAY 2011 – REVISED JUNE 2016
Parameter Measurement Information (continued)
VI(EN)
5 V/div
VIN = 5 V
RL = 5 W,
TA = 255C
VI(EN)
5 V/div
220 mF
470 mF
IO(OUT)
500 mA/div
IO(OUT)
500 mA/div
t − Time − 500 ms/div
100 mF
t − Time − 1 ms/div
Figure 19. Short-Circuit Current,
Device Enabled Into Short
Figure 20. Inrush Current With Different
Load Capacitance
VO(OC)
2 V/div
VO(OC)
2 V/div
IO(OUT)
1 A/div
IO(OUT)
1 A/div
t − Time − 2 ms/div
Figure 21. 2-Ω Load Connected to Enabled Device
t − Time − 2 ms/div
Figure 22. 1-Ω Load Connected to Enabled Device
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8 Detailed Description
8.1 Overview
The TPS206x-Q1 power-distribution switch is intended for applications where heavy capacitive loads and short
circuits are likely to be encountered. This device incorporates 70-mΩ N-channel MOSFET power switches for
power-distribution systems that require multiple power switches in a single package. Each switch is controlled by
a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch rise
times and fall times to minimize current surges during switching. The charge pump requires no external
components and allows operation from supplies as low as 2.7 V.
When the output load exceeds the current-limit threshold or a short is present, the device limits the output current
to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When
continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the junction
temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal
shutdown is automatic once the device has cooled sufficiently (10°C hysteresis, typical). Internal circuitry ensures
that the switch remains off until valid input voltage is present. This power-distribution switch is designed to set
current limit at 1.5 A typically.
8.2 Functional Block Diagrams
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A.
Current sense
Figure 23. Functional Block Diagram – TPS2062-Q1
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Functional Block Diagrams (continued)
Copyright © 2016, Texas Instruments Incorporated
A.
Current sense
Figure 24. Functional Block Diagram – TPS2065-Q1
8.3 Feature Description
8.3.1 Power Switch
The power switch is an N-channel MOSFET with a low ON-state resistance. Configured as a high-side switch,
the power switch prevents current flow from OUT to IN and IN to OUT when disabled. The power switch supplies
a minimum current of 1 A.
8.3.2 Charge Pump
An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
little supply current.
8.3.3 Driver
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver controls the rise and fall times of the output voltage.
8.3.4 Enable (ENx for TPS2062-Q1) and (EN for TPS2065-Q1)
The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce
the supply current. The supply current is reduced to less than 1 μA when a logic high is present on ENx or a logic
low is present on EN. A logic low input on ENx or logic high on EN restores bias to the drive and control circuits
and turns the switch ON. The enable input is compatible with both TTL and CMOS logic levels.
8.3.5 Overcurrent (OCx)
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output remains asserted until the overcurrent or overtemperature condition is removed. A
10‑ms deglitch circuit prevents the OCx signal from oscillation or false triggering. If an overtemperature shutdown
occurs, the OCx is asserted instantaneously.
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Feature Description (continued)
8.3.6 Current Sense
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its
saturation region, which switches the output into a constant-current mode and holds the current constant while
varying the voltage on the load.
8.3.7 Thermal Sense
The TPS2065-Q1 and TPS2062-Q1 implement a thermal sensing to monitor the operating temperature of the
power distribution switch. In an overcurrent or short-circuit condition, the junction temperature rises. When the
junction temperature rises to approximately 140°C, the internal thermal-sense circuitry turns off the switch, thus
preventing the device from damage. Hysteresis is built into the thermal sense, and after the device has cooled
approximately 10°C, the switch turns back ON. The switch continues to cycle OFF and ON until the fault is
removed. The open-drain fault reporting output (OCx) is asserted (active low) when an overtemperature
shutdown or overcurrent occurs.
8.3.8 Undervoltage Lockout
A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control
signal turns off the power switch.
8.4 Device Functional Modes
The device has two functional modes of operation controlled by EN or ENx. When there is a logic high on EN or
a logic low on ENx, the device is in the normal mode of operation and the power switch is ON. When EN is logic
low or ENx is logic high, the device is in a low power mode where the power switch is off and the supply current
is reduced to less than 1 μA.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
9.1.1 Overcurrent
A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do not
increase the series resistance of the current path. When an overcurrent condition is detected, the device
maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only
if the fault is present long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before VI(IN) has been applied (see Figure 5). The TPS206x-Q1 senses the short and
immediately switches into a constant-current output.
In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload
occurs, high currents may flow for a short period of time before the current-limit circuit can react. After the
current-limit circuit has tripped (reached the overcurrent trip threshold), the device switches into constant-current
mode.
In the third condition, the load has been gradually increased beyond the recommended operating current. The
current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is
exceeded (see Figure 7). The TPS2065-Q1 and TPS2062-Q1 are capable of delivering current up to the currentlimit threshold without damaging the device. Once the threshold has been reached, the device switches into its
constant-current mode.
9.1.2 OC Response
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature shutdown condition
is encountered after a 10-ms deglitch timeout. The output remains asserted until the overcurrent or
overtemperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause a
momentary overcurrent condition; however, no false reporting on OCx occurs due to the 10-ms deglitch circuit.
The TPS2065-Q1 and TPS2062-Q1 are designed to eliminate false overcurrent reporting. The internal
overcurrent deglitch eliminates the need for external components to remove unwanted pulses. OCx is not
deglitched when the switch is turned off due to an overtemperature shutdown.
TPS2062
V+
Rpullup1
GND
OC1
IN
OUT1
EN1
OUT2
EN2
OC2
V+
Rpullup2
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Figure 25. Typical Circuit for the OC Pin
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Application Information (continued)
9.1.3 Undervoltage Lockout (UVLO)
An undervoltage lockout ensures that the power switch is in the OFF state at power up. Whenever the input
voltage falls below approximately 2 V, the power switch is quickly turned off. This facilitates the design of hotinsertion systems where it is not possible to turn off the power switch before input power is removed. The UVLO
also keeps the switch from being turned ON until the power supply has reached at least 2 V, even if the switch is
enabled. When the power supply returns, for example on cable reinsertion, the power switch is turned ON with a
controlled rise time to reduce EMI and voltage overshoots.
9.1.4 Universal Serial Bus (USB) Applications
A typical application of the TPS206x-Q1 is for power distribution in USB applications. The universal serial bus
(USB) interface is a 12-Mbps, or 1.5-Mbps, multiplexed serial bus designed for low-to-medium bandwidth PC
peripherals (for example, keyboards, printers, scanners, and mice). The four-wire USB interface is conceived for
dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for differential data, and two lines
are provided for 5-V power distribution.
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply.
The USB specification defines the following five classes of devices, each differentiated by power-consumption
requirements:
• Hosts or self-powered hubs (SPH)
• Bus-powered hubs (BPH)
• Low-power, bus-powered functions
• High-power, bus-powered functions
• Self-powered functions
SPHs and BPHs distribute data and power to downstream functions. The TPS2065-Q1 and TPS2062-Q1 have
higher current capability than required by one USB port; so, it can be used on the host side and supplies power
to multiple downstream ports or functions.
NOTE
The USB interface and standards are continually being updated and expanded. Check the
applicability of this product to the specific USB standard for which it is used.
9.1.5 Host, Self-Powered (SPH), and Bus-Powered Hubs (BPH)
Hosts and SPHs have a local power supply that powers the embedded functions and the downstream ports (see
Figure 26). This power supply must provide from 5.25 V to 4.75 V to the board side of the downstream
connection under full-load and no-load conditions. Hosts and SPHs are required to have current-limit protection
and must report overcurrent conditions to the USB controller. Typical SPHs are desktop PCs, monitors, printers,
and stand-alone hubs.
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Application Information (continued)
Downstream
USB Ports
D+
DVBUS
0.1 mF
33 mF
GND
Power Supply
3.3 V
5V
D+
TPS2062
2
D-
IN
OUT1
7
0.1 mF
8
3
USB
Controller
VBUS
0.1 mF
33 mF
OC1
EN1
5
D+
OC2
4
GND
EN2
OUT2
GND
D-
6
VBUS
0.1 mF
33 mF
GND
1
D+
DVBUS
0.1 mF
33 mF
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 26. Typical Four-Port USB Host or Self-Powered Hub
BPHs obtain all power from upstream ports and often contain an embedded function. The hubs are required to
power up with less than one unit load. The BPH usually has one embedded function, and power is always
available to the controller of the hub. If the embedded function and hub require more than 100 mA on power up,
the power to the embedded function may need to be kept off until enumeration is completed. This can be
accomplished by removing power or by shutting off the clock to the embedded function. Power switching the
embedded function is not necessary if the aggregate power draw for the function and controller is less than one
unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the
embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.
9.1.6 Low-Power Bus-Powered and High-Power Bus-Powered Functions
Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power
functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and can
draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ω
and 10 μF at power up, the device must implement inrush current limiting (see Figure 27). With TPS2065-Q1 and
TPS2062-Q1, the internal functions could draw more than 500 mA, which fits the needs of some applications
such as motor driving circuits.
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Application Information (continued)
Power Supply
3.3 V
D+
TPS2062
DVBUS
2
10 mF
IN
7
0.1 mF
OUT1
GND
8
3
USB
Control
0.1 mF
10 mF
Internal
Function
0.1 mF
10 mF
Internal
Function
OC1
EN1
5
OC2
4
6
EN2
OUT2
GND
1
Copyright © 2016, Texas Instruments Incorporated
Figure 27. High-Power Bus-Powered Function
9.1.7 USB Power-Distribution Requirements
USB can be implemented in several ways, and, regardless of the type of USB device being developed, several
power-distribution features must be implemented.
• Hosts or SPHs must:
– Current-limit downstream ports
– Report overcurrent conditions on USB VBUS
• BPHs must:
– Enable or disable power to downstream ports
– Power up at
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