TPS22910AEVM-656

User's Guide SLVU501A – August 2011 – Revised January 2012 TPS2291xxEVM-656 This user's guide describes the characteristics, operation, and use of the TPS2291xxEVM-656 evaluation module (EVM). This EVM demonstrates the Texas Instruments TPS2291xx load switch with controlled turn on. The device contains a P-channel MOSFET that can operate over an input voltage of 1.4V to 5.5V. The switch is controlled by an on/off input (ON), which is capable of interfacing directly with low-voltage control signals. This user's guide includes setup instructions, schematic diagram, bill of materials, and printed-circuit board layout drawings for the EVM. 1 Introduction The TPS2291xxEVM-656 evaluation module (EVM) helps designers evaluate the operation and performance of the TPS2291xx load switches. The board features the small 4-pin CSP package for a small solution size. Table 1. TPS22910, TPS22912, TPS22913 Vout Rise Time, Enable, and Discharge Options EVM 1.1 Device Rise Time (µS) Typ. VIN(V) Enable (ON Pin) Quick Output Discharge No HPA656-001 TPS22910A 0.5 5 Active Low HPA656-0011 TPS22912C 1000 5 Active High No HPA656-0014 TPS22913B 100 5 Active High Yes HPA656-0015 TPS22913C 1000 5 Active High Yes Related Documentation From Texas Instruments TPS2291xx, ULTRA-SMALL, LOW rON LOAD SWITCH data sheet SLVU501A – August 2011 – Revised January 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated TPS2291xxEVM-656 1 Setup 2 www.ti.com Setup This section describes the jumpers and connectors on the EVM as well as how to properly connect, set up, and use the TPS2291xxEVM-656. 2.1 J1/J3 – Input Connections This is the connection for the leads from the input source. Connect the positive connection to the VIN J1 and the negative connection to the GND J3. 2.2 J4/J6 – Output Connections This is the connection for the output of the TPS2291xxEVM. Connect the positive connection of the load to the VOUT J4 and the negative connection to the GND J6. 2.3 JP3 – ON This is the enable input for the device. A shorting jumper must be installed on JP3 in either the HI or LO positions. The TPS2291xx family contains products that are active high and active low (refer to Table 1). ON must not be left unconnected. An external enable source can be applied to the EVM by removing the shunt and connecting a signal to the center pin of JP3. Refer to the Datasheet for proper ON and OFF voltage level settings. A switching signal may also be used and connected at this point. 2.4 J2/J5 – VIN Sense and VOUT Sense These two connectors are used when very accurate measurements of input or output voltage are required. Ron measurements should be made using these sense connections and measuring the voltage drop from VIN to VOUT and then calculating the resistance. 2.5 JP1/JP2 – Input Capacitors During normal operation a shorting jumper is placed on JP2 and connects C2 capacitor from the input of the device to ground. JP1 and C1 may be used to connect a user selected capacitor value from the input of the device to ground. Refer to the Applications Section of the Datasheet for additional information on selecting the input capacitors. 2.6 JP4/JP5 – Output Capacitors During normal operation a shorting jumper is placed on JP4 and connects C3 capacitor from the output of the device to ground. JP5 and C4 may be used to connect a user selected capacitor value from the output of the device to ground. Refer to the Applications Section of the Datasheet for additional information on selecting the output capacitors. 2.7 JP6/JP7/JP8 – Output Resistors During normal operation no shorting jumpers are placed on JP6, JP7, or JP8. A shorting jumper may be used on JP6 to connect R1 load resistor from the output of the device to ground. JP7 and JP8 may be used to connect R2 and R3 user selected load resistors from the output of the device to ground. R1, R2, and R3 are intended for light loads of the output; observe the 1/8W power rating for these parts. NOTE: R2 is populated on some EVM’s with a 14Ω 1/8W resistor, the maximum power rating for this part can be easily exceeded, observe the power rating for R2 if it is populated and used on your EVM. 2 TPS2291xxEVM-656 SLVU501A – August 2011 – Revised January 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Operation www.ti.com 3 Operation Connect the positive input of the power supply to the VIN J1 and the negative lead of the power supply to GND J3. The input voltage range of the TPS2291xx is 1.4 V to 5.5 V. Output load can be applied by connecting between J4 VOUT and J6 GND. The TPS2291xx is rated for a maximum continuous current of 2A. Configure jumper JP3 as required. JP3 must be installed for proper operation. When the ON pin is asserted, the TPS2291xx will control the slew rate of VOUT. The slew rate of the device is internally controlled to avoid inrush current. When ON is deasserted, the TPS2291xx will open the P-Channel MOSFET. Devices equipped with the Quick Output Discharge (QOD) option will connect a 150Ω on-chip load resistor to the output for quick discharge. Devices equipped with the QOD function are noted in Table 1. 4 Test Results See the Typical Characteristics section of the TPS2291xx data sheet. SLVU501A – August 2011 – Revised January 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated TPS2291xxEVM-656 3 Board Layout, Schematic, and Bill of Materials 5 www.ti.com Board Layout, Schematic, and Bill of Materials This section provides the TPS2291xxEVM-656 board layout, schematic, and bill of materials. 5.1 Board Layout For best performance, all traces should be as short as possible. To be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal and short-circuit operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects along with minimizing the case to ambient thermal impedance Figure 1, Figure 2, and Figure 3 show the board layout for the TPS2291xxEVM-656 PCB. TEXAS INSTRUMENTS Figure 1. Top Assembly Layer TEXAS INSTRUMENTS Figure 2. Top Layer 4 TPS2291xxEVM-656 SLVU501A – August 2011 – Revised January 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Board Layout, Schematic, and Bill of Materials www.ti.com Figure 3. Bottom Layer 5.2 Schematic and Bill of Materials Figure 4. TPS2291xxEVM-656 Schematic SLVU501A – August 2011 – Revised January 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated TPS2291xxEVM-656 5 Board Layout, Schematic, and Bill of Materials www.ti.com Table 2. Bill of Materials Count (1) (2) (3) (4) RefDes Value (1) (2) (3) (4) Description Size Part Number MFR HPA656 Any 603 Std Std 1 µF, use 10 µF Capacitor, Ceramic,6.3-V, X5R, 10% for A type devices 603 Std Std C1, C4 OPEN Capacitor, Ceramic 603 Std Std R1 560 Ω Resistor, 5% 1/8W 805 Std Std 1 R2 OPEN Resistor, 5% 1/8W 805 Std Std 0 R3 OPEN Resistor, 5% 1/8W 805 Std Std 13 J1 – J6, JP1–2, JP4–8 PEC02SAAN Header,2pin, 100mil spacing 0.100 inch x 2 PEC02SAAN Sullins 1 JP3 PEC03SAAN Header,3pin, 100mil spacing IC, 0.100 inch x 3 PEC03SAAN Sullins 1 U1 TPS2291xxYZP Single Chip, Low Input Voltage Current-Limited Load Switch V with Shut Off Auto-Restart YZV TPS2291xxYZV TI 3 N/A N/A 0.100 929950-00 3M 1 – 1 C3 0.1 µF Capacitor, Ceramic,16-V, X7R, 10% 1 C2 0 1 PCB, 0.9 In x 1.7 In x 0.062 In Shunt, 100-mil, Black These assemblies are ESD sensitive, ESD precautions shall be observed. These assemblies must be clean and free from flux and all contaminants. Use of no clean flux is not acceptable. These assemblies must comply with workmanship standards IPC-A-610 Class 2. Ref designators marked with an asterisk (**) cannot be substituted. All other components can be substituted with equivalent components. Table 3. 6 TPS2291xxEVM-656 Assembly number Text HPA656-001 TPS22910AEVM-656 HPA656-011 TPS22912CEVM-656 HPA656-014 TPS22913BEVM-656 HPA656-015 TPS22913CEVM-656 SLVU501A – August 2011 – Revised January 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Board Layout, Schematic, and Bill of Materials www.ti.com 5.3 VOUT Rise Time Examples Figure 5. TPS22910A Trise Example Figure 6. TPS22913B Trise Example SLVU501A – August 2011 – Revised January 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated TPS2291xxEVM-656 7 Board Layout, Schematic, and Bill of Materials www.ti.com Figure 7. TPS22913C Trise Example 8 TPS2291xxEVM-656 SLVU501A – August 2011 – Revised January 2012 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. 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EVM Warnings and Restrictions It is important to operate this EVM within the input voltage range of 1.4 V to 5.5 V and the output voltage range of unspecified. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures greater than 50°C. The EVM is designed to operate properly with certain components above 60°C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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