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TPS22969
SLVSCJ7B – MARCH 2014 – REVISED JULY 2015
TPS22969 5.5-V, 6-A, 4.4-mΩ On-Resistance Load Switch
1 Features
3 Description
•
•
•
•
The TPS22969 is a small, ultra-low RON, single
channel load switch with controlled turn on. The
device contains an N-channel MOSFET that can
operate over an input voltage range of 0.8 V to 5.5 V
and
can
support
a
maximum
continuous
current of 6 A.
1
•
•
•
•
•
•
•
•
Integrated Single Channel Load Switch
VBIAS Voltage Range: 2.5 V to 5.5 V
VIN Voltage Range: 0.8 V to 5.5 V
Ultra Low RON Resistance
– RON = 4.4 mΩ at VIN = 1.05 V (VBIAS = 5 V)
6 A Maximum Continuous Switch Current
Low Quiescent Current
– (20 µA (Typ) for VBIAS = 5 V)
Low Shutdown Current
– (1 µA (Typ) for VBIAS = 5 V)
Low Control Input Threshold Enables Use of 1.2 V
or Higher GPIO
Controlled and Fixed Slew Rate Across VBIAS and
VIN
– tR = 599 µs at VIN = 1.05 V (VBIAS = 5 V)
Quick Output Discharge (QOD)
SON 8-Pin Package with Thermal Pad
ESD Performance Tested per JESD 22
– 2-kV Human-Body Model (HBM)
– 1-kV Charged-Device Model (CDM)
2 Applications
•
•
•
•
•
•
•
•
Ultrabook™/Notebooks
Desktop PC
Industrial PC
Chromebook
Servers
Set-top Boxes
Telecom Systems
Tablet PC
The combination of ultra-low RON and high current
capability of the device makes it ideal for driving
processor rails with very tight voltage dropout
tolerances. The controlled rise time of the device
greatly reduces inrush current caused by large bulk
load capacitances, thereby reducing or eliminating
voltage droop on the power supply. The switch can
be independently controlled via the ON pin, which is
capable of interfacing directly with low-voltage control
signals originating from microcontrollers or low
voltage discrete logic. The device further reduces the
total solution size by integrating a 224-Ω pull-down
resistor for quick output discharge (QOD) when the
switch is turned off.
The TPS22969 is available in a small 3.00 mm x 3.00
mm SON-8 package (DNY). The DNY package
integrates a thermal pad which allows for high power
dissipation in high current and high temperature
applications. The device is characterized for
operation over the free-air temperature range of
–40°C to 105°C.
Device Information(1)
ORDER NUMBER
TPS22969
PACKAGE
BODY SIZE (NOM)
WSON (8)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
White space
White space
White space
Driving High Current Core Rails For a Processor
RON vs VIN (VBIAS = 5 V, IOUT = –200 mA)
VBIAS
(2.5 V to 5.5 V)
7.0
VIN
Power
Supply
Processor
(x86, FPGA, DSP)
VOUT
6.5
CL
ON
OFF
ON
GND
TPS22969
6.0
RON (m:)
CIN
-40°C
25°C
85°C
105°C
5.5
5.0
4.5
4.0
3.5
3.0
0.0
1.0
2.0
3.0
VIN (V)
4.0
5.0
6.0
D008
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS22969
SLVSCJ7B – MARCH 2014 – REVISED JULY 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
3
4
4
4
5
6
7
9
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics, VBIAS = 5.0 V ...................
Electrical Characteristics, VBIAS = 2.5 V ...................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 14
7.1 Overview ................................................................. 14
7.2 Functional Block Diagram ....................................... 14
7.3 Feature Description................................................. 15
8
Applications and Implementation ...................... 16
8.1 Application Information............................................ 16
8.2 Typical Application .................................................. 16
9 Power Supply Recommendations...................... 19
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Example .................................................... 20
11 Device and Documentation Support ................. 21
11.1
11.2
11.3
11.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
21
21
21
12 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (February 2014) to Revision B
•
Updated TA ratings in datasheet from 85°C to 105°C. ........................................................................................................... 1
Changes from Original (February 2014) to Revision A
•
2
Page
Page
Initial release of full version. .................................................................................................................................................. 1
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SLVSCJ7B – MARCH 2014 – REVISED JULY 2015
5 Pin Configuration and Functions
DNY PACKAGE
8 PIN WSON
VIN
1
VIN
2
VIN
8
VOUT
VOUT
8
7
VOUT
VOUT
7
(Exposed thermal
VBIAS
3
ON
4
pad)
VIN
1
VIN
2
VIN
3
VBIAS
4
ON
(Exposed thermal
6
VOUT
VOUT
6
5
GND
GND
5
Top View
pad)
Bottom View
Pin Functions
Pin
I/O
DESCRIPTION
NAME
NO.
VIN
1, 2
I
Switch input. Place ceramic bypass capacitor(s) between this pin and GND. See the Detailed
Description section for more information.
VIN
Exposed thermal
Pad
I
Switch input. Place ceramic bypass capacitor(s) between this pin and GND. See the Detailed
Description section for more information.
VBIAS
3
I
Bias voltage. Power supply to the device.
ON
4
I
Active high switch control input. Do not leave floating.
GND
5
–
Ground.
VOUT
6, 7, 8
O
Switch output. Place ceramic bypass capacitor(s) between this pin and GND. See the Detailed
Description section for more information.
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
VIN
Input voltage range
–0.3
6
V
VBIAS
Bias voltage range
–0.3
6
V
VOUT
Output voltage range
–0.3
6
V
VON
ON pin voltage range
–0.3
6
V
IMAX
Maximum Continuous Switch Current
6
A
IPLS
Maximum Pulsed Switch Current, pulse < 300-µs, 2% duty cycle
TA
Operating free-air temperature range
TJ
Maximum junction temperature
TSTG
Storage temperature range
(1)
–40
–65
8
A
105
°C
125
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
6.3 Recommended Operating Conditions
Over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VIN
Input voltage range
0.8
VBIAS
V
VBIAS
Bias voltage range
2.5
5.5
V
VON
ON voltage range
0
5.5
V
VOUT
Output voltage range
VIN
V
VIH,
ON
High-level voltage, ON
VBIAS = 2.5V to 5.5V
1.2
5.5
V
VIL, ON
Low-level voltage, ON
VBIAS = 2.5V to 5.5V
0
0.5
CIN
Input Capacitor
(1)
1 (1)
V
µF
Refer to Detailed Description section.
6.4 Thermal Information
TPS22969
THERMAL METRIC
(1)
DNY (WSON)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
44.6
°C/W
RθJCtop
Junction-to-case (top) thermal resistance
44.4
°C/W
RθJB
Junction-to-board thermal resistance
17.6
°C/W
ψJT
Junction-to-top characterization parameter
0.4
°C/W
ψJB
Junction-to-board characterization parameter
17.4
°C/W
RθJCbot
Junction-to-case (bottom) thermal resistance
1.1
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics, VBIAS = 5.0 V
Unless otherwise noted, the specification in the following table applies over the operating ambient temperature
–40°C ≤ TA ≤ 105°C. Typical values are for TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
20.4
26.0
UNIT
CURRENTS AND THRESHOLDS
IQ, VBIAS
VBIAS quiescent current
IOUT = 0, VIN = VBIAS,
VON = 5.0 V
ISD, VBIAS
VBIAS shutdown current
VON = 0 V, VOUT = 0 V
-40°C to 85°C
-40°C to 105°C
-40°C to 85°C
VIN = 5.0 V
VIN = 3.3 V
ISD, VIN
VIN shutdown current
VON = 0 V,
VOUT = 0 V
VIN = 1.8 V
VIN = 1.05 V
VIN = 0.8 V
ION
VHYS,
ON
27.0
1.1
1.5
-40°C to 105°C
1.6
-40°C to 85°C
0.1
-40°C to 105°C
0.5
-40°C to 85°C
0.1
-40°C to 105°C
0.5
-40°C to 85°C
0.1
-40°C to 105°C
0.5
-40°C to 85°C
0.1
-40°C to 105°C
0.5
-40°C to 85°C
0.1
-40°C to 105°C
0.5
ON pin leakage current
VON = 5.5 V
-40°C to 105°C
ON pin hysteresis
VBIAS = VIN
25°C
113
0.1
25°C
4.4
µA
µA
µA
µA
mV
RESISTANCE CHARACTERISTICS
VIN = 5.0 V
5.6
-40°C to 105°C
5.8
25°C
VIN = 3.3 V
4.4
5.6
-40°C to 105°C
5.8
VIN = 2.5 V
RON
On-state resistance
4.4
-40°C to 85°C
5.6
5.8
VIN = 1.8 V
4.4
-40°C to 85°C
5.6
5.8
VIN = 1.05 V
4.4
-40°C to 85°C
5.6
5.8
4.4
-40°C to 85°C
RPD
(1)
Output pulldown resistance
VIN = 1.05 V
VIN = 5.0 V, VON = 0 V, VOUT = 1 V
-40°C to 85°C
mΩ
5.8
4.6
5.8 (1)
6.0 (1)
-40°C to 105°C
-40°C to 105°C
mΩ
5.0
5.6
-40°C to 105°C
IOUT = –6 A,
VBIAS = 5.0 V
mΩ
5.0
-40°C to 105°C
25°C
VIN = 0.8 V
mΩ
5.0
-40°C to 105°C
25°C
mΩ
5.0
-40°C to 105°C
25°C
mΩ
5.0
-40°C to 85°C
25°C
IOUT = –200 mA,
VBIAS = 5.0 V
5.0
-40°C to 85°C
224
233
mΩ
Ω
Parameter verified by design and characterization, but not tested in production.
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6.6 Electrical Characteristics, VBIAS = 2.5 V
Unless otherwise noted, the specification in the following table applies over the operating ambient temperature
–40°C ≤ TA ≤ 105°C. Typical values are for TA = 25°C unless otherwise noted.
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
9.9
12.5
UNIT
CURRENTS AND THRESHOLDS
IQ, VBIAS
VBIAS quiescent current
IOUT = 0, VIN = VBIAS,
VON = 5.0 V
ISD, VBIAS
VBIAS shutdown current
VON = 0 V, VOUT = 0 V
-40°C to 85°C
-40°C to 105°C
-40°C to 85°C
VIN = 2.5 V
VIN = 1.8 V
ISD, VIN
VIN shutdown current
VON = 0 V,
VOUT = 0 V
VIN = 1.05 V
VIN = 0.8 V
12.7
0.5
0.7
-40°C to 85°C
0.1
-40°C to 105°C
0.5
-40°C to 85°C
0.1
-40°C to 105°C
0.5
-40°C to 85°C
0.1
-40°C to 105°C
0.5
-40°C to 85°C
0.1
-40°C to 105°C
0.5
ION
ON pin input leakage current
VON = 5.5 V
-40°C to 105°C
VHYS,
ON pin hysteresis
VBIAS = VIN
25°C
83
25°C
4.7
ON
0.65
-40°C to 105°C
0.1
µA
µA
µA
µA
mV
RESISTANCE CHARACTERISTICS
VIN =2.5 V
-40°C to 85°C
6.0
-40°C to 105°C
25°C
VIN =1.8 V
RON
On-state resistance
-40°C to 85°C
25°C
VIN =1.05 V
RPD
6
Output pulldown resistance
VIN = 2.5 V, VON = 0 V, VOUT = 1 V
5.2
5.8
5.1
5.7
-40°C to 105°C
5.9
4.5
5.7
-40°C to 105°C
5.9
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224
mΩ
5.1
-40°C to 85°C
-40°C to 105°C
mΩ
6.0
4.5
-40°C to 85°C
25°C
VIN = 0.8 V
mΩ
6.2
4.6
-40°C to 105°C
IOUT = –200 mA,
VBIAS = 2.5 V
5.3
233
mΩ
Ω
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6.7 Switching Characteristics
Refer to the timing test circuit in Figure 1 (unless otherwise noted) for references to external components used for the test
condition in the switching characteristics table. Switching characteristics shown below are only valid for the power-up
sequence where VIN and VBIAS are already in steady state condition before the ON pin is asserted high.
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
VIN = 5 V, VON = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
Turn-on time
tOFF
Turn-off time
tR
VOUT rise time
tF
VOUT fall time
tD
Delay time
2397
4
RL = 10 Ω, CL = 0.1 µF
2663
µs
2
1009
VIN = 1.05 V, VON = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
Turn-on time
1064
tOFF
Turn-off time
4
tR
VOUT rise time
tF
VOUT fall time
tD
Delay time
RL = 10 Ω, CL = 0.1 µF
599
µs
2
727
VIN = 0.8 V, VON = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
Turn-on time
981
tOFF
Turn-off time
4
tR
VOUT rise time
tF
VOUT fall time
tD
Delay time
RL = 10 Ω, CL = 0.1 µF
500
µs
2
714
VIN = 2.5 V, VON = 5 V, VBIAS = 2.5 V, TA = 25ºC (unless otherwise noted)
tON
Turn-on time
tOFF
Turn-off time
tR
VOUT rise time
tF
VOUT fall time
tD
Delay time
1576
8
RL = 10 Ω, CL = 0.1 µF
1372
µs
2
865
VIN = 1.05 V, VON = 5V, VBIAS = 2.5 V, TA = 25ºC (unless otherwise noted)
tON
Turn-on time
tOFF
Turn-off time
tR
VOUT rise time
tF
VOUT fall time
tD
Delay time
1080
8
RL = 10 Ω, CL = 0.1 µF
604
µs
2
738
VIN = 0.8 V, VON = 5V, VBIAS = 2.5 V, TA = 25ºC (unless otherwise noted)
tON
Turn-on time
tOFF
Turn-off time
tR
VOUT rise time
tF
VOUT fall time
tD
Delay time
994
8
RL = 10 Ω, CL = 0.1 µF
502
µs
2
723
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VOUT
VIN
CIN = 1 µF
ON
+
-
(A)
CL
ON
RL
OFF
VBIAS
GND
TPS22969
GND
GND
Timing Test Circuit
VON
50%
50%
tOFF
tON
VOUT
50%
50%
tF
tR
90%
VOUT
10%
10%
90%
10%
tD
Timing Waveforms
(A) Rise and fall times of the control signal is 100 ns.
Figure 1. Switching Characteristics Measurement Setup and Definitions
8
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6.8 Typical Characteristics
25
1.6
1.4
20
ISD,VBIAS (PA)
IQ,VBIAS (PA)
1.2
15
10
0
2.5
3.0
3.5
VIN = VBIAS
4.0
VBIAS (V)
4.5
5.0
0.8
0.6
0.4
-40°C
25°C
85°C
105°C
5
1
-40°C
25°C
85°C
105°C
0.2
0
2.5
5.5
3.0
3.5
VON = 5 V
IOUT = 0 A
VIN = VBIAS
Figure 2. IQ,VBIAS vs VBIAS
5.0
5.5
D003
VON = 0 V
VOUT = 0 V
6.0
-40°C
25°C
85°C
105°C
0.1
5.5
5.0
RON (m:)
0.08
ISD,VIN (PA)
4.5
Figure 3. ISD,VBIAS vs VBIAS
0.12
0.06
4.5
0.04
4.0
0.02
3.5
0
0
1
2
VBIAS = 5 V
3
VIN (V)
4
5
3.0
-55
6
VIN = 0.8V
VIN = 1.05V
VIN = 1.2V
VIN = 1.5V
VIN = 1.8V
VIN = 2.5V
-35
-15
D001
VON = 0 V
VOUT = 0 V
5
25
45
65
Ambient Temperature (qC)
VBIAS = 2.5 V
Figure 4. ISD,VIN vs VIN
VON = 5 V
85
105
125
D005
IOUT = –200 mA
Figure 5. RON vs Ambient Temperature
6.0
7.0
6.5
5.5
6.0
RON (m:)
5.0
RON (m:)
4.0
VBIAS (V)
D002
4.5
4.0
VIN = 0.8V
VIN = 1.05V
VIN = 1.2V
VIN = 1.8V
3.5
3.0
-55
-35
-15
VBIAS = 5 V
5
25
45
65
Ambient Temperature (qC)
VON = 5 V
105
5.5
5.0
4.5
4.0
VIN = 2.5V
VIN = 3.3V
VIN = 4.2V
VIN = 5V
85
-40°C
25°C
85°C
105°C
3.5
125
3.0
0.5
1.0
IOUT = –200 mA
1.5
2.0
2.5
VIN (V)
D006
VBIAS = 2.5 V
Figure 6. RON vs Ambient Temperature
VON = 5 V
D007
IOUT = –200 mA
Figure 7. RON vs VIN
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Typical Characteristics (continued)
6.0
7.0
-40°C
25°C
85°C
105°C
6.5
5.5
5.0
5.5
RON (m:)
RON (m:)
6.0
VBIAS = 2.5V
VBIAS = 5V
5.0
4.5
4.5
4.0
4.0
3.5
3.5
3.0
0.0
1.0
2.0
3.0
VIN (V)
VBIAS = 5 V
4.0
5.0
3.0
0.0
6.0
1.0
2.0
3.0
VIN (V)
D008
VON = 5 V
IOUT = –200 mA
TA = 25°C
Figure 8. RON vs VIN
4.0
5.0
6.0
D009
VON = 5 V
IOUT = –200 mA
Figure 9. RON vs VIN
6.0
240
235
VIN = 0.8V
VIN = 1.05V
VIN = 1.2V
5.5
VIN = 1.5V
VIN = 1.8V
VIN = 2.5V
230
5.0
RON (m:)
RPD (:)
225
220
215
4.5
4.0
210
-40°C
25°C
85°C
105°C
205
200
2.5
3.0
3.5
4.0
VBIAS (V)
VON = 0 V
4.5
5.0
3.5
3.0
1.0
5.5
D010
VIN = 1.05 V
1.5
2.0
2.5
VBIAS = 2.5 V
VOUT = 1 V
3.0
3.5 4.0
IOUT (A)
4.5
5.0
5.5
6.0
D012
VON = 5 V
TA = 25°C
Figure 11. RON vs IOUT at TA = 25°C
Figure 10. RPD vs VBIAS
6.0
0.18
VIN = 0.8V
VIN = 1.05V
VIN = 1.2V
5.5
VIN = 1.5V
VIN = 1.8V
VIN = 2.5V
VIN = 3.3V
VIN = 4.2V
VIN = 5V
0.16
0.14
0.12
VHYS (V)
RON (m:)
5.0
4.5
4.0
0.10
0.08
0.06
-40°C
25°C
85°C
105°C
0.04
3.5
0.02
3.0
1.0
1.5
2.0
VBIAS = 5 V
2.5
3.0
3.5 4.0
IOUT (A)
4.5
5.0
5.5
6.0
0.00
2.5
VON = 5 V
TA = 25°C
3.5
4.0
VBIAS (V)
4.5
5.0
5.5
D013
VIN = VBIAS
Figure 12. RON vs IOUT at TA = 25°C
10
3.0
D011
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Figure 13. VHYS vs VBIAS
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Typical Characteristics (continued)
1.2
1.2
-40°C
25°C
85°C
105°C
1.1
1.0
VIH,ON (V)
VIL,ON (V)
1.0
1.1
0.9
0.8
0.9
0.8
0.7
0.7
0.6
0.6
0.5
2.5
3.0
3.5
4.0
VBIAS (V)
VIN = VBIAS
4.5
5.0
-40°C
25°C
85°C
105°C
0.5
2.5
5.5
3.0
3.5
D014
IOUT = 0 A
VIN = VBIAS
Figure 14. VIL,ON vs VBIAS
4.0
VBIAS (V)
4.5
5.0
5.5
D015
IOUT = 0 A
Figure 15. VIH,ON vs VBIAS
1100
1200
1000
1100
1000
900
tD (Ps)
tD (Ps)
900
800
700
800
700
600
500
400
0.5
600
-40°C
25°C
85°C
105°C
1.0
1.5
2.0
2.5
400
0.0
1.0
CL = 0.1 µF
4.0
5.0
6.0
D017
CL = 0.1 µF
Figure 17. tD vs VIN
4.0
3.5
3.5
3.0
3.0
2.5
2.5
tF (Ps)
tF (Ps)
Figure 16. tD vs VIN
3.0
VIN (V)
RL = 10 Ω
VBIAS = 5 V
4.0
2.0
1.5
2.0
1.5
1.0
1.0
-40°C
25°C
85°C
105°C
0.5
0.0
0.5
2.0
D016
RL = 10 Ω
VBIAS = 2.5 V
500
3.0
VIN (V)
-40°C
25°C
85°C
105°C
1.0
1.5
2.0
VIN (V)
VBIAS = 2.5 V
RL = 10 Ω
2.5
-40°C
25°C
85°C
105°C
0.5
3.0
0.0
0.0
1.0
D018
CL = 0.1 µF
VBIAS = 5 V
Figure 18. tF vs VIN
2.0
3.0
VIN (V)
4.0
RL = 10 Ω
5.0
6.0
D019
CL = 0.1 µF
Figure 19. tF vs VIN
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Typical Characteristics (continued)
12
6.0
-40°C
25°C
85°C
105°C
11
5.0
9
tOFF (Ps)
tOFF (Ps)
10
5.5
8
4.5
4.0
7
3.5
6
3.0
5
2.5
4
0.5
1.0
1.5
2.0
2.5
VIN (V)
2.0
0.0
3.0
1.0
2.0
D020
RL = 10 Ω
VBIAS = 2.5 V
-40°C
25°C
85°C
105°C
CL = 0.1 µF
4.0
5.0
6.0
D021
RL = 10 Ω
VBIAS = 5 V
Figure 20. tOFF vs VIN
3.0
VIN (V)
CL = 0.1 µF
Figure 21. tOFF vs VIN
1800
3000
1600
2500
tON (Ps)
tON (Ps)
1400
1200
2000
1500
1000
-40°C
25°C
85°C
105°C
800
600
0.5
1.0
1.5
2.0
2.5
1.0
CL = 0.1 µF
1400
2500
1200
2000
1000
800
5.0
6.0
D023
CL = 0.1 µF
1500
1000
-40°C
25°C
85°C
105°C
600
1.0
1.5
2.0
VIN (V)
VBIAS = 2.5 V
RL = 10 Ω
2.5
-40°C
25°C
85°C
105°C
500
3.0
0
0.0
1.0
D024
CL = 0.1 µF
VBIAS = 5 V
Figure 24. tR vs VIN
12
4.0
Figure 23. tON vs VIN
3000
tR (Ps)
tR (Ps)
Figure 22. tON vs VIN
3.0
VIN (V)
RL = 10 Ω
VBIAS = 5 V
1600
400
0.5
2.0
D022
RL = 10 Ω
VBIAS = 2.5 V
500
0.0
3.0
VIN (V)
-40°C
25°C
85°C
105°C
1000
2.0
3.0
VIN (V)
4.0
RL = 10 Ω
5.0
6.0
D025
CL = 0.1 µF
Figure 25. tR vs VIN
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Typical Characteristics (continued)
5000
3500
VIN = 0.8V
VIN = 1.05V
VIN =1.2V
VIN =1.5V
VIN =1.8V
4500
3000
4000
3500
2000
tR (Ps)
tR (Ps)
2500
1500
500
TA = 25°C
3000
2500
2000
VBIAS = 2.5V
VBIAS = 3.3V
VBIAS = 3.6V
VBIAS = 4.2V
VBIAS = 5.0V
VBIAS = 5.5V
1000
0
0.0
VIN =2.5V
VIN =3.3V
VIN =3.6V
VIN =4.2V
VIN =5.0V
1.0
2.0
3.0
VIN (V)
RL = 10 Ω
4.0
5.0
1500
1000
500
6.0
D026
CL = 0.1 µF
0
2.5
TA = 25°C
Figure 26. tR vs VIN for Various VBIAS
3.0
3.5
4.0
VBIAS (V)
RL = 10 Ω
4.5
5.0
D027
CL = 0.1 µF
Figure 27. tR vs VBIAS for Various VIN
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7 Detailed Description
7.1 Overview
The device is a 5.5 V, 6 A load switch in a 8-pin SON package. To reduce voltage drop for low voltage and high
current rails, the device implements an ultra-low resistance N-channel MOSFET which reduces the drop out
voltage through the device.
The device has a controlled and fixed slew rate which helps reduce or eliminate power supply droop due to large
inrush currents. During shutdown, the device has very low leakage currents, thereby reducing unnecessary
leakages for downstream modules during standby. Integrated control logic, driver, charge pump, and output
discharge FET eliminates the need for any external components, which reduces solution size and BOM count.
7.2 Functional Block Diagram
VIN
Charge
Pump
VBIAS
ON
Control
Logic
Driver
VOUT
GND
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7.3 Feature Description
7.3.1 On/off Control
The ON pin controls the state of the load switch, and asserting the pin high (active high) enables the switch. The
ON pin is compatible with standard GPIO logic threshold and can be used with any microcontroller or discrete
logic with 1.2-V or higher GPIO voltage. This pin cannot be left floating and must be tied either high or low for
proper functionality.
7.3.2
Input Capacitor (CIN)
To limit the voltage drop on the input supply caused by transient in-rush currents when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-µF ceramic
capacitor, CIN, placed close to the pins, is usually sufficient. Higher values of CIN can be used to further reduce
the voltage drop in high-current application. When switching heavy loads, it is recommended to have an input
capacitor 10 times higher than the output capacitor to avoid excessive voltage drop; however, a 10 to 1 ratio for
capacitance is not required for proper functionality of the device, but a ratio smaller than 10 to 1 (such as 1 to 1)
could cause a VIN dip upon turn-on due to inrush currents based on external factor such as board parasitics and
output bulk capacitance.
7.3.3 Output Capacitor (CL)
Due to the integrated body diode in the N-channel MOSFET, a CIN greater than CL is highly recommended. A CL
greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current
flow through the body diode from VOUT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN
dip caused by inrush currents during startup, however a 10 to 1 ratio for capacitance is not required for proper
functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause a VIN dip upon turn-on due to
inrush currents based on external factor such as board parasitics and output bulk capacitance.
7.3.4 VIN and VBIAS Voltage Range
For optimal RON performance, make sure VIN ≤ VBIAS. The device may still be functional if VIN > VBIAS but it will
exhibit RON greater than what is listed in the Electrical Characteristics table. See Figure 28 for an example of a
typical device. Notice the increasing RON as VIN increases. Be sure to never exceed the maximum voltage rating
for VIN and VBIAS. Performance of the device is not guaranteed for VIN > VBIAS.
10
9
RON (m
)
8
VBIAS = 2.5V
VBIAS = 3.0V
VBIAS = 3.3V
VBIAS = 3.6V
VBIAS = 4.2V
VBIAS =5.0V
VBIAS =5.5V
7
6
5
4
3
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
4
4.4 4.8 5.2
VIN (V)
DG055
Figure 28. RON vs VIN (VIN > VBIAS)
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8 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
This section will highlight some of the design considerations when implementing this device in various
applications. A PSPICE model for this device is also available in the product page of this device.
8.2 Typical Application
This application demonstrates how the TPS22969 can be used to power downstream modules with large
capacitances. The example below is powering a 100-µF capacitive output load.
VIN
VIN
VIN
(exposed
pad)
CIN
ON
ON
VOUT
VBIAS
VOUT
CL = 100 µF
VBIAS
GND
Figure 29. Typical Application Schematic for Powering a Downstream Module
8.2.1 Design Requirements
For this design example, use Table 1 as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
VIN
1.05 V
VBIAS
5.0 V
Load current
6A
8.2.2 Detailed Design Procedure
To
•
•
•
begin the design process, the designer needs to know the following:
VIN voltage
VBIAS voltage
Load current
8.2.2.1
VIN to VOUT Voltage Drop
The VIN to VOUT voltage drop in the device is determined by the RON of the device and the load current. The
RON of the device depends upon the VIN and VBIAS conditions of the device. Refer to the RON specification of the
device in the Electrical Characteristics, VBIAS = 5.0 V tables of this datasheet. Once the RON of the device is
determined based upon the VIN and VBIAS conditions, use Equation 1 to calculate the VIN to VOUT voltage drop:
DV = ILOAD ´ RON
(1)
where
• ΔV = voltage drop from VIN to VOUT
• ILOAD = load current
• RON = on-resistance of the device for a specific VIN and VBIAS combination
An appropriate ILOAD must be chosen such that the IMAX specification of the device is not violated.
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8.2.2.2 Inrush Current
To determine how much inrush current will be caused by the CL capacitor, use Equation 2:
dV
IINRUSH = CL ´ OUT
dt
(2)
where
• IINRUSH = amount of inrush caused by CL
• CL = capacitance on VOUT
• dt = time it takes for change in VOUT during the ramp up of VOUT when the device is enabled
• dVOUT = change in VOUT during the ramp up of VOUT when the device is enabled
An appropriate CL value should be placed on VOUT such that the IMAX and IPLS specifications of the device are
not violated.
Figure 30. Inrush current (VBIAS = 5 V, VIN = 1.05 V, CL = 100 µF)
8.2.2.3 Thermal Considerations
The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. To
calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, use
Equation 3.
PD(MAX) =
TJ(MAX) - TA
RθJA
(3)
where
• PD(max) = maximum allowable power dissipation
• TJ(max) = maximum allowable junction temperature (125°C for the TPS22969)
• TA = ambient temperature of the device
• ΘJA = junction to air thermal impedance. See Thermal Information section. This parameter is highly
dependent upon board layout.
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8.2.3 Application Curves
VBIAS = 5 V
CL = 0.1 µF
VIN = 5 V
CIN = 1 µF
VBIAS = 5 V
CL = 0.1 µF
Figure 31. tR at VBIAS = 5V
VBIAS = 2.5 V
CL = 0.1 µF
VIN = 2.5 V
VIN = 5 V
CIN = 1 µF
VBIAS = 2.5 V
CL = 0.1 µF
VIN = 1.05 V
CIN = 1 µF
Figure 34. tR at VBIAS = 2.5V
CIN = 1 µF
VBIAS = 5 V
CL = 0.1 µF
Figure 35. tF at VBIAS = 5 V
18
CIN = 1 µF
Figure 32. tR at VBIAS = 5 V
Figure 33. tR at VBIAS = 2.5 V
VBIAS = 5 V
CL = 0.1 µF
VIN = 1.05 V
VIN = 2.5 V
CIN = 1 µF
Figure 36. tF at VBIAS = 5 V
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VBIAS = 2.5 V
CL = 0.1 µF
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VIN = 2.5 V
CIN = 1 µF
VBIAS = 2.5 V
CL = 0.1 µF
Figure 37. tF at VBIAS = 2.5 V
VIN = 0.8 V
CIN = 1 µF
Figure 38. tF at VBIAS = 2.5 V
9 Power Supply Recommendations
The device is designed to operate from a VBIAS range of 2.5 V to 5.5 V and VIN range of 0.8 V to 5.5 V. This
supply must be well regulated and placed as close to the device pin as possible with the recommended 1-µF
bypass capacitor. If the supply is located more than a few inches from the device pins, additional bulk
capacitance may be required in addition to the ceramic bypass capacitors. If additional bulk capacitance is
required, an electrolytic, tantalum, or ceramic capacitor of 10 µF may be sufficient.
10 Layout
10.1 Layout Guidelines
•
•
•
•
•
VIN and VOUT traces should be as short and wide as possible to accommodate for high current.
Use vias under the exposed thermal pad for thermal relief for high current operation.
The VIN pin should be bypassed to ground with low ESR ceramic bypass capacitors. The typical
recommended bypass capacitance is 1-µF ceramic with X5R or X7R dielectric. This capacitor should be
placed as close to the device pins as possible.
The VOUT pin should be bypassed to ground with low ESR ceramic bypass capacitors. The typical
recommended bypass capacitance is one-tenth of the VIN bypass capacitor of X5R or X7R dielectric rating.
This capacitor should be placed as close to the device pins as possible.
The VBIAS pin should be bypassed to ground with low ESR ceramic bypass capacitors. The typical
recommended bypass capacitance is 0.1-µF ceramic with X5R or X7R dielectric.
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10.2 Layout Example
VIA to Power Ground Plane
VIA to VIN Plane
VIN
VOUT
VIN Bypass
Capacitor
VIN
VIN
To Bias Supply
VOUT Bypass
Capacitor
VBIAS
GND
ON
To GPIO
control
Exposed Thermal
Pad Area
Figure 39. Recommended Board Layout
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11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Trademarks
E2E is a trademark of Texas Instruments.
Ultrabook is a trademark of Intel.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS22969DNYR
ACTIVE
WSON
DNY
8
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
969A0
TPS22969DNYT
ACTIVE
WSON
DNY
8
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
969A0
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
