TPS2420
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SLUS903F – JANUARY 2009 – REVISED JANUARY 2014
5-A, 20-V Integrated FET Hot-Swap Controller
Check for Samples: TPS2420
FEATURES
DESCRIPTION
•
•
•
•
•
•
•
•
•
•
•
•
•
The TPS2420 device provides highly integrated load
protection for applications up to 20-V. The maximum
UV turn-on threshold of 2.9 V makes the TPS2420
well suited to standard bus voltages as low as 3.3 V.
The TPS2420 device protects loads, minimizes inrush
current, and safely shuts down in the event of a fault.
The programmable fault current threshold starts the
fault timer while allowing the current to pass to the
load uninhibited. The programmable current limit
threshold sets the maximum current allowed into the
load, for both inrush and severe load faults. Both
events use the programmable timer which inhibits all
current to the load when it expires.
1
2
Integrated 30-mΩ Pass MOSFET
Up to 20-V Bus Operation
Programmable Fault Current
Programmable Hard Current-Limit
Programmable Fault Timer
Internal MOSFET Power Limiting Foldback
Latching and Auto-Retry Operation
Analog Current Monitor Output
Powergood Output
Fault Output Indicator
4 mm × 4 mm QFN
–40°C to 125°C Junction Temperature Range
UL2367 Recognized - File Number E169910
The dual protection thresholds are useful in
applications such as disk drives. The start-up and
seek currents are typically higher than the nominal
current and during this time the load needs a low
impedance path to deliver the power. If a failure at
the load occurs, the current limit does not allow the
current to exceed the programmed threshold. This
protects both the load and the integrity of the power
supply. The internal MOSFET is protected by power
limit circuitry which ensures that the MOSFET
remains within its safe operating area (SOA) during
all operating states.
APPLICATIONS
•
•
•
•
•
•
•
RAID Arrays
Telecommunications
Plug-In Circuit Boards
Disk Drives
SSDs
PCIE
Fan Control
The TPS2420 device also allows the system to
monitor load currents with no need for a shunt in the
power path. The gain of the current monitor can be
scaled to the application. Fault and power good
outputs are provided for improved system
management and sequencing control.
This device can be programmed to either latch-off or
retry in the event of a fault. All of this functionality is
packed into a 16-pin 4 × 4 mm QFN package.
VOUT
VIN
1
VIN
VOUT 12
2
VIN
VOUT 11
3
VIN
4
VIN
(see note A)
CVIN
(see
note A)
TPS2420
PG 14
16 EN
IMON 13
LTCH
GND
IMAX
IFLT
6
5
7
8
40.2 kΩ
}
Optional:
to system CLOAD
(see note A)
monitor
CT
9
49.9 kΩ
-
Input Voltage Bus
FLT 15
15-V
SMAJ15A
Output to voltage bus or
DC DC converter
VOUT 10
63.4 kΩ
0.1 µF
UDG-09017
A.
Required only in systems with lead and/or load inductance.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPad is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2014, Texas Instruments Incorporated
TPS2420
SLUS903F – JANUARY 2009 – REVISED JANUARY 2014
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS (1) (2)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
Voltage range , VIN, VOUT
–0.3
25
Voltage range, FLT, PG
–0.3
20
Output sink current, FLT, PG
–0.3
Input current (LTCH internally clamped to 3 V) LTCH = 0 V,
Voltage range CT (3), IFLT (3), IMAX, IMON (3), LTCH
–0.3
Human body model (HBM)
ESD rating
mA
6
V
35
µA
3
V
2500
Charged device model (CDM)
V
400
Operating junction temperature range, TJ
Internally Limited
Storage temperature range, Tstg
(2)
(3)
V
10
Input voltage range, EN LTCH
(1)
UNIT
–65
°C
150
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to GND.
Do not apply voltage to these pins.
DISSIPATION RATINGS (1)
(1)
(2)
(3)
(4)
PACKAGE
θJA
LOW K (2), °C/W
θJA
HIGH K (3), °C/W
θJA
BEST (4), °C/W
RSA
211
55
50
Tested per JEDEC JESD51, natural convection. The definitions of high-k and low-k are per JESD 51-7 and JESD 51-3.
Low-k (2 signal – no plane, 3-inch by 3-inch board, 0.062 inch thick, 1-oz. copper) test board with the pad soldered, and an additional
0.12 inch 2 of top-side copper added to the pad.
High-k is a (2 signal – 2 plane) test board with the pad soldered.
The best case thermal resistance is obtained using the recommendations per SLMA002 (2 signal – 2 plane with the pad connected to
the plane).
RECOMMENDED OPERATING CONDITIONS
PARAMETER
MIN
MAX
VIN, VOUT
Voltage range
3
20
V
EN
Voltage range
0
5
V
FLT, PG
Voltage range
0
20
V
FLT, PG
Output sink current
0
1
mA
LTCH
Voltage range
CT
TJ
2
Junction temperature
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UNIT
0
3
V
0.1
100
μF
–40
125
°C
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SLUS903F – JANUARY 2009 – REVISED JANUARY 2014
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
2.6
2.85
2.9
UNIT
INPUT SUPPLY (VIN)
VUVLO
Undervoltage lockout
VIN increasing
Hysteresis
Bias current
150
V
mV
V EN = 2.4 V
25
100
μA
V EN = 0 V
3.9
5
mA
33
50
5
7.5
0.77
1
V
A
INPUT/OUTPUT
RON
On-resistance
RVIN-VOUT, IVOUT < IIMAX or
IVOUT < (ISET × 1.25), 1 A ≤ IVOUT ≤ 4.5 A
PLIMIT
Power limit
VIN= 12 V, COUT = 1000 μF
EN: 3V → 0 V
Reverse diode voltage
VOUT > VIN, EN = 5 V, IIN = –1 A
3
mΩ
W
FAULT CURRENT (FLT)
I FLT
Fault current threshold
IVOUT increasing, ICT from sinking to sourcing,
pulsed test
R FLT = 200 kΩ
0.8
1
1.2
R FLT = 100 kΩ
1.8
2
2.2
R FLT = 49.9 kΩ
3.6
4
4.4
RIMAX = 100 kΩ
1.6
2
2.4
RIMAX = 66.5 kΩ
2.6
3
3.4
RIMAX = 40.2 kΩ
4.6
5
5.4
ICT sourcing, VCT = 1 V, In current-limit
29
35
41
1
1.4
1.8
CURRENT-LIMIT (IMAX)
IIMAX
Current-limit program
IVOUT ↑ ,
VVIN-VOUT = 0.3 V, pulsed
test
A
FAULT TIMER (CT)
Charge/Discharge current
ICT sinking, VCT = 1 V, drive CT to 1 V, measure
current
Threshold voltage
D
ON/OFF fault duty cycle
VCT increasing
1.3
1.4
1.5
VCT decreasing
0.1
0.16
0.3
2.8%
3.7%
4.6%
VVOUT = 0 V
μA
V
ENABLE (EN)
Threshold voltage
Input bias current
V EN decreasing
0.8
1
1.5
V
Hysteresis
50
150
250
mV
–1.5
0
0.5
2
1
0.5
350
500
30
50
V EN = 2.4 V (sinking)
V EN = 0.2 V (sourcing)
Turnon propagation delay
VIN = 3.3 V, ILOAD = 1 A,
V EN : 2.4 V → 0.2 V, VOUT: ↑ 90% × VIN
Turn-off propagation delay
VIN = 3.3 V, ILOAD = 1 A,
V EN : 0.2 V → 2.4V, VOUT: ↓ 10% × VIN
μA
μs
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ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
0.2
0.4
V
1
μA
FAULT (IFLT)
VOL
Low-level output voltage
VCT = 1.8 V, I FLT = 1 mA
IIFLT
Leakage current
V FLT = 18 V
POWERGOOD (PG)
V PG
PG threshold
V(VIN-VOUT) decreasing
0.4
0.5
0.65
Hysteresis
0.1
0.25
0.4
0.2
0.4
VOL
Low-level output voltage
I PG = 1 mA
I PG
Leakage current
V PG = 18 V
1
V
μA
CURRENT MONITOR (IMON)
Ratio ILOAD/IIMON
Offset current (sourcing)
IOUT = 500 mA
30
56
80
IOUT = 2 A
50
61
70
IOUT = 4.5 A
56
61
66
IVIN = 0 A
Clamp voltage
A/mA
–10
–2
0
μA
2.6
2.75
2.9
V
LATCH FUNCTION (LTCH)
Low threshold voltage
Auto retry mode
High threshold
Latch mode
0.8
Input bias current
VLTCH = 3.0 V
–1
0.2
1
VLTCH = 0.2 V
–50
–25
0
2
V
μA
THERMAL SHUTDOWN
Thermal shutdown
Junction temperature increasing
Hysteresis
4
160
10
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°C
Copyright © 2009–2014, Texas Instruments Incorporated
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SLUS903F – JANUARY 2009 – REVISED JANUARY 2014
TPS2420 FUNCTIONAL BLOCK DIAGRAM
IOUT
1
VIN
2
V(DS) Detector
3
+
4
S
-
R
R
FT
LCA
+
+
R
IOUT / 66k
13 IMON
1.0V
+
11 VOUT
10
10 uA
Q
Pump
Constant
Power
Engine
GND 5
I(D)
Detector
12
1.6 x ILIM
15 FLT
IMAX
7
+
+
IOUT
______
200k
8
PWRG\
+
IFLT
CT
Charge
THERMAL
SHUTDOWN
34 µA
CT
1.35 V
9
S
Q
R
Q
FLT
+
FLT
1.25 µA 33 µA
+
200 mV
LTCH
6
VIN
10M
1.5 V
+
VOUT
14 PG
PWRG\
EN 16
VIN
Internal Rail
+
+
18M
VIN –300 mV
2.7 / 2.6
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DEVICE INFORMATION
VIN
1
VIN
2
EN
FLT
PG
IMON
PINOUT DIAGRAM
16
15
14
13
12 VOUT
11 VOUT
TPS2420
4
9
5
6
7
8
IFLT
VIN
IMAX
10 VOUT
LTCH
3
GND
VIN
CT
TERMINAL FUNCTIONS
NAME
EN
PIN
NO.
I/O
16
I
Device is enabled when this pin is pulled low.
I
Power in and control supply voltage .
If low, the TPS2420 will attempt to restart after an overcurrent fault. If floating (high) the device will latch
off after an overcurrent fault and will not attempt to restart until EN or VIN is cycled off and on.
DESCRIPTION
1
VIN
2
3
4
LTCH
6
I
GND
5
—
IMAX
7
I
A resistor to ground sets the current-limit level.
IFLT
8
I
A resistor to ground sets the fault current level.
CT
9
I/O
A capacitor to ground sets the fault time.
IMON
13
O
A scaled down current which indicates the current through the device.
O
Output to the load.
Ground.
10
VOUT
11
12
PG
14
O
Power Good low represents the output voltage is within 300 mV of the input voltage.
FLT
15
O
Fault low indicated the fault time has expired and the FET is switched off.
6
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PIN DESCRIPTION
CT: Connect a capacitor form CT to GND to set the fault time. The fault timer starts when the fault current
threshold is exceeded, charging the capacitor with 36 μA from GND towards an upper threshold of 1.4 V. If the
capacitor reaches the upper threshold, the internal pass MOSFET is turned off. The MOSFET will stay off until
EN is cycled if a latching version is used. If an auto-retry version is used, the capacitor will discharge at 5 μA to
0.2 V and then re-enable the pass MOSFET. When the device is disabled, CT is pulled to GND through a 100kΩ resistor.
The timer period must be chosen long enough to allow the external load capacitance to charge. The fault timer
period is selected using the following formula where TFAULT is the minimum timer period in seconds and CCT is in
Farads.
C CT =
TFAULT
38.9 ´ 10 3
(1)
This equation does not account for component tolerances. In autoretry versions, the second and subsequent
retry timer periods will be approximately 85% as long as the first retry period.
In autoretry versions, the fault timer discharges the capacitor for a nominal TSD in seconds with CCT in Farads per
the following equation.
TSD = 1.0 ´ 106 ´ CCT
(2)
The nominal ratio of on to off times represents about a 3% duty cycle when a hard fault is present on the output
of an autoretry version device.
FLT: Open-drain output that pulls low on any condition that causes the output to open. These conditions are
either an overload with a fault time-out, or a thermal shutdown. FLT becomes operational before UV, when VIN is
greater than 1 volt.
GND: This is the most negative voltage in the circuit and is used as reference for all voltage measurements
unless otherwise specified.
IFLT: A resistor connected from this pin to ground sets the fault current threshold (IFAULT). Currents between the
fault current threshold and the current-limit are permitted to flow unimpeded for the period set by the fault timer
programmed on CT. This permits loads to draw momentary surges while maintaining the protection provided by a
lower average current-limit. IFLT may not be set below 1 A to maintain the Fault Current-Limit threshold accuracy
listed in the RECOMMENDED OPERATING CONDITIONS table. Some parts may not current-limit or fault as
expected.
The fault timer implemented by CT starts charging CT when current through VIN exceeds IFAULT. If the current
doesn’t drop below the IFAULT level before VCT reaches its upper threshold, the output will be shut off. The fault
current resistor is set by the following formula where IFAULT is in Amperes (A) and RRFLT is in ohms (Ω).
RIFLT =
200kW
IFAULT
(3)
IMAX: A resistor connected from this pin to ground sets IMAX. The TPS2420 device limits current to IMAX. If the
current does not drop below the IFAULT level before the timer times out then the output shuta off. RMAX is set by
the formula:
RIMAX =
201kW
IIMAX
(4)
IMAX must be set sufficiently larger than IFAULT to ensure that lMAX could never be less than IFAULT, even after
taking tolerances into account.
EN: When this pin is pulled low, the device is enabled. The input threshold is hysteretic, allowing the user to
program a startup delay with an external RC circuit. EN is pulled to VIN by a 10-MΩ resistor, pulled to GND by
16.8 MΩ and is clamped to ground by a 7-V Zener diode. Because high impedance pullup/down resistors are
used to reduce current draw, any external FET controlling this pin should be low leakage.
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TPS2420
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VIN: Input voltage to the TPS2420 device. The recommended operating voltage range is 3 V to 18 V. All VIN
pins should be connected together and to the power source.
VOUT: Output connection for the TPS2420 device. When switched on the output voltage will be approximately:
VOUT = VIN - 0.04 ´ IOUT
(5)
All VOUT pins must be connected together and to the load.
LTCH: When pulled low the TPS2420 device attempts to restart after a fault. If left floating or pulled high the
TPS2420 device latches off after a fault. This pin is internally clamped at 3 V and is pulled to the internal 3-V
supply by diode in series with a 100-kΩ resistor.
PG: Active low, Open Drain output, Power Good indicates that there is no fault condition and the output voltage
is within 0.5 V of the input voltage. PG becomes operational before UV, whenever VIN is greater than 1 V.
IMON: This is a scaled analog output of IVIN. Select RIMON based on the maximum allowed A/D input voltage
(VAD_FS) and the desired full-scale current in VIN (IVIN_FS) per the following equation
RIMON =
63kW ´ VAD _ IN(max )
ILOAD(max )
(6)
This pin is clamped at 2.5 V to protect A/D converters. It is recommended that IMON be ignored until after PG
asserts because the IMON output is accurate only after VOUT > 3 V.
8
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TYPICAL CHARACTERISTICS
CURRENT-LIMIT
vs
JUNCTION TEMPERATURE
FAULT CURRENT
vs
JUNCTION TEMPERATURE
2.20
2.20
RMAX = 100 k
2.15
IFAULT – Fault Current – A
IIMAX – Current Limit – A
2.10
2.50
2.00
1.95
1.90
2.10
2.50
2.00
1.95
1.90
1.85
1.85
1.80
–50
0
50
– Junction
Temperature – °C
TJ
100
1.80
–50
150
TJ
0
50
100
– Junction
Temperature – °C
Figure 1.
Figure 2.
POWER LIMIT
vs
JUNCTION TEMPERATURE
SUPPLY CURRENT
vs
JUNCTION TEMPERATURE
8.0
7.5
RFLT = 100 k
2.15
150
24
ILOAD = 1 A
Sleep Mode
7.0
ISUPPLY – Supply Current – mA
PLIMIT – Power Limit Level – W
22
6.5
6.0
5.5
5.0
4.5
4.0
20
18
16
14
12
3.5
3.0
–50
0
TJ
50
100
150
10
–50
– Junction Temperature – °C
Figure 3.
0
TJ
50
100
150
– Junction Temperature – °C
Figure 4.
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TYPICAL CHARACTERISTICS (continued)
OUTPUT CURRENT
vs
JUNCTION TEMPERATURE
FAULT-TIMER THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
–32.0
ILOAD = 2 A
VTHRESH – Fault Timer Threshold Voltage -– V
–32.2
1.50
IIMON – Output Current – mA
–32.4
–32.6
–32.8
–33.0
–33.2
–33.4
–33.6
–33.8
–34.0
–50
0
TJ
50
100
150
1.45
1.40
1.35
1.30
–50
– Junction Temperature – °C
Figure 5.
10
0
TJ
50
100
150
– Junction Temperature – °C
Figure 6.
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TYPICAL CHARACTERISTICS
Figure 7. 12-V Startup into 15-Ω, 700-μF Load
Figure 8. 12-V Input Added to an 8-Ω Load
Figure 9. Failed Startup into a 4-Ω Load
Figure 10. 12-V Soft Overload, 3-A to 4.2-A, Power Limit Not
Tripped
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TYPICAL CHARACTERISTICS (continued)
12
Figure 11. Firm Overload, 3-A to 5.4 A,
Power Limit Tripped
Figure 12. 12-V Hard Overload, 3.6-A Load then Short
Figure 13. Power Dissipation During 12-V Startup into a 60Ω, 800-μF Load
Figure 14. Power Dissipation During 12-V Startup into a 15Ω, 140-μF Load
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TYPICAL CHARACTERISTICS (continued)
Figure 15. Startup into a 1-Ω Load
Figure 16. Firm Overload, Load Stepped
From 3.8 A to 5.5 A
Figure 17. Hard Overload, Load Stepped
from 3.8 A to 7.1 A
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APPLICATION INFORMATION
If EN is tied to GND at startup and VIN does not ramp quickly the TPS2420 device can turn off momentarily then
on during startup. This can happen if a capacitive load momentarily pulls down the input voltage below the UV
threshold. If necessary, this can be avoided by delaying EN assertion until VIN is fully up.
Maximum Load
The power limiting function of the TPS2420 device provides very effective protection for the internal FET.
Expectedly, there is a supply voltage dependent maximum load which the device will be able to power up. Loads
above this level may cause the device to shut off current before startup is complete. Neglecting any load
capacitance, the maximum load ( minimum load resistance ) is calculated using the equation;
V 2
RMIN = IN
12
(7)
Adding load capacitance may reduce the maximum load which can be present at startup.
Transient Protection
The need for transient protection in conjunction with hot-swap controllers should always be considered. When
the TPS2420 device interrupts current flow, input inductance generates a positive voltage spike on the input and
output inductance generates a negative voltage spike on the output. Such transients can easily exceed twice the
supply voltage if steps are not taken to address the issue. Typical methods for addressing transients include;
• Minimizing lead length and inductance into and out of the device
• Voltage Suppressors (TVS) on the input to absorb inductive spikes
• Schottky diode across the output to absorb negative spikes
• A combination of ceramic and electrolytic capacitors on the input and output to absorb energy
• Use PCB GND plane
The following equation estimates the magnitude of these voltage spikes:
VSPIKE(absolute ) = VNOM + ILOAD ´ L
C
where
•
•
•
•
VNOM is the nominal supply voltage
ILOAD is the load current
C is the capacitance present at the input or output of the TPS2420 device
L equals the effective inductance seen looking into the source or the load
(8)
Calculating the inductance due to a straight length of wire is shown in Equation 9.
æ 4´L
ö
- 0.75 ÷ (nH)
Lstraightwire » 0.2 ´ L ´ ln ç
D
è
ø
where
•
•
L is the length of the wire
D is diameter of the wire
(9)
Some applications may require the addition of a TVS to prevent transients from exceeding the absolute ratings if
sufficient capacitance cannot be included.
14
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APPLICATION INFORMATION
Operation
When load current exceeds the user programmed fault limit (IFAULT) during normal operation the fault timer starts.
If load current drops below the IFAULT threshold before the fault timer expires, normal operation continues. If load
current stays above the IFAULT threshold the fault timer expires and a fault is declared. When a fault is declared a
device operating in latch mode turns off and can be restarted by cycling power or toggling the EN signal. A
device operating in retry mode attempts to turn on at a 3% duty cycle until the fault is cleared. When the IMAX
limit is reached during a fault the device goes into current-limit and the fault timer keeps running. IMAX can be
programmed by the user by connecting a resistor from the IMAX pin to GND.
Startup
When power is first applied to a load with discharged capacitors there is a large inrush current. The inrush is
controlled by the TPS2420 device by initially entering the power limit mode and turning on the fault timer. See
Figure 19. As the charge builds on the capacitor, the current increases to IMAX. When the capacitor is fully
charged, current output is set by the dc load value, The fault timer is turned off. The FET is then fully enhanced
and the power good signal is true.
In order to start properly, the fault timer must be set to exceed the capacitor charge time.
When the load has a resistive component as well as capacitive, the fault time needs to be increased because
current to the resistive load is unavailable to charge the capacitor. The startup time for some selected loading is
given in Table 1.
Table 1 data was taken with IFAULT set to 4 A and IMAX set to 5 A. Lower current settings of the TPS2420 device
do not have a great influence on the start up timer because of operation at power limit. Load capacitance and dc
resistance was selected for a measured start time. The start time is measured from the assertion of the EN pin to
the assertion of the PG pin.
Table 1. Start Time for Input Voltage and Output Loading (1)
INPUT VOLTAGE (V)
LOAD CAPACITANCE
(μF)
220
5
1000
220
12
1000
(1)
DC LOAD
RESISTANCE (Ω)
START TIME (ms)
OPEN
2.5
5
2.7
12
2.6
OPEN
4
5
4
12
4
OPEN
4.4
5
No start
12
7
OPEN
14
5
No start
12
23
IFAULT = 4 A, IMAX = 5 A.
Some combinations of loading and current-limit settings exceed the 5-W power limit of the internal MOSFET. The
output voltage will not turn on regardless of the fault time setting. One way to work with the physical limits that
create this problem is to allow the power manager to charge only the capacitive component of the load and use
the PG signal to turn on the resistive component. This is common usage in dc-to-dc converters and other
electrical equipment with power good inputs.
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Start Up Into a Short
The controller attempts to power on into a short for the duration of the timer. Figure 20 shows a small current
resulting from power limiting the internal MOSFET. This happens only once for the latch off mode. For the retry
mode, Figure 24 shows this cycle repeating at an interval based on the CT time.
Shutdown Modes
Hard Overload - Fast Trip
When a hard overload causes the load current to exceed 1.6 × IMAX the TPS2420 device immediately shuts off
current to the load without waiting for the fault timer to expire. After such a shutoff the TPS2420 device enters
into startup mode and attempts to apply power to the load.
If the hard overload is caused by a current transient, then a normal startup can be expected with a low probability
of disruption to the load, assuming there is sufficient load capacitance to hold up the load during the fractions of
a millisecond that make up the fast trip/restart cycle.
If the hard overload is caused by a real, continuous failure then the TPS2420 device goes into current-limit
during the attempt at restart. The timer starts and eventually runs out, shutting off current to the load. See the
fast trip Figure 22 and Figure 23. When the hard overload occurs the current is turned off, the PG pin becomes
false, and the FLT pin stays false. The FLT pin becomes true only when the fault timer times out.
Overcurrent Shutdown
Overcurrent shutdown occurs when the output current exceeds IMAX for the duration of the fault timer.
Overcurrent shutdown is the circuit breaker type protection of equipment. Figure 23 shows the step rise in output
current. The increased current is on for the duration of the timer. At conclusion of the timer, the output is turned
off.
Design Example
The TPS2420 Design shown in Figure 25 supports 12 V to operate a hot plugged disk drive.
The 12 V specification for a disk drive is approximately 1-A operating current and 2-A typical spin-up. Selecting a
2.5 A setting for IFAULT would allow some margin for the operating current and satisfy the start current
requirements.
Calculate RRFLT using equation Equation 10 or select it using Table 2.
RIFLT =
200kW 200,000
´
= 80 (kW )
IFAULT
2.5
(10)
The IMAX setting, 3.5 A, is set by RRMAX in Equation 11.
RIMAX =
16
201kW 201,000
´
= 57.4 (kW )
IIMAX
3.5
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Because IFAULT satisfies the spin up current, the timer can be set for the additional loading of charging the
capacitor. Estimate approximately 20 ms. Use either Equation 12 or Table 2 to estimate the capacitance.
CCT =
TFAULT
38.9 ´ 103
= 20 ´
10-3
´ 103 = 0.514 ´ 10-6
38.9
(12)
For a scaled analog readback of the current from VIN, set the IMON resistor. In Equation 13 , the VAD_INMAX is the
desired full scale A/D converter voltage. The largest value of VAD_INMAX 2.5 V. ILOADMAX is the full scale current,
2.5 A.
RIMON =
(63,000 ´ V
AD _ IN(max )
ILOAD(max )
)= (63,000 ´ 2.5) = 63 (kW )
2.5
(13)
The read-back voltage at the IMON pin, VIMON, indicates the instantaneous current output. Using equation
Equation 14 again, determine the current output for example, a 1.8-V VIMON. Substitute VIMON for VAD_INMAX and
ILOAD for ILOADMAX and solve for ILOAD, (Equation 14).
ILOAD =
(63,000 ´ VIMON ) = (63,000 ´ 1.8 ) = 1.81
RIMON
62,500
(A )
(14)
Layout
Support Components
Locate all TPS2420 support components, RSET, CT, and others. or any input or output voltage clamps, close to
their connection pin. Connect the other end of the component to the inner layer GND without trace length.
PowerPad™
When properly mounted the PowerPad package provides significantly greater cooling ability than an ordinary
package. To operate at rated power the Power Pad must be soldered directly to the PC board GND plane
directly under the device. The PowerPad is at GND potential and can be connected using multiple vias to inner
layer GND. Other planes, such as the bottom side of the circuit board can be used to increase heat sinking in
higher current applications.
Refer to Technical Briefs: PowerPAD™ Thermally Enhanced Package (TI Literature Number SLMA002) and
PowerPAD™ Made Easy (TI Literature Number SLMA004) for more information on using this PowerPadTM
package. These documents are available at www.ti.com (Search by Keyword).
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APPLICATION PLOTS
18
Figure 18. Start Up Into an RC Load (PG)
Figure 19. Start Up Into an RC Load (CT)
Figure 20. Start Up Into a Short Circuit Output
Figure 21. Device Output Short
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Figure 22. FLT on Device Output Short
Figure 23. Overcurrent Shutdown
Figure 24. Retry Into an Output Short Circuit
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TPS2420
SLUS903F – JANUARY 2009 – REVISED JANUARY 2014
12 V
VIN
www.ti.com
1
VIN
EN 16
2
VIN
FLT 15
3
VIN
PG 14
4
VIN
5
GND
VOUT 12
6
LTCH
VOUT 11
7
IMAX
R1 10 kW
C1
1 mF
15 V
D1
SMAJ15A
RIMAX
57.6 kW
R2 10 kW
IMON 13
U1
TPS2420RSA
12 V
VOUT
RIMON
63.4 kW
VOUT 10
PowerPAD
8
CT
IFLT
9
RIFLT
80.6 kW
D2
MBR130LSFT1
CT
560 nF
GND
GND
UDG-09018
Figure 25. TPS2420 Reference Design, 12-V, 2.5-A Steady State Current, 5-A Max Current
NOTE
D1, D2, and C1 are required only in systems with significant feed, load inductance, or
both.
To alter parameters IIAX, IFAULT, IIMON or CCT use the formulas in the Pin Description section or use Table 2 .
Table 2. Typical Design Examples
20
IFAULT (A)
RIFLT (kΩ)
IIMAX (A)
RIMAX (kΩ)
CCT (μF)
TFAULT (ms)
TSD (ms)
ILOAD(max) (A)
RIMON (kΩ)
158
1
200
2
100
0.022
0.86
22
1
1.5
133
2.5
80.6
0.047
1.83
47
1.5
105
2
100
3
65.5
0.1
3.89
100
2
78.7
2.5
80.6
3.5
56.2
0.22
8.56
220
2.5
63.4
3
65.5
4
49.9
0.47
18.28
470
3
52.3
3.5
56.2
4.5
44.2
0.68
26.45
680
3.5
45.3
4
49.9
5
40.2
1
38.9
1000
4
39.2
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SLUS903F – JANUARY 2009 – REVISED JANUARY 2014
REVISION HISTORY
Changes from Revision A (March, 2010) to Revision B
•
Page
Changed Table 2 - TSD (ms) column values ....................................................................................................................... 20
Changes from Revision B (July 2010) to Revision C
•
Page
Added Feature: UL Listed - File Number E169910 .............................................................................................................. 1
Changes from Revision C (August 2010) to Revision D
Page
•
Added IFLT may not be set below 1 A to maintain the Fault Current Limit threshold accuracy listed in the Electrical
Characteristics table. Some parts may not current limit or fault as expected. ..................................................................... 7
•
Changed Starup section text From: IILIM set to 5 A To: to IMAX set to 5 A ........................................................................... 15
•
Changed Table 1 Note 1 From: IILIM = 5 A To: IMAX = 5 A .................................................................................................. 15
•
Changed Hard Overload - Fast Trip section text From: 1.6 × IILIMIT to 1.6 × IMAX ............................................................... 16
•
Changed Overcurrent Shutdown section text From: IILIMIT To: IMAX .................................................................................... 16
Changes from Revision D (September 2011) to Revision E
•
Page
Deleted IFAULT, IMAX, CT Voltage from the ABSOLUTE MAXIMUM RATINGS table ............................................................. 2
Changes from Revision E (May 2013) to Revision F
Page
•
Deleted the minimum voltage from the voltage range listed in the document title, features list and description ................. 1
•
Added 5-A to document title ................................................................................................................................................. 1
•
Changed listed to recognized in last FEATURES bullet. Also added 2367 to UL number .................................................. 1
•
Added SSDs, PCIE, and Fan Control to the APPLICATIONS list ........................................................................................ 1
•
Added UV turn-on threshold and bus text to the first paragraph of the DESCRIPTION ...................................................... 1
•
Changed 3.0 V to 20.0 V to VIN in the schematic ................................................................................................................ 1
•
Deleted PRODUCT INFORMATION table ............................................................................................................................ 2
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21
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS2420RSAR
ACTIVE
QFN
RSA
16
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TPS
2420
TPS2420RSAT
ACTIVE
QFN
RSA
16
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TPS
2420
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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