TPS2500, TPS2501
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SLVS886C – OCTOBER 2008 – REVISED AUGUST 2010
INTEGRATED USB POWER SWITCH WITH BOOST CONVERTER
Check for Samples: TPS2500, TPS2501
FEATURES
APPLICATIONS
•
•
•
1
23
•
•
•
•
•
•
•
•
•
•
Integrated Synchronous Boost Converter and
USB Current-Limit Power Switch
Light-Load, High-Efficiency Eco-mode™
Control Scheme (TPS2500) or Constant
Frequency (TPS2501)
1.8-V to 5.25-V Input Voltage (2.2-V Minimum
Start-Up Voltage)
Adjustable USB Current Limit
– 130 mA to 1400 mA (Typical)
Accurate 20% Current Limit at 1.4-A Setting
Powers up to Two Standard USB Ports
Auxiliary 5.1-V Output
Fast Overcurrent-Response Time – 5 ms
Typical
Small 3-mm × 3-mm × 0.9-mm SON-10 Package
15-kV / 8-kV System-Level ESD Capable
UL Listed - File No. E169910
TYPICAL APPLICATION CIRCUIT
2.2 mH
DESCRIPTION
The TPS2500 and TPS2501 provide an integrated
solution to meet USB 5-V power requirements from a
1.8-V to 5.25-V input supply. The features include a
Hi-Speed USB compliant power output, output switch
enable, current limit, and overcurrent fault reporting.
The 1.8-V to 5.25-V input can be supplied by sources
including dc/dc regulated supplies (e.g., 3.3 V), or
batteries such as single-cell Li+ or three-cell NiCd,
NiMH, or alkaline.
The USB power-switch current limit is programmable
via an external resistor from as low as 130 mA to as
high as 1400 mA (typical). Two standard USB ports
can be supported from a single TPS2500 or TPS2501
at the 1400-mA setting.
Additionally, the boost converter output is available as
an auxiliary 5.1-V output to power additional loads.
The total current supplied by the USB output and the
auxiliary cannot exceed 1148 mA at VIN = 3 V.
BOOST EFFICIENCY
vs
OUTPUT AUXILIARY CURRENT
SW
IN
1.8-V to
5.25-V Input
Portable Applications Using Single Li+ Cell
USB Hosts Without Native 5-V Supplies
5 V Auxiliary Load
AUX
EN
10 mF
(2)
Power, 100 mA
22 mF
ENUSB
0.97
USB FAULT Flag
FAULT
5 V USB Power
ILIM
RILIM
GND
USB
Data
PGND
(1)
POWER PAD
5 V USB
Port #2
500 mA
S0380-02
(1)
(2)
Requirement for USB applications only;
downstream facing ports should be
bypassed with 120 mF minimum per hub.
Additional current can be supplied from
AUX if VLFM
230
250
270
VIN rising
4.25
4.35
4.45
4.9
5.05
Low-frequency mode input voltage threshold
No-frequency mode input voltage threshold
(boost SYNC MOSFET always on)
Hysteresis
200
VIN rising
Hysteresis
kHz
V
mV
5.17
75
V
mV
Maximum duty cycle
85
%
Minimum controllable on-time
85
ns
420
mA
Eco-mode CONTROL SCHEME, PULSED FREQUENCY OPERATION (TPS2500 ONLY)
IINDLOW
AUXLOW
Demanded peak current to enter PFM mode
AUX-too-low comparator threshold
Peak inductor current, falling
Resume switching due to AUX, falling
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Product Folder Link(s): TPS2500 TPS2501
0.98 ×
VAUX
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V
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ELECTRICAL CHARACTERISTICS — Boost Section Only (continued)
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OVERVOLTAGE PROTECTION
VOVP
AUX overvoltage shutdown
1.05 ×
VAUX
AUX rising
V
POWER STAGE
Switch on resistance (SWN)
Peak switch current limit, cycle-by-cycle (SWN
MOSFET)
ISW
3
IUPPER
80
120
4.5
6
mΩ
A
6.7
Switch on-resistance (SWP)
Switch on-resistance (SWP + USB)
VIN > VNFM
85
125
125
185
2.65
3
mΩ
START-UP
ISTART
Constant current
2.3
VEXIT
Constant-current exit threshold (AUX voltage
where converter starts switching), VIN - VAUX
700
A
mV
BOOST ENABLE (EN)
Enable threshold, boost converter
IEN
Input current
VEN = 0 V or 5.5 V
0.7
1
V
–0.5
0.5
mA
ELECTRICAL CHARACTERISTICS — USB Section Only
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
50
80
mΩ
2
3
ms
2.5
3.5
ms
USB
rUSB
USB switch resistance
tr
Rise time, output
tf
Fall time, output
VAUX = 5.1 V, CL = 100 mF, RL = 10 Ω,
RILIM = 20 kΩ
USB ENABLE (ENUSB)
Enable threshold, USB switch
IENUSB
Input current
VENUSB = 0 V or 5.25 V
Turnon time
0.7
1.0
V
–0.5
0.5
mA
CL = 100 mF, RL = 10 Ω, RILIM = 20 kΩ
Turnoff time
5
ms
10
ms
150
mV
1
mA
ms
FAULT
Output low voltage
I FAULT = 1 mA
Off-state current
V FAULT = 5.25 V
tDEG
FAULT deglitch
FAULT assertion or deassertion due to
overcurrent condition
VTRIP
AUX threshold for FAULT trip
6
8
10
AUX voltage falling
4.45
4.6
4.71
RILIM = 100 kΩ
190
285
380
V
ILIM
IOS
tIOS
4
Short-circuit output current, VIN = 3.3 V
Response time to short circuit
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RILIM = 40 kΩ
550
712
875
RILIM = 20 kΩ
1140
1420
1700
VAUX = 5.1 V (see Figure 3)
5
mA
ms
Copyright © 2008–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS2500 TPS2501
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SLVS886C – OCTOBER 2008 – REVISED AUGUST 2010
PIN DESCRIPTIONS
SIGNAL
NAME
NO.
TYPE (1)
DESCRIPTION
AUX
10
O
Fixed 5.1-V boost converter output. Connect a low-ESR ceramic capacitor from AUX to PGND.
EN
4
I
Enable input for boost converter. Tie to IN to enable.
ENUSB
7
I
Enable input for the USB switch. Tie to IN or AUX to enable.
FAULT
8
O
Active-low USB fault indicator (open-drain)
GND
5
P
Control/logic ground. Must be tied to PGND close to the IC externally.
ILIM
6
I
Program the nominal USB-switch current-limit threshold with a resistor to GND.
IN
3
I
Input supply voltage for boost converter
PGND
2
P
Source connection for the internal low-side boost-converter power switch. Connect to GND with a
low-impedance connection to the input and output capacitors.
SW
1
P
Boost and rectifying switch input. This node is switched between PGND and AUX. Connect the boost
inductor from IN to SW.
USB
9
O
Output of the USB power switch. Connect to the USB port.
Thermal
pad
—
—
Must be soldered to achieve appropriate power dissipation. Connect to GND.
(1)
I = input; O = output; P = power
DRC Package
(Top View)
SW
1
10 AUX
PGND
2
9
USB
IN
3
8
FAULT
EN
4
7
ENUSB
GND
5
6
ILIM
Thermal
Pad
P0051-03
AUX
AUX is the boost converter output and provides power to the USB switch and to any additional load connected to
AUX. Internal feedback regulates AUX to 5.1 V. Connect a 22-mF ceramic capacitor from AUX to PGND to filter
the boost converter output. See the Component Recommendations section for further details. Additional external
load can be connected to AUX as long as the total current drawn by the USB switch and external load does not
overload the boost converter. See the Determining the Maximum Allowable AUX and USB Current section for
details.
EN
EN is a logic-level input that enables the boost converter. Pull EN above 1 V to enable the device and below 0.7
V to disable the device. EN also disables the USB switch, because the USB switch cannot be run when the
boost converter is disabled.
ENUSB
ENUSB is a logic-level input that enables the USB switch. Pull ENUSB above 1 V to enable the USB switch and
below 0.7 V to disable the USB switch. ENUSB only enables the USB switch. The boost converter is
independent of ENUSB and continues to operate even when ENUSB disables the USB switch.
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FAULT
FAULT is an open-drain output that indicates when the USB switch is in an overcurrent or overtemperature
condition. FAULT has a fixed internal deglitch of tDEG to prevent false triggering from noise or transient
conditions. FAULT asserts low if the USB switch remains in an overcurrent condition for longer than tDEG. FAULT
de-asserts when the overcurrent condition is removed after waiting for the same tDEG period. Overtemperature
conditions bypass the internal delay period and assert/de-assert the FAULT output immediately upon entering or
leaving an overtemperature condition. FAULT is asserted low when VAUX falls below VTRIP (4.6 V, typical).
GND
Signal and logic circuits of the TPS2500 are referenced to GND. Connect GND to a quiet ground plane near the
device. An optional 0.1-mF capacitor can be connected from VIN to GND close the device to provide local
decoupling. Connect GND and PGND to the thermal pad externally at a single location to provide a star-point
ground. See the Layout Recommendations section for further details.
ILIM
Connect a resistor from ILIM to GND to program the current-limit threshold of the USB switch. Place this resistor
as close to the device as possible to prevent noise from coupling into the internal circuitry. Do not drive ILIM with
an external source. The current-limit threshold is proportional to the current through the RILIM resistor. See the
Programming the Current-Limit Threshold Resistor section for details on selecting the current-limit resistor.
IN
IN is the input voltage supply for the boost converter. Connect a 10-mF ceramic capacitor (minimum) from IN to
PGND. See the Component Recommendations section for further details on selecting the input capacitor.
PGND
PGND is the internal ground connection for the source of the low-side N-channel MOSFET in the boost
converter. Connect PGND to an external plane near the ground connection of the input and output capacitors to
minimize parasitic effects due to high switching currents of the boost converter. Connect PGND to GND and the
thermal pad externally at a single location to provide a star-point ground. See the Layout Recommendations
section for further details.
SW
SW is the internal boost converter connection of the low-side N-channel MOSFET drain and the high-side
P-channel drain. Connect the boost inductor from IN to SW close to the device to minimize parasitic effects on
the device operation.
Thermal Pad
The thermal pad connection is used to heat-sink the device to the printed-circuit board (PCB). The thermal pad
may not be connected externally to a potential other than ground because it is connected to GND internally. The
thermal pad must be soldered to the PCB to remove sufficient thermal energy in order to stay within the
recommended operating range of the device.
USB
USB is the output of the USB switch and should be connected to the USB connector to provide USB power.
Although the device does not require it for operation, a bulk capacitor may be connected from USB to PGND to
meet USB standard requirements. See the latest USB 2.0 specification for further details.
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SLVS886C – OCTOBER 2008 – REVISED AUGUST 2010
FUNCTIONAL BLOCK DIAGRAM
Backgate
Control
AUX
IN
SW
CS
USB
HSD
FB
CS
UVLO and
Charge
Pump
LSD
Gate Drive
Current
Limit
ILIM
ENUSB
Boost Control
Circuitry
Thermal
Sense
8-ms
Deglitch
FAULT
IN
EN
Boost Bias,
UVLO,
Enable Logic,
Ambient
Thermal Sense
GND
PGND
VUSB
VTRIP
4.6 V
B0351-01
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Product Folder Link(s): TPS2500 TPS2501
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SLVS886C – OCTOBER 2008 – REVISED AUGUST 2010
VIN
+
VLFM
4.35 V
–
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VIN ³ VLFM ® 250 kHz
VIN < VLFM ® 1 MHz
1-MHz/250-kHz
Oscillator
Slope
Compensation
Generator
85% Max
Duty Cycle
Generator
Q
S
Error
Amplifier
+
+
S
–
INPUT
LSD
PWM Latch
R
–
PWM
Comparator
Iind
+
–
ISW 4.5 A
–
IINDLOW
420 mA
+
PFM Enter
Comparator
+
–
VAUX + 5%
VAUX – 2%
+
IUPPER
6.7 A
Lower CurrentLimit Comparator
Gate Drive
Upper CurrentLimit Comparator
8-ms One-Shot
–
AUX High
Comparator
S
Q
PFM Latch
+
S
EN
R
HSD
–
AUX Low
Comparator
VIN – VAUX
+
VEXIT 700 mV
–
EN
Constant-Current
Start-up Comparator
ISTART
2.65 A
+
–
VIN
+
VNFM 5.05 V
–
Constant-Current
Start-up Amplifier
B0352-01
Figure 1. Detail of Boost Control Circuitry
PARAMETER MEASUREMENT INFORMATION
OUT
tr
RL
tf
CL
90%
90%
VOUT
10%
10%
Test Circuit
VEN
50%
VEN
50%
ton
VOUT
10%
50%
ton
toff
90%
50%
toff
90%
VOUT
10%
Voltage Waveforms
S0395-01
Figure 2. Test Circuit and Voltage Waveforms
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PARAMETER MEASUREMENT INFORMATION (continued)
IOS
IOUT
tIOS
T0432-01
Figure 3. Response Time to Short-Circuit Waveform
Decreasing
Load
Resistance
VUSB
Decreasing
Load
Resistance
IUSB
IOS
M0134-01
Figure 4. USB Output Voltage vs USB Load Current
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5.15
160
5.14
VIN = 4.5 V
R(AUX) = Hi-Z
5.13
PMOS + USB
140
V(AUX) − Auxiliary Voltage − V
RDS(on) − On-State Resisitance − mΩ
TYPICAL CHARACTERISTICS
180
PMOS
120
100
80
NMOS
60
40
5.12
5.11
5.10
5.09
5.08
5.07
USB
20
5.06
0
−50
0
50
100
5.05
−50
150
TJ − Junction Temperature − °C
50
100
TJ − Junction Temperature − °C
G003
Figure 5. MOSFET On-State Resistance vs Junction
Temperature
150
G004
Figure 6. VAUX vs Junction Temperature, IAUX = IUSB = 0 A
253.0
1010
1008
0
VIN = 5 V
VIN = 3.3 V
252.5
1006
f − Frequency − kHz
f − Frequency − kHz
252.0
1004
1002
1000
998
251.5
251.0
250.5
996
250.0
994
249.5
992
990
−50
0
50
100
TJ − Junction Temperature − °C
150
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0
50
100
TJ − Junction Temperature − °C
G005
Figure 7. Converter Switching Frequency vs Junction
Temperature, VIN = 3.3 V
10
249.0
−50
150
G006
Figure 8. Converter Switching Frequency vs Junction
Temperature, VIN = 5 V
Copyright © 2008–2010, Texas Instruments Incorporated
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SLVS886C – OCTOBER 2008 – REVISED AUGUST 2010
TYPICAL CHARACTERISTICS (continued)
9
6
VIN = 3.3 V
8
TJ = 85°C
5
Iq − Bias Current − µA
Iq − Bias Current − µA
7
4
3
2
TJ = 25°C
6
5
4
3
2
1
TJ = −40°C
1
0
−50
0
0
50
100
150
TJ − Junction Temperature − °C
Figure 9. Bias Current vs Junction Temperature,
VIN = 3.3 V, VEN = 0 V (Disabled)
0
1
2
3
4
5
VIN − Input Voltage − V
G007
6
G008
Figure 10. Bias Current vs Input Voltage,
VEN = 0 V (Disabled)
THEORY OF OPERATION
DESCRIPTION
This device targets applications for host-side USB devices where a 5-V power rail, required for USB operation, is
unavailable. The TPS2500 integrates the functionality of a synchronous boost converter and a single USB switch
into a monolithic integrated circuit so that lower-voltage rails can be used directly to provide USB power. An
additional feature is that the auxiliary 5-V power rail is brought external to the device to power non-USB loads in
addition to the integrated USB switch.
The boost converter is highly integrated, including the switching MOSFETs (low-side N-channel, high-side
synchronous P-channel), gate-drive and analog-control circuitry, and control-loop compensation. Additional
features include high-efficiency light-load operation, overload and short-circuit protection, and controlled
monotonic soft start. The USB switch integrates all necessary functions, including back-to-back series N-channel
MOSFETs, charge-pump gate driver, and analog control circuitry. The current-limit protection is user-adjustable
by selecting the RILIM resistor from ILIM to GND.
The only external components required are the boost inductor, current-limit setting resistor, and input and output
capacitors for the boost converter.
BOOST CONVERTER
Start-Up
Input power to the TPS2500 is provided from IN to GND. The device has an undervoltage lockout (UVLO) circuit
that disables the device until the voltage on IN exceeds 2.15 V (typical). The TPS2500 goes through its normal
start-up process and attempts to regulate the AUX voltage to 5.1 V (typical).
The boost converter has a two-step start-up sequence. Step one is a constant-current mode that regulates the
current through the high-side P-channel MOSFET to ISTART (2.65 A typical). ISTART provides power to the load and
charges the output capacitance on VAUX until VAUX reaches VIN – VEXIT. The converter begins to switch once VAUX
exceeds VIN – VEXIT. The initial duty cycle of the device is limited by a closed-loop soft start that ramps the
reference voltage to the internal error amplifier to provide a controlled, monotonic start-up on VAUX. The boost
converter goes through this cycle any time the voltage on VAUX drops below VIN – VEXIT due to overload
conditions or the boost converter re-enables after normal shutdown.
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The USB switch is powered directly from VAUX and turns on once the UVLO of the USB switch is met (4.3 V
typical). The turnon is controlled internally to provide a monotonic start-up on VUSB.
Normal Operation
The boost converter runs at a 1-MHz fixed frequency and regulates the output voltage VAUX using a pulse-width
modulating (PWM) topology that adjusts the duty cycle of the low-side N-channel MOSFET on a cycle-by-cycle
basis. The PWM latch is set at the beginning of each clock cycle and commands the gate driver to turn on the
low-side MOSFET. The low-side MOSFET remains on until the PWM latch is reset.
Voltage regulation is controlled by a peak-current-mode control architecture. The voltage loop senses the voltage
on VAUX and provides negative feedback into an internal, transconductance-error amplifier with internal
compensation and resistor divider. The output of the transconductance-error amplifier is summed with the output
of the slope-compensation block and provides the error signal that is fed into the inverting input of the PWM
comparator. Slope compensation is necessary to prevent subharmonic oscillations that may occur in
peak-current-mode control architectures that exceed 50% duty cycle. The PWM ramp fed into the noninverting
input of the PWM comparator is provided by sensing the inductor current through the low-side N-channel
MOSFET. The PWM latch is reset when the PWM ramp intersects the error signal and terminates the pulse
width for that clock period. The TPS2500 stops switching if the peak-demanded current signal from the error
amplifier falls below the zero-duty-cycle threshold of the device.
Low-Frequency Mode
The TPS2500 enters low-frequency mode above VIN = VLFM (4.35 V typical) by reducing the dc/dc converter
frequency from 1 MHz (typical) to 250 kHz (typical). Current-mode control topologies require internal
leading-edge blanking of the current-sense signal to prevent nuisance trips of the PWM control MOSFET. The
consequence of leading-edge blanking is that the PWM controller has a minimum controllable on-time (85 ns
typical) that results in a minimum controllable duty cycle. In a boost converter, the demanded duty cycle
decreases as the input voltage increases. The boost converter pulse-skips if the demanded duty cycle is less
than what the minimum controllable on-time allows, which is undesirable due to the excessive increase in
switching ripple. When the TPS2500 enters low-frequency mode above VIN = VLFM, the minimum controllable
duty cycle is increased because the minimum controllable on-time is a smaller percentage of the entire switching
period. Low-frequency mode prevents pulse skipping at voltages larger than VLFM. The TPS2500 resumes normal
1-MHz switching operation when VIN decreases below VLFM.
One effect of reducing the switching frequency is that the ripple current in the inductor and output AUX
capacitors is increased. It is important to verify that the peak inductor current does not exceed the peak switch
current limit ISW (4.5 A typical) and that the increase in AUX ripple is acceptable during low-frequency mode.
No-Frequency Mode
The TPS2500 enters no-frequency mode above VIN = VNFM (5.05 V typical) by disabling the oscillator and turning
on the high-side synchronous PMOS 100% of the time. The input voltage is now directly connected to the AUX
output through the inductor and high-side PMOS. Power dissipation in the device is reduced in no-frequency
mode because there is no longer any switching loss and no RMS current flows through the low-side control
NMOS, which results in higher system-level efficiency. The boost converter resumes switching when VIN falls
below VNFM.
Eco-mode Light-Load Operation
The TPS2500 enters the Eco-mode control scheme at light loads to increase efficiency. The device reduces
power dissipation while in the Eco-mode control scheme by disabling the gate drivers and power MOSFETs and
entering a pulsed-frequency mode (PFM). PFM works by disabling the gate driver when the PFM latch is set.
During this time period there is no switching, and the load current is provided solely by the output capacitor.
There are two comparators that determine when the device enters or leaves the Eco-mode control scheme. The
first comparator is the PFM-enter comparator. The PFM-enter comparator monitors the peak demanded current
in the inductor and allows the device to enter the Eco-mode control scheme when the inductor current falls below
IINDLOW (420 mA typical). The second comparator is the AUX-low comparator. The AUX-low comparator
monitors AUX and forces the converter out of the Eco-mode control scheme and resumes normal operation
when the voltage on AUX falls below AUXLOW (5 V typical). The Eco-mode control scheme is disabled during
low-frequency mode when VIN > VLFM (4.35 V typical).
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Figure 11. Eco-mode Control Scheme Operation, VIN = 3.3 V, IAUX = 10 mA
Overvoltage Protection
The TPS2500 provides overvoltage protection on VAUX to protect downstream devices. Overvoltage protection is
provided by disabling the gate drivers and power MOSFETs when an overvoltage condition is detected. The
TPS2500 uses a single AUX-high comparator to monitor the AUX voltage by sensing the voltage on the internal
feedback node fed into the error amplifier. The AUX-high comparator disables the gate driver whenever the
voltage on AUX exceeds the regulation point by 5% (typical). The gate driver remains disabled until the AUX
voltage falls below the 5% high OVP threshold. The overvoltage protection feature is disabled when VIN > VNFM
(5.05 V typical) to prevent unwanted shutdown.
Overload Conditions
The TPS2500 boost converter uses multiple overcurrent protection features to limit current in the event of an
overload or short-circuit condition. The first feature is the lower current-limit comparator that works on a
cycle-by-cycle basis. This comparator turns off the low-side MOSFET by resetting the PWM latch whenever the
current through the low-side MOSFET exceeds 4.5 A (typical). The low-side MOSFET remains off until the next
switching cycle. The second feature is the upper current-limit comparator that disables switching for eight
switching cycles whenever the current in the low-side MOSFET exceeds 6.7 A (typical). After eight switching
cycles, the boost converter resumes normal operation. The third feature is the constant-current start-up ISTART
comparator that disables switching and regulates the current through the high-side MOSFET whenever the
voltage on VAUX drops below the input voltage by VEXIT (700 mV typ). This feature protects the boost converter in
the event of an output short circuit on VAUX. ISTART also current-limit protects the synchronous MOSFET in
no-frequency mode when VIN > VNFM (5.05 V typical). The converter goes through normal start-up operation once
the short-circuit condition is removed. A fourth feature is the 85% (typical) maximum-duty-cycle clamp that
prevents excessive current from building in the inductor.
Determining the Maximum Allowable AUX and USB Current
The maximum output current of the boost converter out of AUX depends on several system-level factors
including input voltage, inductor value, switching frequency, and ambient temperature. The limiting factor for the
TPS2500 is the peak inductor current, which cannot exceed ISW (3 A minimum). The cycle-by-cycle current-limit
turns off the low-side NMOS as a protection mechanism whenever the inductor current exceeds ISW. The graph
in Figure 12 can be used as a guideline for determining the maximum total current at different input voltages. The
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typical plot assumes nominal conditions—2.2 mH inductor, 1-MHz/250-kHz switching frequency, nominal
MOSFET on-resistances. The conservative plot assumes more pessimistic conditions—1.7 mH inductor,
925-kHz/230-kHz switching frequency, and maximum MOSFET on-resistances. The graph accounts for the
frequency change from 1-MHz to 250-kHz when VIN > VLFM (4.35 V typical) and for the no-frequency mode when
VIN > VNFM (5.05 V typical), which explains the discontinuities of the graph.
Table 2. Maximum Total DC/DC Current (IAUX + IUSB) at Common Input Voltages
Input Voltage (V)
Maximum Total Output Current (IAUX + IUSB)
Conservative (mA)
Typical (mA)
599
757
2.5
916
1113
2.7
1008
1216
3
1148
1374
3.3
1308
1536
1.8
3.6
1445
1704
4.35
1241
1730
4.5
1364
1858
4.75
1593
2093
5.05
2300
2300
5.25
2300
2300
SPACE ADDED
SPACE ADDED
SPACE ADDED
MAXIMUM TOTAL (AUXILIARY + USB) CURRENT
vs
INPUT VOLTAGE
2500
I(MAX) − Maximum Total Current − mA
2250
1 MHz
2000
1750
Typical
1500
1250
250 kHz
1000
Conservative
750
500
1.75
2.25
2.75
3.25
3.75
4.25
4.75
VIN − Input Voltage − V
5.25
G002
Figure 12. Maximum Total DC/DC Current vs. Input Voltage
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POWER SWITCH
Overview
The TPS2500 integrates a current-limited, power-distribution switch using an N-channel MOSFET for applications
where short circuits or heavy capacitive loads are encountered. The current-limit threshold is user-programmable
between 130 mA and 1.4 A (typical) by selecting an external resistor. The device incorporates an internal charge
pump and gate-drive circuitry necessary to fully enhance the N-channel MOSFET. The internal gate driver
controls the MOSFET turnon to limit large current and voltage surges by providing built-in soft-start functionality.
The power switch has an independent undervoltage lockout (UVLO) circuit that disables the power switch until
the voltage on AUX reaches 4.3 V (typical). Built-in hysteresis prevents unwanted on/off cycling due to input
voltage drop on AUX from current surges on the output of the power switch. The power switch has an
independent logic-level enable control (ENUSB) that gates power-switch turnon and bias for the charge pump,
driver, and miscellaneous control circuitry. A logic-high input on ENUSB enables the driver, control circuits, and
power switch. The enable input is compatible with CMOS, TTL, LVTTL, 2.5-V, and 1.8-V logic levels.
Overcurrent Conditions
The TPS2500 power switch responds to overcurrent conditions by limiting its output current to the IOS levels
shown in Figure 4. The device maintains a constant output current and reduces the output voltage accordingly
during an overcurrent condition. Two possible overload conditions can occur.
The first condition is when a short circuit or partial short circuit is present on the output of the switch prior to
device turnon and the device is powered up or enabled. The output voltage is held near zero potential with
respect to ground, and the TPS2500 ramps the output current to IOS. The TPS2500 power switch limits the
current to IOS until the overload condition is removed or the device begins to cycle thermally.
The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is
already enabled and powered on. The device responds to the overcurrent condition within time tIOS (see
Figure 3). The current-sense amplifier is overdriven during this time and momentarily disables the power switch.
The current-sense amplifier recovers and limits the output current to IOS. The power switch thermally cycles if an
overload condition is present long enough to activate thermal limiting in any of the foregoing cases. The power
switch turns off when the junction temperature exceeds 130°C while in current-limit. The power switch remains
off until the junction temperature cools 10°C and then restarts. The TPS2500 power switch cycles on/off until the
overload is removed. The boost converter is independent of the power-switch thermal sense and continues to
operate as long as the temperature of the boost converter remains less than 150°C and does not trigger the
boost-converter thermal sense.
FAULT Response
The FAULT open-drain output is asserted low during an overcurrent condition that causes VUSB to fall below
VTRIP (4.6 V typical) or causes the junction temperature to exceed the shutdown threshold (130°C). The TPS2500
asserts the FAULT signal until the fault condition is removed and the power switch resumes normal operation.
The FAULT signal is independent of the boost converter. The FAULT signal uses an internal delay deglitch circuit
(8-ms typical) to delay asserting the FAULT signal during an overcurrent condition. The power switch must
remain in an overcurrent condition for the entire deglitch period or the deglitch timer is restarted. This ensures
that FAULT is not accidentally asserted due to normal operation such as starting into a heavy capacitive load.
The deglitch circuitry delays entering and leaving fault conditions. Overtemperature conditions are not deglitched
and assert the FAULT signal immediately.
Power Switch Undervoltage Lockout
The undervoltage lockout (UVLO) circuit disables the TPS2500 power switch until the input voltage on AUX
reaches the power switch UVLO turn-on threshold of 4.3 V (typical). Built-in hysteresis prevents unwanted on/off
cycling due to input-voltage drop from large current surges.
Power Switch Enable
The logic enable controls the power switch, bias for the charge pump, driver, and other circuits to reduce the
supply current of the power switch. The power-switch supply current is reduced to less than 4 mA (typical) when
a logic-low input is present on ENUSB. A logic-high input on ENUSB enables the driver, control circuits, and
power switch. The enable input is compatible with both TTL and CMOS logic levels.
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Programming the Current-Limit Threshold Resistor RILIM
The overcurrent threshold is user programmable via an external resistor. The TPS2500 uses an internal
regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is proportional to the
current sourced out of ILIM. The recommended 1% resistor range for RILIM is 16.1 kΩ ≤ RILIM ≤ 200 kΩ to ensure
stability of the internal regulation loop. Many applications require that the minimum current limit is above a certain
current level or that the maximum current limit is below a certain current level, so it is important to consider the
tolerance of the overcurrent threshold when selecting a value for RILIM. The following equations and Figure 13
can be used to calculate the resulting overcurrent threshold for a given external resistor value ®ILIM). Figure 13
includes current-limit tolerance due to variations caused by temperature and process. However, the equations do
not account for tolerance due to external resistor variation, so it is important to account for this tolerance when
selecting RILIM. The traces routing the RILIM resistor to the TPS2500 should be as short as possible to reduce
parasitic effects on the current-limit accuracy.
RILIM can be selected to provide a current-limit threshold that occurs 1) above a minimum load current or 2)
below a maximum load current.
To design above a minimum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(min) curve and choose a value of RILIM below this value. Programming the current limit above a
minimum threshold is important to ensure start up into full load or heavy capacitive loads. The resulting maximum
current-limit threshold is the intersection of the selected value of RILIM and the IOS(max) curve.
To design below a maximum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(max) curve and choose a value of RILIM above this value. Programming the current limit below a
maximum threshold is important to avoid current-limiting upstream power supplies, causing the input voltage bus
to droop. The resulting minimum current-limit threshold is the intersection of the selected value of RILIM and the
IOS(min) curve.
Current-limit threshold equations (IOS):
27,570 V
IOS(max) (mA) =
RILIM0.93 kW
IOS(typ) (mA) =
IOS(min) (mA) =
16
28,235 V
RILIM0.998 kW
32,114 V
RILIM1.114 kW
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1800
I(AUX) = 0 A
VIN = 3.3 V
I(LIMIT) − USB Current Limit − mA
1600
1400
1200
IOS(max)
1000
800
IOS(typ)
600
400
IOS(min)
200
0
20
30
40
50
60
70
80
90
R(ILIM) − Current-Limiting Resistance − kΩ
100
G009
Figure 13. USB Current-Limit Threshold vs RILIM Over Temperature and Process, VIN = 3.3 V, IAUX = 0 A
In addition to current-limit shifts due to process and temperature, the operating conditions of the boost converter
also affect the current-limit threshold of the USB switch. Figure 13 accounts for process and temperature shifts at
VIN = 3.3 V and IAUX = 0 A. The following figures show current-limit shift trends over VIN and IAUX (where IAUX is
the auxiliary 5-V load current provided to any non-USB loads). These curves can be used to calculate the USB
current-limit threshold shift for a given application where the input voltage VIN range and auxiliary current IAUX
vary.
775
1450
RL = 40 kΩ
TJ = 25°C
VIN = 3.3 V
1425
VIN = 2.4 V
I(LIMIT) − USB Current Limit − mA
I(LIMIT) − USB Current Limit − mA
750
1400
1375
VIN = 4.75 V
1350
1325
1300
VIN = 3.3 V
700
VIN = 5.2 V
675
650
VIN = 5.2 V
1275
725
RL = 20 kΩ
TJ = 25°C
VIN = 4.75 V
1250
625
0
100
200
300
400
I(AUX) − Auxiliary Current − mA
500
0
100
G010
Figure 14. USB Current-Limit Threshold vs IAUX,
RILIM = 20 kΩ, TA = 25 °C
200
300
400
I(AUX) − Auxiliary Current − mA
500
G011
Figure 15. USB Current-Limit Threshold vs IAUX,
RILIM = 40 kΩ, TA = 25 °C
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325
1450
RL = 100 kΩ
TJ = 25°C
1425
RL = 20 kΩ
TJ = 25°C
I(LIMIT) − USB Current Limit − mA
I(LIMIT) − USB Current Limit − mA
300
VIN = 2.4 V
275
250
VIN = 3.3 V
VIN = 4.75 V
225
1400
I(AUX) = 0 mA
I(AUX) = 200 mA
1375
1350
I(AUX) = 500 mA
1325
I(AUX) = 400 mA
1300
200
175
0
200
400
600
800
I(AUX) − Auxiliary Current − mA
1250
3.25
1000
G012
4.25
4.75
5.25
G013
Figure 17. USB Current-Limit Threshold vs VIN,
RILIM = 20 kΩ, TA = 25 °C
750
325
RL = 40 kΩ
TJ = 25°C
I(AUX) = 500 mA
I(AUX) = 600 mA
I(AUX) = 0 mA
700
I(AUX) = 200 mA
675
I(AUX) = 300 mA
650
I(AUX) = 300 mA
275
250
I(AUX) = 400 mA
I(AUX) = 0 mA
I(AUX) = 800 mA
225
I(AUX) = 900 mA
200
3.25
3.75
I(AUX) = 700 mA
RL = 100 kΩ
TJ = 25°C
I(AUX) = 400 mA
2.75
I(AUX) = 200 mA
I(AUX) = 500 mA
300
725
I(LIMIT) − USB Current Limit − mA
I(LIMIT) − USB Current Limit − mA
3.75
VIN − Input Voltage − V
Figure 16. USB Current-Limit Threshold vs IAUX,
RILIM = 100 kΩ, TA = 25 °C
625
2.25
I(AUX) = 300 mA
1275
VIN = 5.2 V
4.25
VIN − Input Voltage − V
4.75
5.25
175
2.25
2.75
3.25
3.75
4.25
VIN − Input Voltage − V
G014
Figure 18. USB Current-Limit Threshold vs VIN,
RILIM = 40 kΩ, TA = 25 °C
I(AUX) = 1000 mA
4.75
5.25
G015
Figure 19. USB Current-Limit Threshold vs VIN,
RILIM = 100 kΩ, TA = 25 °C
Accounting for Resistor Tolerance in the USB Switch Current-Limit Accuracy
The previous sections described the selection of RILIM, given certain application requirements and the importance
of understanding the current-limit threshold tolerance. The analysis focused only on the TPS2500 performance
and assumed an exact resistor value. However, resistors sold in quantity are not exact and are bounded by an
upper and lower tolerance centered around a nominal resistance. The additional RILIM resistance tolerance
directly affects the current-limit threshold accuracy at a system level. Table 3 shows a process that accounts for
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worst-case resistor tolerance assuming 1% resistor values. Step 1 follows the selection process outlined in the
application examples above. Step 2 determines the upper and lower resistance bounds of the selected resistor.
Step 3 uses the upper and lower resistor bounds in the IOS equations to calculate the threshold limits. It is
important to use tighter tolerance resistors, e.g. 0.5% or 0.1%, when precision current limiting is desired. Also, it
is important to note that this table assumes VIN = 3.3 V and IAUX = 0 A, so Figure 14 through Figure 19 should be
consulted to approximate how IOS shifts with VIN and IAUX. See the Programming the Current-Limit Threshold
Resistor section for additional details.
Table 3. Common RILIM Resistor Selections, VIN = 3.3 V, IAUX = 0 A
Desired Nominal
Current Limit (mA)
Ideal Resistor
(kΩ)
Closest 1%
Resistor (kΩ)
300
94.98
400
71.19
500
600
Resistor Tolerance
Actual Limits
1% low (kΩ)
1% high
(kΩ)
IOS(min)
(mA)
IOS(nom)
(mA)
IOS(max)
(mA)
95.30
94.35
96.25
198.2
299.0
401.7
71.50
70.79
72.22
273.0
398.3
524.8
56.93
57.60
57.02
58.18
347.4
494.2
641.7
47.42
47.50
47.03
47.98
430.6
599.0
767.7
700
40.64
40.20
39.80
40.60
518.5
707.6
896.5
800
35.55
35.70
35.34
36.06
591.8
796.6
1001.2
900
31.59
31.60
31.28
31.92
678.0
899.7
1121.5
1000
28.42
28.70
28.41
28.99
754.7
990.4
1226.5
1100
25.84
26.10
25.84
26.36
839.0
1088.9
1339.7
1200
23.68
23.70
23.46
23.94
934.1
1199.0
1465.5
1300
21.85
22.10
21.88
22.32
1009.8
1285.5
1563.9
1400
20.29
20.50
20.30
20.71
1098.0
1385.7
1677.1
Thermal Sense
The TPS2500 self-protects using two independent thermal sensing circuits that monitor the operating
temperatures of the boost converter and power switch independently and disable operation if the temperature
exceeds recommended operating conditions. The boost converter and power switch each have an ambient
thermal sensor that disables operation if the measured junction temperature in that part of the circuit exceeds
150°C. The boost converter continues to operate even if the power switch is disabled due to an overtemperature
condition.
Component Recommendations
The main functions of the TPS2500 are integrated and meet recommended operating conditions with a wide
range of external components. The following sections give guidelines and trade-offs for external component
selection. The recommended values given are conservative and intended over the full range of recommended
operating conditions.
Boost Inductor
Connect the boost inductor from IN to SW. The inductance controls the ripple current through the inductor. A
2.2-mH inductor is recommended, and the minimum and maximum inductor values are constrained by the
integrated features of the TPS2500. The minimum inductance is limited by the peak inductor-current value. The
ripple current in the inductor is inversely proportional to the inductance value, so the output voltage may fall out
of regulation if the peak inductor current exceeds the cycle-by-cycle current-limit comparator (3 A minimum).
Using a nominal 2.2-mH inductor allows full recommended current operation even if the inductance is 20% low
(1.76 mH) due to component variation. The maximum inductance value is limited by the internal compensation of
the boost-converter control loop. A maximum 4.7-mH (typical) inductor value is recommended to maintain
adequate phase margin over the full range of recommended operating conditions.
The following chart shows the efficiency vs AUX current of two different inductors at VIN = 3.3 V to demonstrate
how efficiency is impacted by different inductors.
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Figure 20. Efficiency vs AUX Current
IN Capacitance
Connect the input capacitance from IN to the reference ground plane. (See the Layout Recommendations
section for connecting PGND and GND to the ground plane.) Input capacitance reduces the ac voltage ripple on
the input rail by providing a low-impedance path for the switching current of the boost converter. The TPS2500
does not have a minimum or maximum input capacitance requirement for operation, but a 10-mF, X7R or X5R
ceramic capacitor is recommended for most applications for reasonable input-voltage ripple performance. There
are several scenarios where it is recommended to use additional input capacitance:
•
•
•
The output impedance of the upstream power supply is high, or the power supply is located far from the
TPS2500.
The TPS2500 is tested in a lab environment with long, inductive cables connected to the input, and transient
voltage spikes could exceed the absolute maximum voltage rating of the device.
The device is operating in Eco-mode control scheme near VIN = 1.8 V, where insufficient input capacitance
may cause the input ripple voltage to fall below the minimum 1.75-V (typical) UVLO circuit, causing device
turnoff.
Additionally, it is good engineering practice to use an additional 0.1-mF ceramic decoupling capacitor close to the
IC to prevent unwanted high-frequency noise from coupling into the device.
AUX Capacitance
Connect the boost-converter output capacitance from AUX to the reference ground plane. The AUX capacitance
controls the ripple voltage on the AUX rail and provides a low-impedance path for the switching and
transient-load currents of the boost converter. It also sets the location of the output pole in the control loop of the
boost converter. There are limitations to the minimum and maximum capacitance on AUX. The recommended
minimum capacitance on AUX is a 22-mF, X5R or X7R ceramic capacitor. A 10-V rated ceramic capacitor is
recommended to minimize the capacitance derating loss due to dc bias applied to the capacitor. The low ESR of
the ceramic capacitor minimizes ripple voltage and power dissipation from the large, pulsating currents of the
boost converter and provides adequate phase margin across all recommended operating conditions.
In some applications, it is desirable to add additional AUX capacitance. Additional AUX capacitance reduces
transient undershoot/overshoot voltages due to load steps and reduces AUX ripple in the Eco-mode control
scheme. Adding AUX capacitance changes the control loop, resulting in reduced phase margin, so it is
recommended that no more than 220 mF of additional capacitance be added in parallel to the 22-mF ceramic
capacitor. The combined output capacitance on AUX and USB should not exceed 500 mF.
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USB Capacitance
Connect the USB capacitance from USB to the reference ground plane. The USB capacitance is on the output of
the power switch and provides energy for transient load steps. The TPS2500 does not require any USB
capacitance for operation. Additional capacitance can be added on USB, but it is recommended to not exceed
220 mF to maintain adequate phase margin for the boost converter control loop. The combined output
capacitance on AUX and USB should not exceed 500 mF. USB applications require a minimum of 120 mF on
downstream-facing ports.
ILIM and FAULT Resistors
Connect the ILIM resistor from ILIM to the reference ground plane. The ILIM resistor programs the current-limit
threshold of the USB power switch (see the Programming the Current-Limit Threshold Resistor section). The
ILIM pin is the output of an internal linear regulator that provides a fixed 400-mV output. The recommended
nominal resistor value using 1% resistors on ILIM is 16.1 kΩ ≤ RILIM ≤ 200 kΩ. This range should be adjusted
accordingly if 1% resistors are not used. Do not overdrive ILIM with an external voltage or connect directly to
GND. Connect the ILIM resistor as close to the TPS2500 as possible to minimize the effects of parasitics on
device operation. Do not add external capacitance on the ILIM pin. The ILIM pin should not be left floating.
Connect the FAULT resistor from the FAULT pin to an external voltage source such as VAUX or VIN. The FAULT
pin is an open-drain output capable of sinking a maximum current of 10 mA continuously. The FAULT resistor
should be sized large enough to limit current to under 10 mA continuously. Do not tie FAULT directly to an
external voltage source. The maximum recommended voltage on FAULT is 6.5 V. The FAULT pin can be left
floating if not used.
Power Dissipation
Power dissipation is an important consideration in any power device with integrated MOSFETs. Although there
are internal thermal sensors that disable the device in the event of an overtemperature condition, it is still good
design practice to calculate the maximum junction temperature and to maintain the maximum junction
temperature under the recommended maximum of 125 °C. There are many ways to approximate the junction
temperature of the device. One method is to calculate the junction temperature rise by multiplying the power
dissipation of the device by the thermal resistance of the device package. The absolute junction temperature is
approximated by the addition of the ambient temperature plus the calculated junction temperature rise: TJ = TA +
(PDISS × qJA) ≤ 125°C
where TA and TJ are in °C, qJA is in °C/W, and PDISS is in W.
The maximum ambient temperature is often an application-specific requirement, such as 85°C maximum. The
thermal resistance is mainly a function of the device package but is impacted by system-level considerations
such as layout, heatsinking from the surrounding copper pours, the number of board layers, copper thickness,
airflow, and surrounding power-dissipating devices (e.g., the power inductor). External equipment such as a
thermal camera can help assess the overall thermal performance of a design. The thermal resistance value of
41.6 °C/W from the Dissipation Ratings table can be used as an initial estimate. The power dissipation of the
device is the sum of the power dissipation in the boost converter plus the power dissipation in the USB power
æ1 ö
PDISS = VAUX ´ (IAUX + IUSB ) ç - 1÷ + IUSB2 ´ rUSB
èh ø
switch. This can be approximated by:
where PDISS is in W, VAUX is in V, IAUX and IUSB are in A, h is the efficiency of the boost converter, and rUSB is
in Ω. IAUX is the additional current powering auxiliary loads and does not include any current powering the USB
load. Efficiency can be approximated from the efficiency graphs in the Application Curves section. This approach
may be slightly pessimistic because it does not separate any power losses in the inductor from overall converter
efficiency.
Layout Recommendations
Layout is an important design step due to the high switching frequency of the boost converter. Careful attention
must be applied to the PCB layout to ensure proper function of the device and to obtain the specified
performance. Potential issues resulting from poor layout techniques include wider line and load regulation
tolerances, EMI noise issues, stability problems, and USB current-limit shifts. It is critical to provide a
low-impedance ground path that minimizes parasitic inductance. Wide and short traces should be used in the
high-current paths, and components should be placed as close to the device as possible.
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Grounding is an important part of the layout. The device has a PGND and a GND pin. The GND pin is the quiet
analog ground of the device and should have its own separate ground pour; connect the quiet signals to GND
including the RILIM resistor and any input decoupling capacitors to the GND pour. It is important that the RILIM
resistor be tied to a quiet ground to avoid unwanted shifts in the current-limit threshold. The PGND pin is the
high-current power-stage ground; the ground pours of the output (AUX) and bulk input capacitors should be tied
to PGND. PGND and GND should to be tied together in one location at the IC thermal pad, creating a star-point
ground.
The output filter of the boost converter is also critical for layout. The inductor and AUX capacitors should be
placed to minimize the area of current loop through AUX–PGND–SW.
The layout for the TPS2500EVM evaluation board (HPA337) is shown in Figure 21 and should be followed as
closely as possible for best performance. The key components are inside the white silkscreen box.
Figure 21. Recommended Layout, TPS2500EVM (HPA337) Evaluation Board
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APPLICATION INFORMATION
Step-by-Step Design Procedure
The following design procedure provides an example for selecting component values for the TPS2500.
The following design parameters are needed as inputs to the design process.
• Input voltage range
• Output voltage on AUX
• Input ripple voltage
• Output ripple voltage on AUX
• Output current rating of AUX rail
• Output current rating of USB rail
• Nominal efficiency target
• Operating frequency
A power inductor, input and output filter capacitors, and current-limit threshold resistor are the only external
components required to complete the TPS2500 boost-converter design. The input ripple voltage, AUX ripple
voltage, and total output current affect the selection of these components.
This design example assumes the following input specifications.
PARAMETER
Input voltage range (VIN)
AUX voltage (VAUX)
EXAMPLE VALUE
2.7 V to 4.2 V
5.1 V (internally fixed)
Input ripple voltage (ΔVIN)
15 mV
AUX ripple voltage (ΔVAUX)
50 mV
AUX current (IAUX )
0.5 A
USB current (IUSB )
0.5 A
Total current (ITOTAL = IAUX + IUSB)
1A
Efficiency target, nominal
90%
Switching frequency (f)
1 MHz
+
+
S001
Figure 22. Reference Schematic
Switching Frequency
The switching frequency of the TPS2500 is internally fixed at 1 MHz.
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AUX Voltage
The AUX voltage of the TPS2500 is internally fixed at 5.1 V.
Determine Maximum Total Current (IAUX + IUSB)
Using Figure 12, the maximum total current at VIN = 2.7 V is 1 A using the conservative line. The design
requirements are met for this application.
Power Inductor
The inductor ripple current, Δi, should be at least 20% of the average inductor current to avoid erratic operation
of the peak-current-mode PWM controller. Assume an inductor ripple current, Δi, which is 30% of the average
inductor current and a power-converter efficiency, h, of 90%. Using the minimum input voltage, the average
inductor current at VIN = 2.7 V is:
V
´I
5.1 V ´ 1 A
IIN = AUX TOTAL =
= 2.1 A
VIN ´ h
2.7 V ´ 0.9
IL
Di
IL_pk
IIN
Time
Figure 23. Waveform of Current in Boost Inductor
The corresponding inductor ripple current is:
Di = 0.3 ´ IIN = 0.3 ´ 2.1 A = 630 mA
Verify that the peak inductor current is less than the 3-A peak switch current:
Di
= 2.42 A < 3 A
IL_pk = IIN +
2
The following equation estimates the duty cycle of the low-side PWM MOSFET:
D=
é VAUX - VIN + IIN ´ (RSYNC + RL )ù
t on
=ê
ú
t on + t off êë VAUX + IIN ´ (RSYNC - RPWM ) ûú
é 5.1 V - 2.7 V + 2.1 A ´ (0.1.Ω + 0.07.Ω )ù
=ê
ú = 0.54
5.1 V + 2.1 A ´ (0.1.Ω - 0.1.Ω )
êë
úû
where RPWM is the low-side control MOSFET on-resistance, RSYNC is the high-side synchronous MOSFET
on-resistance, and RL is an estimate of the inductor dc resistance.
The following equation calculates the recommended inductance for this design.
V ´D
2.7 V ´ 0.54
L = IN
=
= 2.31.μH
f ´ Di
1´ 106 Hz ´ 0.63 A
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The peak inductor current is:
Di
= 2.42 A
IL_pk = IIN +
2
The rms inductor current is:
2
æ Di ö
IL_RMS = IIN2 + ç
÷ =
è 2× 3 ø
2
æ 0.63 A ö
(2.1 A )2 + ç
÷ = 2.11 A
è 2× 3 ø
Select a Coilcraft LPS4018-222ML inductor. This 2.2-mH inductor has a saturation current rating of 2.7 A and an
rms current rating of 2.3 A. See the Component Recommendations section for specific additional information.
Output AUX Capacitor Selection
The AUX output capacitor, CAUX, discharges during the PWM MOSFET on-time, resulting in an output ripple
voltage of ΔVAUX. ΔVAUX is largest at maximum load current.
D ´ ITOTAL
CAUX =
f ´ DVAUX
Co_min =
0.54 ´ 1 A
1´ 106 Hz ´ 50 mV
= 10.8.μF
Ceramic capacitors exhibit a dc bias effect, whereby the capacitance falls with increasing bias voltage. The effect
is worse for capacitors in smaller case sizes and lower voltage ratings. X5R and X7R capacitors exhibit less dc
bias effect than Y5V and Z5U capacitors.
Select a TDK C3225X5R1A226M 22-mF, 10-V X5R ceramic capacitor to allow for a 50% drop in capacitance due
to the dc bias effect. See the Component Recommendations section for specific additional information.
Output USB Capacitor Selection
The USB output capacitor provides energy during a load step on the USB output. The TPS2500 does not require
a USB output capacitor, but many USB applications require that downstream-facing ports be bypassed with a
minimum of 120-mF, low-ESR capacitance.
Select a Panasonic EEVFK1A151P 150-mF, 10-V capacitor.
Input Capacitor Selection
The ripple current through the input filter capacitor is equal to the ripple current through the inductor. If the ESL
and ESR of the input filter capacitor are ignored, then the required input filter capacitance is:
Di
630 mA
=
= 5.25.μF
CIN =
8 ´ f ´ DVIN 8 ´ 1´ 106 Hz ´ 15 mV
Select a TDK C2012X5R1A106K 10-mF, 10-V, X5R, size 805 ceramic capacitor. The capacitance drops 20% at
3.3-V bias, resulting in an effective capacitance of 8 mF.
An additional 0.1-mF ceramic capacitor should be placed locally from IN to GND to prevent noise from coupling
into the device if the input capacitor cannot be located physically near to the device.
In applications where long, inductive cables connect the input power supply to the device, additional bulk input
capacitance may be necessary to minimize voltage overshoot. See the Component Recommendations section
for specific additional information.
Current-Limit Threshold Resistor RILIM
The current-limit threshold IOS of the power switch is externally adjustable by selecting the RILIM resistor. To
eliminate the possibility of false tripping, RILIM should be selected so that the minimum tolerance of the
current-limit threshold is greater than the maximum specified USB load, IUSB. For design margin, an additional
10% (50 mA) buffer is added above the maximum continuous load current and minimum current-limit threshold,
which sets the minimum desired current-limit threshold at 550 mA.
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It is also important to account for IOS shifts due to variation in VIN and IAUX, so by referencing the curves in the
Programming the Current-Limit Threshold Resistor section (Figure 19, specifically) it can be seen that IOS will
shift down by ~50 mA from the VIN = 3.3 V, IAUX = 0 A reference point at our maximum operating conditions of
VIN = 4.2 V, IAUX = 500 mA. Select RILIM so that the minimum current-limit threshold equals 600 mA to ensure a
minimum IUSB current-limit threshold of 550 mA.
1
RILIM
1
æ 32,114 ö 1.114 æ 32,114 ö 1.114
=ç
=ç
= 35.62 kW
÷
÷
è 600 mA ø
è IOSmin ø
Choose the next-smaller 1% resistor, which is 34.8 kΩ.
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ADDITIONAL DESIGN EXAMPLE
Specific Application Examples
The Table 4 outlines several specific applications and component recommendations for the given electrical
specifications.
Table 4. Component Recommendations
Application Example
Electrical Specifications
Description
# of
USB
Ports
Single-cell
lithium ion
battery or
3.3-V bus
1
100
2.7
4.2
100
Single-cell
lithium ion
battery or
3.3-V bus
2
0
2.7
4.2
Two-cell NiMH
battery
1
0
1.8
Single-cell
lithium ion
battery ORed
with 5-V bus
2
0
Single-cell
lithium ion
battery ORed
with 5-V bus
1
200
(1)
(2)
AUX
VIN min
Load
(V)
(mA)
VIN max
(V)
IAUX max IUSB max
(mA)
(mA)
Component Values
ITOTAL
(mA)
Inductor
(mH)
CIN
(mF) (1)
CAUX
(mF) (1)
CUSB
(mF) (2)
RILIM (kΩ)
550
650
3.3
10
22
150
30.9
0
1100
1100
2.2
10
22
150
18.2
2.4
0
550
550
2.2
10
22
150
35.7
2.7
5.25
0
1100
1100
2.2
10
22
150
18.2
2.7
5.25
200
550
750
3.3
10
22
150
26.1
Use low-ESR, X5R or X7R ceramic capacitors.
Not required for operation, only required to meet USB 2.0 standard
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APPLICATION CURVES
28
Figure 24. Efficiency vs IAUX, TPS2500
(Eco-mode Control Scheme)
Figure 25. Efficiency vs IAUX, TPS2501
(Forced PWM Mode)
Figure 26. Load Regulation, TPS2500
(Eco-mode Control Scheme)
Figure 27. Load Regulation, TPS2501
(Forced PWM Mode)
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5.25
L = DR74-2R2
TJ = 25°C
USB Switch Disabled
V(AUX) − Auxiliary Voltage − V
5.20
5.15
I(AUX) = 0.25 A
5.10
I(AUX) = 0.5 A
5.05
I(AUX) = 0.75 A
I(AUX) = 0 A
I(AUX) = 1 A
5.00
I(AUX) = 1.25 A
I(AUX) = 1.5 A
4.95
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VIN − Input Voltage − V
G021
Figure 28. Line Regulation, TPS2500
(Eco-mode Control Scheme)
Figure 29. VAUX Ripple, VIN = 3.3 V, IAUX = 1 A
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Figure 30. VAUX Ripple, VIN = 4.75 V, IAUX = 1 A
Figure 31. Load Transient, VIN = 3.3 V, IAUX = 0.25 A to 1 A
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Figure 32. Load Transient, VIN = 3.3 V, IAUX = 1 A to 0.25 A
Figure 33. Start-Up, VIN = 3.3 V, IAUX = 0.5 A, USB Switch Disabled
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Figure 34. Start-Up, VIN = 3.3 V, IAUX = 0.5 A, USB Switch Enabled
Figure 35. VIN = 3.3 V, Short Applied to VUSB
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Figure 36. VIN = 3.3 V, USB Switch Thermal Cycle Due to Short on VUSB
Figure 37. VIN = 3.3 V, Short Removed From VUSB
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REVISION HISTORY
Changes from Original (October 2008) to Revision A
•
Page
Changed From: Advanced Information To: Production Data ................................................................................................ 1
Changes from Revision A (August 2009) to Revision B
Page
•
Added SW note to absolute maximum ratings table ............................................................................................................. 2
•
Changed from diabled to disabled ...................................................................................................................................... 12
•
Changed Auxiliary Current - mA to Auxiliary Current - A in Figures 20, 24, 25, 26, 27 ..................................................... 19
Changes from Revision B (April 2010) to Revision C
Page
•
Deleted Feature Minimal External Components Required ................................................................................................... 1
•
Added Feature UL Listed - File No. E169910 ...................................................................................................................... 1
34
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PACKAGE OPTION ADDENDUM
www.ti.com
26-Feb-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS2500DRCR
ACTIVE
VSON
DRC
10
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
(CHO, CHOU)
TPS2500DRCT
ACTIVE
VSON
DRC
10
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
(CHO, CHOU)
TPS2501DRCR
ACTIVE
VSON
DRC
10
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
OBA
TPS2501DRCT
ACTIVE
VSON
DRC
10
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
OBA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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