TPS2555DRCR

TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com Precision Adjustable Current-Limited, Power-Distribution Switches Check for Samples: TPS2554, TPS2555 FEATURES APPLICATIONS • • • • • • • 1 2 • • • • • • Meets USB Current-Limiting Requirements Adjustable Current Limit, 500 mA to 2.5 A (typ) Two Independently-Settable, Current-Limit Thresholds Fast Overcurrent Response - 1.5 μs (typ) 73-mΩ High-Side MOSFET 3.8-μA Maximum Standby Supply Current PowerPAD™ Thermal Management Automatic Output Discharge when Disabled Both High-Enable (TPS2554) and Low-Enable (TPS2555) Versions Available USB Ports/Hubs Digital TV Set-Top Boxes VOIP Phones DESCRIPTION The TPS2554/55 power-distribution switches are intended for applications where precision current limiting is required or heavy capacitive loads and short circuits are encountered. These devices offer a programmable current-limit threshold between 500 mA and 2.5 A (typ) via an external resistor. TPS2554/55 devices limit the output current to a safe level by switching into a constant-current mode when the output load exceeds the current-limit threshold. The FAULT logic output asserts low during overcurrent and over-temperature conditions. TPS2554/55 DRC Package and Typical Application Diagram TPS2554/TPS2555 DRC PACKAGE (TOP VIEW) GND IN IN ILIM_SEL 1 2 3 4 EN/EN 5 PAD 10 9 8 7 6 TPS2554/55 4.5 V to 5.5 V FAULT OUT OUT ILIM0 ILIM1 2/3 IN R FAULT VBUS 120 mF 100 nF FAULT Signal 10 FAULT Power Switch Enable OUT 8/9 5 EN/EN Power PAD ILIM_SEL 4 ILIM0 7 ILIM1 6 Current Limit Select 2x R ILIMx GND 1 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) (2) VALUE Voltage range on IN, OUT, EN or EN, ILIM0, ILIM1, ILIM_SEL, FAULT Continuous output current Internally limited Continuous total power dissipation Internally limited Continuous FAULT sink current 25 ILIM source current ESD 2 kV CDM 500 V Maximum junction temperature Tstg Storage temperature range (2) (3) mA Internally limited HBM TJ (1) V –7 to 7 Voltage range from IN to OUT IOUT UNIT –0.3 to 7 –40 to OTSD2 (3) °C -65 to 150 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Voltages are referenced to GND unless otherwise noted. Ambient over-temperature shutdown threshold. RECOMMENDED OPERATING CONDITIONS MIN MAX 4.5 5.5 0 5.5 UNIT VIN Input voltage, IN VEN , VEN , ILIM_SEL Logic-level inputs IOUT Continuous output current, OUT 0 2.5 A TJ Operating virtual junction temperature –40 125 °C RILIM Recommended resistor limit range 16.9 750 kΩ 2 Submit Documentation Feedback V Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com THERMAL INFORMATION TPS2554/TPS2555 THERMAL METRIC (1) DRC UNITS 14 PINS Junction-to-ambient thermal resistance (2) θJA (3) 45.9 θJCtop Junction-to-case (top) thermal resistance θJB Junction-to-board thermal resistance (4) 21.4 ψJT Junction-to-top characterization parameter (5) 1.0 ψJB Junction-to-board characterization parameter (6) 21.6 θJCbot Junction-to-case (bottom) thermal resistance (7) 5.9 (1) (2) (3) (4) (5) (6) (7) 53.4 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 3 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com ELECTRICAL CHARACTERISTICS Conditions are -40°C ≤ TJ ≤ 125°C unless otherwise noted VEN (if TPS2554) = VIN = 5 V, VEN (if TPS2555) = 0 V, RFAULT = 10 kΩ, RILIM0 = 210 kΩ, RILIM1 = 20 kΩ, ILIM_SEL = 0 V unless otherwise noted. Positive currents are into pins. Typical values are at 25 °C. All voltages are with respect to GND unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX IOUT = 2 A, VILIM_SEL = Logic HI 73 120 IOUT = 100 mA, VILIM_SEL = Logic LO 73 120 -40 °C ≤ TA = TJ ≤ 85 °C, IOUT = 2 A, VILIM_SEL = Logic HI 73 105 TA = TJ = 25 °C, IOUT = 2 A, VILIM_SEL = Logic HI 73 84 1 1.5 UNIT Power Switch Static drain-source on-state resistance RDS(on) tr Rise time, output CL = 1 µF, RL = 100 Ω tf Fall time, output CL = 1 µF, RL = 100 Ω RDIS OUT discharge resistance IREV Reverse leakage current 0.2 400 VOUT = 5.5 V, VIN = VEN = 0 V or VOUT = VEN = 5.5 V, VIN = 0 V, TJ = 25 °C 0.5 mΩ ms 500 630 Ω 0 1 µA 1.1 1.65 Enable Input EN (TPS2554), Enable Input EN (TPS2555) VEN, VEN EN, EN pin threshold, falling VEN_HYS EN, EN Hysteresis 0.9 IEN, IEN Input current VEN, VEN = 0 V or 5.5 V tON Turn-on time CL = 1 µF, RL = 100 Ω 3.4 5 tOFF Turn-off time CL = 1 µF, RL = 100 Ω 1.7 3 1.1 1.65 200 -0.5 V mV 0.5 µA ms Current Limit VILIM_SEL ILIM_SEL threshold, falling VILIM_HYS ILIM_SEL Hysteresis ILIM_SEL input current 0.9 200 VILIM_SEL = 0 V or 5.5 V VILIM_SEL = Logic LO ISHORT Maximum DC output current from IN to OUT VILIM_SEL = Logic HI tIOS Response time to short circuit -0.5 V mV 0.5 RILIM0 = 210 kΩ 185 230 RILIM0 = 100 kΩ 420 480 530 RILIM1 = 20 kΩ 2150 2430 2650 RILIM1 = 16.9 kΩ 2550 2840 3100 µA 265 mA µs VIN = 5.0 V 1.5 0.1 3.8 90 115 110 135 4.1 4.3 Supply Current ICCL Supply current, switch disabled VEN = 0 V, VEN = VIN; OUT grounded; -40 °C ≤ TJ ≤ 85 °C ICCH Supply current, operating VEN = 0 V, VEN = VIN VILIM_SEL = Logic HI µA Undervoltage Lockout VUVLO Low-level input voltage, IN VIN rising 3.9 Hysteresis, IN 100 V mV FAULT Output low voltage, FAULT IFAULT = 1 mA Off-state leakage VFAULT = 5.5 V FAULT deglitch FAULT assertion or negation due to overcurrent condition 5 8.5 100 mV 1 µA 12 ms Thermal Shutdown Thermal shutdown threshold 155 Thermal shutdown threshold in current-limit 135 Hysteresis 4 °C 10 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com Parameter Measurement Information OUT CL RL tr VOUT tf 90% 90% 10% 10% TEST CIRCUIT VEN 50% 50% VEN ton toff 50% 50% toff ton 90% 90% VOUT VOUT 10% 10% VOLTAGE WAVEFORMS Figure 1. Test Circuit and Voltage Waveforms VOUT IOS Increasing Load Current IOUT UDG-10118 tIOS IOUT IOS Figure 2. Response Time to Short-Circuit Waveform Figure 3. Output Voltage vs Output Current Behavior Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 5 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com DEVICE INFORMATION Pin Functions PIN DESCRIPTION TPS2554 EN 5 - I Enable input, logic high turns on power switch (TPS2554). EN - 5 I Enable input, logic low turns on power switch (TPS2555). GND 1 1 2, 3 2, 3 I Input voltage; connect a 100-nF, or greater, ceramic capacitor from IN to GND as close to the device as possible. 10 19 O Active-low, open-drain output, asserted during overcurrent or over-temperature conditions. 8, 9 8, 9 O Power-switch output 7 7 I External resistor used to set current-limit threshold when ILIM_SEL = LO 6 6 I External resistor used to set current-limit threshold when ILIM_SEL = HI 4 4 I Logic-level input that selects between ILIM0 and ILIM1 current-limit threshold setting – – IN FAULT OUT ILIM0 ILIM1 ILIM_SEL PowerPAD™ TPS2555 I/O NAME Ground connection; connect externally to PowerPAD™. Internally connected to GND; used to heat-sink the device to the circuit board traces. Connect PowerPAD™ to GND pin externally. TPS2554/TPS2555 Functional Block Diagram IN 2/3 8/9 OUT Current Sense Charge Pump EN 5 (TPS2555) RDIS 7 ILIM0 Driver (TPS2554) Current Limit 6 ILIM1 EN 5 4 ILIM_SEL 10 FAULT 8-ms Deglitch UVLO Thermal Sense 1 GND 6 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com TYPICAL CHARACTERISTICS In UVLO Rising vs Temperature Supply Current - Disabled vs Temperature 4.5 1 4.4 0.9 0.8 ICCL - IN Current - mA VUVLO - IN UVLO - V 4.3 4.2 4.1 4 3.9 0.7 0.6 0.5 0.4 0.3 3.8 0.2 3.7 0.1 3.6 0 -40 -20 0 20 40 60 80 100 120 140 -40 -20 0 TJ - Junction Temperature - °C 20 40 60 80 100 120 140 TJ - Junction Temperature - °C Figure 4. Figure 5. Supply Current vs Temperature Current Limit vs Current Limit Resistance 3000 120 TJ = 25°C 2500 ISHORT - Current Limit - mA ICCH - IN Current - mA 110 100 90 80 70 2000 1500 1000 500 60 0 -40 -20 0 20 40 60 80 100 TJ - Junction Temperature - °C 120 140 0 20 40 60 80 100 120 140 160 180 200 220 240 RILIM - Current Limit Resistance - kW Figure 6. Figure 7. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 7 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) Current Limit vs Temperature Power Switch On-Resistance vs Temperature 2500 100 ISHORT - Current Limit - mA 2000 RDS(on) - IN/OUT ON Resistance - mW 95 RILIM = 20 kW 1500 RILIM = 100 kW 1000 RILIM = 210 kW 500 90 85 80 75 70 65 60 55 0 50 -40 -20 0 20 40 60 80 100 120 140 -40 -20 TJ - Junction Temperature - °C 0 20 40 80 Figure 8. Figure 9. Turn-On Time, Turn-Off Time vs Temperature Fault Output Voltage vs Sink Current 120 140 9 10 TJ = 125°C 600 4 FAULT Low Voltage - mV Turn-On Time 3 2 Turn-Off Time 500 TJ = 25°C 400 300 200 1 100 TJ = -40°C 0 0 -40 -20 0 20 40 60 80 100 120 140 0 1 TJ - Junction Temperature - °C Figure 10. 8 100 700 5 TON/TOFF - Turn-ON/OFF Time - ms 60 TJ - Junction Temperature - °C 2 3 4 5 6 7 8 IFAULT - FAULT Sink Current - mA Figure 11. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) EN Threshold Falling vs Temperature Response to a Short Circuit (following assertion of enable) 2 7.0 1.8 6.0 3.0 Enable (TPS2554) 1.6 5.0 1.2 1 2.0 4.0 Input Current 3.0 Current (A) 1.4 Voltage (V) VEN - EN Falling Threshold - V 3.5 CIN= 100 nF; COUT = 150 µF; RILIM = 20 kΩ 0.8 1.0 2.0 0.6 Output Voltage 1.0 0.4 0.0 0.2 0 10 20 30 0 -40 -20 0 20 40 60 80 100 120 40 50 60 Time (ms) 70 80 90 0.0 100 140 TJ - Junction Temperature - °C Figure 12. Figure 13. Response to a Short Circuit (apply input voltage with output shorted) Response to a Short Circuit (apply input voltage with output shorted) 10.0 10.0 10.0 RILIM = 20 kΩ 8.0 8.0 6.0 6.0 6.0 4.0 4.0 Voltage (V) Input Voltage 6.0 8.0 Current (A) Voltage (V) 8.0 RILIM = 20 kΩ 4.0 4.0 Input Voltage Input Current Output Current 2.0 2.0 0.0 0 10 20 30 40 50 60 Time (ms) Current (A) 10.0 70 80 90 0.0 100 2.0 2.0 0.0 0.0 0.5 1.0 Figure 14. 1.5 2.0 2.5 3.0 Time (ms) 3.5 4.0 4.5 0.0 5.0 Figure 15. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 9 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) Response to a Short Circuit (from a no-load condition) 20.0 Response to a Short Circuit (from a no-load condition) VIN = 5 V; Source capacitance = 470 µF Al + 3x68 µF Ta; CIN= 100 nF; COUT = 150 µF; RILIM = 20 kΩ 10.0 16.0 20.0 VIN = 5 V; Source capacitance = 470 µF Al + 3x68 µF Ta; CIN= 100 nF; COUT = 150 µF; RILIM = 20 kΩ 15.0 14.0 Voltage (V) 0.0 Current (A) Voltage (V) Input Current 10.0 12.0 10.0 10.0 5.0 0.0 8.0 Input Voltage 6.0 −5.0 4.0 −10.0 Current (A) Input Current 5.0 15.0 Input Voltage −5.0 5.0 Output Voltage 2.0 −15.0 Output Voltage 0.0 0 5 10 15 20 25 30 Time (ms) 35 40 45 50 −10.0 0.0 0 2 4 Figure 16. 10 6 8 10 12 Time (µs) 14 16 18 20 −20.0 Figure 17. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com DETAILED DESCRIPTION Overview The TPS2554/55 is a current-limited, power-distribution switch using an internal N-channel MOSFET as a switch for applications where short circuits or heavy-capacitive loads will be encountered. This device allows the user to program two independent current-limit thresholds between 500 mA and 2.5 A (typ) via two external resistors. The ILIM_SEL pin allows the user to select one current limit or the other. This device incorporates an internal charge pump and the gate-drive circuitry necessary to drive the N-channel MOSFET. The charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The driver controls the gate voltage of the power switch. The TPS2554/55 family limits the output current to the programmed current-limit threshold ILIM0 or ILIM1 during an overcurrent or short-circuit event by reducing the charge-pump voltage driving the N-channel MOSFET and operating it in the linear range of operation. This necessarily results in a reduction in the output voltage at OUT. Exposure to an overload condition leads directly to heat dissipation in the internal MOSFET. The MOSFET is protected thermally such that it will shut off when it gets too hot. The TPS2554/55 will automatically restart following cooling of the device. Overcurrent Conditions The TPS2554/55 responds to overcurrent conditions by limiting the output current to the short-circuit current set by RILIM0 or RILIM1, whichever is selected at the ILIM_SEL pin. When an overcurrent condition is detected the device maintains a constant output current, and the output voltage reduces accordingly. Two possible overload conditions can occur. The first condition is when a short circuit or partial short circuit is present when the device is powered-up or enabled. The output voltage is held near zero potential with respect to ground and the TPS2554/55 ramps the output current to the selected output current, ILIM0 or ILIM1. The TPS2554/55 will limit the current to the selected limit until the overload condition is removed or heating of the internal MOSFET forces a shutdown. (Following thermal shutdown the TPS2554/55 cools and another start-up attempt occurs automatically.) The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is enabled and powered on. In response to the load transient the output current will typically overshoot the selected current limit during tIOS as the TPS2554/55 turns off the pass device. Then, the current-sense amplifier will recover and the output current will be maintained at the selected current limit. As in the previous case, the TPS2554/55 will maintain the current limit until the overload condition is removed or the device begins to thermal cycle. The TPS2554/55 thermal cycles if an overload condition is present long enough to activate thermal limiting in any of the above cases. The device turns off when the junction temperature exceeds 135°C (min) while in current limit. The device remains off until the junction temperature cools 20°C (typ) and then restarts. The TPS2554/55 cycles on/off until the overload is removed. Current-Limit Thresholds The TPS2554/5 has two independent current-limit thresholds that are each programmed externally with a resistor. The following equation programs the typical current-limit threshold: ISHORT = 48000 RILIMx where • • ISHORT = Current-limit threshold, mA RILIM = Resistance at ILIMx pin, kΩ (1) RILIMx corresponds to RILIM0 when ILIM_SEL is logic LO and to RILIM1 when ILIM_SEL is logic HI. The ILIM_SEL pin allows the system to digitally select between two current-limit thresholds, which is useful, for example, in end equipment that may require a lower setting when powered from batteries versus wall adapters. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 11 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com FAULT Response The FAULT open-drain output is asserted low during an overcurrent or over-temperature condition. The TPS2554/55 asserts the FAULT signal until the fault condition is removed and the device resumes normal operation. The TPS2554/55 is designed to eliminate false FAULT reporting by using an internal delay "deglitch" circuit for overcurrent conditions (9 ms typical) without the need for external circuitry. This ensures that FAULT is not accidentally asserted due to normal operation such as starting into a heavy capacitive load. The deglitch circuitry delays entering and leaving current-limit-induced fault conditions. The FAULT signal is not deglitched when the MOSFET is disabled due to an over-temperature condition, but it is deglitched after the device has cooled and begins to turn on. This unidirectional deglitch feature prevents FAULT oscillation during an over-temperature event. Undervoltage Lockout (UVLO) The Undervoltage Lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-on threshold (4.1 V, nominal). Built-in hysteresis prevents unwanted on/off cycling due to input-voltage droop during turn on. Enable (EN OR EN ) The logic enable controls the power switch and device supply current. The supply current is reduced to less than 3.8 μA when a logic low is present on EN (TPS2554) or when a logic high is present on EN (TPS2555). A logic high input on EN or a logic low input on EN enables the driver, control circuits, and power switch. The enable input is compatible with both TTL and CMOS logic levels. Output Discharge When the output is disabled through either the EN (TPS2554) or EN (TPS2555) pin or by an over-temperature shutdown the OUT pin is discharged internally through a MOSFET. Nominal MOSFET resistance (RDIS) is 500 Ω. Thermal Sense The TPS2554/55 self protects by using two independent thermal-sensing circuits that monitor the operating temperature of the power switch and will disable operation if the temperature exceeds recommended operating conditions. The TPS2554/55 device operates in constant-current mode during an overcurrent condition thereby increasing the voltage drop across the MOSFET power switch. The power dissipation in the package increases with the voltage drop across the power switch, thereby causing the junction temperature to rise during an overcurrent condition. The first thermal sensor turns off the power switch when the die temperature exceeds 135°C (min) and the part is in current limit. Hysteresis is built into the thermal sensor, and the switch turns on after the device has cooled approximately 20°C. The TPS2554/55 continues to cycle off and on until the fault is removed. The TPS2554/55 also has a second ambient thermal sensor. The ambient thermal sensor turns off the power switch when the die temperature exceeds 155°C (min) regardless of whether the power switch is in current limit and will turn on the power switch back on after the device has cooled approximately 20°C. The TPS2554/55 will continue to cycle off and on until the fault is removed. 12 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com APPLICATION INFORMATION Input and Output Capacitance Capacitance added to the input and output of the TPS2554/55 improves the performance of the device; the actual capacitance should be optimized for the particular application. For all applications, a 100 nF or greater ceramic bypass capacitor between IN and GND is recommended as close to the device as possible for local noise decoupling. This precaution reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the input to prevent voltage overshoot from exceeding the absolute-maximum voltage of the device during heavy transient conditions. This is especially important during bench testing when long, inductive cables are used to connect the evaluation board to the bench power supply. Output capacitance is not required for proper operation of the TPS2554/55, but placing a high-value electrolytic capacitor on the output pin is recommended when large transient currents are expected on the output. Programming the Current-Limit Threshold Two overcurrent thresholds are user-programmable via two external resistors. The recommended 1% resistor range for RILIMx is 16.9 kΩ ≤ RILIM ≤ 750 kΩ to ensure stability of the internal regulation loop. Best accuracy is obtained with RILIMx values less than 210 kΩ. Many applications require that the minimum current limit is above a certain current level or that the maximum current limit is below a certain current level, so it is important to consider the tolerance of the overcurrent threshold when selecting a value for RILIMx. The following equations approximate the resulting overcurrent threshold for a given external resistor value, RILIMx. Consult the Electrical Characteristics table for specific current-limit settings. Printed-circuit-board traces routing the RILIMx resistor to the TPS2554/55 should be as short as possible to reduce parasitic effects on the current-limit accuracy. The equations and the graph below can be used to estimate the minimum and maximum variation of the current-limit threshold for a predefined resistor value. This variation is an approximation only and does not take into account, for example, the resistor tolerance. For examples of more-precise variation of ISHORT refer to the current-limit section of the Electrical Characteristics table. ISHORT = • • 48000 RILIMx (2) ISHORT _ min 48000 = RILIMx1.037 (3) ISHORT _ max 48000 = RILIMx 0.962 (4) ISHORT = Current-limit threshold, mA RILIM = Resistance at ILIMx pin, kΩ Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 13 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com Current-Limit Threshold vs Current-Limit Resistance 3250 3000 2750 ISHORT - Current Limit - mA 2500 2250 2000 1750 1500 ISHORT_max 1250 1000 750 500 ISHORT_min 250 0 0 20 60 40 80 100 120 140 160 180 200 220 RILIM - Current Limit Resistance - kW Figure 18. Current-Limit Threshold vs Current-Limit Resistance 3250 1000 3000 900 2750 800 ISHORT - Current Limit - mA ISHORT - Current Limit - mA Current-Limit Threshold vs Current-Limit Resistance 2500 2250 2000 ISHORT_max 1750 1500 1250 ISHORT_min 1000 700 600 500 400 300 100 500 0 15 20 25 ISHORT_min 200 750 10 ISHORT_max 30 35 40 45 50 RILIM - Current Limit Resistance - kW 55 60 60 80 100 Figure 19. 14 120 140 160 180 200 220 RILIM - Current Limit Resistance - kW Figure 20. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com Current Limit Setpoint Example In the following example, choose the ILIM resistor to ensure that the TPS2554/55 does not trip off under worst-case conditions of ILIM and resistor tolerance (assume 1% initial-plus-temperature resistor tolerance). For this example IOSMIN = 2500 mA. IOSMIN = 48000 = 2500mA R1.037 ILIMx é 48000 ù RILIMx = ê ú ë IOSMIN û 1 1.037 (5) é 48000 ù =ê ú ë 2500mA û 1 1.037 = 17.28kΩ (6) Including resistor tolerance, target maximum: RILIMx = 17.28kΩ = 17.11kΩ 1.01 (7) Choose: RILIMx = 16.9kΩ (8) Layout Guidelines TPS2554/55 Placement: Place the TPS2554/55 near the USB output connector and 150-µF OUT pin filter capacitor. Connect the exposed PowerPad™ to the GND pin and to the system ground plane using a via array. IN Pin Bypass Capacitance: Place the 100-nF bypass capacitor near the IN and GND pins, and make the connections using a low-inductance trace. ILIM0 and ILIM1 Pin Connections: Current-limit, set-point accuracy can be compromised by stray current leakage from a higher voltage source to the ILIM0 or ILIM1 pins. Ensure that there is adequate spacing between IN pin copper/trace and ILIM0 pin trace to prevent contaminant buildup during the PCB assembly process. If a low-current-limit set point is required (RILIMx > 200 kΩ), use ILIM1 for this case as it is further away from the IN pin. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 15 TPS2554 TPS2555 SLVSAM0 – JUNE 2011 www.ti.com Power Dissipation and Junction Temperature The low on resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It is good design practice to estimate power dissipation and junction temperature. The below analysis gives an approximation for calculating junction temperature based on the power dissipation in the package. However, it is important to note that thermal analysis is strongly dependent on additional system-level factors. Such factors include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating power. Good thermal-design practice must include all system-level factors in addition to individual component analysis. Begin by determining the RDS(on) of the MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read RDS(on) from the typical characteristics graph. Using this value, the power dissipation can be calculated by: • PD = RDS(on) × IOUT 2 Where: • PD = Total power dissipation (W) • RDS(on) = Power switch on-resistance (Ω) • IOUT = Maximum current-limit threshold (A) This step calculates the total power dissipation of the MOSFET. Finally, calculate the junction temperature: • TJ = PD × θJA + TA Where: • TA = Ambient temperature (°C) • θJA = Thermal resistance (°C/W) • PD = Total power dissipation (W) Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat the calculation using a "refined" RDS(on) based on the calculated MOSFET temperature from the previous calculation as the new estimate. Two or three iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent on thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board layout. 16 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TPS2554 TPS2555 PACKAGE OPTION ADDENDUM www.ti.com 26-Feb-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS2554DRCR ACTIVE VSON DRC 10 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 2554 TPS2554DRCT ACTIVE VSON DRC 10 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 2554 TPS2555DRCR ACTIVE VSON DRC 10 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 2555 TPS2555DRCT ACTIVE VSON DRC 10 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 2555 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of