TPS2812PWR




 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 D Industry-Standard Driver Replacement D 25-ns Max Rise/Fall Times and 40-ns Max TPS2811, TPS2812, TPS2813 . PACKAGES (TOP VIEW) Propagation Delay − 1-nF Load, VCC = 14 V D 2-A Peak Output Current, VCC = 14 V D 5-µA Supply Current — Input High or Low D 4-V to 14-V Supply-Voltage Range; Internal D Regulator Extends Range to 40 V (TPS2811, TPS2812, TPS2813) −40°C to 125°C Ambient-Temperature Operating Range REG_IN 1IN GND 2IN TPS2814 8 2 7 3 6 4 5 REG_OUT 1OUT VCC 2OUT . . . D, P, AND PW PACKAGES (TOP VIEW) 1IN1 1IN2 2IN1 2IN2 description The TPS28xx series of dual high-speed MOSFET drivers are capable of delivering peak currents of 2 A into highly capacitive loads. This performance is achieved with a design that inherently minimizes shoot-through current and consumes an order of magnitude less supply current than competitive products. 1 . . D, P, AND PW TPS2815 The TPS2811, TPS2812, and TPS2813 drivers include a regulator to allow operation with supply inputs between 14 V and 40 V. The regulator output can power other circuitry, provided power dissipation does 1 8 2 7 3 6 4 5 GND 1OUT VCC 2OUT . . . D, P, AND PW PACKAGES (TOP VIEW) 1IN1 1IN2 2IN1 2IN2 1 8 2 7 3 6 4 5 GND 1OUT VCC 2OUT not exceed package limitations. When the regulator is not required, REG_IN and REG_OUT can be left disconnected or both can be connected to VCC or GND. The TPS2814 and the TPS2815 have 2-input gates that give the user greater flexibility in controlling the MOSFET. The TPS2814 has AND input gates with one inverting input. The TPS2815 has dual-input NAND gates. TPS281x series drivers, available in 8-pin PDIP, SOIC, and TSSOP packages operate over a ambient temperature range of −40°C to 125°C. AVAILABLE OPTIONS PACKAGED DEVICES TA −40°C to 125°C INTERNAL REGULATOR LOGIC FUNCTION SMALL OUTLINE (D) PLASTIC DIP (P) Yes Dual inverting drivers Dual noninverting drivers One inverting and one noninverting driver TPS2811D TPS2812D TPS2813D TPS2811P TPS2812P TPS2813P TPS2811PW TPS2812PW TPS2813PW Dual 2-input AND drivers, one inverting input on each driver Dual 2-input NAND drivers TPS2814D TPS2814P TPS2814PW No TPS2815D TPS2815P TPS2815PW TSSOP (PW) The D package is available taped and reeled. Add R suffix to device type (e.g., TPS2811DR). The PW package is only available left-end taped and reeled and is indicated by the R suffix on the device type (e.g., TPS2811PWR). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 
 
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 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 functional block diagram regulator diagram (TPS2811, TPS2812, TPS2813 only) REG_IN TPS2811 REG_IN 1IN 2IN GND 1 Regulator 2 8 6 7 4 5 3 REG_OUT VCC 1OUT 2OUT 7.5 Ω REG_OUT TPS2812 REG_IN 1IN 1 Regulator 8 6 2 7 2IN GND REG_OUT VCC 1OUT 4 5 3 2OUT input stage diagram VCC TPS2813 REG_IN 1IN 2IN GND 1 Regulator 2 7 1IN2 2IN1 2IN2 GND 5 3 1IN2 2IN1 2IN2 GND 2 6 1 7 2 VCC 1OUT 2OUT IN To Drive Stage VCC 1OUT 3 5 4 2OUT output stage diagram VCC 8 Predrive TPS2815 1IN1 REG_OUT 4 TPS2814 1IN1 8 6 1 2 3 4 6 7 5 VCC 1OUT OUT 2OUT 8 www.ti.com 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 TPS28xxY chip information This chip, when properly assembled, displays characteristics similar to those of the TPS28xx. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS (8) REG_IN (1) (2) (1) 1IN (8) 2IN (4) TPS2811Y TPS2812Y TPS2813Y (7) (6) (5) REG_OUT 1OUT VCC 2OUT (3) (7) GND (2) 1IN1 (1) (7) (2) 1IN2 2IN1 2IN2 (6) (3) TPS2814Y (5) (4) 1OUT VCC 2OUT (8) 57 (6) GND 1IN1 (1) (7) (2) 1IN2 (3) 2IN1 (5) 2IN2 (3) TPS2815Y (6) (5) (4) 1OUT VCC 2OUT (8) GND (4) CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM 47 TJmax OPERATING TEMPERATURE = 150°C TOLERANCES ARE ± 10%. ALL DIMENSIONS ARE IN MILS. www.ti.com 3 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 Terminal Functions TPS2811, TPS2812, TPS2813 TERMINAL NUMBERS TERMINAL NAME TPS2811 Dual Inverting Drivers TPS2812 Dual Noninverting Drivers TPS2813 Complimentary Drivers REG_IN 1 1 1 Regulator input 1IN 2 2 2 Input 1 GND 3 3 3 Ground 2IN 4 4 4 Input 2 2OUT 5 = 2IN 5 = 2IN 5 = 2IN VCC 1OUT 6 6 6 7 = 1IN 7 = 1IN 7 = 1IN 8 8 8 REG_OUT DESCRIPTION Output 2 Supply voltage Output 1 Regulator output TPS2814, TPS2815 TERMINAL NUMBERS TERMINAL NAME TPS2814 Dual AND Drivers with Single Inverting Input TPS2815 Dual NAND Drivers 1IN1 1 1 Noninverting input 1 of driver 1 1IN2 2 - Inverting input 2 of driver 1 1IN2 - 2 Noninverting input 2 of driver 1 2IN1 3 3 Noninverting input 1 of driver 2 2IN2 4 - Inverting input 2 of driver 2 2IN2 - 4 Noninverting input 2 of driver 2 2OUT 5 = 2IN1 • 2IN2 5 = 2IN1 • 2IN2 VCC 1OUT 6 6 7 = 1IN1 • 1IN2 7 = 1IN1 • 1IN2 Output 1 GND 8 8 Ground DESCRIPTION Output 2 Supply voltage DISSIPATION RATING TABLE 4 PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING P 1090 mW 8.74 mW/°C 697 mW 566 mW D 730 mW 5.84 mW/°C 467 mW 380 mW PW 520 mW 4.17 mW/°C 332 mW 270 mW www.ti.com 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 15 V Regulator input voltage range, REG_IN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC −0.3 V to 42 V Input voltage range, 1IN, 2IN, 1IN1, 1IN2, 1IN2, 2IN1, 2IN2, 2IN2 . . . . . . . . . . . . . . . . . −0.3 V to VCC +0.5 V Output voltage range, 1OUT, 2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 < V < VCC +0.5 V Continuous regulator output current, REG_OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA Continuous output current, 1OUT, 2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating ambient temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to device GND pin. recommended operating conditions MIN MAX Regulator input voltage range 8 40 V Supply voltage, VCC 4 14 V −0.3 V 0 VCC 20 mA −40 125 °C Input voltage, 1IN1, 1IN2, 1IN2, 2IN1, 2IN2, 2IN2, 1IN, 2IN Continuous regulator output current, REG_OUT Ambient temperature operating range UNIT TPS28xx electrical characteristics over recommended operating ambient temperature range, VCC = 10 V, REG_IN open for TPS2811/12/13, CL = 1 nF (unless otherwise noted) inputs PARAMETER TYP† MAX VCC = 5 V VCC = 10 V 3.3 4 V 5.8 9 V VCC = 14 V VCC = 5 V 8.3 13 V TEST CONDITIONS Positive-going input threshold voltage VCC = 10 V VCC = 14 V Negative-going input threshold voltage Input hysteresis VCC = 5 V Inputs = 0 V or VCC Input current MIN UNIT 1 1.6 V 1 4.2 V 1 6.2 V 1.6 V −1 Input capacitance † Typicals are for TA = 25°C unless otherwise noted. 0.2 1 µA 5 10 pF MAX outputs TEST CONDITIONS MIN TYP† 9.75 9.9 High-level output voltage IO = −1 mA IO = −100 mA 8 9.1 Low-level output voltage IO = 1 mA IO = 100 mA PARAMETER Peak output current † Typicals are for TA = 25°C unless otherwise noted. VCC = 10 V www.ti.com V 0.18 0.25 1 2 2 UNIT V A 5 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 regulator (TPS2811/2812/2813 only) PARAMETER Output voltage Output voltage in dropout † Typicals are for TA = 25°C unless otherwise noted. TEST CONDITIONS MIN TYP† MAX 13 UNIT 14 ≤ REG_IN ≤ 40 V, 0 ≤ IO ≤ 20 mA 10 11.5 IO = 10 mA, REG_IN = 10 V 9 9.6 MIN TYP† MAX 0.2 5 µA 40 100 µA V V supply current PARAMETER Supply current into VCC TEST CONDITIONS Inputs high or low Supply current into REG_IN † Typicals are for TA = 25°C unless otherwise noted. REG_IN = 20 V, REG_OUT open UNIT TPS28xxY electrical characteristics at TA = 25°C, VCC = 10 V, REG_IN open for TPS2811/12/13, CL = 1 nF (unless otherwise noted) inputs PARAMETER TEST CONDITIONS Positive-going input threshold voltage Negative-going input threshold voltage Input hysteresis Input current MIN TYP MAX UNIT VCC = 5 V VCC = 10 V 3.3 V 5.8 V VCC = 14 V VCC = 5 V 8.2 V 1.6 V VCC = 10 V VCC = 14 V 3.3 V 4.2 V VCC = 5 V Inputs = 0 V or VCC 1.2 V 0.2 µA 5 pF Input capacitance outputs PARAMETER TEST CONDITIONS MIN TYP 9.9 High-level output voltage IO = −1 mA IO = −100 mA IO = 1 mA IO = 100 mA 0.18 Low-level output voltage Peak output current VCC = 10.5 V MAX UNIT V 9.1 V 1 2 A regulator (TPS2811, 2812, 2813) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output voltage 14 ≤ REG_IN ≤ 40 V, 0 ≤ IO ≤ 20 mA 11.5 V Output voltage in dropout IO = 10 mA, REG_IN = 10 V 9.6 V power supply current PARAMETER TEST CONDITIONS Supply current into VCC Inputs high or low Supply current into REG_IN REG_IN = 20 V, 6 www.ti.com REG_OUT open MIN TYP MAX UNIT 0.2 µA 40 µA 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 switching characteristics for all devices over recommended operating ambient temperature range, REG_IN open for TPS2811/12/13, CL = 1 nF (unless otherwise specified) PARAMETER tr tf tPHL tPLH TEST CONDITIONS Rise time Fall time Prop delay time high-to-low-level output Prop delay time low-to-high-level output MIN TYP MAX VCC = 14 V VCC = 10 V 14 25 15 30 VCC = 5 V VCC = 14 V 20 35 15 25 VCC = 10 V VCC = 5 V 15 30 18 35 VCC = 14 V VCC = 10 V 25 40 25 45 VCC = 5 V VCC = 14 V 34 50 24 40 VCC = 10 V VCC = 5 V 26 45 36 50 UNIT ns ns ns ns PARAMETER MEASUREMENT INFORMATION TPS2811 + 1 Input Regulator 8 2 7 3 6 4 5 50 Ω 0.1 µF VCC 4.7 µF Output 1 nF NOTE A: Input rise and fall times should be ≤10 ns for accurate measurement of ac parameters. Figure 1. Test Circuit For Measurement of Switching Characteristics www.ti.com 7 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 PARAMETER MEASUREMENT INFORMATION TPS2811 1 0−10 V dc 8 Regulator 2 7 3 6 xOUT Current Loop VCC 10 V 0.1 µF + 4.7 µF 5 4 Figure 2. Shoot-through Current Test Setup 50% 1IN 50% 0V tf 90% 1OUT tr 90% 50% 50% 10% 10% tPHL 0V tPLH Figure 3. Typical Timing Diagram (TPS2811) TYPICAL CHARACTERISTICS Tables of Characteristics Graphs and Application Information typical characteristics PARAMETER vs PARAMETER 2 FIGURE PAGE 4 10 Supply voltage 5 10 Supply voltage 6, 7 10 Supply voltage 8 11 Load capacitance 9 11 Ambient temperature 10 11 Rise time Supply voltage Fall time Propagation delay time Supply current Input threshold voltage Supply voltage 11 11 Regulator output voltage Regulator input voltage 12, 13 12 Regulator quiescent current Regulator input voltage 14 12 Peak source current Supply voltage 15 12 Peak sink current Supply voltage 16 13 Input voltage, high-to-low 17 13 Input voltage, low-to-high 18 13 Shoot-through current 8 www.ti.com 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 TYPICAL CHARACTERISTICS Tables of Characteristics Graphs and Application Information (Continued) general applications PARAMETER vs PARAMETER 2 Switching test circuits and application information Voltage of 1OUT vs 2OUT Time FIGURE PAGE 19, 20 15 Low-to-high 21, 23, 25 16, 17 High-to-low 22, 24, 26 16, 17 FIGURE PAGE circuit for measuring paralleled switching characteristics PARAMETER vs PARAMETER 2 Switching test circuits and application information Input voltage vs output voltage Time 27 17 Low-to-high 28, 30 18 High-to-low 29, 31 18 FIGURE PAGE Hex-1 to Hex-4 application information PARAMETER vs PARAMETER 2 Driving test circuit and application information Drain-source voltage vs drain current Drain-source voltage vs gate-source voltage at turn-on Drain-source voltage vs gate-source voltage at turn-off Time Time Time 32 19 Hex-1 size 33 20 Hex-2 size 36 20 Hex-3 size 39 21 Hex-4 size 41 22 Hex-4 size parallel drive 45 23 Hex-1 size 34 20 Hex-2 size 37 21 Hex-3 size 40 21 Hex-4 size 43 22 Hex-4 size parallel drive 46 23 Hex-1 size 35 20 Hex-2 size 38 21 Hex-3 size 42 22 Hex-4 size 44 22 Hex-4 size parallel drive 47 23 synchronous buck regulator application FIGURE PAGE 3.3-V 3-A Synchronous-Rectified Buck Regulator Circuit PARAMETER vs PARAMETER 2 48 24 Q1 drain voltage vs gate voltage at turn-on 49 26 Q1 drain voltage vs gate voltage at turn-off 50 26 Q1 drain voltage vs Q2 gate-source voltage 51, 52, 53 26, 27 3A 54 27 5A 55 27 Time Output ripple voltage vs inductor current www.ti.com 9 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 TYPICAL CHARACTERISTICS RISE TIME vs SUPPLY VOLTAGE FALL TIME vs SUPPLY VOLTAGE 22 22 CL = 1 nF 20 20 18 18 t f − Fall Time − ns t r − Rise Time − ns CL = 1 nF TA = 125°C 16 TA = 75°C TA = 25°C 14 TA = −25°C 12 TA = 125°C TA = 75°C 16 TA = 25°C 14 TA = − 50°C 10 10 5 6 7 8 9 11 10 12 13 14 5 6 VCC − Supply Voltage − V 7 8 10 11 12 13 14 Figure 5 PROPAGATION DELAY TIME, HIGH-TO-LOW-LEVEL OUTPUT vs SUPPLY VOLTAGE PROPAGATION DELAY TIME, LOW-TO-HIGH-LEVEL OUTPUT vs SUPPLY VOLTAGE 45 45 CL = 1 nF CL = 1 nF 40 40 t PLH − Propagation Delay Time, Low-To-High-Level Output − ns t PHL− Propagation Delay Time, High-To-Low-Level Output − ns 9 VCC − Supply Voltage − V Figure 4 35 30 TA = 125°C 25 T = 25°C TA = 75°C A 20 TA = − 50°C TA = −25°C 15 5 6 7 11 12 8 9 10 VCC − Supply Voltage − V 35 TA = 25°C TA = 75°C 30 TA=125°C 25 TA = −25°C 20 TA = − 50°C 15 13 14 Figure 6 10 TA = − 50°C TA = −25°C 12 5 6 7 8 9 10 11 12 VCC − Supply Voltage − V Figure 7 www.ti.com 13 14 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs SUPPLY VOLTAGE SUPPLY CURRENT vs LOAD CAPACITANCE 16 2.5 12 1 MHz 10 8 6 500 kHz 100 kHz 4 40 kHz I CC − Supply Current − mA I CC − Supply Current − mA VCC = 10 V f = 100 kHz TA = 25°C Duty Cycle = 50% CL = 1 nF 14 2 1.5 1 0.5 75 kHz 2 0 0 4 6 8 10 12 0 14 VCC − Supply Voltage − V 1.5 0.5 1 CL − Load Capacitance − nF Figure 8 Figure 9 INPUT THRESHOLD VOLTAGE vs SUPPLY VOLTAGE SUPPLY CURRENT vs AMBIENT TEMPERATURE 1.2 9 CL = 1 nF VCC = 10 V Duty Cycle = 50% f = 100 kHz I CC − Supply Current − mA 1.18 TA = 25°C 8 VIT − Input Threshold Voltage − V 1.19 1.17 1.16 1.15 1.14 1.13 1.12 1.11 1.1 −50 2 7 + Threshold 6 5 − Threshold 4 3 2 1 0 −25 75 0 25 50 TA − Temperature − °C 100 125 Figure 10 4 6 12 8 10 VCC − Supply Voltage − V 14 Figure 11 www.ti.com 11 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 TYPICAL CHARACTERISTICS REGULATOR OUTPUT VOLTAGE vs REGULATOR INPUT VOLTAGE REGULATOR OUTPUT VOLTAGE vs REGULATOR INPUT VOLTAGE 14 13 13 11 TA = 125°C TA = 25°C 10 9 8 7 6 11 TA = 125°C 10 9 8 7 6 5 5 4 8 12 16 20 24 28 32 Regulator Input Voltage − V 36 4 40 4 6 8 12 10 14 Regulator Input Voltage − V Figure 12 Figure 13 REGULATOR QUIESCENT CURRENT vs REGULATOR INPUT VOLTAGE PEAK SOURCE CURRENT vs SUPPLY VOLTAGE 50 2.5 RL = 0.5 Ω f = 100 kHz Duty Cycle = 5% TA = 25°C TA = − 55°C 45 2 40 TA = 25°C 35 Peak Source Current − A Regulator Quiescent Current − µ A TA = − 55°C TA = − 55°C 12 4 TA = 25°C 12 Regulator Output Voltage − V Regulator Output Voltage − V RL = 10 kΩ RL = 10 kΩ 30 TA = 125°C 25 20 15 1.5 1 .5 10 RL = 10 kΩ 5 0 0 4 8 12 16 20 24 28 32 36 40 Figure 14 12 4 6 8 10 VCC − Supply Voltage − V Regulator Input Voltage − V Figure 15 www.ti.com 12 14 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 TYPICAL CHARACTERISTICS PEAK SINK CURRENT vs SUPPLY VOLTAGE 2.5 RL = 0.5 Ω f = 100 kHz Duty Cycle = 5% TA = 25°C Peak Sink Current − A 2 1.5 1 .5 0 4 6 12 8 10 VCC − Supply Voltage − V 14 Figure 16 SHOOT-THROUGH CURRENT vs INPUT VOLTAGE, LOW-TO-HIGH SHOOT-THROUGH CURRENT vs INPUT VOLTAGE, HIGH-TO-LOW 6 6 VCC = 10 V CL = 0 TA = 25°C 5 Shoot-Through Current − mA Shoot-Through Current − mA 5 VCC = 10 V CL = 0 TA = 25°C 4 3 2 1 4 3 2 1 0 0 10 8 6 4 2 0 VI − Input Voltage, High-to-Low − V 0 2 4 6 8 10 VI − Input Voltage, Low-to-High − V Figure 18 Figure 17 www.ti.com 13 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION The TPS2811, TPS2812 and TPS2813 circuits each contain one regulator and two MOSFET drivers. The regulator can be used to limit VCC to between 10 V and 13 V for a range of input voltages from 14 V to 40 V, while providing up to 20 mA of dc drive. The TPS2814 and TPS2815 both contain two drivers, each of which has two inputs. The TPS2811 has inverting drivers, the TPS2812 has noninverting drivers, and the TPS2813 has one inverting and one noninverting driver. The TPS2814 is a dual 2-input AND driver with one inverting input on each driver, and the TPS2815 is a dual 2-input NAND driver. These MOSFET drivers are capable of supplying up to 2.1 A or sinking up to 1.9 A (see Figures 15 and 16) of instantaneous current to n-channel or p-channel MOSFETs. The TPS2811 family of MOSFET drivers have very fast switching times combined with very short propagation delays. These features enhance the operation of today’s high-frequency circuits. The CMOS input circuit has a positive threshold of approximately 2/3 of VCC, with a negative threshold of 1/3 of VCC, and a very high input impedance in the range of 109 Ω. Noise immunity is also very high because of the Schmidt trigger switching. In addition, the design is such that the normal shoot-through current in CMOS (when the input is biased halfway between VCC and ground) is limited to less than 6 mA. The limited shoot-through is evident in the graphs in Figures 17 and 18. The input stage shown in the functional block diagram better illustrates the way the front end works. The circuitry of the device is such that regardless of the rise and/or fall time of the input signal, the output signal will always have a fast transition speed; this basically isolates the waveforms at the input from the output. Therefore, the specified switching times are not affected by the slopes of the input waveforms. The basic driver portion of the circuits operate over a supply voltage range of 4 V to 14 V with a maximum bias current of 5 µA. Each driver consists of a CMOS input and a buffered output with a 2-A instantaneous drive capability. They have propagation delays of less than 30 ns and rise and fall times of less than 20 ns each. Placing a 0.1-µF ceramic capacitor between VCC and ground is recommended; this will supply the instantaneous current needed by the fast switching and high current surges of the driver when it is driving a MOSFET. The output circuit is also shown in the functional block diagram. This driver uses a unique combination of a bipolar transistor in parallel with a MOSFET for the ability to swing from VCC to ground while providing 2 A of instantaneous driver current. This unique parallel combination of bipolar and MOSFET output transistors provides the drive required at VCC and ground to guarantee turn-off of even low-threshold MOSFETs. Typical bipolar-only output devices don’t easily approach VCC or ground. The regulator, included in the TPS2811, TPS2812 and TPS2813, has an input voltage range of 14 V to 40 V. It produces an output voltage of 10 V to 13 V and is capable of supplying from 0 to 20 mA of output current. In grounded source applications, this extends the overall circuit operation to 40 V by clamping the driver supply voltage (VCC) to a safe level for both the driver and the MOSFET gate. The bias current for full operation is a maximum of 150 µA. A 0.1-µF capacitor connected between the regulator output and ground is required to ensure stability. For transient response, an additional 4.7-µF electrolytic capacitor on the output and a 0.1-µF ceramic capacitor on the input will optimize the performance of this circuit. When the regulator is not in use, it can be left open at both the input and the output, or the input can be shorted to the output and tied to either the VCC or the ground pin of the chip. 14 www.ti.com 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION matching and paralleling connections Figures 21 and 22 show the delays for the rise and fall time of each channel. As can be seen on a 5-ns scale, there is very little difference between the two channels at no load. Figures 23 and 24 show the difference between the two channels for a 1-nF load on each output. There is a slight delay on the rising edge, but little or no delay on the falling edge. As an example of extreme overload, Figures 25 and 26 show the difference between the two channels, or two drivers in the package, each driving a 10-nF load. As would be expected, the rise and fall times are significantly slowed down. Figures 28 and 29 show the effect of paralleling the two channels and driving a 1-nF load. A noticeable improvement is evident in the rise and fall times of the output waveforms. Finally, Figures 30 and 31 show the two drivers being paralleled to drive the 10-nF load and as could be expected the waveforms are improved. In summary, the paralleling of the two drivers in a package enhances the capability of the drivers to handle a larger load. Because of manufacturing tolerances, it is not recommended to parallel drivers that are not in the same package. TPS2811 1 50 Ω Regulator + 8 2 7 3 6 0.1 µF VCC 4.7 µF Output 1 nF 4 5 Figure 19. Test Circuit for Measuring Switching Characteristics TPS2811 1 50 Ω Regulator + 8 2 7 3 6 4 5 0.1 µF VCC 4.7 µF Output 1 CL(1) Output 2 CL(2) NOTE A: Input rise and fall times should be ≤10 ns for accurate measurement of ac parameters. Figure 20. Test Circuit for Measuring Switching Characteristics with the Inputs Connected in Parallel www.ti.com 15 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION TA = 25°C VI = 14 V CL = 0 Paralleled Input VO at 1OUT (5 V/div, 5 ns/div) VO at 2OUT (5 V/div, 5 ns/div) VO at 1OUT (5 V/div, 5 ns/div) VO at 2OUT (5 V/div, 5 ns/div) TA = 25°C VI = 14 V CL = 0 Paralleled Inputs t − Time t − Time Figure 21. Voltage of 1OUT vs Voltage at 2OUT, Low-to-High Output Delay Figure 22. Voltage at 1OUT vs Voltage at 2OUT, High-to-Low Output Delay TA = 25°C VI = 14 V CL = 1 nF on Each Output Paralleled Input VO at 1OUT (5 V/div, 10 ns/div) VO at 2OUT (5 V/div, 10 ns/div) VO at 1OUT (5 V/div, 10 ns/div) VO at 2OUT (5 V/div, 10 ns/div) TA = 25°C VI = 14 V CL = 1 nF Each Output Paralleled Input 16 t − Time t − Time Figure 23. Voltage at 1OUT vs Voltage at 2OUT, Low-to-High Output Delay Figure 24. Voltage at 1OUT vs Voltage at 2OUT, High-to-Low Output Delay www.ti.com 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION VO at 1OUT (5 V/div, 20 ns/div) VO at 2OUT (5 V/div, 20 ns/div) VO at (5 V/div, 20 ns/div) VO at 2OUT (5 V/div, 20 ns/div) TA = 25°C VCC = 14 V CL = 10 nF on Each Output Paralleled Input TA = 25°C VCC = 14 V CL = 10 nF on Each Output Paralleled Input t − Time t − Time Figure 25. Voltage at 1OUT vs Voltage at 2OUT, Low-to-High Output Delay Figure 26. Voltage at 1OUT vs Voltage at 2OUT, High-to-Low Output Delay TPS2811 1 50 Ω Regulator + 0.1 µF 8 2 7 3 6 VCC 4.7 µF Output CL 4 5 NOTE A: Input rise and fall times should be ≤10 ns for accurate measurement of ac parameters. Figure 27. Test Circuit for Measuring Paralleled Switching Characteristics www.ti.com 17 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION VI (5 V/div, 20 ns/div) TA = 25°C VCC = 14 V CL = 1 nF Paralleled Input and Output VI (5 V/div, 20 ns/div) TA = 25°C VCC = 14 V CL = 1 nF Paralleled Input and Output VO (5 V/div, 20 ns/div) VO (5 V/div, 20 ns/div) t − Time t − Time Figure 28. Input Voltage vs Output Voltage, Low-to-High Propagation Delay of Paralleled Drivers Figure 29. Input Voltage vs Output Voltage, High-to-Low Propagation Delay of Paralleled Drivers TA = 25°C VCC = 14 V CL = 10 nF Paralleled Input and Output VI (5 V/div, 20 ns/div) VI (5 V/div, 20 ns/div) TA = 25°C VCC = 14 V CL = 10 nF Paralleled Input and Output VO (5 V/div, 20 ns/div) VO (5 V/div, 20 ns/div) 18 t − Time t − Time Figure 30. Input Voltage vs Output Voltage, Low-to-High Propagation Delay of Paralleled Drivers Figure 31. Input Voltage vs Output Voltage, High-to-Low Propagation Delay of Paralleled Drivers www.ti.com 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION Figures 33 through 47 illustrate the performance of the TPS2811 driving MOSFETs with clamped inductive loads, similar to what is encountered in discontinuous-mode flyback converters. The MOSFETs that were tested range in size from Hex-1 to Hex-4, although the TPS28xx family is only recommended for Hex-3 or below. The test circuit is shown in Figure 32. The layout rules observed in building the test circuit also apply to real applications. Decoupling capacitor C1 is a 0.1-µF ceramic device, connected between VCC and GND of the TPS2811, with short lead lengths. The connection between the driver output and the MOSFET gate, and between GND and the MOSFET source, are as short as possible to minimize inductance. Ideally, GND of the driver is connected directly to the MOSFET source. The tests were conducted with the pulse generator frequency set very low to eliminate the need for heat sinking, and the duty cycle was set to turn off the MOSFET when the drain current reached 50% of its rated value. The input voltage was adjusted to clamp the drain voltage at 80% of its rating. As shown, the driver is capable of driving each of the Hex-1 through Hex-3 MOSFETs to switch in 20 ns or less. Even the Hex-4 is turned on in less than 20 ns. Figures 45, 46 and 47 show that paralleling the two drivers in a package enhances the gate waveforms and improves the switching speed of the MOSFET. Generally, one driver is capable of driving up to a Hex-4 size. The TPS2811 family is even capable of driving large MOSFETs that have a low gate charge. VI CR1 L1 Current Loop 1 Regulator 8 Q1 R1 50 Ω 2 7 3 6 4 5 + VDS − VDS VGS VCC + C1 0.1 µF C2 4.7 µF Figure 32. TPS2811 Driving Hex-1 through Hex-4 Devices www.ti.com 19 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION TA = 25°C VCC = 14 V VI = 48 V TA = 25°C VCC = 14 V VI = 48 V VDS (20 V/div, 0.5 µs/div) VDS (20 V/div, 50 ns/div) VGS (5 V/div, 50 ns/div) ID (0.5 A/div, 0.5 µs/div) t − Time t − Time Figure 33. Drain-Source Voltage vs Drain Current, TPS2811 Driving an IRFD014 (Hex-1 Size) TA = 25°C VCC = 14 V VI = 48 V Figure 34. Drain-Source Voltage vs Gate-Source Voltage, at Turn-on, TPS2811 Driving an IRFD014 (Hex-1 Size) VDS (20 V/div, 50 ns/div) VDS (50 V/div, 0.2 µs/div) TA = 25°C VCC = 14 V VI = 80 V VGS (5 V/div, 50 ns/div) VGS (0.5 A/div, 0.2 µs/div) 20 t − Time t − Time Figure 35. Drain-Source Voltage vs Gate-Source Voltage, at Turn-off, TPS2811 Driving an IRFD014 (Hex-1 Size) Figure 36. Drain-Source Voltage vs Drain Current, TPS2811 Driving an IRFD120 (Hex-2 Size) www.ti.com 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION TA = 25°C VCC = 14 V VI = 80 V TA = 25°C VCC = 14 V VI = 80 V VDS (50 V/div, 50 ns/div) VDS (50 V/div, 50 ns/div) VGS (5 V/div, 50 ns/div) VGS (5 V/div, 50 ns/div) t − Time t − Time Figure 37. Drain-Source Voltage vs Gate-Source Voltage, at Turn-on, TPS2811 Driving an IRFD120 (Hex-2 Size) Figure 38. Drain-Source Voltage vs Gate-Source Voltage, at Turn-off, TPS2811 Driving an IRFD120 (Hex-2 Size) TA = 25°C VCC = 14 V VI = 80 V VDS (50 V/div, 50 ns/div) VDS (50 V/div, 2 µs/div) TA = 25°C VCC = 14 V VI = 80 V VGS (5 A/div, 50 ns/div) ID (5 A/div, 2 µs/div) t − Time t − Time Figure 39. Drain-Source Voltage vs Drain Current, TPS2811 Driving an IRF530 (Hex-3 Size) Figure 40. Drain-Source Voltage vs Gate-Source Voltage, at Turn-on, TPS2811 Driving an IRF530 (Hex-3 Size) www.ti.com 21 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION VDS (50 V/div, 0.2 µs/div) VDS (50 V/div, 50 ns/div) TA = 25°C VCC = 14 V VI = 350 V TA = 25°C VCC = 14 V VI = 80 V ID (2 A/div, 0.2 µs/div) VGS (5 V/div, 50 ns/div) t − Time t − Time Figure 41. Drain-Source Voltage vs Drain Current, One Driver, TPS2811 Driving an IRF840 (Hex-4 Size) Figure 42. Drain-Source Voltage vs Gate-Source Voltage, at Turn-off, TPS2811 Driving an IRF530 (Hex-3 Size) VDS (50 V/div, 50 ns/div) VDS (50 V/div, 50 ns/div) VGS (5 V/div, 50 ns/div) VGS (5 V/div, 50 ns/div) TA = 25°C VCC = 14 V VI = 350 V 22 TA = 25°C VCC = 14 V VI = 350 V t − Time t − Time Figure 43. Drain-Source Voltage vs Gate-Source Voltage, at Turn-on, One Driver, TPS2811 Driving an IRF840 (Hex-4 Size) Figure 44. Drain-Source Voltage vs Gate-Source Voltage, at Turn-off, One Driver, TPS2811 Driving an IRF840 (Hex-4 Size) www.ti.com 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION VDS (50 V/div, 0.2 µs/div) VDS (50 V/div, 50 ns/div) TA = 25°C VCC = 14 V VI = 350 V VGS (5 V/div, 50 ns/div) ID (2 A/div, 0.2 µs/div) TA = 25°C VCC = 14 V VI = 350 V t − Time t − Time Figure 45. Drain-Source Voltage vs Drain Current, Parallel Drivers, TPS2811 Driving an IRF840 (Hex-4 Size) Figure 46. Drain-Source Voltage vs Gate-Source Voltage, at Turn-on, Parallel Drivers, TPS2811 Driving an IRF840 (Hex-4 Size) VDS (50 V/div, 50 ns/div) VGS (5 V/div, 50 ns/div) TA = 25°C VCC = 14 V VI = 350 V t − Time Figure 47. Drain-Source Voltage vs Gate-Source Voltage, at Turn-off, Parallel Drivers, TPS2811 Driving an IRF840 (Hex-4 Size) www.ti.com 23 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION synchronous buck regulator Figure 48 is the schematic for a 100-kHz synchronous-rectified buck converter implemented with a TL5001 pulse-width-modulation (PWM) controller and a TPS2812 driver. The bill of materials is provided in Table 1. The converter operates over an input range from 5.5 V to 12 V and has a 3.3-V output capable of supplying 3 A continuously and 5 A during load surges. The converter achieves an efficiency of 90.6% at 3 A and 87.6% at 5 A. Figures 49 and 50 show the power switch switching performance. The output ripple voltage waveforms are documented in Figures 54 and 55. The TPS2812 drives both the power switch, Q2, and the synchronous rectifier, Q1. Large shoot-through currents, caused by power switch and synchronous rectifier remaining on simultaneously during the transitions, are prevented by small delays built into the drive signals, using CR2, CR3, R11, R12, and the input capacitance of the TPS2812. These delays allow the power switch to turn off before the synchronous rectifier turns on and vice versa. Figure 51 shows the delay between the drain of Q2 and the gate of Q1; expanded views are provided in Figures 52 and 53. Q1 IRF7406 L1 27 µF 3 1 J1 VI 1 VI 2 GND 3 GND 4 J2 C100 100 µF 16 V + C5 100 µF 16 V + C11 0.47 µF + R5 10 kΩ 2 1 CR1 30BQ015 2 3 4 REG_IN 1 IN GND REG_OUT U2 TPS2812D 2 IN 1 OUT VCC 2 OUT C14 0.1 µF 8 C7 100 µF 16 V C13 10 µF 10 V 3 6 5 Q2 IRF7201 R4 2.32 kΩ 1% C6 1000 pF R13 10 kΩ R11 30 kΩ 3.3 V 3 GND 4 GND C4 0.022 µF R2 1.6 kΩ C3 0.0022 µF R6 15 Ω C2 0.033 µF 1 2 3 OUT VCC COMP 4 FB GND 8 RT 7 R9 90.9 kΩ 1% R12 10 kΩ R1 1.00 kΩ 1% U1 TL5001CD C15 1 µF BAS16ZX DTC SCP 6 5 R8 121 kΩ 1% C9 0.22 µF + C1 1 µF Figure 48. 3.3-V 3-A Synchronous-Rectified Buck Regulator Circuit NOTE: If the parasitics of the external circuit cause the voltage to violate the Absolute Maximum Rating for the Output pins, Schottky diodes should be added from ground to output and from output to Vcc. 24 3.3 V 2 R3 180 Ω BAS16ZX CR3 1 7 R10 1 kΩ CR2 + R7 3.3 Ω 2 1 C12 100 µF 16 V www.ti.com 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION Table 1. Bill of Materials, 3.3-V, 3-A Synchronous-Rectified Buck Converter REFERENCE DESCRIPTION VENDOR U1 TL5001CD, PWM Texas Instruments, 972-644-5580 U2 TPS2812D, N.I. MOSFET Driver Texas Instruments, 972-644-5580 3 A, 15 V, Schottky, 30BQ015 International Rectifier, 310-322-3331 Signal Diode, BAS16ZX Zetex, 516-543-7100 AVX, 800-448-9411 TDK, 708-803-6100 CR1 CR2,CR3 C1 1 µF, 16 V, Tantalum C2 0.033 µF, 50 V C3 0.0022 µF, 50 V C4 0.022 µF, 50 V C5,C7,C10,C12 100 µF, 16 V, Tantalum, TPSE107M016R0100 C6 1000 pF, 50 V C9 0.22 µF, 50 V C11 0.47 µF, 50 V, Z5U C13 10 µF, 10 V, Ceramic, CC1210CY5V106Z C14 0.1 µF, 50 V C15 1.0 µF, 50 V J1,J2 4-Pin Header L1 27 µH, 3 A/5 A, SML5040 Nova Magnetics, Inc., 972-272-8287 Q1 IRF7406, P-FET International Rectifier, 310-322-3331 Q2 IRF7201, N-FET International Rectifier, 310-322-3331 R1 1.00 kΩ, 1% R2 1.6 kΩ R3 180 Ω R4 2.32 kΩ, 1 % R5,R12,R13 10 kΩ R6 15 Ω R7 3.3 Ω R8 121 kΩ, 1% R9 90.9 kΩ, 1% R10 1 kΩ R11 30 kΩ NOTES: 2. Unless otherwise specified, capacitors are X7R ceramics. 3. Unless otherwise specified, resistors are 5%, 1/10 W. www.ti.com 25 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION VD (5 V/div, 20 ns/div) VG (2 V/div, 20 ns/div) VD (5 V/div, 20 ns/div) TA = 25°C VI = 12 V VO = 3.3 V at 5A VG (2 V/div, 20 ns/div) TA = 25°C VI = 12 V VO = 3.3 V at 5A t − Time t − Time Figure 49. Q1 Drain Voltage vs Gate Voltage, at Switch Turn-on Figure 50. Q1 Drain Voltage vs Gate Voltage, at Switch Turn-off TA = 25°C VI = 12 V VO = 3.3 V at 5A VD (5 V/div, 0.5 µs/div) TA = 25°C VI = 12 V VO = 3.3 V at 5A VD (5 V/div, 20 ns/div) VGS (2 V/div, 0.5 µs/div) 26 VGS (2 V/div, 20 ns/div) t − Time t − Time Figure 51. Q1 Drain Voltage vs Q2 Gate-Source Voltage Figure 52. Q1 Drain Voltage vs Q2 Gate-Source Voltage www.ti.com 



 
    
 SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004 APPLICATION INFORMATION TA = 25°C VI = 12 V VO = 3.3 V at 5A VD (5 V/div, 20 ns/div) VGS (2 V/div, 20 ns/div) t − Time Figure 53. Q1 Drain Voltage vs Q2 Gate-Source Voltage TA = 25°C VI = 12 V VO = 3.3 V at 3A Inductor Current (1 A/div, 2 µs/div) Inductor Current (2 A/div, 2 µs/div) TA = 25°C VI = 12 V VO = 3.3 V at 5 A 1 1 Output Ripple Voltage (20 mV/div, 2 µs/div) 2 2 Output Ripple Voltage (20 mV/div, 2 µs/div) t − Time t − Time Figure 54. Output Ripple Voltage vs Inductor Current, at 3 A Figure 55. Output Ripple Voltage vs Inductor Current, at 5 A www.ti.com 27 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS2811D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2811 Samples TPS2811DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2811 Samples TPS2811P ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type TPS2811P Samples TPS2811PW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM PS2811 Samples TPS2811PWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM PS2811 Samples TPS2812D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2812 Samples TPS2812DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2812 Samples TPS2812P ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type TPS2812P Samples TPS2812PWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM PS2812 Samples TPS2813D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2813 Samples TPS2813DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2813 Samples TPS2813P ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 TPS2813P Samples TPS2813PWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PS2813 Samples TPS2814D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2814 Samples TPS2814DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2814 Samples TPS2814P ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type TPS2814P Samples TPS2814PW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM PS2814 Samples TPS2814PWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM PS2814 Samples TPS2815D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 2815 Samples TPS2815DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 2815 Samples Addendum-Page 1 -40 to 125 -40 to 125 -40 to 125 -40 to 125 -40 to 125 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS2815P ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type TPS2815PWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM TPS2815P Samples PS2815 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of