TPS3125L30DBVR

TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx SLVS227E – AUGUST 1999 – REVISED AUGUST 2011 www.ti.com ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS Check for Samples: TPS3123-xx, TPS3124-xx, TPS3125-xx, TPS3126-xx, TPS3128-xx FEATURES 1 • • 2 • • • • • • • DBV PACKAGE (TOP VIEW) Minimum Supply Voltage of 0.75 V Supply Voltage Supervision Range: – 1.2 V, 1.5 V, 1.8 V (TPS312x) – 3 V (TPS3125 Devices Only) – Other Versions on Request Power-On Reset Generator With Fixed Delay Time of 180 ms Manual Reset Input (TPS3123/5/6/8) Watchdog Timer Retriggers the RESET Output at VDD ≥ VIT Supply Current of 14 μA (Typ) Small SOT23-5 Package Temperature Range of –40°C to +85°C Reset Output Available in Push-Pull (Active Low and High) and Open-Drain (Active-Low) TPS3123/T PS3128 RESET 1 GND 2 MR 3 • • • • • • VDD 4 WDI TPS3124 RESET 1 GND 2 RESET 3 5 VDD 4 WDI TPS3125/ TPS3126 APPLICATIONS • 5 Applications Using Low Voltage DSPs, Microcontrollers, or Microprocessors Portable/Battery-Powered Equipment Wireless Communication Systems Programmable Controls Industrial Equipment Notebook/Desktop Computers Intelligent Instruments RESET 1 GND 2 RESET 3 5 VDD 4 MR 1.2 V CVDD DVDD TMS320UVC5402 VDD RESET MR WDI TPS3123J12 RESET XF GND GND Figure 1. Typical Low-Voltage DSP Application 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2011, Texas Instruments Incorporated TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx SLVS227E – AUGUST 1999 – REVISED AUGUST 2011 www.ti.com DESCRIPTION The TPS312x family of ultralow voltage processor supervisory circuits provides circuit initialization and timing supervision, primarily for DSP and processor-based systems. During power-on, RESET is asserted when the supply voltage (VDD) becomes higher than 0.75 V. Thereafter, the supply voltage supervisor monitors VDD and keeps RESET output active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 180 ms, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by a high precision internal voltage divider. The TPS3123/5/6/8 devices incorporate a manual reset input, MR. A low level at MR causes RESET to become active. The TPS3124 devices do not have the input MR, but include a high-level output RESET same as the TPS3125 and TPS3126 devices. In addition, the TPS3123/4/8 have a watchdog timer that needs to be triggered periodically by a positive or negative transition at WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval ttout= 0.8 s, RESET output becomes active for the time period (td). This event also reinitializes the watchdog timer. The circuits are available in a 5-pin SOT23-5 package. The TPS312x devices are characterized for operation over a temperature range of –40°C to +85°C. Table 1. PACKAGE INFORMATION, STANDARD VERSIONS (1) (2) TA DEVICE NAME (3) 1.08 V PBNI TPS3123G15DBVT (4) 1.40 V PBOI TPS3123J18DBVR (3) TPS3123J18DBVT (4) 1.62 V PBPI TPS3124J12DBVR (3) TPS3124J12DBVT (4) 1.08 V PBQI TPS3124G15DBVR (3) TPS3124G15DBVT (4) 1.40 V PBRI (3) TPS3124J18DBVT (4) 1.62 V PBSI TPS3125J12DBVR (3) TPS3125J12DBVT (4) 1.08 V PBTI (3) (4) 1.40 V PBUI TPS3125J18DBVR (3) TPS3125J18DBVT (4) 1.62 V PBVI TPS3125L30DBVR (3) TPS3125L30DBVT (4) 2.64 V PBXI (3) (4) 1.14 V PFOI TPS3126E15DBVR (3) TPS3126E15DBVT (4) 1.43 V PFPI TPS3126E18DBVR (3) TPS3126E18DBVT (4) 1.71 V PFQI TPS3128E15DBVR (3) TPS3128E15DBVT (4) 1.43 V PFSI (3) (4) 1.71 V PFTI TPS3124J18DBVR TPS3125G15DBVR TPS3126E12DBVR TPS3128E18DBVR (1) (2) (3) (4) 2 MARKING TPS3123G15DBVR (3) TPS3123J12DBVR –40°C to +85°C THRESHOLD VOLTAGE (4) TPS3123J12DBVT TPS3125G15DBVT TPS3126E12DBVT TPS3128E18DBVT Other versions available. Contact Texas Instruments for details; minimum order quantities apply. For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. The DBVR passive indicates tape and reel of 3000 parts. The DBVT passive indicates tape and reel of 250 parts. Copyright © 1999–2011, Texas Instruments Incorporated TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx SLVS227E – AUGUST 1999 – REVISED AUGUST 2011 www.ti.com TPS312 3 J 12 DBV R Reel Package Nominal Supply Voltage Typical Reset Threshold Voltage Functionality Family Table 2. Ordering Information Application Specific Versions (1) DEVICE NAME NOMINAL SUPPLY VOLTAGE, VNOM DEVICE NAME TYPICAL RESET THRESHOLD VOLTAGE–VIT– TPS312xx12DBV 1.2 V TPS312xAxxDBV VNOM –1% TPS312xx15DBV 1.5 V TPS312xBxxDBV VNOM –2% TPS312xx18DBV 1.8 V TPS312xCxxDBV VNOM –3% TPS312xx30DBV 3.0 V TPS312xDxxDBV VNOM –4% TPS312xExxDBV VNOM –5% TPS312xFxxDBV VNOM –6% TPS312xGxxDBV VNOM –7% TPS312xHxxDBV VNOM –8% (1) TPS312xIxxDBV VNOM –9% TPS312xJxxDBV VNOM –10% TPS312xKxxDBV VNOM –11% TPS312xLxxDBV VNOM –12% TPS312xMxxDBV VNOM –13% TPS312xNxxDBV VNOM –14% TPS312xOxxDBV VNOM –15% For the application-specific versions contact Texas Instruments for availability, lead time, and minimum order quantities. Table 3. Function Tables TPS3123/8 TPS3124 TPS3125/6 MR VDD > VIT RESET VDD > VIT RESET RESET MR VDD > VIT RESET RESET L 0 L 0 L H L 0 L H L 1 L 1 H L L 1 L H H 0 L H 0 L H H 1 H H 1 H L Table 4. Reset Topology DEVICES OPEN DRAIN PUSH-PULL TPS3123 X TPS3124 X TPS3125 X TPS3126 X TPS3128 X Copyright © 1999–2011, Texas Instruments Incorporated 3 TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx SLVS227E – AUGUST 1999 – REVISED AUGUST 2011 www.ti.com Figure 2. FUNCTIONAL BLOCK DIAGRAM VDD Device Power Supply R1 MR (1) R2 RESET Reset Logic and Timer R3 (3) RESET GND Reference Voltage WD Watchdog Logic and Timer Transition Detector (2) NOTES: (1) TPS3123/5/6/8 (2) TPS3123/4/8 (3) TPS3124/5/6 Figure 3. TIMING DIAGRAM TPS3123/5/6/8 A B C D E F G VDD VIT VDD) ±10 mA Continuous total power dissipation See Dissipation Rating Table TA Operating free-air temperature range, –40°C to +85°C Tstg Storage temperature range, –65°C to +150°C Soldering temperature +260°C –0.3 V to VDD + 0.3 V Open drain RESET outputs (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA ≤ +25°C POWER RATING DERATING FACTOR ABOVE TA = +25°C TA = +70°C POWER RATING TA = +85°C POWER RATING DBV 437 mW 3.5 mW/°C 280 mW 227 mW Copyright © 1999–2011, Texas Instruments Incorporated 5 TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx SLVS227E – AUGUST 1999 – REVISED AUGUST 2011 www.ti.com RECOMMENDED OPERATING CONDITIONS at specified temperature range. MIN MAX TA = 0°C to +85°C 0.75 3.3 TA = –40°C to +85°C 0.85 3.3 UNIT VDD Supply voltage V VDD Manual reset voltage 0.0 VDD +0.3 V VWD1 Watchdog input voltage 0 VDD +0.3 V VIH High-level input voltage 0.7×VDD VIL Low-level input voltage Δ t/ΔV Input transition rise and fall rate at WDI TA Operating free-air temperature range V 0.3×VDD 1 V μs/V 40 +85 °C TYP MAX UNIT ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted). PARAMETER TEST CONDITIONS MIN MR pullup resistor (internal) IIH High-level input current IIL Low-level input current IOH High-level output current (leakage into RESET pin) VOH High-level output voltage (TPS3123/4/5 only) 27 WDI WDI = VDD = 3.3 V MR MR = 0.7 × VDD, WDI 1 VDD = 3.3 V 20 55 WDI = 0 V, VDD = 3.3 V 1 1 MR MR = 0 V, VDD = 3.3 V 80 170 TPS3126-xx, TPS3128-xx VDD = VOH = 3.3 V RESET RESET RESET VOL Low-level output voltage RESET 200 VDD = 1.5 V, IOH = –1 mA VDD = 3.3 V, IOH = –4.5 mA VDD = 0.75 V, IOH = –8 μA VDD = 1.5 V, IOH = –1 mA VDD = 0.75 V, IOL = 15 μA VDD = 1.5 V, IOL = 1.4 mA VDD = 1.5 V, IOL = 1.4 mA VDD = 3.3 V, IOL = 3 mA Negative-going input threshold voltage (1) TPS312xG15 1.35 1.40 1.45 1.56 1.62 1.68 2.57 2.64 2.71 TPS312xE12 1.10 1.14 1.18 TPS312xE15 1.38 1.43 1.48 1.65 1.71 1.77 TA = –40°C to +85°C Hysteresis at VDD input 1 V < VIT– < 1.4 V 15 1.4 V < VIT– < 2 V 20 Ci (1) (2) 6 Supply current Input capacitance at MR, WDI TPS3123-xx TPS3124-xx TPS3128-xx WDI = VDD, MR unconnected TPS3125-xx TPS3126-xx MR unconnected (2) VI = 0 V to 3.3 V μA nA V 0.4 1.12 2 V < VIT– < 3 V IDD 0.2 × VDD 1.08 TPS312xL30 μA V 1.04 TPS312xE18 Vhys 0.8×VDD TPS312xJ12 TPS312xJ18 VIT– kΩ 1 V mV 30 VDD = 0.75 V 14 VDD = 3.3 V 22 VDD = 0.75 V 14 VDD = 3.3 V 18 30 μA 25 5 pF To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 μF) should be placed near the supply terminal. The supply current during delay time td is typical 5 μA higher. Copyright © 1999–2011, Texas Instruments Incorporated TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx SLVS227E – AUGUST 1999 – REVISED AUGUST 2011 www.ti.com TIMING REQUIREMENTS at RL = 1 MΩ, CL = 50 pF, TA = +25°C. PARAMETER TEST CONDITIONS At VDD tw Pulse width At MR At WDI VIH = VIT– + 0.2 V, VIL = VIT – –0.2 V VDD ≥ VIT– + 0.2 V, VIL = 0.3 x VDD, MIN TYP MAX UNIT 6 VIH = 0.7 × VDD μs 1 0.1 SWITCHING CHARACTERISTICS at RL = 1 MΩ, CL = 50 pF, TA = +25°C. PARAMETER TEST CONDITIONS ttout Watchdog time out VDD ≥ VIT– + 0.2 V, See timing diagram td Delay time VDD > VIT– + 0.2 V, See timing diagram tPHL Propagation delay time, high-to-low-level output MR to RESET delay (TPS3123/5/6/8) tPLH Propagation delay time, low-to-high-level output MR to RESET delay (TPS3125/6) tPHL Propagation delay time, high-to-low-level output VDD to RESET delay tPLH Propagation delay time, low-to-high-level output VDD to RESET delay (TPS3124/5/6) Copyright © 1999–2011, Texas Instruments Incorporated VDD ≥ VIT–+ 0.2 V, VIL = 0.2 × VDD, VIH = 0.8 × VDD VIL = VIT– –0.2 V, VIH = VIT– + 0.2 V MIN TYP MAX UNIT 0.8 1.4 2.1 s 100 180 260 ms 0.1 μs 0.1 10 10 μs 7 TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx SLVS227E – AUGUST 1999 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS SUPPLY CURRENT vs SUPPLY VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 750 25 VOL − Low-Level Output Voltage − mV TA = 25°C I CC − Supply Current − µ A TPS3123J12 20 15 10 0 1 2 VDD − Supply Voltage − V 3 500 TA = 25°C TA = 0°C 250 0 3.3 200 50 100 150 IOL − Low-Level Output Current − µA Figure 5. Figure 6. LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 250 1.5 850 700 TA = 85°C VOL − Low-Level Output Voltage − V TPS3123J12 VDD = 0.85 V MR = Open 800 VOL − Low-Level Output Voltage − mV TA = 85°C 0 0 TA = 25°C 600 TA = 0°C 500 TA = − 40°C 400 300 200 TPS3125L30 VDD = 1.5 V MR = Open 1.25 TA = 85°C TA = 25°C 1 TA = 0°C TA = − 40°C 0.75 0.5 0.25 100 0 0 0 100 200 300 400 IOL − Low-Level Output Current − µA Figure 7. 8 TPS3123J12 VDD = 0.75 V 500 0 4 5 1 2 3 IOL − Low-Level Output Current − mA 6 Figure 8. Copyright © 1999–2011, Texas Instruments Incorporated TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx SLVS227E – AUGUST 1999 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 1.6 3.3 TPS3125L30 VDD = 3.3 V MR = Open 2.75 TA = 85°C 2.5 TA = 25°C TA = 0°C 2.25 TA = − 40°C 2 TPS3123J12 VDD = 1.5 V MR = Open 1.4 VOH − High-Level Output Voltage − V VOL − Low-Level Output Voltage − V 3 1.75 1.5 1.25 1 0.75 0.5 1.2 1 TA = − 40°C TA = 85°C 0.8 TA = 25°C 0.6 0.4 TA = 0°C 0.2 0.25 0 0 5 10 15 20 25 IOL − Low-Level Output Current − mA −2 −3 −4 Figure 9. Figure 10. HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT NORMALIZED INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE TPS3123J12 VDD = 3.3 V MR = Open 3 VOH − High-Level Output Voltage − V −1 2.75 2.5 2.25 2 TA = 85°C 1.75 TA = − 40°C 1.5 TA = 25°C 1.25 1 TA = 0°C 0.75 0.5 0.25 0 −5 −10 −15 −20 −25 IOH − High-Level Output Current − mA Figure 11. Copyright © 1999–2011, Texas Instruments Incorporated −5 IOH − High-Level Output Current − mA 3.4 0 0 30 −30 Normalized Input Threshold Voltage − V IT(T A)/ V IT (25 °C ) 0 1.005 TPS312xJ12 1.004 1.003 1.002 1.001 1 0.999 0.998 −40 −20 0 20 40 60 TA − Free-Air Temperature − °C 80 Figure 12. 9 TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx SLVS227E – AUGUST 1999 – REVISED AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) MINIMUM PULSE DURATION vs THRESHOLD OVERDRIVE 4.5 1.005 TPS312xL30 4 1.004 t w− Minimum Pulse Duration − µ s Normalized Input Threshold Voltage − V IT(T A)/ V IT (25 °C ) NORMALIZED INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE 1.003 1.002 1.001 1 0.999 0.998 −40 TPS312xL30 MR = Open VIT = 2.64 V TA = 25°C 3.5 3 2.5 2 1.5 1 0.5 0 −20 0 20 40 60 200 250 50 100 150 VDD − Threshold Overdrive − mV 0 80 TA − Free-Air Temperature − °C Figure 13. 300 Figure 14. MINIMUM PULSE DURATION vs THRESHOLD OVERDRIVE 3.5 MR = Open VIT = 1.08 V TA = 25°C t w− Minimum Pulse Duration − µ s 3 TPS312xJ12 2.5 2 1.5 1 0.5 0 0 50 100 150 200 250 300 VDD − Threshold Overdrive − mV Figure 15. 10 Copyright © 1999–2011, Texas Instruments Incorporated TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx SLVS227E – AUGUST 1999 – REVISED AUGUST 2011 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (December, 2006) to Revision E • Page Removed TPS3128E12DBVR from list of orderable devices in Table 1 .............................................................................. 2 Copyright © 1999–2011, Texas Instruments Incorporated 11 PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TPS3123J12DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBNI TPS3123J12DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBNI TPS3123J18DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBPI TPS3123J18DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBPI TPS3124G15DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBRI TPS3124J12DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBQI TPS3124J12DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBQI TPS3124J18DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBSI TPS3124J18DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBSI TPS3125G15DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBUI TPS3125G15DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBUI TPS3125G15DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBUI TPS3125G15DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBUI TPS3125J12DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBTI TPS3125J12DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBTI TPS3125J18DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBVI TPS3125J18DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBVI Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 6-Feb-2020 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TPS3125J18DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBVI TPS3125J18DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBVI TPS3125L30DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBXI TPS3125L30DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBXI TPS3125L30DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PBXI TPS3126E12DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFOI TPS3126E12DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFOI TPS3126E15DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFPI TPS3126E15DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFPI TPS3126E18DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFQI TPS3126E18DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFQI TPS3128E12DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFRI TPS3128E12DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFRI TPS3128E15DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFSI TPS3128E15DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFSI TPS3128E18DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFTI TPS3128E18DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFTI TPS3128E18DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 PFTI Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of