TPS3514D

TPS3514 www.ti.com SLVS422C – JUNE 2002 – REVISED DECEMBER 2006 PC POWER-SUPPLY SUPERVISORS FEATURES • • • • • • • • • • • DESCRIPTION Over-Voltage Protection and Lockout: 12V, 5V, and 3.3V Supplies Over-Current Protection and Lockout: 12V, 5V, and 3.3V Supplies Under-Voltage Protection and Lockout: 12V Supplies Under-Voltage Detect: 5V and 3.3V Supplies Fault-Protection Output with Open-Drain Output Stage Open-Drain, Power-Good Output Signal: Monitors Power-Good Signal Input 3.3V and 5V Supplies 300ms Power-Good Delay 75ms Delay: 5V, 3.3V Power-Supply Short-Circuit Turn-On Protection 2.3ms PSON Control To FPO Turn-Off Delay 38ms PSON Control Debounce Wide Supply Voltage Range: 4.5V to 15V The TPS3514 is a PC switching power-supply system monitor with minimum external components. It provides under-voltage lockout (UVLO), over-voltage (OV), under-voltage (UV), over-current (OC) protection circuits, power-good indicator, and on/off control. UVLO thresholds are 4.45V (on) and 3.65V (off). Over-current protection (OCP) and over-voltage protection (OVP) monitor 3.3V, 5V, and 12V supplies. When an OC or OV condition is detected, the power-good output (PGO) is asserted low and the fault protection output (FPO) is latched high. PSON from low-to-high resets the latch. The OCP function will be enabled 75ms after PSON goes LOW with PGI HIGH and a debounce of typically 38ms. A built-in 2.3ms delay with 38ms debounce from PSON to FPO output is enabled at turn-off. An external resistor is connected between the RI pin and the GND pin. This will program a precise I(REF) for OCP function. The programmable I(REF) range is from 12.5µA to 62.5µA. Three OCP comparators and the I(REF) section are supplied by VS12. The current draw from the VS12 pin is less than 1mA. The power-good feature monitors PGI, the 3.3V and 5V supplies, and issues a power-good signal when the output is ready. The TPS3514 is characterized for operation from –40°C to +85°C. The TPS3514 is available in DIP-14 and SO-14 packages. IO 0.01Ω 12V 12V 0.01Ω 5V 5V 0.01Ω 3.3V 5V VSB PG From Transformer R1Ω R2Ω 3.3V 5V VSB 470kΩ PGO GND VDD FPO System Side 1kΩ TPS3514 PGI VS5 PSON VS33 IS12 VS12 Power Supply Output Side 560Ω 820Ω 56kΩ RI IS33 NC IS5 1.5kΩ Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2006, Texas Instruments Incorporated TPS3514 www.ti.com SLVS422C – JUNE 2002 – REVISED DECEMBER 2006 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE-LEAD TPS3514 (1) PACKAGE DESIGNATOR SO-14 D DIP-14 N (1) SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER TPS3514D Rails, 50 40°C to +85°C TPS3514 TPS3514DR Tape and Reel, 2500 TPS3514N Rails, 25 TRANSPORT MEDIA, QUANTITY For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) (2) UNIT Supply Voltage, VDD 16V Voltage on PSON, IS5, IS33, PGI 8V Voltage on VS33, VS5 16V Voltage on FPO 16V Voltage on PGO 8V All Other Pins –0.3V to 16V Continuous Total Power Dissipation See Dissipation Ratings Table Operating Free-Air Temperature Range, TA –40°C to +85°C Storage Temperature Range, Tstg –65°C to +150°C Soldering Temperature (1) (2) 2 260°C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to GND. Submit Documentation Feedback TPS3514 www.ti.com SLVS422C – JUNE 2002 – REVISED DECEMBER 2006 RECOMMENDED OPERATING CONDITIONS At specified temperature range. PARAMETER MIN MAX UNIT 4.5 15 V PSON, VS5, VS33, IS5, IS33 7 V VS12, IS12 15 V VDD + 0.3V (max = 7V) V FPO 15 V PGO 7 V FPO 20 mA PGO 10 mA Supply Voltage VDD Inputs VI PGI Outputs VO Sink Current IO(SINK) Supply Voltage Rising Time OCP Reference Source Operating Free-Air Temperature Range (1) tR (1) 1 I(REF) 12.5 62.5 µA TA –40 +85 °C ms VDD rising and falling slew rate must be less than 14V/ms. DISSIPATION RATINGS TABLE PACKAGE TA≤ +25°C POWER RATING DERATING FACTOR ABOVE TA = +25°C TA = +70°C POWER RATING TA = +85°C POWER RATING D 956mW 7.65mW/°C 612mW 497mW N 1512mW 12.1mW/°C 968mW 786mW OVER-CURRENT PROTECTION MAX OUTPUT CURRENT (1) OVER-CURRENT PROTECTION TRIP POINT 12V 6A 9.2A 5V 16A 24.6A 3.3V 9A 13.5A (1) Over-current protection trip point can be programmable. Submit Documentation Feedback 3 TPS3514 www.ti.com SLVS422C – JUNE 2002 – REVISED DECEMBER 2006 ELECTRICAL CHARACTERISTICS Limits apply over operating free-air temperature range, TA = –40°C to +85°C, unless otherwise noted. TPS3514 PARAMETER CONDITIONS MIN TYP MAX UNIT VS33 3.7 3.9 4.1 V VS5 5.7 6.1 6.5 V VS12 13.2 13.8 14.4 V 7.6 8 8.4 OVER-VOLTAGE AND OVER-CURRENT PROTECTION Over-Voltage Threshold Ratio of Current Sense Sink Current to Current Sense Setting Pin (RI) Source Current, I(REF) C Leakage Current (FPO) Low-Level Output Voltage (FPO) µA Ilkg V(FPO) = 5V 5 VOL I(SINK) = 20mA, VDD = 5V 0.7 V Noise Deglitch Time (OVP) Current Source Reference Voltage Resistor at RI = 30kΩ, 0.1% Resistor V(RI) VDD = 5V 35 73 110 µs VDD = 5V 1.1 1.15 1.2 V 4.45 V UNDER-VOLTAGE LOCKOUT Start Threshold Voltage Minimum Operating Voltage After Start-Up 3.65 V PGI AND PGO Input Threshold VIT(PGI) 0.9 x typ 1.15 1.01 x typ V VS33 2 2.2 2.4 V VS5 3.3 3.5 3.7 V VS12 8.5 9 9.5 V 5 mV Under-Voltage Threshold Input Offset Voltage for OCP Comparators Leakage Current (PGO) Low-Level Output Voltage (PGO) Short-Circuit Protection Delay Delay Time llkg PGO = 5V 5 µA VOL I(SINK) = 10mA, VDD = 4.5V 0.4 V 3.3V, 5V 49 75 114 ms t(d)(1) PGI to PGO VDD = 5V 200 300 450 ms PGI to FPO VDD = 5V 3.2 4.8 7.2 ms PGI to PGO VDD = 5V 88 150 225 µs 12V UVP to FPO VDD = 5V 88 150 225 µs Noise Deglitch Time PSON CONTROL Input Pull-Up Current II PSON = 0V µA –120 High-Level Input Voltage VIH Low-Level Input Voltage VIL 1.2 V Debounce Time (PSON) t(b) VDD = 5V 24 38 50 ms t(d)(2) VDD = 5V tb + 1.1 tb + 2.3 tb + 4 ms 1 mA Delay Time (PSON to FPO) 2.4 V TOTAL DEVICE Supply Current 4 IDD PSON = 5V Submit Documentation Feedback TPS3514 www.ti.com SLVS422C – JUNE 2002 – REVISED DECEMBER 2006 PIN CONFIGURATION Top View SO, DIP PIN ASSIGNMENTS PIN NAME FUNCTION 3 FPO Inverted Fault Ptotection output. Open-drain output stage. 2 GND Ground 5 IS12 12V Over-Current Protection Input 8 IS5 5V Over-Current Protection Input 9 IS33 3.3V Over-Current Protection Input 7 NC No Internal Connection 1 PGI Power-Good Input 14 PGO Power-Good Output. Open-drain output stage. 4 PSON On/Off Control Input 6 RI 13 VDD 10 VS12 12V Over-Voltage/Under-Voltage Protection Input 11 VS33 3.3V Over-Voltage/Under-Voltage Protection Input 12 VS5 5V Over-Voltage/Under-Voltage Protection Input OCP Reference Source Supply Voltage FUNCTION TABLE (1) (1) (2) (3) PGI PSON UV CONDITION 3.3V/5V OV CONDITIONS UV CONDITION 12V OC CONDITIONS FPO (2) PGO (3) < 0.9V L No No No L L < 0.9V L No No Yes L L < 0.9V L No Yes No H L < 0.9V L No Yes Yes H L < 0.9V L Yes No No L L < 0.9V L Yes No Yes L L < 0.9V L Yes Yes No H L < 0.9V L Yes Yes Yes H L > 1.2V L No No No L H > 1.2V L No No Yes H L > 1.2V L No Yes No H L > 1.2V L No Yes Yes H L > 1.2V L Yes No No H L > 1.2V L Yes No Yes H L > 1.2V L Yes Yes No H L > 1.2V L Yes Yes Yes H L x H x x x H L x = Don’t Care. For FPO, L = Fault is not latched. H = Fault is latched. For PGO, L = Fault. H = No Fault. Submit Documentation Feedback 5 TPS3514 www.ti.com SLVS422C – JUNE 2002 – REVISED DECEMBER 2006 TIMING DIAGRAMS VDD (SB5V) PSON PFO PGI 3.3V/5V 300ms 12V 2.3ms 300ms 38ms 38ms PGO PSON Off PSON On PGO Off 300ms OVP Occurs Figure 1. AC Turn-On and Over-Voltage Protect VDD PSON FPO PGI 3.3V/5V 12V 300ms 300ms PGO 38ms 38ms 300ms 3.3V or 5V Drop OCP Occurs 300ms 12V UVP Occurs Figure 2. Over-Current and Under-Voltage Detect/Protect 6 Submit Documentation Feedback TPS3514 www.ti.com SLVS422C – JUNE 2002 – REVISED DECEMBER 2006 SCHEMATIC VDD VS12 12V OV + _ UVLO POR VS5 R 5V OV FPO + _ S 73µ s Debounce VS33 2.3ms Delay VDD 38ms Debounce 3.3V OV + _ PSON 3.3V UV + _ 75ms Delay 5V UV VDD + _ PGO PGI1 PGI 150µs Debounce + _ 300ms Delay 12V UV + _ Band-Gap Reference 1.153V 150µ s Debounce _ IS12 + Iref x 8 I(REF) OCP Reference Source _ IS5 RI + Iref x 8 _ IS33 + Iref x 8 Submit Documentation Feedback 7 TPS3514 www.ti.com SLVS422C – JUNE 2002 – REVISED DECEMBER 2006 TYPICAL CHARACTERISTICS TA = +25°C, unless otherwise noted. 8 SUPPLY CURRENT vs SUPPLY VOLTAGE INPUT CURRENT (PSON) vs INPUT VOLTAGE (PSON) LOW-LEVEL OUTPUT VOLTAGE (FPO) vs LOW-LEVEL OUTPUT CURRENT (FPO) LOW-LEVEL OUTPUT VOLTAGE (FPO) vs LOW-LEVEL OUTPUT CURRENT (FPO) LOW-LEVEL OUTPUT VOLTAGE (PGO) vs LOW-LEVEL OUTPUT CURRENT (PGO) LOW-LEVEL OUTPUT VOLTAGE (PGO) vs LOW-LEVEL OUTPUT CURRENT (PGO) Submit Documentation Feedback TPS3514 www.ti.com SLVS422C – JUNE 2002 – REVISED DECEMBER 2006 TYPICAL CHARACTERISTICS (continued) TA = +25°C, unless otherwise noted. NORMALIZED SENSE THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE AT VDD CURRENT RATIO vs FREE-AIR TEMPERATURE DETAILED DESCRIPTION Although there is no requirement to meet specific timing parameters, the following signal timings are recommended: 2ms ≤ t2 ≤ 20ms, 100ms < t3 < 2000ms, t4 > 1ms, t5 ≤ 10ms Power-Good and Power-Good Delay A PC power supply is commonly designed to provide a power-good signal, which is defined by the computer manufacturers. Power-Good Output (PGO) is a power-good indicator and should be asserted high by the PC power supply to indicate that the 5VDC and 3.3VDC outputs are above the under-voltage threshold limit. At this time, the supply should be able to provide enough power to assure continuous operation within the specification. Furthermore, motherboards should be designed to comply with the above recommended timing. If timings other than these are implemented or required, this information should be clearly specified. The TPS3514 family of power-supply supervisors provides a PGO for the 3.3V and 5V supply voltage rails and a separate Power-Good Input (PGI). An internal timer is used to generate a 300ms power-good delay. Conversely, when either the 5VDC or the 3.3VDC output voltages fall below the under-voltage threshold, or when main power has been removed for a sufficiently long time so that power-supply operation is no longer assured, PGO should be deasserted to a low state. The power-good, DC enable (PSON), and the 5V/3.3V supply rails are shown in Figure 3. PSON On Off 75% 5V/3.3V Output 10% PGO t5 t4 t3 t2 Figure 3. Timing of PSON and PGO Submit Documentation Feedback 9 TPS3514 www.ti.com SLVS422C – JUNE 2002 – REVISED DECEMBER 2006 If the voltage signals at PGI, VS33, and VS5 rise above the under-voltage threshold, the open-drain PGO will go high after a delay of 300ms. When the PGI voltage or any of the 3.3V/5V rail drops below the under-voltage threshold, PGO will be disabled immediately. Power-Supply Remote On/Off (PSON) And Fault Protect Output (FPO) Since the latest personal computer generation focuses on easy turn-on and power-saving functions, the PC power supply will require two characteristics. One is a DC power-supply remote on/off function; the other is standby voltage to achieve very low power consumption of the PC system. Thus, requiring the main power supply to be shut down. The power-supply remote on/off (PSON) is an active-low signal that turns on all of the main power rails including the 3.3V, 5V, –5V, and –12V power rails. When this signal is held high by the PC motherboard or left open-circuited, the signal of the Fault Protect Output (FPO) also goes high. In this condition, the main power rails should not deliver current and should be held at 0V. When the FPO signal is held high due to an occurring fault condition, the fault status will be latched and the outputs of the main power rails should not deliver current and should be held at 0V. Toggling PSON from low to high will reset the fault protection latch. During this fault condition, only the standby power is not affected. When PSON goes from high to low or low to high, the 38ms debounce block will prevent a glitch on the input from disabling/enabling the FPO output. During the HIGH to LOW transition, the under-voltage function is disabled to prevent turn-on failure. Power should be delivered to the rails only if the PSON signal is held at ground potential, thus, FPO is active low. The FPO pin can be connected to 5VDC (or up to 15VDC) through a pull-up resistor. Under-Voltage Protection (UVP) The TPS3514 provides Under-Voltage Protection (UVP) for the 12V rail and Under-Voltage Detect (UVD) for the 3.3V and 5V rails. When an under-voltage condition appears at the VS12 input pin for more than 150µs, the FPO output goes high and PGO goes low. Also, this fault condition will be latched until PSON is toggled from low to high or VDD is removed. 10 Over-Current Protection (OCP) In bridge, or forward type, off-line switching power supplies, usually designed for medium to large power, the overload protection design needs to be very precise. Most of these types of power supplies sense the output current for an overload condition. The trigger-point needs to be set higher than the maximum load in order to prevent false turn-on. The TPS3514 provides Over-Current Protection (OCP) for the 3.3V, 5V, and 12V rails. When an over-current condition appears at the OCP comparator input pins for more than 73µs, the FPO output goes high and PGO goes low. Also, this fault condition will be latched until PSON is toggled from low to high or VDD is removed. The resistor connected between the RI pin and the GND pin will create a precise I(REF) for the OCP function. The formula for choosing the RI resistor is V(RI)/I(REF). The I(REF) range is from 12.5µA to 62.5µA. Three OCP comparators and the I(REF) section are supplied through the V12 pin. Current drawn from the VS12 pin is less than 1mA. Following is an example on calculating OCP for the 12V rail: RI = V(RI)/I(REF) = 1.15V/20µA = 56kΩ I(REF) • C • R(IS12) = R(SENSE)⋅ I(OCP_TRIP) I(OCP_TRIP) = 20µA • 8 • 560Ω/0.01Ω = 9.2A C = Current Ratio (typically = 8) Over-Voltage Protection (OVP) The Over-Voltage Protection (OVP) of the TPS3514 monitors 3.3V, 5V, and 12V. When an over-voltage condition appears at one of the 3.3V, 5V, or 12V input pins for more than 73µs, the FPO output goes high and PGO goes low. Also, this fault condition will be latched until PSON is toggled from low-to-high or VDD is removed. During fault conditions, most power supplies have the potential to deliver higher output voltages than those normally specified or required. In unprotected equipment, it is possible for output voltages to be high enough to cause internal or external damage of the system. To protect the system under these abnormal conditions, it is common practice to provide over-voltage protection within the power supply. Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS3514D ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TPS3514D TPS3514DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TPS3514D TPS3514N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 TPS3514N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of