TPS3779CDBVR

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents TPS3779, TPS3780 SBVS250 – APRIL 2015 TPS37xx Dual-Channel, Low-Power, High-Accuracy Voltage Detectors 1 Features 3 Description • • • • • The TPS3779 and TPS3780 are a family of highaccuracy, two-channel voltage detectors with lowpower and small solution size. The SENSE1 and SENSE2 inputs include hysteresis to reject brief glitches, ensuring stable output operation without false triggering. This family offers different factory-set hysteresis options of 0.5%, 1%, 5%, or 10%. 1 • • • Two-Channel Detectors in Small Packages High-Accuracy Threshold and Hysteresis: 1.0% Low Quiescent Current: 2 µA (typ) Adjustable Detection Voltage Down to 1.2 V Multiple Hysteresis Options: – 0.5%, 1%, 5%, and 10% Temperature Range: –40°C to 125°C Push-Pull (TPS3779) and Open-Drain (TPS3780) Output Options Available in µSON and SOT23 Packages 2 Applications • • • • • • • • The TPS3779 and TPS3780 have adjustable SENSE inputs that can be configured by an external resistor divider. When the voltage at the SENSE1 or SENSE2 input goes below the falling threshold, OUT1 or OUT2 is driven low, respectively. When SENSE1 or SENSE2 rises above the rising threshold, OUT1 or OUT2 goes high, respectively. The devices have a very low quiescent current of 2 µA (typical) and provide a precise, space-conscious solution for voltage detection suitable for low-power system-monitoring and portable applications. The TPS3779 and TPS3780 operate from 1.5 V to 6.5 V, over the –40°C to 125°C temperature range. DSP, Microcontroller, and Microprocessor Applications Portable Medical Devices Building Automation Set-Top Boxes Solid-State Drives Notebook and Desktop Computers Portable and Battery-Powered Products Power-Supply Sequencing Applications Device Information(1) PART NUMBER TPS37xx PACKAGE BODY SIZE (NOM) µSON (6) 1.45 mm × 1.00 mm SOT23 (6) 2.92 mm × 1.30 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Sense Threshold (VIT+) Deviation versus Temperature Typical Schematic VDD = 1.5 V to 6.5 V 0.1 F 0.4 Sense 1 VDD = 1.5 V Sense 1 VDD = 6.5 V Sense 2 VDD = 1.5 V Sense 2 VDD = 6.5 V 0.32 VIT+ Deviation (%) 0.24 TPS378 0 Onl y VMON1 R1 VPUL LU P VDD RPU1 0.16 VMON2 0.08 R3 0 SENSE1 R2 Device SENSE2 -0.08 R4 OUT1 RPU1 OUT2 To a re set or enable inpu t of the syste m To a re set or enable inpu t of the syste m GND -0.16 -0.24 -0.32 -0.4 -40 -20 0 20 40 60 Temperature (qC) 80 100 120 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS3779, TPS3780 SBVS250 – APRIL 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 4 7.1 7.2 7.3 7.4 7.5 7.6 7.7 4 4 4 4 5 6 7 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Timing Requirements ................................................ Typical Characteristics .............................................. 8.4 Device Functional Modes........................................ 11 9 Application and Implementation ........................ 12 9.1 9.2 9.3 9.4 Application Information............................................ Typical Applications ................................................ Monitoring Two Separate Rails............................... Early Warning Detection ......................................... 12 13 13 14 10 Power-Supply Recommendations ..................... 15 11 Layout................................................................... 15 11.1 Layout Guidelines ................................................. 15 11.2 Layout Example .................................................... 15 12 Device and Documentation Support ................. 16 12.1 12.2 12.3 12.4 12.5 12.6 Detailed Description ............................................ 10 8.1 Overview ................................................................. 10 8.2 Functional Block Diagrams ..................................... 10 8.3 Feature Description................................................. 11 Device Support...................................................... Documentation Support ........................................ Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 16 16 16 16 16 17 13 Mechanical, Packaging, and Orderable Information ........................................................... 17 4 Revision History 2 DATE REVISION NOTES April 2015 * Initial release. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 TPS3779, TPS3780 www.ti.com SBVS250 – APRIL 2015 5 Device Comparison Table PRODUCT HYSTERESIS (%) OUTPUT TPS3779A 0.5 Push-pull TPS3779B 5 Push-pull TPS3779C 10 Push-pull TPS3779D 1 Push-pull TPS3780A 0.5 Open-drain TPS3780B 5 Open-drain TPS3780C 10 Open-drain TPS3780D 1 Open-drain 6 Pin Configuration and Functions DRY Package 1.45-mm × 1-mm µSON (Top View) SENSE1 1 6 VDD GND 2 5 OUT1 SENSE2 3 4 OUT2 DBV Package SOT23-6 (Top View) VDD 1 6 SENSE1 OUT1 2 5 GND OUT2 3 4 SENSE2 Pin Functions PIN NAME GND OUT1 NO. I/O DRY DBV 2 5 5 2 DESCRIPTION — Ground O OUT1 is the output for SENSE1. OUT1 is asserted (driven low) when the voltage at SENSE1 falls below VIT–. OUT1 is deasserted (goes high) after SENSE1 rises higher than VIT+. OUT1 is a push-pull output for the TPS3779 and an open-drain output for the TPS3780. The open-drain device (TPS3780) can be pulled up to 6.5 V independent of VDD; a pull-up resistor is required for this device. OUT2 4 3 O OUT2 is the output for SENSE2. OUT2 is asserted (driven low) when the voltage at SENSE2 falls below VIT–. OUT2 is deasserted (goes high) after SENSE2 rises higher than VIT+. OUT2 is a push-pull output for the TPS3779 and an open-drain output for the TPS3780. The open-drain device (TPS3780) can be pulled up to 6.5 V independent of VDD; a pull-up resistor is required for this device. SENSE1 1 6 I This pin is connected to the voltage to be monitored with the use of an external resistor divider. When the voltage at this pin drops below the threshold voltage (VIT–), OUT1 is asserted. SENSE2 3 4 I This pin is connected to the voltage to be monitored with the use of an external resistor divider. When the voltage at this pin drops below the threshold voltage (VIT–), OUT2 is asserted. VDD 6 1 I Supply voltage input. Connect a 1.5-V to 6.5-V supply to VDD in order to power the device. Good analog design practice is to place a 0.1-µF ceramic capacitor close to this pin (required for VDD < 1.5 V). Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 3 TPS3779, TPS3780 SBVS250 – APRIL 2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating junction temperature range (unless otherwise noted) (1) Voltage Current MAX UNIT –0.3 7 V OUT1, OUT2 (TPS3779 only) –0.3 VDD + 0.3 V OUT1, OUT2 (TPS3780 only) –0.3 7 V SENSE1, SENSE2 –0.3 7 V OUT1, OUT2 Temperature (1) MIN VDD ±20 mA Operating junction, TJ –40 125 °C Storage, Tstg –65 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7.2 ESD Ratings VALUE Electrostatic discharge V(ESD) (1) (2) Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101 (2) ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating junction temperature range (unless otherwise noted) MIN Power-supply voltage RPU NOM MAX UNIT 1.5 6.5 V Sense voltage SENSE1, SENSE2 0 6.5 V Output voltage (TPS3779 only) OUT1, OUT2 0 VDD + 0.3 V Output voltage (TPS3780 only) OUT1, OUT2 0 6.5 1.5 10,000 kΩ –5 5 mA Pullup resistor (TPS3780 only) Current OUT1, OUT2 CIN Input capacitor TJ Junction temperature 0.1 –40 V µF 25 125 °C 7.4 Thermal Information TPS3779, TPS3780 THERMAL METRIC (1) DRY (USON) DBV (SOT23-6) 6 PINS 6 PINS RθJA Junction-to-ambient thermal resistance 306.7 193.9 RθJC(top) Junction-to-case (top) thermal resistance 174.1 134.5 RθJB Junction-to-board thermal resistance 173.4 39.0 ψJT Junction-to-top characterization parameter 30.9 30.4 ψJB Junction-to-board characterization parameter 171.6 38.5 RθJC(bot) Junction-to-case (bottom) thermal resistance 65.2 N/A (1) 4 UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, . Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 TPS3779, TPS3780 www.ti.com SBVS250 – APRIL 2015 7.5 Electrical Characteristics All specifications are over the operating temperature range of –40°C < TJ < 125°C and 1.5 V ≤ VDD ≤ 6.5 V, unless otherwise noted. Typical values are at TJ = 25°C and VDD = 3.3 V. PARAMETER VDD V(POR) TEST CONDITIONS Input supply range Power-on reset voltage MIN (1) Supply current (into VDD pin) 2.09 VDD = 3.3 V, no load, –40°C < TJ < 125°C VDD = 6.5 V, no load, –40°C < TJ < 85°C 2.29 VDD = 6.5 V, no load, –40°C < TJ < 125°C Positive-going input threshold voltage VIT+ Negative-going input threshold voltage VIT– –1% Input current VOL Low-level output voltage High-level output voltage (TPS3779 only) VOH Ilkg(OD) (1) Open-drain output leakage current (TPS3780 only) V 0.8 V µA 5.80 µA 4.00 µA 6.50 µA V 1% TPS37xxA (0.5% hysteresis) 1.188 V TPS37xxB (5% hysteresis) 1.134 V TPS37xxC (10% hysteresis) 1.074 V TPS37xxD (1% hysteresis) 1.182 V V(SENSE) falling I(SENSE) UNIT 3.72 1.194 V(SENSE) rising V(SENSE) falling MAX 6.5 VOL (max) = 0.2 V, IOL = 15 µA VDD = 3.3 V, no load, –40°C < TJ < 85°C IDD TYP 1.5 –1% 1% –15 15 nA VDD ≥ 1.2 V, ISINK = 0.4 mA 0.25 V VDD ≥ 2.7 V, ISINK = 2 mA 0.25 V VDD ≥ 4.5 V, ISINK = 3.2 mA 0.30 V V(SENSE) = 0 V or VDD VDD ≥ 1.5 V, ISOURCE = 0.4 mA 0.8 VDD V VDD ≥ 2.7 V, ISOURCE = 1 mA 0.8 VDD V VDD ≥ 4.5 V, ISOURCE = 2.5 mA 0.8 VDD V High impedance, V(SENSE) = V(OUT) = 6.5 V, –40°C < TJ < 85°C –50 50 nA High impedance, V(SENSE) = V(OUT) = 6.5 V, –40°C < TJ < 125°C –250 250 nA Outputs are undetermined below V(POR). Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 5 TPS3779, TPS3780 SBVS250 – APRIL 2015 www.ti.com 7.6 Timing Requirements Typical values are at TJ = 25°C and VDD = 3.3 V. SENSE transitions between 0 V and 1.3 V. MIN NOM MAX UNIT tPD(r) SENSE (rising) to OUT propagation delay 5.5 µs tPD(f) SENSE (falling) to OUT propagation delay 10 µs tSD Startup delay (1) 570 µs (1) During power-on or a VDD transient below VDD(min), the outputs reflect the input conditions 570 µs after VDD transitions through VDD(min). VDD(min) VDD V(POR) VIT+ SENSEx VHYS VIT± Undefined OUTx tSD tPD(r) tPD(f) Undefined Undefined 570 µs 570 µs Figure 1. Timing Diagram 6 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 TPS3779, TPS3780 www.ti.com SBVS250 – APRIL 2015 7.7 Typical Characteristics 0.4 6.5 6 5.5 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C Sense 1 VDD = 1.5 V Sense 1 VDD = 6.5 V Sense 2 VDD = 1.5 V Sense 2 VDD = 6.5 V 0.32 0.24 VIT+ Deviation (%) Supply Current (PA) At TJ = 25°C with a 0.1-µF capacitor close to VDD, unless otherwise noted. 0.16 0.08 0 -0.08 -0.16 -0.24 -0.32 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Supply Voltage (V) 5 5.5 6 -0.4 -40 6.5 -20 0 20 40 60 Temperature (qC) 80 100 120 SENSE1 = SENSE2 = 1.5 V Figure 2. Supply Current vs Supply Voltage Figure 3. Sense Threshold (VIT+) Deviation vs Temperature 0.4 4500 Sense 1 VDD = 1.5 V Sense 1 VDD = 6.5 V Sense 2 VDD = 1.5 V Sense 2 VDD = 6.5 V 0.32 4000 3500 0.16 3000 0.08 Count 0 2500 2000 -0.08 1500 -0.16 1000 -0.24 500 -0.32 1 0.8 0 0.6 120 0.4 100 0.2 80 -0.2 20 40 60 Temperature (qC) -0.4 0 -0.6 0 -20 -1 -0.4 -40 -0.8 VIT- Deviation (%) 0.24 VIT+ Accuracy (%) VDD = 6.5 V Figure 4. Sense Threshold (VIT–) Deviation vs Temperature Figure 5. Sense Threshold (VIT+) 5500 5000 4500 4000 VOL (V) Count 3500 3000 2500 2000 1500 1000 500 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 0 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C 0 0.5 VIT- Accuracy (%) 1 1.5 2 2.5 3 3.5 Output Sink Current (mA) 4 4.5 5 VDD = 6.5 V Figure 6. Sense Threshold (VIT–) Figure 7. Output Voltage Low vs Output Current (VDD = 1.5 V) Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 7 TPS3779, TPS3780 SBVS250 – APRIL 2015 www.ti.com Typical Characteristics (continued) At TJ = 25°C with a 0.1-µF capacitor close to VDD, unless otherwise noted. 0.5 0.5 TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C 0.45 0.4 0.3 0.4 0.35 VOL (V) VOL (V) 0.35 0.25 0.2 0.3 0.25 0.2 0.15 0.15 0.1 0.1 0.05 0.05 0 0 0 0.5 1 1.5 2 2.5 3 3.5 Output Sink Current (mA) 4 4.5 5 0 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0.1 TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C 5 2.7 2.5 2.3 TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C 2.1 1.9 1.7 1.5 0.2 0.3 0.4 0.5 0.6 Output Source Current (mA) 0.7 0 0.8 tPD(r) (Ps) 6.1 6 TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C 5.5 0.5 1 1.5 2 2.5 3 3.5 Output Source Current (mA) 4 4.5 5 0.5 1 1.5 2 2.5 3 3.5 Output Source Current (mA) 4 4.5 5 Figure 11. Output Voltage High vs Output Current (VDD = 3.3 V) 6.2 0 4.5 2.9 6.3 5.6 4 3.1 6.4 5.7 1.5 2 2.5 3 3.5 Output Sink Current (mA) 3.3 6.5 5.8 1 3.5 Figure 10. Output Voltage High vs Output Current (VDD = 1.5 V) 5.9 0.5 Figure 9. Output Voltage Low vs Output Current (VDD = 6.5 V) VOH (V) VOH (V) Figure 8. Output Voltage Low vs Output Current (VDD = 3.3 V) VOH (V) TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C 0.45 6 5.9 5.8 5.7 5.6 5.5 5.4 5.3 5.2 5.1 5 4.9 4.8 4.7 -40 Sense 1 VDD = 1.5 V Sense 1 VDD = 6.5 V Sense 2 VDD = 1.5 V Sense 2 VDD = 6.5 V -20 0 20 40 60 Temperature (qC) 80 100 120 SENSE1 = SENSE2 = 0 V to 1.3 V Figure 12. Output Voltage High vs Output Current (VDD = 6.5 V) 8 Figure 13. Propagation Delay from Sense High to Output High Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 TPS3779, TPS3780 www.ti.com SBVS250 – APRIL 2015 Typical Characteristics (continued) 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -40 1150 VDD = 1.5 V VDD = 6.5 V 1050 950 850 tSD (Ps) tPD(f) (Ps) At TJ = 25°C with a 0.1-µF capacitor close to VDD, unless otherwise noted. 750 650 550 Sense 1 VDD = 1.5 V Sense 1 VDD = 6.5 V Sense 2 VDD = 1.5 V Sense 2 VDD = 6.5 V -20 0 20 40 60 Temperature (qC) 450 350 80 100 250 -40 120 -20 0 20 40 60 Temperature (qC) 80 100 120 SENSE1 = SENSE2 = 1.3 V to 0 V Figure 15. Startup Delay Figure 14. Propagation Delay from Sense Low to Output Low 55 55 TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C Transient Duration (Ps) 45 40 35 TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C 50 45 Transient Duration (Ps) 50 30 25 20 15 40 35 30 25 20 15 10 10 5 5 0 0 0 3 6 9 12 15 18 Overdrive (%) 21 24 27 30 0 6 9 12 15 18 Overdrive (%) 21 24 27 30 High-to-low transition occurs above the curve Figure 16. Minimum Transient Duration (HL) vs Overdrive (VDD = 1.5 V) Figure 17. Minimum Transient Duration (HL) vs Overdrive (VDD = 6.5 V) 35 32.5 30 27.5 25 22.5 20 17.5 15 12.5 10 7.5 5 2.5 0 35 32.5 30 27.5 25 22.5 20 17.5 15 12.5 10 7.5 5 2.5 0 TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C 0 3 6 9 12 15 18 Overdrive (%) 21 24 27 Transient Duration (Ps) Transient Duration (Ps) High-to-low transition occurs above the curve 3 30 Low-to-high transition occurs above the curve Figure 18. Minimum Transient Duration (LH) vs Overdrive (VDD = 1.5 V) TJ = -40°C TJ = 0°C TJ = +25°C TJ = +85°C TJ = +105°C TJ = +125°C 0 3 6 9 12 15 18 Overdrive (%) 21 24 27 30 Low-to-high transition occurs above the curve Figure 19. Minimum Transient Duration (LH) vs Overdrive (VDD = 6.5 V) Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 9 TPS3779, TPS3780 SBVS250 – APRIL 2015 www.ti.com 8 Detailed Description 8.1 Overview The TPS3779 and TPS3780 are a family of small, low quiescent current (IDD), dual-channel voltage detectors. These devices have high-accuracy, rising and falling input thresholds, and assert the output as shown in Table 1. The output (OUTx pin) goes low when the SENSEx pin is less than VIT– and goes high when the pin is greater than VIT+. The TPS3779 and TPS3780 offer multiple hysteresis options from 0.5% to 10% for use in a wide variety of applications. These devices have two independent voltage detection channels that can be used in systems where multiple voltage rails are required to be monitored, or where one channel can be used as an early warning signal and the other channel used as the system reset signal. Table 1. TPS3779, TPS3780 Truth Table CONDITIONS OUTPUT SENSE1 < VIT– OUT1 = low SENSE2 < VIT– OUT2 = low SENSE1 > VIT+ OUT1 = high SENSE2 > VIT+ OUT2 = high 8.2 Functional Block Diagrams VDD VDD SENSE1 OUT1 SENSE2 OUT2 SENSE1 OUT1 SENSE2 OUT2 VIT+ VIT+ TPS3779 10 TPS3780 GND GND Figure 20. TPS3779 Block Diagram Figure 21. TPS3780 Block Diagram Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 TPS3779, TPS3780 www.ti.com SBVS250 – APRIL 2015 8.3 Feature Description 8.3.1 Inputs (SENSE1, SENSE2) The TPS3779 and TPS3780 have two comparators for voltage detection. Each comparator has one external input; the other input is connected to the internal reference. The comparator rising threshold is designed and trimmed to be equal to VIT+ and the falling threshold is trimmed to be equal to VIT–. The built-in falling hysteresis options make the devices immune to supply rail noise and ensure stable operation. The comparator inputs can swing from ground to 6.5 V, regardless of the device supply voltage used. Although not required in most cases, for extremely noisy applications, good analog design practice is to place a 1-nF to 10-nF bypass capacitor at the comparator input in order to reduce sensitivity to transients and layout parasitic. For each SENSE input, the corresponding output (OUTx) is driven to logic low when the input voltage drops below VIT–. When the voltage exceeds VIT+, the output (OUTx) is driven high; see Figure 1. 8.3.2 Outputs (OUT1, OUT2) In a typical device application, the outputs are connected to a reset or enable input of another device, such as a digital signal processor (DSP), central processing unit (CPU), field-programmable gate array (FPGA), or application-specific integrated circuit (ASIC); or the outputs are connected to the enable input of a voltage regulator, such as a dc-dc or low-dropout (LDO) regulator. The TPS3779 provides two push-pull outputs. The logic high level of the outputs is determined by the VDD pin voltage. With this configuration pull-up resistors are not required, thus saving board space. However, all interface logic levels must be examined. All OUT connections must be compatible with the VDD pin logic level. The TPS3780 provides two open-drain outputs (OUT1 and OUT2); pull-up resistors must be used to hold these lines high when the output goes to a high-impedance condition (not asserted). By connecting pull-up resistors to the proper voltage rails, the outputs can be connected to other devices at correct interface voltage levels. The outputs can be pulled up to 6.5 V, independent of the device supply voltage. To ensure proper voltage levels, make sure to choose the correct pull-up resistor values. The pull-up resistor value is determined by VOL, the sink current capability, and the output leakage current (Ilkg(OD)). These values are specified in the Electrical Characteristics table. By using wired-AND logic, OUT1 and OUT2 can be combined into one logic signal. The Inputs (SENSE1, SENSE2) section describes how the outputs are asserted or deasserted. See Figure 1 for a description of the relationship between threshold voltages and the respective output. 8.4 Device Functional Modes 8.4.1 Normal Operation (VDD ≥ VDD(min)) When the voltage on VDD is greater than VDD(min) for tSD, the output signals react to the present state of the corresponding SENSE pins. 8.4.2 Power-On Reset (VDD < V(POR)) When the voltage on VDD is lower than the required voltage to internally pull the logic low output to GND (V(POR)), both outputs are undefined and are not to be relied upon for proper system function. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 11 TPS3779, TPS3780 SBVS250 – APRIL 2015 www.ti.com 9 Application and Implementation 9.1 Application Information The TPS3779 and TPS3780 are used as precision dual-voltage detectors. The monitored voltage, VDD voltage, and output pullup voltage (TPS3780 only) can be independent voltages or connected in any configuration. 9.1.1 Threshold Overdrive Threshold overdrive is how much VDD exceeds the specified threshold, and is important to know because smaller overdrive results in slower OUTx response. Threshold overdrive is calculated as a percent of the threshold in question, as shown in Equation 1: Overdrive = | (VDD / VIT – 1) × 100% | where • VIT is either VIT– or VIT+, depending on whether calculating the overdrive for the negative-going threshold or the positive-going threshold, respectively. (1) Figure 16 illustrates the VDD minimum detectable pulse versus overdrive, and is used to visualize the relationship overdrive has on tPD(f) for negative-going events. 9.1.2 Sense Resistor Divider The resistor divider values and target threshold voltage can be calculated by using Equation 2 and Equation 3 to determine VMON(UV) and VMON(PG), respectively. R1 · § VMON(UV) = ¨ 1 + ¸ × VIT  R2 © ¹ (2) R1 § · VMON(PG) = ¨ 1 + × VIT+ R2 ¸¹ © (3) where • • • R1 and R2 are the resistor values for the resistor divider on the SENSEx pins, VMON(UV) is the target voltage at which an undervoltage condition is detected, and VMON(PG) is the target voltage at which the output goes high when VMONx rises. Choose RTOTAL ( = R1 + R2) so that the current through the divider is approximately 100 times higher than the input current at the SENSEx pins. The resistors can have high values to minimize current consumption as a result of low input bias current without adding significant error to the resistive divider. For details on sizing input resistors, refer to application report SLVA450, Optimizing Resistor Dividers at a Comparator Input, available for download from www.ti.com. 12 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 TPS3779, TPS3780 www.ti.com SBVS250 – APRIL 2015 9.2 Typical Applications 9.3 Monitoring Two Separate Rails VDD = 5 V 0.1 F VMON1 VPUL LU P VDD R1 RPU1 VMON2 SENSE1 R3 R2 OUT1 TPS3780C SENSE2 R4 RPU1 OUT2 To a re set or enable inpu t of the syste m To a re set or enable inpu t of the syste m GND Figure 22. Monitoring Two Separate Rails Schematic 9.3.1 Design Requirements Table 2. Design Parameters PARAMETER DESIGN REQUIREMENT VDD 5V DESIGN RESULT 5V Hysteresis 10% 10% Monitored voltage 1 3.3 V nominal, VMON(PG) = 2.9 V, VMON(UV) = 2.6 V VMON(PG) = 2.908 V, VMON(UV) = 2.618 V Monitored voltage 2 3 V nominal, VMON(PG) = 2.6 V, VMON(UV) = 2.4 V VMON(PG) = 2.606 V, VMON(UV) = 2.371 V Output logic voltage 3.3-V CMOS 3.3-V CMOS 9.3.2 Detailed Design Procedure 1. Select the TPS3780C. The C version is selected to satisfy the hysteresis requirement. The TPS3780 is selected for the output logic requirement. An open-drain output allows for the output to be pulled up to a voltage other than VDD. 2. The resistor divider values are calculated by using Equation 2 and Equation 3. For SENSE1, R1 = 1.13 MΩ and R2 = 787 kΩ. For SENSE2, R3 (R1) = 681 kΩ and R4 (R2) = 576 kΩ. 9.3.3 Application Curve VMON1 (500 mV/div) VMON2(500 mV/div) OUT1 (1 V/div) OUT2 (1 V/div) Time (5 ms/div) Figure 23. Monitoring Two Separate Rails Curve Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 13 TPS3779, TPS3780 SBVS250 – APRIL 2015 www.ti.com 9.4 Early Warning Detection VMON 0.1 F R1 VDD SENSE1 R2 To a re set or enable inpu t of the syste m TPS3779C SENSE2 R3 OUT1 OUT2 To a re set or enable inpu t of the syste m GND Figure 24. Early Warning Detection Schematic 9.4.1 Design Requirements Table 3. Design Parameters PARAMETER DESIGN REQUIREMENT DESIGN RESULT VDD VMON VMON Hysteresis 10% 10% Monitored voltage 1 VMON(PG) = 3.3 V, VMON(UV) = 3 V VMON(PG) = 3.330 V, VMON(UV) = 2.997 V Monitored voltage 2 VMON(PG) = 3.9 V, VMON(UV) = 3.5 V VMON(PG) = 3.921 V, VMON(UV) = 3.529 V 9.4.2 Detailed Design Procedure 1. Select the TPS3779C. The C version is selected to satisfy the hysteresis requirement. The TPS3779 is selected to save on component count and board space. 2. Use Equation 4 to calculate the total resistance for the resistor divider. Determine the minimum total resistance of the resistor network necessary to achieve the current consumption specification. For this example, the current flow through the resistor network is chosen to be 1.41 µA. Use the key transition point for VMON2. For this example, the low-to-high transition, VMON(PG), is considered more important. VMON(PG _ 2) 3.9 V RTOTAL 2.78 M: I 1.41 $ where • • VMON(PG_2) is the target voltage at which OUT2 goes high when VMON2 rises, and I is the current flowing through the resistor network. (4) 3. After RTOTAL is determined, R3 can be calculated using Equation 5. Select the nearest 1% resistor value for R3. In this case, 845 kΩ is the closest value. VIT+ 1.194 V R3 846 k: I 1.41 A (5) 4. Use Equation 6 to calculate R2. Select the nearest 1% resistor value for R2. In this case, 150 kΩ is the closest value. Use the key transition point for VMON1. For this example, the low-to-high transition, VMON(UV), is considered more important. RTOTAL 2.78 M: R2 x VIT   R3 x 1.074 V  845 k: 149 k: VMON(UV _ 1) 3V where • 14 VMON(UV_1) is the target voltage at which OUT1 goes low when VMON1 falls. Submit Documentation Feedback (6) Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 TPS3779, TPS3780 www.ti.com SBVS250 – APRIL 2015 5. Use Equation 7 to calculate R1. Select the nearest 1% resistor value for R1. In this case, 1.78 MΩ is a 1% resistor. R1 RTOTAL  R2  R3 2.78 M:  150 k:  845 k: 1.78 M: (7) 9.4.3 Application Curve VDD = VMON (1 V/div) OUT1 (1 V/div) OUT2 (1 V/div) Time (5 ms/div) Figure 25. Early Warning Detection Curve 10 Power-Supply Recommendations The TPS3779 and TPS3780 are designed to operate from an input voltage supply range between 1.5 V and 6.5 V. An input supply capacitor is not required for this device; however, good analog practice (required for less VDD < 1.5 V) is to place a 0.1-µF or greater capacitor between the VDD pin and the GND pin. This device has a 7-V absolute maximum rating on the VDD pin. If the voltage supply providing power to VDD is susceptible to any large voltage transient that can exceed 7 V, additional precautions must be taken. For applications where SENSE is greater than 0 V before VDD, and subject to a startup slew rate of less than 200 mV per 1 ms, the output can be driven to logic high in error. To correct the output, cycle the SENSE lines below VIT– or sequence SENSE after VDD. 11 Layout 11.1 Layout Guidelines Place the VDD decoupling capacitor close to the device. Avoid using long traces for the VDD supply node. The VDD capacitor, along with parasitic inductance from the supply to the capacitor, can form an LC tank and create ringing with peak voltages above the maximum VDD voltage. 11.2 Layout Example CIN VDD VMON1 R1 VPU 1 6 OUT1 2 5 OUT2 3 4 R5 R2 R3 R6 R4 VPU VMON2 Figure 26. Example SOT23 Layout Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 15 TPS3779, TPS3780 SBVS250 – APRIL 2015 www.ti.com 12 Device and Documentation Support 12.1 Device Support 12.1.1 Development Support 12.1.1.1 Evaluation Modules An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TPS3779 and TPS3780. SLVU796 details the design kits and evaluation modules for TPS3780EVM-154. The EVM can be requested at the Texas Instruments web site through the TPS3779 and TPS3780 product folders, or purchased directly from the TI eStore. 12.1.1.2 Spice Models Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. A SPICE model for the TPS3779 and TPS3780 is available through the respective device product folders under Simulation Models. 12.1.2 Device Nomenclature The TPS3779xyyyz and TPS3780xyyyz are the generic naming conventions for these devices. The TPS3779 and TPS3780 represent the family of these devices; x is used to display the hysteresis version, yyy is reserved for the package designator, and z is the package quantity. • Example: TPS3779CDBVR • Family: TPS3779 (push-pull) • Hysteresis: 10% • DBV Package: 6-pin SOT • Package Quantity: R is for a reel (3000 pieces) 12.2 Documentation Support 12.2.1 Related Documentation 12.2.1.1 Related Documentation For related documentation see the following: • TPS3780EVM-154 Evaluation Module, SLVU796 • Application report SLVA450—Optimizing Resistor Dividers at a Comparator Input 12.3 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 4. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TPS3779 Click here Click here Click here Click here Click here TPS3780 Click here Click here Click here Click here Click here 12.4 Trademarks All trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 16 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 TPS3779, TPS3780 www.ti.com SBVS250 – APRIL 2015 12.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 17 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS3779ADBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE4Q TPS3779ADBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE4Q TPS3779ADRYR ACTIVE SON DRY 6 5000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZQ TPS3779ADRYT ACTIVE SON DRY 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZQ TPS3779BDBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE5Q TPS3779BDBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE5Q TPS3779BDRYR ACTIVE SON DRY 6 5000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZR TPS3779BDRYT ACTIVE SON DRY 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZR TPS3779CDBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE6Q TPS3779CDBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE6Q TPS3779CDRYR ACTIVE SON DRY 6 5000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZT TPS3779CDRYT ACTIVE SON DRY 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZT TPS3779DDBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE7Q TPS3779DDBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE7Q TPS3779DDRYR ACTIVE SON DRY 6 5000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZS TPS3779DDRYT ACTIVE SON DRY 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZS TPS3780ADBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE8Q TPS3780ADBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE8Q TPS3780ADRYR ACTIVE SON DRY 6 5000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 (GJ, ZU) TPS3780ADRYT ACTIVE SON DRY 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 (GJ, ZU) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 10-Dec-2020 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS3780BDBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE9Q TPS3780BDBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PE9Q TPS3780BDRYR ACTIVE SON DRY 6 5000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZV TPS3780BDRYT ACTIVE SON DRY 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZV TPS3780CDBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PF1Q TPS3780CDBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PF1Q TPS3780CDRYR ACTIVE SON DRY 6 5000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZW TPS3780CDRYT ACTIVE SON DRY 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZW TPS3780DDBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PF2Q TPS3780DDBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PF2Q TPS3780DDRYR ACTIVE SON DRY 6 5000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZX TPS3780DDRYT ACTIVE SON DRY 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 125 ZX (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of