User's Guide
SBVU015 – April 2010
TPS3808G01EVM
This user’s guide describes the characteristics, operation, and use of the TPS3808G01EVM (HPA537).
The TPS3808G01EVM is a fully assembled and tested platform for evaluating the performance of the
TPS3808G01, a low quiescent current, programmable-delay supervisory circuit from Texas Instruments in
a 195-mm x 200-mm SOT-23 package. This user’s guide includes setup and configuration instructions, a
complete schematic diagram, bill of materials (BOM), and printed circuit board (PCB) layout drawings for
the evaluation module. Throughout this document, the abbreviation EVM and the term evaluation module
are synonymous with the TPS3808G01EVM unless otherwise noted.
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Contents
Introduction ..................................................................................................................
Setup .........................................................................................................................
Operation .....................................................................................................................
Board Layout ................................................................................................................
Schematic and Bill of Materials ...........................................................................................
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2
3
5
8
List of Figures
Using the TPS3808G01EVM as a Single-Rail Monitor
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2
Using the TPS3808G01EVM as a Dual-Rail Monitor
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3
4
5
6
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Using the TPS3808G01EVM with Fixed-Voltage TPS3808Gxx ......................................................
Top Layer Assembly ........................................................................................................
Top Layer Routing ..........................................................................................................
Bottom Layer Routing ......................................................................................................
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Introduction
The TPS3808G01 evaluation module (EVM) helps designers evaluate the operation and performance of
the TPS3808Gxx supervisor in a 195-mm x 200-mm SOT-23 package. The TPS3808Gxx is a low
quiescent current, programmable-delay supervisory circuit with either an adjustable or fixed threshold
voltage. The threshold voltage is indicated by the last two digits of the part number, with 01 indicating the
adjustable version and other values indicating various fixed thresholds.
This document describes the configuration and set up of the TPS3808G01EVM board.
All trademarks are the property of their respective owners.
SBVU015 – April 2010
TPS3808G01EVM
Copyright © 2010, Texas Instruments Incorporated
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Setup
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Setup
This section describes the jumpers and connectors on the EVM as well as how to properly connect, set
up, and use the TPS3808G01EVM.
2.1
Input / Output Connector Descriptions
J1: RST
This connector is the RST output. Connect this output to a multimeter, oscilloscope, or external circuit
to verify that RST goes low when MONITOR VOLTAGE goes below its threshold.
J2: MR
This connector is the manual reset input of the TPS3808G01. Pulling this pin low causes the device to
signal a reset. For convenience, pull this pin low by placing a short across the connector.
J3: MONITOR VOLTAGE
This connector is the voltage to be monitored. Connect J3 to a power supply or other voltage source.
RST should transition low when this voltage drops below its threshold.
J4: VDD
This connector is the power-supply connection for the TPS3808G01. It can be between 1.7 V and 6.5
V.
J5: GND
This connector is the return connection for the input power supply. It is electrically connected to J6.
J6: GND
This connector is the return connection for the power supply to be monitored. It is electrically
connected to J5.
JP2: RST Pull-Up
Connecting a short across JP2 connects a 10-kΩ pull-up resistor to the RST output.
JP3: Reset Timer
The setting of this jumper configures the reset delay of the device as described in Table 1.
Table 1. Reset Timer Settings
Setting
Description
Open
No connection to CT;
reset delay set to 20 ms
Short connected
across pins 1 and 2
CT connected to a timer capacitor;
reset delay set to 125 ms
Short connected
across pins 2 and 3
CT connected to a pull-up resistor;
reset delay set to 300 ms
JP5: Fixed Rail
Short this jumper for use of a fixed-voltage TPS3808Gxx device.
JP4: Adjustable Rail
Short this jumper for use of the adjustable-voltage TPS3808G01.
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TPS3808G01EVM
SBVU015 – April 2010
Copyright © 2010, Texas Instruments Incorporated
Operation
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JP1: Rail Voltages
The setting of these jumpers configures the threshold of the MONITOR VOLTAGE input, as listed in
Table 2.
Table 2. Monitor Voltage Input Configurations
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Setting
Description
Short 1-2
Threshold set for monitoring 5.0-V rail
Short 3-4
Threshold set for monitoring 3.3-V rail
Short 5-6
Threshold set for monitoring 1.8-V rail
Short 7-8
Threshold set for monitoring 1.2-V rail
Operation
This section provides information about the operation of the TPS3808G01EVM.
3.1
General Operation
The TPS3808G01EVM can be configured as either a single- or dual-rail monitor. As a single-rail monitor,
the device triggers a reset when its own supply rail falls beneath a particular set threshold. As a dual-rail
monitor, the part triggers a reset when an external supply rail is below the threshold.
The TPS3808G01EVM can also be used to evaluate the fixed-voltage devices in the TPS3808Gxx family
with minimal changes to the board. These various configurations are described in detail in the following
sections.
3.1.1
Single-Rail Monitoring
To use the TPS3808G01EVM as a single-rail monitor, connect shorts on JP2 and JP4. Use JP1 to set the
desired level of the voltage rail to be monitored. JP3 can be used to set the duration of the reset signal, or
left open for a fixed 20-ms duration. Connect a power supply to VDD (J4), Monitor Voltage (J3), and GND
(J5 and J6). Connect the RST output (J1) to an oscilloscope, multimeter, or external circuit.
Figure 1 shows a diagram of the proper configuration for single-rail monitoring.
Oscilloscope /
Multimeter /
External Circuit
Power Supply 1
(1.7 V to 6.5 V)
Figure 1. Using the TPS3808G01EVM as a Single-Rail Monitor
SBVU015 – April 2010
TPS3808G01EVM
Copyright © 2010, Texas Instruments Incorporated
3
Operation
3.1.2
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Dual-Rail Monitoring
To use the TPS3808G01EVM as a dual-rail monitor, connect shorts on JP2 and JP4. Use JP1 to set the
desired level of the voltage rail to be monitored. JP3 can be used to set the duration of the reset signal, or
left open for a fixed 20-ms duration. Connect one power supply to VDD (J4) and GND (J5) and a second
power supply (or external rail to be monitored) to Monitor Voltage (J3) and GND (J6). Connect the RST
output (J1) to an oscilloscope, multimeter, or external circuit.
A diagram showing the proper configuration for dual-rail monitoring is given in Figure 2.
Oscilloscope /
Multimeter /
External Circuit
Power Supply 1
(1.7 V to 6.5 V)
Power Supply 2
(1.7 V to 6.5 V)
Figure 2. Using the TPS3808G01EVM as a Dual-Rail Monitor
3.1.3
Using Fixed-Voltage Versions of TPS3808Gxx
It is possible to use the TPS3808G01EVM to evaluate fixed-voltage versions of the TPS3808Gxx as well.
First, the TPS3808G01 device (U1) must be carefully replaced with the desired fixed-voltage TPS3808Gxx
device. Configure the board jumpers so that JP2 and JP5 are shorted and JP4 is open. Again, JP3 may
be used to set the reset signal duration, or simply left open for a fixed 20-ms duration. Connect a power
supply to VDD (J4) and GND (J5). Connect the RST output (J1) to an oscilloscope, multimeter, or external
circuit.
Figure 3 illustrates the proper configuration to evaluate fixed-voltage versions of the TPS3808Gxx.
Oscilloscope /
Multimeter /
External Circuit
Power Supply 1
(1.7 V to 6.5 V)
Figure 3. Using the TPS3808G01EVM with Fixed-Voltage TPS3808Gxx
Note that jumper JP5 shorts VDD (the power supply rail) to the SNS input of the TPS3808Gxx. In order to
configure the TPS3808G01EVM to monitor an external power rail, simply remove the short across JP5
and connect the voltage to be monitored to pin 2 (marked SNS) of the JP5 header. J6 (GND) can be used
as a ground connection for this voltage.
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TPS3808G01EVM
SBVU015 – April 2010
Copyright © 2010, Texas Instruments Incorporated
Board Layout
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Board Layout
This section provides the TPS3808G01EVM board layout and illustrations.
4.1
Layout
NOTE: Board layouts are not to scale. These figures are intended to show how the board is laid
out; they are not intended to be used for manufacturing TPS3808G01EVM PCBs.
Figure 4 through Figure 6 show the PCB layouts.
Figure 4. Top Layer Assembly
SBVU015 – April 2010
TPS3808G01EVM
Copyright © 2010, Texas Instruments Incorporated
5
Board Layout
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Figure 5. Top Layer Routing
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TPS3808G01EVM
SBVU015 – April 2010
Copyright © 2010, Texas Instruments Incorporated
Board Layout
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Figure 6. Bottom Layer Routing
SBVU015 – April 2010
TPS3808G01EVM
Copyright © 2010, Texas Instruments Incorporated
7
Schematic and Bill of Materials
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Schematic and Bill of Materials
This section provides the TPS3808G01EVM bill of materials and schematic.
5.1
Parts List
Table 3 lists the bill of materials for the TPS3808G01EVM.
Table 3. TPS3808G01EVM Bill of Materials (1) (2) (3) (4)
(1)
(2)
(3)
(4)
Count
RefDes
Value
Size
Part Number
MFR
1
C1
0.1 µF
Capacitor, ceramic, low inductance, 10 V, X7R,
10%
Description
0603
STD
STD
1
C2
22 nF
Capacitor, ceramic, low inductance, 10 V, X7R,
10%
0603
STD
STD
1
C3
1 nF
Capacitor, ceramic, 10 V, X7R, 10%
0805
STD
STD
6
J1, J2, J3, J4,
J5, J6
PEC02SAAN
Header, male 2-pin, 100-mil spacing
TH
PEC02SAAN
Sullins
1
JP1
PEC04DAAN
Header, male 2x4-pin, 100-mil spacing
TH
PEC04DAAN
Sullins
3
JP2, JP3, JP4
PEC02SAAN
Header, male 2-pin, 100-mil spacing
TH
PEC02SAAN
Sullins
1
JP5
PEC03SAAN
Header, male 3-pin, 100-mil spacing
TH
PEC03SAAN
Sullins
1
R1
10 kΩ
Resistor, chip, 1/16W, 1%
0603
STD
STD
1
R2
113 kΩ
Resistor, chip, 1/16W, 1%
0603
STD
STD
1
R3
63.4 kΩ
Resistor, chip, 1/16W, 1%
0603
STD
STD
1
R4
100 kΩ
Resistor, chip, 1/16W, 1%
0603
STD
STD
1
R5
30.9 kΩ
Resistor, chip, 1/16W, 1%
0603
STD
STD
1
R6
19.1 kΩ
Resistor, chip, 1/16W, 1%
0603
STD
STD
1
R7
200 kΩ
Resistor, chip, 1/16W, 1%
0603
STD
STD
1
U1
TPS3808G01DBV
SOT23-6
TPS3808G01DBV
TI
1
N/A
PCB, FR-4, 2-Layer, SMOBC, 1.700" x 2.00" x
.062"
HPA537**
Any
5
N/A
Shunt, Open-top
151-8000
Kobiconn
Low quiescent current, programmable-delay
supervisory circuit
These assemblies are ESD sensitive. ESD precautions shall be observed.
These assemblies must be clean and free from flux and all contaminants. Use of no-clean flux is not acceptable.
These assemblies must comply with workmanship standards IPC-A-610 Class 2.
Ref designators marked with an asterisk (**) cannot be substituted. All other components can be substituted with equivalent
manufacturing components.
5.2
Schematic
The schematic for this EVM is appended to this document.
8
TPS3808G01EVM
SBVU015 – April 2010
Copyright © 2010, Texas Instruments Incorporated
Evaluation Board/Kit Important Notice
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are
not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,
including product safety and environmental measures typically found in end products that incorporate such semiconductor
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electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the
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Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30
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Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the
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FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and
can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15
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EVM Warnings and Restrictions
It is important to operate this EVM within the input voltage range of 1.7 V to 6.5 V and the output voltage range of 0 V to 6.5 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are
questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load
specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than +85°C. The EVM is designed to
operate properly with certain components above +85°C as long as the input and output ranges are maintained. These components
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near
these devices during operation, please be aware that these devices may be very warm to the touch.
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