TPS3837J25DBVT

Product Folder Order Now Support & Community Tools & Software Technical Documents TPS3836, TPS3837, TPS3838 SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 TPS383x Nano Power Voltage Supervisor With Selectable Reset Delay 1 Features 3 Description • • The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems. 1 • • • • • Supply current: 220 nA (typical) Precision supply voltage supervision range: 1.8 V, 2.5 V, 3.0 V, and 3.3 V Power-on reset generator with selectable delay time: 10 ms or 200 ms Push and pull RESET output (TPS3836), Push and pull RESET output (TPS3837), or opendrain RESET output (TPS3838) Manual reset 5-pin SOT23 and 2-mm × 2-mm, 6-pin SON packages Temperature range: –40°C to 85°C 2 Applications • • • • • • • Applications using low-power DSPs, microcontrollers, or microprocessors Portable- and battery-powered equipment Intelligent instruments Wireless communication systems Notebook computers Applications using the MSP430™ For automotive systems, see TPS383x-Q1 During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDD and keeps the RESET output active as long as VDD remains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDD rises above the threshold voltage VIT. When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. The TPS3836 has an active-low, push-pull RESET output. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drain RESET output. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C. Device Information(1) PART NUMBER TPS383x PACKAGE BODY SIZE (NOM) WSON (6) 2.00 mm × 2.00 mm SOT (5) 2.90 mm × 1.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application Circuit TPS3836K33 VDD MSP430 VCC CT RESET RST MR T GND Lithium Battery 3.6 V VSS 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS3836, TPS3837, TPS3838 SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 4 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 4 4 4 4 5 5 6 6 7 Absolute Maximum Ratings ...................................... Dissipation Ratings .................................................. ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Timing Requirements ................................................ Switching Characteristics .......................................... Typical Characteristics .............................................. 8 Parameter Measurement Information .................. 8 9 Detailed Description .............................................. 9 8.1 Timing Diagram......................................................... 8 9.1 9.2 9.3 9.4 Overview ................................................................... 9 Functional Block Diagram ......................................... 9 Feature Description................................................... 9 Device Functional Modes........................................ 10 10 Application and Implementation........................ 11 10.1 Application Information.......................................... 11 10.2 Typical Application ............................................... 11 11 Power Supply Recommendations ..................... 13 12 Layout................................................................... 13 12.1 Layout Guidelines ................................................. 13 12.2 Layout Example .................................................... 13 13 Device and Documentation Support ................. 14 13.1 13.2 13.3 13.4 13.5 13.6 Related Links ........................................................ Receiving Notification of Documentation Updates Support Resources ............................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 14 14 14 14 14 14 14 Mechanical, Packaging, and Orderable Information ........................................................... 14 4 Revision History Changes from Revision E (October 2010) to Revision F Page • Changed format to meet latest data sheet standards; changed data sheet title, added Device Information table, Pin Configurations and Functions, Parameter Measurement Information, Detailed Description, Application and Implementation, Power Supply Recommendations, Layout, Receiving Notification of Documentation Updates, and Support Resources sections. Moved existing sections into the new format .......................................................................... 1 • Changed 2x2 WSON to 2-mm × 2-mm WSON in fifth Features bullet .................................................................................. 1 • Changed link to automotive data sheet .................................................................................................................................. 1 • Added full acronym name for DSP to first sentence of Description section .......................................................................... 1 • Changed 2x2 WSON to 2-mm × 2-mm WSON in last paragraph of Description section ...................................................... 1 • Changed Ordering Information table to Device Comparison Table........................................................................................ 3 • Deleted soldering temperature parameter from Absolute Maximum Ratings table ............................................................... 4 • Moved storage temperature range to Absolute Maximum Ratings table ............................................................................... 4 • Changed Handling Ratings table to ESD Ratings .................................................................................................................. 4 • Added Thermal Information table ........................................................................................................................................... 5 • Moved propagation (delay) time maximum values to the TYP column ................................................................................. 6 • Changed propagation times for the high-to-low-level output and low-to-high-level output from: 0.1 µs to: 0.3 µs ................ 6 2 Submit Documentation Feedback Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 TPS3836, TPS3837, TPS3838 www.ti.com SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 5 Device Comparison Table (1) (1) (1) PRODUCT NOMINAL SUPPLY VOLTAGE THRESHOLD VOLTAGE (VIT) (1) TPS383xE18 1.8 V 1.71 V TPS383xJ25 2.5 V 2.25 V TPS383xH30 3.0 V 2.79 V TPS383xL30 3.0 V 2.64 V TPS383xK33 3.3 V 2.93 V For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Custom threshold voltages are available. Minimum order quantities apply. Contact factory for details and availability. 6 Pin Configuration and Functions TPS3838 DRV Package 6-Pin WSON (Top View) (1) VDD 1 GND 2 RESET 3 6 CT GND 5 N/C (1) 4 MR N/C: Not Connected TPS3836 and TPS3838 DBV Package 5-Pin SOT (Top View) CT GND MR 1 5 TPS3837 DBV Package 5-Pin SOT (Top View) VDD CT 1 GND 2 MR 3 5 VDD 4 RESET 2 3 4 RESET Pin Functions PIN NO. I/O DESCRIPTION 1 — Capacitor Time Delay Pin. Connect this pin to GND to set reset delay time to 10 ms. Connect this pin to VDD to set reset delay time to 200 ms. 2 2 — Ground 4 3 3 I N/C 5 — — — No Connect RESET 3 4 — O Active-Low Output Reset. When VDD falls below VIT or when MR activates to logic low, the RESET pin activates to logic low. When VDD rises above VIT plus VHYS and MR deactivates to logic high, RESET deactivates to logic high after reset delay time tD. RESET — — 4 O Active-High Output Reset. When VDD falls below VIT or when MR activates to logic low, the RESET pin activates to logic high. When VDD rises above VIT plus VHYS and MR deactivates to logic high, RESET deactivates to logic low after reset delay time tD. WSON SOT (TPS3836, TPS3838) SOT (TPS3837) CT 6 1 GND 2 MR NAME Manual Reset. When MR activates to logic low, RESET/RESET activates. When MR is inactive, RESET/RESET depends only on the voltage at VDD. If MR is unused, connect to VDD to minimize current consumption. Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 Submit Documentation Feedback 3 TPS3836, TPS3837, TPS3838 SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 www.ti.com Pin Functions (continued) PIN NO. NAME I/O WSON SOT (TPS3836, TPS3838) SOT (TPS3837) 1 5 5 VDD I DESCRIPTION Input Supply Voltage. This device monitors the voltage at the VDD pin. 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN VDD Supply voltage (2) All other pins (2) (3) –0.3 MAX UNIT 7 V 7 V 5 mA Maximum high output current, IOH –5 mA Input clamp current, IIK (VI < 0 or VI > VDD) ±10 mA Output clamp current, IOK (VO < 0 or VO > VDD) ±10 mA Maximum low output current, IOL Continuous total power dissipation See the Thermal Information table Operating temperature, TA –40 85 °C Storage temperature, Tstg –65 150 °C (1) (2) (3) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to GND. If RESET or RESET are pulled above VDD, the internal ESD structure presents an effective 1.5-kΩ resistor between these pins, causing leakage current to flow into the RESET or RESET pin. 7.2 Dissipation Ratings PACKAGE TA < +25°C POWER RATING DERATING FACTOR ABOVE TA = +25°C TA = +70°C POWER RATING TA = +85°C POWER RATING DBV 437 mW 3.5 mW/°C 280 mW 227 mW DRV Low-K (1) 715 mW 7.1 mW/°C 395 mW 285 mW 1540 mW 15.4 mW/°C 845 mW 615 mW DRV High-K (1) (2) (2) The JEDEC low-K (1s) board used to derive this data was a 3in x 3in, two-layer board with 2-ounce copper traces on top of the board. The JEDEC high-K (2s2p) board used to derive this data was a 3in x 3in, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on the top and bottom of the board. 7.3 ESD Ratings VALUE Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 V(ESD) (1) (2) Electrostatic discharge (1) UNIT 4000 Charged device model (CDM), per JEDEC specification JESD22-C101 (2) V 1000 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.4 Recommended Operating Conditions Supply voltage, VDD Voltage CT, MR, RESET, and RESET pins High-level input voltage, VIH 4 Submit Documentation Feedback MIN MAX 1.6 6 V 0 VDD + 0.3 V 0.7 × VDD UNIT V Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 TPS3836, TPS3837, TPS3838 www.ti.com SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 Recommended Operating Conditions (continued) MIN Low-level input voltage, VIL MAX UNIT 0.3 × VDD Input transition rise and fall rate at MR, Δt/ΔV Operating temperature, TA ns/V 85 °C –40 Pullup resistor value V 100 VPullup RESET pin (TPS3838 only) Ω 50 μA 7.5 Thermal Information TPS383x THERMAL METRIC (1) DRV (WSON) DBV (SOT) 6 PINS 5 PINS RθJA Junction-to-ambient thermal resistance 84.7 153.6 RθJC(top) Junction-to-case (top) thermal resistance 85.2 108.1 RθJB Junction-to-board thermal resistance 49.5 33.5 ψJT Junction-to-top characterization parameter 2.9 10.9 ψJB Junction-to-board characterization parameter 48.2 33.1 RθJC(bot) Junction-to-case (bottom) thermal resistance 30.0 n/a (1) UNIT °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953). 7.6 Electrical Characteristics over recommended operating conditions (unless otherwise noted) PARAMETER VOH TEST CONDITIONS RESET (TPS3836) VDD = 3.3 V, IOH = –2 mA RESET (TPS3837) VDD = 1.8 V, IOH = –1 mA RESET (TPS3836, TPS3838) VDD = 1.8 V, IOL = 1 mA RESET (TPS3837) VDD = 3.3 V, IOL = 2 mA High-level output voltage VOL Low-level output voltage Power-up reset voltage (1) VDD ≥ 1.1 V, IOL = 50 μA TPS3837 VDD ≥ 1.1 V, IOL = –50 μA (1) (2) (3) High-level input current V 0.4 V 0.2 V 0.8 × VDD V TPS383xE18 1.66 1.71 1.74 TPS383xJ25 2.18 2.25 2.29 2.70 2.79 2.85 2.56 2.64 2.69 2.84 2.93 2.99 Hysteresis at VDD input MR (3) CT UNIT VDD = 6 V, IOL = 3 mA TA = –40°C to 85°C 1.7 V < VIT < 2.5 V 30 2.5 V < VIT < 3.5 V 40 3.5 V < VIT < 5 V IIH MAX 0.8 × VDD VDD = 3.3 V, IOL = 2 mA TPS383xK33 VHYS TYP VDD = 3.3 V, IOL = –2 mA TPS3836, TPS3838 Negative-going input threshold TPS383xH30 voltage (2) TPS383xL30 VIT VDD = 6 V, IOH = –3 mA MIN V mV 50 MR = 0.7 × VDD, VDD = 6 V –40 CT = VDD = 6 V –25 –60 –100 μA 25 nA The lowest voltage at which the RESET output becomes active. tR, VDD ≥ 15 μs/V. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 μF) should be placed near the supply terminal. If manual reset is unused, MR should be connected to VDD to minimize current consumption. Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 Submit Documentation Feedback 5 TPS3836, TPS3837, TPS3838 SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 www.ti.com Electrical Characteristics (continued) over recommended operating conditions (unless otherwise noted) PARAMETER IIL Low-level input current IOH High-level output current IDD Supply current TEST CONDITIONS MR (3) MIN TYP MAX –200 –340 μA 25 nA 25 nA MR = 0 V, VDD = 6 V –130 CT CT = 0 V, VDD = 6 V –25 TPS3838 VDD = VIT + 0.2 V, VOH = VDD VDD > VIT, VDD < 3 V 220 400 VDD > VIT, VDD > 3 V 250 450 10 15 VDD < VIT Internal pullup resistor at MR CI Input capacitance at MR and CT VI = 0 V to VDD UNIT nA μA 30 kΩ 5 pF 7.7 Timing Requirements At TA = 25°C, RL = 1 MΩ, and CL = 50 pF, unless otherwise noted. PARAMETER tW Pulse duration TEST CONDITIONS MIN TYP At VDD VIH = VIT + 0.2 V, VIL = VIT – 0.2 V 6 At MR VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD 1 MAX UNIT μs 7.8 Switching Characteristics At TA = 25°C, RL = 1 MΩ, and CL = 50 pF, unless otherwise noted. PARAMETER tD TEST CONDITIONS Delay time MIN TYP MAX VDD ≥ VIT + 0.2 V, MR = 0.7 × VDD, CT = GND, (see Timing Diagram) 5 10 15 VDD ≥ VIT + 0.2 V, MR = 0.7 × VDD, CT = VDD, (see Timing Diagram) 100 200 300 UNIT ms Propagation (delay) time, highto-low-level output VDD to RESET delay (TPS3836, TPS3838) VIL = VIT – 0.2 V, VIH = VIT + 0.2 V 10 tPHL VIL = 1.6 V 50 tPLH Propagation (delay) time, low-tohigh-level output VDD to RESET delay (TPS3837) VIL = VIT – 0.2 V, VIH = VIT + 0.2 V 10 VIL = 1.6 V 50 tPHL Propagation (delay) time, highto-low-level output MR to RESET delay (TPS3836, TPS3838) VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIL = 0.7 × VDD 0.3 μs tPLH Propagation (delay) time, low-tohigh-level output MR to RESET delay (TPS3837) VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIL = 0.7 × VDD 0.3 μs 6 Submit Documentation Feedback μs μs Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 TPS3836, TPS3837, TPS3838 www.ti.com SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 7.9 Typical Characteristics Test conditions are TJ = 25°C unless otherwise noted. 100 10 Supply Current (mA) 8 Manual Reset Current (mA) TA = 85°C TA = 25°C TA = 0°C TA = –40°C 6 4 2 0 –100 –200 –300 –400 –500 4 2 Supply Voltage (V) 0 6 –2 Figure 1. Supply Current vs Supply Voltage 4 2 Manual Reset Voltage (V) 6 2.0 1.5 High-Level Output Voltage (V) TA = 85°C TA = 25°C TA = 0°C TA = –40°C 1.0 0.5 0 1.5 1.0 TA = 85°C TA = 25°C TA = 0°C TA = –40°C 0.5 0 0 5 4 2 3 Low-Level Output Current (mA) 1 6 0 7 2 5 4 3 Figure 4. High-Level Output Voltage vs High-Level Output Current 22 Minimum Pulse Duration at VDD (ms) 1.001 1.000 0.999 0.998 0.997 0.996 0.995 –40 1 High-Level Output Current (mA) Figure 3. Low-Level Output Voltage vs Low-Level Output Current Normalized Reset Threshold Voltage (V) 0 Figure 2. Manual Reset Current vs Manual Reset Voltage 2.0 Low-Level Output Voltage (V) TA = 85°C TA = 25°C TA = 0°C TA = –40°C 0 20 18 16 14 12 10 8 6 4 2 0 –15 35 10 Free-Air Temperature (ºC) 60 85 Figure 5. Normalized Reset Threshold Voltage vs Free-Air Temperature 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Threshold Overdrive (V) 1.6 1.8 2.0 Figure 6. Minimum Pulse Duration at VDD vs VDD Threshold Overdrive Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 Submit Documentation Feedback 7 TPS3836, TPS3837, TPS3838 SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 www.ti.com 8 Parameter Measurement Information 8.1 Timing Diagram A B C D E F G VDD VIT < 1.1 V t MR t RESET t Undefined Output tD tD tD Undefined Output Figure 7. Timing Diagram 8 Submit Documentation Feedback Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 TPS3836, TPS3837, TPS3838 www.ti.com SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 9 Detailed Description 9.1 Overview The TPS3836, TPS3837, and TPS3838 devices are a family of nano power voltage supervisors with manual reset and selectable reset delay. 9.2 Functional Block Diagram VDD CT R3 MR C1 R1 S1 + Reset Logic and Timer – RESET (TPS3837-Push-Pull) RESET (TPS3836-Push-Pull TPS3838-Open-Drain) R2 C2 S2 Band-Gap Reference S3 C3 Refresh Timer GND 9.3 Feature Description 9.3.1 Input Voltage (VDD) The VDD pin monitors the input voltage with an internal comparator and when the voltage at VDD falls below VIT, the reset output is asserted to active state after the propagation delay time: tPHL for TPS3836 and TPS3838, tPLH for TPS3837. When VDD rises above VIT plus VHYS and MR is logic high, the reset output deasserts to an inactive state after the reset delay time, tD. Note that the VDD and MR pins have different propagation delays with the same label. 9.3.2 Manual Reset (MR) Manual reset is an active-low logic input that when MR is logic low, the reset output asserts to the active state after the propagation delay: tPHL for TPS3836 and TPS3838, TPLH for TPS3837. Once MR is logic high and VDD is above VIT, the reset output deasserts to an inactive state after the reset delay time, tD. As previously noted, the VDD and MR pins have different propagation delays with the same label. 9.3.3 Selectable Reset Delay (CT) The reset delay, tD, can be configured to 10 ms by connecting CT to GND or 200 ms by connecting CT to VDD. Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 Submit Documentation Feedback 9 TPS3836, TPS3837, TPS3838 SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 www.ti.com Feature Description (continued) 9.3.4 Reset Output (RESET / RESET) TPS3836 is a push-pull, active-low RESET output. The RESET output is logic high when inactive and logic low when active. This device does not require a pullup resistor. TPS3837 is a push-pull, active-high RESET output. The RESET output is logic low when inactive and logic high when active. This device does not require a pullup resistor. TPS3838 is an open-drain, active-low RESET output. The RESET output is logic high when inactive and logic low when active. This device does require a pullup resistor. Refer to Recommended Operating Conditions to determine the recommended value of the pullup resistor. NOTE The reset output is active when VDD is below VIT or MR is logic low. The reset output is inactive when VDD is above VIT plus VHYS and MR is logic high. 9.4 Device Functional Modes Table 1 summarized the various functional modes of the device. Logic high is represented at "H" and logic low is represented by "L". True is represented as "1" and false is represented as "0". Table 1. Function Table (1) (2) 10 RESET (1) RESET (2) MR VDD > VIT L 0 L H L 1 L H H 0 L H H 1 H L TPS3836 and TPS3838. TPS3837 only. Submit Documentation Feedback Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 TPS3836, TPS3837, TPS3838 www.ti.com SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 10 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.1 Application Information The following section describes a typical application for this device. This is to serve as an example only as different applications have different requirements. 10.2 Typical Application In this application, TPS3836K33 monitors a 3.6-V Lithium-ion battery and sends a reset signal to a MCU when the battery reaches undervoltage. TPS3836K33 VDD MSP430 VCC CT RESET RST MR T GND Lithium Battery 3.6 V VSS Figure 8. Typical Application Circuit 10.2.1 Design Requirements This application monitors the 3.6-V battery and triggers a undervoltage fault to the MCU when the battery voltage falls below 3 V. The application does not release the undervoltage fault until the battery voltage is above approximately 3 V for longer than 200 ms typical. The application must not consume more than 1 µA. 10.2.2 Detailed Design Procedure The TPS3836K33 is the correct device variant to choose since the undervoltage threshold for this variant is 2.93 V typical. This meets the undervoltage fault requirement of the application. To achieve releasing the undervoltage fault condition after the battery is above 3 V for 200 ms, connect CT to VDD to select the 200-ms reset delay option. Choosing TPS3836 push-pull variant save a pullup resistor since no pullup resistor is required for the push-pull variant. These family of devices have 450-nA maximum Iq, which meets the current consumption requirement. Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 Submit Documentation Feedback 11 TPS3836, TPS3837, TPS3838 SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 www.ti.com Typical Application (continued) 10.2.3 Application Curves This section shows the voltage monitoring functionality. Figure 9 shows when VDD drops below 2.93 V, the RESET output asserts to active low. Figure 10 shows that when the VDD rises above 2.93 V + 40 mV = approximately 2.97 V for 200 ms, the RESET output deasserts to inactive logic high. VDD VIT = ~2.93 V VDD VIT + VHYS = ~3 V tPHL = ~8.8 µs tD = ~200 ms RESET Figure 9. VDD Falling Below VIT Triggers a RESET Assertion After tPHL 12 Submit Documentation Feedback Figure 10. VDD Rising Above VIT + VHYS for tD Releases RESET to Inactive Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 TPS3836, TPS3837, TPS3838 www.ti.com SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 11 Power Supply Recommendations These devices are designed to operate from an input supply with a voltage range between 1.6 V and 6 V. TI recommends an input supply capacitor between the VDD pin and GND pin. This device has a 7-V absolute maximum rating on the VDD pin. Take extra precautions if the voltage supply providing power to VDD is susceptible to any large voltage transient that can exceed 7 V. 12 Layout 12.1 Layout Guidelines Make sure that the connection to the VDD pin is low impedance. Good analog design practice recommends placing a minimum 0.1-µF ceramic capacitor as near as possible to the VDD pin to GND. If using the TPS3838 variant, be sure to follow the Recommended Operating Conditions to determine the pullup resistor value. Larger transients and faster slew rates on VDD should use larger input capacitors. If not using MR, tie to VDD to reduce current consumption. 12.2 Layout Example CIN Pull-up resistor required for Open-Drain (TPS3838) only CT VDD Rpull-up GND Reset input signal MR RESET (TPS3837) RESET active Figure 11. TPS3836, TPS3837, and TPS3838 Typical Layout Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 Submit Documentation Feedback 13 TPS3836, TPS3837, TPS3838 SLVS292F – JUNE 2000 – REVISED SEPTEMBER 2019 www.ti.com 13 Device and Documentation Support 13.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to order now. Table 2. Related Links PARTS PRODUCT FOLDER ORDER NOW TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TPS3836 Click here Click here Click here Click here Click here TPS3837 Click here Click here Click here Click here Click here TPS3838 Click here Click here Click here Click here Click here 13.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 13.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 13.4 Trademarks MSP430, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 13.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 13.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 14 Submit Documentation Feedback Copyright © 2000–2019, Texas Instruments Incorporated Product Folder Links: TPS3836 TPS3837 TPS3838 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS3836E18DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDNI Samples TPS3836E18DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDNI Samples TPS3836H30DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PHRI Samples TPS3836H30DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PHRI Samples TPS3836J25DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDSI Samples TPS3836J25DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDSI Samples TPS3836K33DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDTI Samples TPS3836K33DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDTI Samples TPS3836K33DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDTI Samples TPS3836L30DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PCAI Samples TPS3836L30DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PCAI Samples TPS3837E18DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDOI Samples TPS3837E18DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDOI Samples TPS3837J25DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDRI Samples TPS3837J25DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDRI Samples TPS3837K33DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDUI Samples TPS3837K33DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDUI Samples TPS3837K33DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDUI Samples TPS3837L30DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PCBI Samples TPS3837L30DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PCBI Samples Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 14-Oct-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS3837L30DBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PCBI Samples TPS3838E18DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDQI Samples TPS3838E18DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDQI Samples TPS3838E18DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDQI Samples TPS3838J25DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDPI Samples TPS3838J25DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDPI Samples TPS3838J25DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDPI Samples TPS3838K33DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDVI Samples TPS3838K33DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDVI Samples TPS3838K33DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDVI Samples TPS3838K33DRVR ACTIVE WSON DRV 6 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 CCS Samples TPS3838K33DRVT ACTIVE WSON DRV 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 CCS Samples TPS3838L30DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PCCI Samples TPS3838L30DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PCCI Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of